395 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --version 42// RUN: %clang_cc1 -triple riscv64-linux-gnu -target-feature +i -emit-llvm -o - %s | FileCheck %s3 4__attribute__((target_clones("default", "arch=+m"))) int foo1(void) {5 return 1;6}7__attribute__((target_clones("default", "arch=+zbb", "arch=+m"))) int foo2(void) { return 2; }8__attribute__((target_clones("default", "arch=+zbb,+c"))) int foo3(void) { return 3; }9__attribute__((target_clones("default", "arch=+zbb,+v"))) int10foo4(void) {11 return 4;12}13__attribute__((target_clones("default"))) int foo5(void) { return 5; }14__attribute__((target_clones("default", "arch=+zvkt"))) int foo6(void) { return 2; }15 16__attribute__((target_clones("default", "arch=+zbb", "arch=+zba", "arch=+zbb,+zba"))) int foo7(void) { return 2; }17__attribute__((target_clones("default", "arch=+zbb;priority=2", "arch=+zba;priority=1", "arch=+zbb,+zba;priority=3"))) int foo8(void) { return 2; }18__attribute__((target_clones("default", "arch=+zbb;priority=1", "priority=2;arch=+zba", "priority=3;arch=+zbb,+zba"))) int foo9(void) { return 2; }19 20 21int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7() + foo8() + foo9(); }22 23//.24// CHECK: @__riscv_feature_bits = external dso_local global { i32, [2 x i64] }25// CHECK: @foo1.ifunc = weak_odr alias i32 (), ptr @foo126// CHECK: @foo2.ifunc = weak_odr alias i32 (), ptr @foo227// CHECK: @foo3.ifunc = weak_odr alias i32 (), ptr @foo328// CHECK: @foo4.ifunc = weak_odr alias i32 (), ptr @foo429// CHECK: @foo5.ifunc = weak_odr alias i32 (), ptr @foo530// CHECK: @foo6.ifunc = weak_odr alias i32 (), ptr @foo631// CHECK: @foo7.ifunc = weak_odr alias i32 (), ptr @foo732// CHECK: @foo8.ifunc = weak_odr alias i32 (), ptr @foo833// CHECK: @foo9.ifunc = weak_odr alias i32 (), ptr @foo934// CHECK: @foo1 = weak_odr ifunc i32 (), ptr @foo1.resolver35// CHECK: @foo2 = weak_odr ifunc i32 (), ptr @foo2.resolver36// CHECK: @foo3 = weak_odr ifunc i32 (), ptr @foo3.resolver37// CHECK: @foo4 = weak_odr ifunc i32 (), ptr @foo4.resolver38// CHECK: @foo5 = weak_odr ifunc i32 (), ptr @foo5.resolver39// CHECK: @foo6 = weak_odr ifunc i32 (), ptr @foo6.resolver40// CHECK: @foo7 = weak_odr ifunc i32 (), ptr @foo7.resolver41// CHECK: @foo8 = weak_odr ifunc i32 (), ptr @foo8.resolver42// CHECK: @foo9 = weak_odr ifunc i32 (), ptr @foo9.resolver43//.44// CHECK-LABEL: define dso_local signext i32 @foo1.default(45// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {46// CHECK-NEXT: entry:47// CHECK-NEXT: ret i32 148//49//50// CHECK-LABEL: define dso_local signext i32 @foo1._m(51// CHECK-SAME: ) #[[ATTR1:[0-9]+]] {52// CHECK-NEXT: entry:53// CHECK-NEXT: ret i32 154//55//56// CHECK-LABEL: define weak_odr ptr @foo1.resolver()57// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {58// CHECK-NEXT: resolver_entry:59// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)60// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 861// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 409662// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 409663// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]64// CHECK: resolver_return:65// CHECK-NEXT: ret ptr @foo1._m66// CHECK: resolver_else:67// CHECK-NEXT: ret ptr @foo1.default68//69//70// CHECK-LABEL: define dso_local signext i32 @foo2.default(71// CHECK-SAME: ) #[[ATTR0]] {72// CHECK-NEXT: entry:73// CHECK-NEXT: ret i32 274//75//76// CHECK-LABEL: define dso_local signext i32 @foo2._zbb(77// CHECK-SAME: ) #[[ATTR2:[0-9]+]] {78// CHECK-NEXT: entry:79// CHECK-NEXT: ret i32 280//81//82// CHECK-LABEL: define dso_local signext i32 @foo2._m(83// CHECK-SAME: ) #[[ATTR1]] {84// CHECK-NEXT: entry:85// CHECK-NEXT: ret i32 286//87//88// CHECK-LABEL: define weak_odr ptr @foo2.resolver()89// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {90// CHECK-NEXT: resolver_entry:91// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)92// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 893// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 26843545694// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 26843545695// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]96// CHECK: resolver_return:97// CHECK-NEXT: ret ptr @foo2._zbb98// CHECK: resolver_else:99// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8100// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 4096101// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 4096102// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]103// CHECK: resolver_return1:104// CHECK-NEXT: ret ptr @foo2._m105// CHECK: resolver_else2:106// CHECK-NEXT: ret ptr @foo2.default107//108//109// CHECK-LABEL: define dso_local signext i32 @foo3.default(110// CHECK-SAME: ) #[[ATTR0]] {111// CHECK-NEXT: entry:112// CHECK-NEXT: ret i32 3113//114//115// CHECK-LABEL: define dso_local signext i32 @foo3._c_zbb(116// CHECK-SAME: ) #[[ATTR3:[0-9]+]] {117// CHECK-NEXT: entry:118// CHECK-NEXT: ret i32 3119//120//121// CHECK-LABEL: define weak_odr ptr @foo3.resolver()122// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {123// CHECK-NEXT: resolver_entry:124// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)125// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8126// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 268435460127// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435460128// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]129// CHECK: resolver_return:130// CHECK-NEXT: ret ptr @foo3._c_zbb131// CHECK: resolver_else:132// CHECK-NEXT: ret ptr @foo3.default133//134//135// CHECK-LABEL: define dso_local signext i32 @foo4.default(136// CHECK-SAME: ) #[[ATTR0]] {137// CHECK-NEXT: entry:138// CHECK-NEXT: ret i32 4139//140//141// CHECK-LABEL: define dso_local signext i32 @foo4._v_zbb(142// CHECK-SAME: ) #[[ATTR4:[0-9]+]] {143// CHECK-NEXT: entry:144// CHECK-NEXT: ret i32 4145//146//147// CHECK-LABEL: define weak_odr ptr @foo4.resolver()148// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {149// CHECK-NEXT: resolver_entry:150// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)151// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8152// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 270532608153// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 270532608154// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]155// CHECK: resolver_return:156// CHECK-NEXT: ret ptr @foo4._v_zbb157// CHECK: resolver_else:158// CHECK-NEXT: ret ptr @foo4.default159//160//161// CHECK-LABEL: define dso_local signext i32 @foo5.default(162// CHECK-SAME: ) #[[ATTR0]] {163// CHECK-NEXT: entry:164// CHECK-NEXT: ret i32 5165//166//167// CHECK-LABEL: define weak_odr ptr @foo5.resolver()168// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {169// CHECK-NEXT: resolver_entry:170// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)171// CHECK-NEXT: ret ptr @foo5.default172//173//174// CHECK-LABEL: define dso_local signext i32 @foo6.default(175// CHECK-SAME: ) #[[ATTR0]] {176// CHECK-NEXT: entry:177// CHECK-NEXT: ret i32 2178//179//180// CHECK-LABEL: define dso_local signext i32 @foo6._zvkt(181// CHECK-SAME: ) #[[ATTR5:[0-9]+]] {182// CHECK-NEXT: entry:183// CHECK-NEXT: ret i32 2184//185//186// CHECK-LABEL: define weak_odr ptr @foo6.resolver()187// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {188// CHECK-NEXT: resolver_entry:189// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)190// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8191// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 576460752303423488192// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 576460752303423488193// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]194// CHECK: resolver_return:195// CHECK-NEXT: ret ptr @foo6._zvkt196// CHECK: resolver_else:197// CHECK-NEXT: ret ptr @foo6.default198//199//200// CHECK-LABEL: define dso_local signext i32 @foo7.default(201// CHECK-SAME: ) #[[ATTR0]] {202// CHECK-NEXT: entry:203// CHECK-NEXT: ret i32 2204//205//206// CHECK-LABEL: define dso_local signext i32 @foo7._zbb(207// CHECK-SAME: ) #[[ATTR2]] {208// CHECK-NEXT: entry:209// CHECK-NEXT: ret i32 2210//211//212// CHECK-LABEL: define dso_local signext i32 @foo7._zba(213// CHECK-SAME: ) #[[ATTR6:[0-9]+]] {214// CHECK-NEXT: entry:215// CHECK-NEXT: ret i32 2216//217//218// CHECK-LABEL: define dso_local signext i32 @foo7._zba_zbb(219// CHECK-SAME: ) #[[ATTR7:[0-9]+]] {220// CHECK-NEXT: entry:221// CHECK-NEXT: ret i32 2222//223//224// CHECK-LABEL: define weak_odr ptr @foo7.resolver()225// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {226// CHECK-NEXT: resolver_entry:227// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)228// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8229// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 268435456230// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435456231// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]232// CHECK: resolver_return:233// CHECK-NEXT: ret ptr @foo7._zbb234// CHECK: resolver_else:235// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8236// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 134217728237// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 134217728238// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]239// CHECK: resolver_return1:240// CHECK-NEXT: ret ptr @foo7._zba241// CHECK: resolver_else2:242// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8243// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 402653184244// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 402653184245// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]246// CHECK: resolver_return3:247// CHECK-NEXT: ret ptr @foo7._zba_zbb248// CHECK: resolver_else4:249// CHECK-NEXT: ret ptr @foo7.default250//251//252// CHECK-LABEL: define dso_local signext i32 @foo8.default(253// CHECK-SAME: ) #[[ATTR0]] {254// CHECK-NEXT: entry:255// CHECK-NEXT: ret i32 2256//257//258// CHECK-LABEL: define dso_local signext i32 @foo8._zbb(259// CHECK-SAME: ) #[[ATTR2]] {260// CHECK-NEXT: entry:261// CHECK-NEXT: ret i32 2262//263//264// CHECK-LABEL: define dso_local signext i32 @foo8._zba(265// CHECK-SAME: ) #[[ATTR6]] {266// CHECK-NEXT: entry:267// CHECK-NEXT: ret i32 2268//269//270// CHECK-LABEL: define dso_local signext i32 @foo8._zba_zbb(271// CHECK-SAME: ) #[[ATTR7]] {272// CHECK-NEXT: entry:273// CHECK-NEXT: ret i32 2274//275//276// CHECK-LABEL: define weak_odr ptr @foo8.resolver()277// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {278// CHECK-NEXT: resolver_entry:279// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)280// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8281// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184282// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184283// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]284// CHECK: resolver_return:285// CHECK-NEXT: ret ptr @foo8._zba_zbb286// CHECK: resolver_else:287// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8288// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 268435456289// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 268435456290// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]291// CHECK: resolver_return1:292// CHECK-NEXT: ret ptr @foo8._zbb293// CHECK: resolver_else2:294// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8295// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 134217728296// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 134217728297// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]298// CHECK: resolver_return3:299// CHECK-NEXT: ret ptr @foo8._zba300// CHECK: resolver_else4:301// CHECK-NEXT: ret ptr @foo8.default302//303//304// CHECK-LABEL: define dso_local signext i32 @foo9.default(305// CHECK-SAME: ) #[[ATTR0]] {306// CHECK-NEXT: entry:307// CHECK-NEXT: ret i32 2308//309//310// CHECK-LABEL: define dso_local signext i32 @foo9._zbb(311// CHECK-SAME: ) #[[ATTR2]] {312// CHECK-NEXT: entry:313// CHECK-NEXT: ret i32 2314//315//316// CHECK-LABEL: define dso_local signext i32 @foo9._zba(317// CHECK-SAME: ) #[[ATTR6]] {318// CHECK-NEXT: entry:319// CHECK-NEXT: ret i32 2320//321//322// CHECK-LABEL: define dso_local signext i32 @foo9._zba_zbb(323// CHECK-SAME: ) #[[ATTR7]] {324// CHECK-NEXT: entry:325// CHECK-NEXT: ret i32 2326//327//328// CHECK-LABEL: define weak_odr ptr @foo9.resolver()329// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {330// CHECK-NEXT: resolver_entry:331// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)332// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8333// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184334// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184335// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]336// CHECK: resolver_return:337// CHECK-NEXT: ret ptr @foo9._zba_zbb338// CHECK: resolver_else:339// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8340// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 134217728341// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 134217728342// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]343// CHECK: resolver_return1:344// CHECK-NEXT: ret ptr @foo9._zba345// CHECK: resolver_else2:346// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8347// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 268435456348// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 268435456349// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]350// CHECK: resolver_return3:351// CHECK-NEXT: ret ptr @foo9._zbb352// CHECK: resolver_else4:353// CHECK-NEXT: ret ptr @foo9.default354//355//356// CHECK-LABEL: define dso_local signext i32 @bar(357// CHECK-SAME: ) #[[ATTR0]] {358// CHECK-NEXT: entry:359// CHECK-NEXT: [[CALL:%.*]] = call signext i32 @foo1()360// CHECK-NEXT: [[CALL1:%.*]] = call signext i32 @foo2()361// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]362// CHECK-NEXT: [[CALL2:%.*]] = call signext i32 @foo3()363// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]364// CHECK-NEXT: [[CALL4:%.*]] = call signext i32 @foo4()365// CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]366// CHECK-NEXT: [[CALL6:%.*]] = call signext i32 @foo5()367// CHECK-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]]368// CHECK-NEXT: [[CALL8:%.*]] = call signext i32 @foo6()369// CHECK-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD7]], [[CALL8]]370// CHECK-NEXT: [[CALL10:%.*]] = call signext i32 @foo7()371// CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD9]], [[CALL10]]372// CHECK-NEXT: [[CALL12:%.*]] = call signext i32 @foo8()373// CHECK-NEXT: [[ADD13:%.*]] = add nsw i32 [[ADD11]], [[CALL12]]374// CHECK-NEXT: [[CALL14:%.*]] = call signext i32 @foo9()375// CHECK-NEXT: [[ADD15:%.*]] = add nsw i32 [[ADD13]], [[CALL14]]376// CHECK-NEXT: ret i32 [[ADD15]]377//378//.379// CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i" }380// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+m,+zmmul" }381// CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zbb" }382// CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+c,+i,+zbb,+zca" }383// CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+d,+f,+i,+v,+zbb,+zicsr,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b" }384// CHECK: attributes #[[ATTR5]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zvkt" }385// CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba" }386// CHECK: attributes #[[ATTR7]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba,+zbb" }387//.388// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}389// CHECK: [[META1:![0-9]+]] = !{i32 1, !"target-abi", !"lp64"}390// CHECK: [[META2:![0-9]+]] = !{i32 6, !"riscv-isa", [[META3:![0-9]+]]}391// CHECK: [[META3]] = !{!"rv64i2p1"}392// CHECK: [[META4:![0-9]+]] = !{i32 8, !"SmallDataLimit", i32 0}393// CHECK: [[META5:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}394//.395