392 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --version 42// RUN: %clang_cc1 -triple riscv64-linux-gnu -target-feature +i -emit-llvm -o - %s | FileCheck %s3 4__attribute__((target_version("arch=+v"))) int foo1(void) { return 1; }5__attribute__((target_version("default"))) int foo1(void) { return 1; }6 7__attribute__((target_version("arch=+zbb"))) int foo2(void) { return 1; }8__attribute__((target_version("arch=+m"))) int foo2(void) { return 1; }9__attribute__((target_version("default"))) int foo2(void) { return 1; }10 11__attribute__((target_version("arch=+zbb,+c"))) int foo3(void) { return 1; }12__attribute__((target_version("arch=+m"))) int foo3(void) { return 1; }13__attribute__((target_version("default"))) int foo3(void) { return 1; }14 15__attribute__((target_version("arch=+zba"))) int foo4(void) { return 1; }16__attribute__((target_version("arch=+zbb"))) int foo4(void) { return 1; }17__attribute__((target_version("arch=+zbb,+zba"))) int foo4(void) { return 1; }18__attribute__((target_version("default"))) int foo4(void) { return 1; }19 20__attribute__((target_version("arch=+zba"))) int foo5(void) { return 1; }21__attribute__((target_version("arch=+zbb,+zba"))) int foo5(void) { return 1; }22__attribute__((target_version("arch=+zbb"))) int foo5(void) { return 1; }23__attribute__((target_version("default"))) int foo5(void) { return 1; }24 25__attribute__((target_version("arch=+zba"))) int foo6(void) { return 1; }26__attribute__((target_version("arch=+zbb"))) int foo6(void) { return 1; }27__attribute__((target_version("arch=+zbb,+zba;priority=10"))) int foo6(void) { return 1; }28__attribute__((target_version("default"))) int foo6(void) { return 1; }29 30__attribute__((target_version("priority=8;arch=+zba"))) int foo7(void) { return 1; }31__attribute__((target_version("arch=+zbb;priority=9"))) int foo7(void) { return 1; }32__attribute__((target_version("arch=+zbb,+zba;priority=10"))) int foo7(void) { return 1; }33__attribute__((target_version("default"))) int foo7(void) { return 1; }34 35int bar() { return foo1() + foo2() + foo3() + foo4() + foo5() + foo6() + foo7(); }36//.37// CHECK: @__riscv_feature_bits = external dso_local global { i32, [2 x i64] }38// CHECK: @foo1 = weak_odr ifunc i32 (), ptr @foo1.resolver39// CHECK: @foo2 = weak_odr ifunc i32 (), ptr @foo2.resolver40// CHECK: @foo3 = weak_odr ifunc i32 (), ptr @foo3.resolver41// CHECK: @foo4 = weak_odr ifunc i32 (), ptr @foo4.resolver42// CHECK: @foo5 = weak_odr ifunc i32 (), ptr @foo5.resolver43// CHECK: @foo6 = weak_odr ifunc i32 (), ptr @foo6.resolver44// CHECK: @foo7 = weak_odr ifunc i32 (), ptr @foo7.resolver45//.46// CHECK-LABEL: define dso_local signext i32 @foo1._v(47// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {48// CHECK-NEXT: entry:49// CHECK-NEXT: ret i32 150//51//52// CHECK-LABEL: define weak_odr ptr @foo1.resolver()53// CHECK-SAME: #[[ATTR_RESOLVER:[0-9]+]] comdat {54// CHECK-NEXT: resolver_entry:55// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)56// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 857// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 209715258// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 209715259// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]60// CHECK: resolver_return:61// CHECK-NEXT: ret ptr @foo1._v62// CHECK: resolver_else:63// CHECK-NEXT: ret ptr @foo1.default64//65//66// CHECK-LABEL: define dso_local signext i32 @foo1.default(67// CHECK-SAME: ) #[[ATTR1:[0-9]+]] {68// CHECK-NEXT: entry:69// CHECK-NEXT: ret i32 170//71//72// CHECK-LABEL: define dso_local signext i32 @foo2._zbb(73// CHECK-SAME: ) #[[ATTR2:[0-9]+]] {74// CHECK-NEXT: entry:75// CHECK-NEXT: ret i32 176//77//78// CHECK-LABEL: define weak_odr ptr @foo2.resolver()79// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {80// CHECK-NEXT: resolver_entry:81// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)82// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 883// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 26843545684// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 26843545685// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]86// CHECK: resolver_return:87// CHECK-NEXT: ret ptr @foo2._zbb88// CHECK: resolver_else:89// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 890// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 409691// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 409692// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]93// CHECK: resolver_return1:94// CHECK-NEXT: ret ptr @foo2._m95// CHECK: resolver_else2:96// CHECK-NEXT: ret ptr @foo2.default97//98//99// CHECK-LABEL: define dso_local signext i32 @foo2._m(100// CHECK-SAME: ) #[[ATTR3:[0-9]+]] {101// CHECK-NEXT: entry:102// CHECK-NEXT: ret i32 1103//104//105// CHECK-LABEL: define dso_local signext i32 @foo2.default(106// CHECK-SAME: ) #[[ATTR1]] {107// CHECK-NEXT: entry:108// CHECK-NEXT: ret i32 1109//110//111// CHECK-LABEL: define dso_local signext i32 @foo3._c_zbb(112// CHECK-SAME: ) #[[ATTR4:[0-9]+]] {113// CHECK-NEXT: entry:114// CHECK-NEXT: ret i32 1115//116//117// CHECK-LABEL: define weak_odr ptr @foo3.resolver()118// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {119// CHECK-NEXT: resolver_entry:120// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)121// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8122// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 268435460123// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435460124// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]125// CHECK: resolver_return:126// CHECK-NEXT: ret ptr @foo3._c_zbb127// CHECK: resolver_else:128// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8129// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 4096130// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 4096131// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]132// CHECK: resolver_return1:133// CHECK-NEXT: ret ptr @foo3._m134// CHECK: resolver_else2:135// CHECK-NEXT: ret ptr @foo3.default136//137//138// CHECK-LABEL: define dso_local signext i32 @foo3._m(139// CHECK-SAME: ) #[[ATTR3]] {140// CHECK-NEXT: entry:141// CHECK-NEXT: ret i32 1142//143//144// CHECK-LABEL: define dso_local signext i32 @foo3.default(145// CHECK-SAME: ) #[[ATTR1]] {146// CHECK-NEXT: entry:147// CHECK-NEXT: ret i32 1148//149//150// CHECK-LABEL: define dso_local signext i32 @foo4._zba(151// CHECK-SAME: ) #[[ATTR5:[0-9]+]] {152// CHECK-NEXT: entry:153// CHECK-NEXT: ret i32 1154//155//156// CHECK-LABEL: define weak_odr ptr @foo4.resolver()157// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {158// CHECK-NEXT: resolver_entry:159// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)160// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8161// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 134217728162// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 134217728163// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]164// CHECK: resolver_return:165// CHECK-NEXT: ret ptr @foo4._zba166// CHECK: resolver_else:167// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8168// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 268435456169// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 268435456170// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]171// CHECK: resolver_return1:172// CHECK-NEXT: ret ptr @foo4._zbb173// CHECK: resolver_else2:174// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8175// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 402653184176// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 402653184177// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]178// CHECK: resolver_return3:179// CHECK-NEXT: ret ptr @foo4._zba_zbb180// CHECK: resolver_else4:181// CHECK-NEXT: ret ptr @foo4.default182//183//184// CHECK-LABEL: define dso_local signext i32 @foo4._zbb(185// CHECK-SAME: ) #[[ATTR2]] {186// CHECK-NEXT: entry:187// CHECK-NEXT: ret i32 1188//189//190// CHECK-LABEL: define dso_local signext i32 @foo4._zba_zbb(191// CHECK-SAME: ) #[[ATTR6:[0-9]+]] {192// CHECK-NEXT: entry:193// CHECK-NEXT: ret i32 1194//195//196// CHECK-LABEL: define dso_local signext i32 @foo4.default(197// CHECK-SAME: ) #[[ATTR1]] {198// CHECK-NEXT: entry:199// CHECK-NEXT: ret i32 1200//201//202// CHECK-LABEL: define dso_local signext i32 @foo5._zba(203// CHECK-SAME: ) #[[ATTR5]] {204// CHECK-NEXT: entry:205// CHECK-NEXT: ret i32 1206//207//208// CHECK-LABEL: define weak_odr ptr @foo5.resolver()209// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {210// CHECK-NEXT: resolver_entry:211// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)212// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8213// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 134217728214// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 134217728215// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]216// CHECK: resolver_return:217// CHECK-NEXT: ret ptr @foo5._zba218// CHECK: resolver_else:219// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8220// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 402653184221// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 402653184222// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]223// CHECK: resolver_return1:224// CHECK-NEXT: ret ptr @foo5._zba_zbb225// CHECK: resolver_else2:226// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8227// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 268435456228// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 268435456229// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]230// CHECK: resolver_return3:231// CHECK-NEXT: ret ptr @foo5._zbb232// CHECK: resolver_else4:233// CHECK-NEXT: ret ptr @foo5.default234//235//236// CHECK-LABEL: define dso_local signext i32 @foo5._zba_zbb(237// CHECK-SAME: ) #[[ATTR6]] {238// CHECK-NEXT: entry:239// CHECK-NEXT: ret i32 1240//241//242// CHECK-LABEL: define dso_local signext i32 @foo5._zbb(243// CHECK-SAME: ) #[[ATTR2]] {244// CHECK-NEXT: entry:245// CHECK-NEXT: ret i32 1246//247//248// CHECK-LABEL: define dso_local signext i32 @foo5.default(249// CHECK-SAME: ) #[[ATTR1]] {250// CHECK-NEXT: entry:251// CHECK-NEXT: ret i32 1252//253//254// CHECK-LABEL: define dso_local signext i32 @foo6._zba(255// CHECK-SAME: ) #[[ATTR5]] {256// CHECK-NEXT: entry:257// CHECK-NEXT: ret i32 1258//259//260// CHECK-LABEL: define weak_odr ptr @foo6.resolver()261// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {262// CHECK-NEXT: resolver_entry:263// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)264// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8265// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184266// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184267// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]268// CHECK: resolver_return:269// CHECK-NEXT: ret ptr @foo6._zba_zbb270// CHECK: resolver_else:271// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8272// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 134217728273// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 134217728274// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]275// CHECK: resolver_return1:276// CHECK-NEXT: ret ptr @foo6._zba277// CHECK: resolver_else2:278// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8279// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 268435456280// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 268435456281// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]282// CHECK: resolver_return3:283// CHECK-NEXT: ret ptr @foo6._zbb284// CHECK: resolver_else4:285// CHECK-NEXT: ret ptr @foo6.default286//287//288// CHECK-LABEL: define dso_local signext i32 @foo6._zbb(289// CHECK-SAME: ) #[[ATTR2]] {290// CHECK-NEXT: entry:291// CHECK-NEXT: ret i32 1292//293//294// CHECK-LABEL: define dso_local signext i32 @foo6._zba_zbb(295// CHECK-SAME: ) #[[ATTR6]] {296// CHECK-NEXT: entry:297// CHECK-NEXT: ret i32 1298//299//300// CHECK-LABEL: define dso_local signext i32 @foo6.default(301// CHECK-SAME: ) #[[ATTR1]] {302// CHECK-NEXT: entry:303// CHECK-NEXT: ret i32 1304//305//306// CHECK-LABEL: define dso_local signext i32 @foo7._zba(307// CHECK-SAME: ) #[[ATTR5]] {308// CHECK-NEXT: entry:309// CHECK-NEXT: ret i32 1310//311//312// CHECK-LABEL: define weak_odr ptr @foo7.resolver()313// CHECK-SAME: #[[ATTR_RESOLVER]] comdat {314// CHECK-NEXT: resolver_entry:315// CHECK-NEXT: call void @__init_riscv_feature_bits(ptr null)316// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8317// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 402653184318// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 402653184319// CHECK-NEXT: br i1 [[TMP2]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]320// CHECK: resolver_return:321// CHECK-NEXT: ret ptr @foo7._zba_zbb322// CHECK: resolver_else:323// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8324// CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 268435456325// CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[TMP4]], 268435456326// CHECK-NEXT: br i1 [[TMP5]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]327// CHECK: resolver_return1:328// CHECK-NEXT: ret ptr @foo7._zbb329// CHECK: resolver_else2:330// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr getelementptr inbounds ({ i32, [2 x i64] }, ptr @__riscv_feature_bits, i32 0, i32 1, i32 0), align 8331// CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], 134217728332// CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP7]], 134217728333// CHECK-NEXT: br i1 [[TMP8]], label [[RESOLVER_RETURN3:%.*]], label [[RESOLVER_ELSE4:%.*]]334// CHECK: resolver_return3:335// CHECK-NEXT: ret ptr @foo7._zba336// CHECK: resolver_else4:337// CHECK-NEXT: ret ptr @foo7.default338//339//340// CHECK-LABEL: define dso_local signext i32 @foo7._zbb(341// CHECK-SAME: ) #[[ATTR2]] {342// CHECK-NEXT: entry:343// CHECK-NEXT: ret i32 1344//345//346// CHECK-LABEL: define dso_local signext i32 @foo7._zba_zbb(347// CHECK-SAME: ) #[[ATTR6]] {348// CHECK-NEXT: entry:349// CHECK-NEXT: ret i32 1350//351//352// CHECK-LABEL: define dso_local signext i32 @foo7.default(353// CHECK-SAME: ) #[[ATTR1]] {354// CHECK-NEXT: entry:355// CHECK-NEXT: ret i32 1356//357//358// CHECK-LABEL: define dso_local signext i32 @bar(359// CHECK-SAME: ) #[[ATTR1]] {360// CHECK-NEXT: entry:361// CHECK-NEXT: [[CALL:%.*]] = call signext i32 @foo1()362// CHECK-NEXT: [[CALL1:%.*]] = call signext i32 @foo2()363// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]364// CHECK-NEXT: [[CALL2:%.*]] = call signext i32 @foo3()365// CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]366// CHECK-NEXT: [[CALL4:%.*]] = call signext i32 @foo4()367// CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[ADD3]], [[CALL4]]368// CHECK-NEXT: [[CALL6:%.*]] = call signext i32 @foo5()369// CHECK-NEXT: [[ADD7:%.*]] = add nsw i32 [[ADD5]], [[CALL6]]370// CHECK-NEXT: [[CALL8:%.*]] = call signext i32 @foo6()371// CHECK-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD7]], [[CALL8]]372// CHECK-NEXT: [[CALL10:%.*]] = call signext i32 @foo7()373// CHECK-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD9]], [[CALL10]]374// CHECK-NEXT: ret i32 [[ADD11]]375//376//.377// CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+d,+f,+i,+v,+zicsr,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b" }378// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i" }379// CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zbb" }380// CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+m,+zmmul" }381// CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+c,+i,+zbb,+zca" }382// CHECK: attributes #[[ATTR5]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba" }383// CHECK: attributes #[[ATTR6]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+64bit,+i,+zba,+zbb" }384//.385// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}386// CHECK: [[META1:![0-9]+]] = !{i32 1, !"target-abi", !"lp64"}387// CHECK: [[META2:![0-9]+]] = !{i32 6, !"riscv-isa", [[META3:![0-9]+]]}388// CHECK: [[META3]] = !{!"rv64i2p1"}389// CHECK: [[META4:![0-9]+]] = !{i32 8, !"SmallDataLimit", i32 0}390// CHECK: [[META5:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}391//.392