117 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s3 4// CHECK-LABEL: @test1(5// CHECK-NEXT: entry:6// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 87// CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 88// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 89// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP0]], i64 32, i64 0) ]10// CHECK-NEXT: store ptr [[TMP0]], ptr [[A_ADDR]], align 811// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 812// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 013// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX]], align 414// CHECK-NEXT: ret i32 [[TMP4]]15//16int test1(int *a) {17 a = __builtin_assume_aligned(a, 32, 0ull);18 return a[0];19}20 21// CHECK-LABEL: @test2(22// CHECK-NEXT: entry:23// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 824// CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 825// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 826// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP0]], i64 32, i64 0) ]27// CHECK-NEXT: store ptr [[TMP0]], ptr [[A_ADDR]], align 828// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 829// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 030// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX]], align 431// CHECK-NEXT: ret i32 [[TMP4]]32//33int test2(int *a) {34 a = __builtin_assume_aligned(a, 32, 0);35 return a[0];36}37 38// CHECK-LABEL: @test3(39// CHECK-NEXT: entry:40// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 841// CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 842// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 843// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP0]], i64 32) ]44// CHECK-NEXT: store ptr [[TMP0]], ptr [[A_ADDR]], align 845// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 846// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 047// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX]], align 448// CHECK-NEXT: ret i32 [[TMP4]]49//50int test3(int *a) {51 a = __builtin_assume_aligned(a, 32);52 return a[0];53}54 55// CHECK-LABEL: @test4(56// CHECK-NEXT: entry:57// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 858// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 459// CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 860// CHECK-NEXT: store i32 [[B:%.*]], ptr [[B_ADDR]], align 461// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 862// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[B_ADDR]], align 463// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i6464// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP0]], i64 32, i64 [[CONV]]) ]65// CHECK-NEXT: store ptr [[TMP0]], ptr [[A_ADDR]], align 866// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 867// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 068// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX]], align 469// CHECK-NEXT: ret i32 [[TMP5]]70//71int test4(int *a, int b) {72 a = __builtin_assume_aligned(a, 32, b);73 return a[0];74}75 76int *m1(void) __attribute__((assume_aligned(64)));77 78// CHECK-LABEL: @test5(79// CHECK-NEXT: entry:80// CHECK-NEXT: [[CALL:%.*]] = call align 64 ptr @m1()81// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CALL]], align 482// CHECK-NEXT: ret i32 [[TMP0]]83//84int test5(void) {85 return *m1();86}87 88int *m2(void) __attribute__((assume_aligned(64, 12)));89 90// CHECK-LABEL: @test6(91// CHECK-NEXT: entry:92// CHECK-NEXT: [[CALL:%.*]] = call ptr @m2()93// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[CALL]], i64 64, i64 12) ]94// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CALL]], align 495// CHECK-NEXT: ret i32 [[TMP0]]96//97int test6(void) {98 return *m2();99}100 101// CHECK-LABEL: @pr43638(102// CHECK-NEXT: entry:103// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8104// CHECK-NEXT: store ptr [[A:%.*]], ptr [[A_ADDR]], align 8105// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8106// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[TMP0]], i64 4294967296) ]107// CHECK-NEXT: store ptr [[TMP0]], ptr [[A_ADDR]], align 8108// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8109// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 0110// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX]], align 4111// CHECK-NEXT: ret i32 [[TMP4]]112//113int pr43638(int *a) {114 a = __builtin_assume_aligned(a, 4294967296);115return a[0];116}117