100 lines · c
1// RUN: %clang_cc1 -triple hexagon -target-cpu hexagonv66 -target-feature +hvxv66 -target-feature +hvx-length128b -emit-llvm -o - %s | FileCheck %s2// REQUIRES: hexagon-registered-target3 4typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(128)))5 __attribute__((aligned(128)));6typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128)))7 __attribute__((aligned(128)));8typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256)))9 __attribute__((aligned(256)));10 11// CHECK-LABEL: @test112// CHECK: call <32 x i32> @llvm.hexagon.V6.vaddcarrysat.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}}, <128 x i1> %{{[0-9]+}})13HEXAGON_Vect1024 test1(void *in, void *out) {14 HEXAGON_Vect1024 v1, v2;15 HEXAGON_Vect1024 *p;16 HEXAGON_VecPred128 q1;17 18 p = (HEXAGON_Vect1024 *)in;19 v1 = *p++;20 v2 = *p++;21 q1 = *p++;22 23 return __builtin_HEXAGON_V6_vaddcarrysat_128B(v1, v2, __builtin_HEXAGON_V6_vandvrt_128B(q1, -1));24}25 26// CHECK-LABEL: @test2627// CHECK: call <32 x i32> @llvm.hexagon.V6.vrotr.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})28HEXAGON_Vect1024 test26(void *in, void *out) {29 HEXAGON_Vect1024 v1, v2;30 HEXAGON_Vect1024 *p;31 32 p = (HEXAGON_Vect1024 *)in;33 v1 = *p++;34 v2 = *p++;35 36 return __builtin_HEXAGON_V6_vrotr_128B(v1, v2);37}38 39// CHECK-LABEL: @test2740// CHECK: call <32 x i32> @llvm.hexagon.V6.vsatdw.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})41HEXAGON_Vect1024 test27(void *in, void *out) {42 HEXAGON_Vect1024 v1, v2;43 HEXAGON_Vect1024 *p;44 45 p = (HEXAGON_Vect1024 *)in;46 v1 = *p++;47 v2 = *p++;48 49 return __builtin_HEXAGON_V6_vsatdw_128B(v1, v2);50}51 52// CHECK-LABEL: @test2853// CHECK: call <64 x i32> @llvm.hexagon.V6.vasr.into.128B(<64 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})54HEXAGON_Vect2048 test28(void *in1, void *in2, void *out) {55 HEXAGON_Vect1024 v1, v2;56 HEXAGON_Vect1024 *p1;57 HEXAGON_Vect2048 *p2;58 HEXAGON_Vect2048 vr;59 60 p1 = (HEXAGON_Vect1024 *)in1;61 v1 = *p1++;62 v2 = *p1++;63 p2 = (HEXAGON_Vect2048 *)in2;64 vr = *p2;65 66 return __builtin_HEXAGON_V6_vasr_into_128B(vr, v1, v2);67}68 69// CHECK-LABEL: @test2970// CHECK: call { <32 x i32>, <128 x i1> } @llvm.hexagon.V6.vaddcarryo.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})71HEXAGON_Vect1024 test29(void *in, void *out) {72 HEXAGON_Vect1024 v1, v2;73 HEXAGON_Vect1024 *p;74 HEXAGON_VecPred128 q1;75 76 p = (HEXAGON_Vect1024 *)in;77 v1 = *p++;78 v2 = *p++;79 q1 = *p++;80 81 return __builtin_HEXAGON_V6_vaddcarryo_128B(v1, v2, &q1);82}83 84// CHECK-LABEL: @test3085// CHECK: call { <32 x i32>, <128 x i1> } @llvm.hexagon.V6.vsubcarryo.128B(<32 x i32> %{{[0-9]+}}, <32 x i32> %{{[0-9]+}})86HEXAGON_Vect1024 test30(void *in, void *out) {87 HEXAGON_Vect1024 v1, v2;88 HEXAGON_Vect1024 *p;89 HEXAGON_VecPred128 q1;90 91 p = (HEXAGON_Vect1024 *)in;92 v1 = *p++;93 v2 = *p++;94 q1 = *p++;95 96 return __builtin_HEXAGON_V6_vsubcarryo_128B(v1, v2, &q1);97}98 99 100