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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2 3// RUN: %clang_cc1 -triple x86_64 -emit-llvm -o - %s | FileCheck %s4//5// Verifies that clang detects memcpy inline version and uses it instead of the builtin.6// Checks alternate version with the `artificial` attribute.7 8typedef unsigned long size_t;9 10// Clang requires these attributes for a function to be redefined.11#define AVAILABLE_EXTERNALLY extern inline __attribute__((always_inline)) __attribute__((gnu_inline))12 13#define AVAILABLE_EXTERNALLY_ALTERNATE extern inline __attribute__((__always_inline__)) __attribute__((__artificial__))14 15// Clang recognizes an inline builtin and renames it to prevent conflict with builtins.16AVAILABLE_EXTERNALLY void *memcpy(void *a, const void *b, size_t c) {17  asm("# memcpy.inline marker");18  return __builtin_memcpy(a, b, c);19}20 21// Clang recognizes an inline builtin and renames it to prevent conflict with builtins.22AVAILABLE_EXTERNALLY_ALTERNATE void *memmove(void *a, const void *b, size_t c) {23  asm("# memmove.inline marker");24  return __builtin_memmove(a, b, c);25}26 27// CHECK-LABEL: @foo(28// CHECK-NEXT:  entry:29// CHECK-NEXT:    [[A_ADDR_I:%.*]] = alloca ptr, align 830// CHECK-NEXT:    [[B_ADDR_I:%.*]] = alloca ptr, align 831// CHECK-NEXT:    [[C_ADDR_I:%.*]] = alloca i64, align 832// CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 833// CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 834// CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 835// CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 836// CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 837// CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 838// CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 839// CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 840// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[C_ADDR]], align 841// CHECK-NEXT:    store ptr [[TMP0]], ptr [[A_ADDR_I]], align 842// CHECK-NEXT:    store ptr [[TMP1]], ptr [[B_ADDR_I]], align 843// CHECK-NEXT:    store i64 [[TMP2]], ptr [[C_ADDR_I]], align 844// CHECK-NEXT:    call void asm sideeffect "# memcpy.inline marker", "~{dirflag},~{fpsr},~{flags}"() #[[ATTR3:[0-9]+]], !srcloc !245// CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR_I]], align 846// CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_I]], align 847// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR_I]], align 848// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 [[TMP4]], i64 [[TMP5]], i1 false)49// CHECK-NEXT:    ret ptr [[TMP3]]50//51void *foo(void *a, const void *b, size_t c) {52  return memcpy(a, b, c);53}54 55// CHECK-LABEL: @foo_alt(56// CHECK-NEXT:  entry:57// CHECK-NEXT:    [[A_ADDR_I:%.*]] = alloca ptr, align 858// CHECK-NEXT:    [[B_ADDR_I:%.*]] = alloca ptr, align 859// CHECK-NEXT:    [[C_ADDR_I:%.*]] = alloca i64, align 860// CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 861// CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 862// CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 863// CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 864// CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 865// CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 866// CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 867// CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 868// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[C_ADDR]], align 869// CHECK-NEXT:    store ptr [[TMP0]], ptr [[A_ADDR_I]], align 870// CHECK-NEXT:    store ptr [[TMP1]], ptr [[B_ADDR_I]], align 871// CHECK-NEXT:    store i64 [[TMP2]], ptr [[C_ADDR_I]], align 872// CHECK-NEXT:    call void asm sideeffect "# memmove.inline marker", "~{dirflag},~{fpsr},~{flags}"() #[[ATTR3]], !srcloc !373// CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR_I]], align 874// CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR_I]], align 875// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR_I]], align 876// CHECK-NEXT:    call void @llvm.memmove.p0.p0.i64(ptr align 1 [[TMP3]], ptr align 1 [[TMP4]], i64 [[TMP5]], i1 false)77// CHECK-NEXT:    ret ptr [[TMP3]]78//79void *foo_alt(void *a, const void *b, size_t c) {80  return memmove(a, b, c);81}82 83// CHECK-LABEL: @bar(84// CHECK-NEXT:  entry:85// CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 886// CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 887// CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 888// CHECK-NEXT:    [[CPY:%.*]] = alloca ptr, align 889// CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 890// CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 891// CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 892// CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[C_ADDR]], align 893// CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[TMP0]], 1094// CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP]] to i6495// CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], ptr @memcpy, ptr @foo96// CHECK-NEXT:    store ptr [[COND]], ptr [[CPY]], align 897// CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[CPY]], align 898// CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 899// CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8100// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR]], align 8101// CHECK-NEXT:    [[CALL:%.*]] = call ptr [[TMP2]](ptr noundef [[TMP3]], ptr noundef [[TMP4]], i64 noundef [[TMP5]])102// CHECK-NEXT:    ret void103//104void bar(void *a, const void *b, size_t c) {105  void *(*cpy)(void *, const void *, size_t) = c > 10 ? memcpy : foo;106  cpy(a, b, c);107}108 109// CHECK-LABEL: @bar_alt(110// CHECK-NEXT:  entry:111// CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8112// CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8113// CHECK-NEXT:    [[C_ADDR:%.*]] = alloca i64, align 8114// CHECK-NEXT:    [[CPY:%.*]] = alloca ptr, align 8115// CHECK-NEXT:    store ptr [[A:%.*]], ptr [[A_ADDR]], align 8116// CHECK-NEXT:    store ptr [[B:%.*]], ptr [[B_ADDR]], align 8117// CHECK-NEXT:    store i64 [[C:%.*]], ptr [[C_ADDR]], align 8118// CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr [[C_ADDR]], align 8119// CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[TMP0]], 10120// CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP]] to i64121// CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], ptr @memmove, ptr @foo_alt122// CHECK-NEXT:    store ptr [[COND]], ptr [[CPY]], align 8123// CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[CPY]], align 8124// CHECK-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[A_ADDR]], align 8125// CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8126// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[C_ADDR]], align 8127// CHECK-NEXT:    [[CALL:%.*]] = call ptr [[TMP2]](ptr noundef [[TMP3]], ptr noundef [[TMP4]], i64 noundef [[TMP5]])128// CHECK-NEXT:    ret void129//130void bar_alt(void *a, const void *b, size_t c) {131  void *(*cpy)(void *, const void *, size_t) = c > 10 ? memmove : foo_alt;132  cpy(a, b, c);133}134