141 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 52// RUN: %clang_cc1 -triple nvptx64-nvidia-cuda -emit-llvm \3// RUN: -fvisibility=hidden -o - %s | FileCheck %s --check-prefix=NVPTX4// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -emit-llvm \5// RUN: -fvisibility=hidden -o - %s | FileCheck %s --check-prefix=AMDGPU6 7// NVPTX-LABEL: define hidden void @_Z1fPv(8// NVPTX-SAME: ptr noundef [[P:%.*]]) #[[ATTR0:[0-9]+]] {9// NVPTX-NEXT: [[ENTRY:.*:]]10// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 811// NVPTX-NEXT: store ptr [[P]], ptr [[P_ADDR]], align 812// NVPTX-NEXT: ret void13//14// AMDGPU-LABEL: define hidden void @_Z1fPv(15// AMDGPU-SAME: ptr noundef [[P:%.*]]) #[[ATTR0:[0-9]+]] {16// AMDGPU-NEXT: [[ENTRY:.*:]]17// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)18// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr19// AMDGPU-NEXT: store ptr [[P]], ptr [[P_ADDR_ASCAST]], align 820// AMDGPU-NEXT: ret void21//22void f(void *p) {}23 24// NVPTX-LABEL: define hidden void @_Z2p1Pv(25// NVPTX-SAME: ptr noundef [[P:%.*]]) #[[ATTR0]] {26// NVPTX-NEXT: [[ENTRY:.*:]]27// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 828// NVPTX-NEXT: store ptr [[P]], ptr [[P_ADDR]], align 829// NVPTX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P_ADDR]], align 830// NVPTX-NEXT: call void @_Z1fPv(ptr noundef [[TMP0]]) #[[ATTR1:[0-9]+]]31// NVPTX-NEXT: ret void32//33// AMDGPU-LABEL: define hidden void @_Z2p1Pv(34// AMDGPU-SAME: ptr noundef [[P:%.*]]) #[[ATTR0]] {35// AMDGPU-NEXT: [[ENTRY:.*:]]36// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)37// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr38// AMDGPU-NEXT: store ptr [[P]], ptr [[P_ADDR_ASCAST]], align 839// AMDGPU-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P_ADDR_ASCAST]], align 840// AMDGPU-NEXT: call void @_Z1fPv(ptr noundef [[TMP0]]) #[[ATTR1:[0-9]+]]41// AMDGPU-NEXT: ret void42//43void p1(void [[clang::address_space(0)]] * p) { f(p); }44// NVPTX-LABEL: define hidden noundef ptr @_Z2p2PU3AS3v(45// NVPTX-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {46// NVPTX-NEXT: [[ENTRY:.*:]]47// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 848// NVPTX-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR]], align 849// NVPTX-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR]], align 850// NVPTX-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr51// NVPTX-NEXT: ret ptr [[TMP1]]52//53// AMDGPU-LABEL: define hidden noundef ptr @_Z2p2PU3AS3v(54// AMDGPU-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {55// AMDGPU-NEXT: [[ENTRY:.*:]]56// AMDGPU-NEXT: [[RETVAL:%.*]] = alloca ptr, align 8, addrspace(5)57// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 4, addrspace(5)58// AMDGPU-NEXT: [[RETVAL_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL]] to ptr59// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr60// AMDGPU-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR_ASCAST]], align 461// AMDGPU-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR_ASCAST]], align 462// AMDGPU-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr63// AMDGPU-NEXT: ret ptr [[TMP1]]64//65void *p2(void [[clang::address_space(3)]] * p) { return p; }66// NVPTX-LABEL: define hidden noundef ptr @_Z2p3PU3AS3v(67// NVPTX-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {68// NVPTX-NEXT: [[ENTRY:.*:]]69// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 870// NVPTX-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR]], align 871// NVPTX-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR]], align 872// NVPTX-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr73// NVPTX-NEXT: ret ptr [[TMP1]]74//75// AMDGPU-LABEL: define hidden noundef ptr @_Z2p3PU3AS3v(76// AMDGPU-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {77// AMDGPU-NEXT: [[ENTRY:.*:]]78// AMDGPU-NEXT: [[RETVAL:%.*]] = alloca ptr, align 8, addrspace(5)79// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 4, addrspace(5)80// AMDGPU-NEXT: [[RETVAL_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL]] to ptr81// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr82// AMDGPU-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR_ASCAST]], align 483// AMDGPU-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR_ASCAST]], align 484// AMDGPU-NEXT: [[TMP1:%.*]] = addrspacecast ptr addrspace(3) [[TMP0]] to ptr85// AMDGPU-NEXT: ret ptr [[TMP1]]86//87void *p3(void [[clang::address_space(3)]] * p) { return p; }88 89struct S {90 S() = default;91 ~S() = default;92 void foo() {}93};94 95S s1;96S [[clang::address_space(1)]] s2;97S [[clang::address_space(3)]] s3;98 99template <typename Ty> void foo(Ty *) {}100 101// NVPTX-LABEL: define hidden void @_Z2t1Pv(102// NVPTX-SAME: ptr noundef [[P:%.*]]) #[[ATTR0]] {103// NVPTX-NEXT: [[ENTRY:.*:]]104// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 8105// NVPTX-NEXT: store ptr [[P]], ptr [[P_ADDR]], align 8106// NVPTX-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P_ADDR]], align 8107// NVPTX-NEXT: call void @_Z3fooIvEvPT_(ptr noundef [[TMP0]]) #[[ATTR1]]108// NVPTX-NEXT: ret void109//110// AMDGPU-LABEL: define hidden void @_Z2t1Pv(111// AMDGPU-SAME: ptr noundef [[P:%.*]]) #[[ATTR0]] {112// AMDGPU-NEXT: [[ENTRY:.*:]]113// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)114// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr115// AMDGPU-NEXT: store ptr [[P]], ptr [[P_ADDR_ASCAST]], align 8116// AMDGPU-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P_ADDR_ASCAST]], align 8117// AMDGPU-NEXT: call void @_Z3fooIvEvPT_(ptr noundef [[TMP0]]) #[[ATTR1]]118// AMDGPU-NEXT: ret void119//120void t1(void *p) { foo(p); }121// NVPTX-LABEL: define hidden void @_Z2t3PU3AS3v(122// NVPTX-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {123// NVPTX-NEXT: [[ENTRY:.*:]]124// NVPTX-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 8125// NVPTX-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR]], align 8126// NVPTX-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR]], align 8127// NVPTX-NEXT: call void @_Z3fooIU3AS3vEvPT_(ptr addrspace(3) noundef [[TMP0]]) #[[ATTR1]]128// NVPTX-NEXT: ret void129//130// AMDGPU-LABEL: define hidden void @_Z2t3PU3AS3v(131// AMDGPU-SAME: ptr addrspace(3) noundef [[P:%.*]]) #[[ATTR0]] {132// AMDGPU-NEXT: [[ENTRY:.*:]]133// AMDGPU-NEXT: [[P_ADDR:%.*]] = alloca ptr addrspace(3), align 4, addrspace(5)134// AMDGPU-NEXT: [[P_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P_ADDR]] to ptr135// AMDGPU-NEXT: store ptr addrspace(3) [[P]], ptr [[P_ADDR_ASCAST]], align 4136// AMDGPU-NEXT: [[TMP0:%.*]] = load ptr addrspace(3), ptr [[P_ADDR_ASCAST]], align 4137// AMDGPU-NEXT: call void @_Z3fooIU3AS3vEvPT_(ptr addrspace(3) noundef [[TMP0]]) #[[ATTR1]]138// AMDGPU-NEXT: ret void139//140void t3(void [[clang::address_space(3)]] *p) { foo(p); }141