394 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 62// RUN: %clang_cc1 -O1 -disable-llvm-passes -emit-llvm %s -o - -triple=x86_64-linux-gnu | FileCheck %s3 4extern volatile int i;5 6// CHECK-LABEL: define dso_local void @_Z8OneCaseLv(7// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {8// CHECK-NEXT: [[ENTRY:.*:]]9// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2:![0-9]+]]10// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [11// CHECK-NEXT: i32 1, label %[[SW_EPILOG]]12// CHECK-NEXT: ], !prof [[PROF6:![0-9]+]]13// CHECK: [[SW_EPILOG]]:14// CHECK-NEXT: ret void15//16void OneCaseL() {17 switch (i) {18 [[likely]] case 1: break;19 }20}21 22// CHECK-LABEL: define dso_local void @_Z8OneCaseUv(23// CHECK-SAME: ) #[[ATTR0]] {24// CHECK-NEXT: [[ENTRY:.*:]]25// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]26// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [27// CHECK-NEXT: i32 1, label %[[SW_BB:.*]]28// CHECK-NEXT: ], !prof [[PROF7:![0-9]+]]29// CHECK: [[SW_BB]]:30// CHECK-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]31// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 132// CHECK-NEXT: store volatile i32 [[INC]], ptr @i, align 4, !tbaa [[INT_TBAA2]]33// CHECK-NEXT: br label %[[SW_EPILOG]]34// CHECK: [[SW_EPILOG]]:35// CHECK-NEXT: ret void36//37void OneCaseU() {38 switch (i) {39 [[unlikely]] case 1: ++i; break;40 }41}42 43// CHECK-LABEL: define dso_local void @_Z10TwoCasesLNv(44// CHECK-SAME: ) #[[ATTR0]] {45// CHECK-NEXT: [[ENTRY:.*:]]46// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]47// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [48// CHECK-NEXT: i32 1, label %[[SW_EPILOG]]49// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]50// CHECK-NEXT: ], !prof [[PROF8:![0-9]+]]51// CHECK: [[SW_EPILOG]]:52// CHECK-NEXT: ret void53//54void TwoCasesLN() {55 switch (i) {56 [[likely]] case 1: break;57 case 2: break;58 }59}60 61// CHECK-LABEL: define dso_local void @_Z10TwoCasesUNv(62// CHECK-SAME: ) #[[ATTR0]] {63// CHECK-NEXT: [[ENTRY:.*:]]64// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]65// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [66// CHECK-NEXT: i32 1, label %[[SW_EPILOG]]67// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]68// CHECK-NEXT: ], !prof [[PROF9:![0-9]+]]69// CHECK: [[SW_EPILOG]]:70// CHECK-NEXT: ret void71//72void TwoCasesUN() {73 switch (i) {74 [[unlikely]] case 1: break;75 case 2: break;76 }77}78 79// CHECK-LABEL: define dso_local void @_Z10TwoCasesLUv(80// CHECK-SAME: ) #[[ATTR0]] {81// CHECK-NEXT: [[ENTRY:.*:]]82// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]83// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [84// CHECK-NEXT: i32 1, label %[[SW_EPILOG]]85// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]86// CHECK-NEXT: ], !prof [[PROF10:![0-9]+]]87// CHECK: [[SW_EPILOG]]:88// CHECK-NEXT: ret void89//90void TwoCasesLU() {91 switch (i) {92 [[likely]] case 1: break;93 [[unlikely]] case 2: break;94 }95}96 97// CHECK-LABEL: define dso_local void @_Z20CasesFallthroughNNLNv(98// CHECK-SAME: ) #[[ATTR0]] {99// CHECK-NEXT: [[ENTRY:.*:]]100// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]101// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [102// CHECK-NEXT: i32 1, label %[[SW_BB:.*]]103// CHECK-NEXT: i32 2, label %[[SW_BB]]104// CHECK-NEXT: i32 3, label %[[SW_BB1:.*]]105// CHECK-NEXT: i32 4, label %[[SW_BB1]]106// CHECK-NEXT: ], !prof [[PROF11:![0-9]+]]107// CHECK: [[SW_BB]]:108// CHECK-NEXT: br label %[[SW_BB1]]109// CHECK: [[SW_BB1]]:110// CHECK-NEXT: br label %[[SW_EPILOG]]111// CHECK: [[SW_EPILOG]]:112// CHECK-NEXT: ret void113//114void CasesFallthroughNNLN() {115 switch (i) {116 case 1:117 case 2:118 [[likely]] case 3:119 case 4: break;120 }121}122 123// CHECK-LABEL: define dso_local void @_Z20CasesFallthroughNNUNv(124// CHECK-SAME: ) #[[ATTR0]] {125// CHECK-NEXT: [[ENTRY:.*:]]126// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]127// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [128// CHECK-NEXT: i32 1, label %[[SW_BB:.*]]129// CHECK-NEXT: i32 2, label %[[SW_BB]]130// CHECK-NEXT: i32 3, label %[[SW_BB1:.*]]131// CHECK-NEXT: i32 4, label %[[SW_BB1]]132// CHECK-NEXT: ], !prof [[PROF12:![0-9]+]]133// CHECK: [[SW_BB]]:134// CHECK-NEXT: br label %[[SW_BB1]]135// CHECK: [[SW_BB1]]:136// CHECK-NEXT: br label %[[SW_EPILOG]]137// CHECK: [[SW_EPILOG]]:138// CHECK-NEXT: ret void139//140void CasesFallthroughNNUN() {141 switch (i) {142 case 1:143 case 2:144 [[unlikely]] case 3:145 case 4: break;146 }147}148 149// CHECK-LABEL: define dso_local void @_Z28CasesFallthroughRangeSmallLNv(150// CHECK-SAME: ) #[[ATTR0]] {151// CHECK-NEXT: [[ENTRY:.*:]]152// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]153// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [154// CHECK-NEXT: i32 1, label %[[SW_BB:.*]]155// CHECK-NEXT: i32 2, label %[[SW_BB]]156// CHECK-NEXT: i32 3, label %[[SW_BB]]157// CHECK-NEXT: i32 4, label %[[SW_BB]]158// CHECK-NEXT: i32 5, label %[[SW_BB]]159// CHECK-NEXT: i32 102, label %[[SW_BB1:.*]]160// CHECK-NEXT: i32 103, label %[[SW_BB2:.*]]161// CHECK-NEXT: i32 104, label %[[SW_BB2]]162// CHECK-NEXT: ], !prof [[PROF13:![0-9]+]]163// CHECK: [[SW_BB]]:164// CHECK-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]165// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1166// CHECK-NEXT: store volatile i32 [[INC]], ptr @i, align 4, !tbaa [[INT_TBAA2]]167// CHECK-NEXT: br label %[[SW_BB1]]168// CHECK: [[SW_BB1]]:169// CHECK-NEXT: br label %[[SW_BB2]]170// CHECK: [[SW_BB2]]:171// CHECK-NEXT: br label %[[SW_EPILOG]]172// CHECK: [[SW_EPILOG]]:173// CHECK-NEXT: ret void174//175void CasesFallthroughRangeSmallLN() {176 switch (i) {177 case 1 ... 5: ++i;178 case 102:179 [[likely]] case 103:180 case 104: break;181 }182}183 184// CHECK-LABEL: define dso_local void @_Z28CasesFallthroughRangeSmallUNv(185// CHECK-SAME: ) #[[ATTR0]] {186// CHECK-NEXT: [[ENTRY:.*:]]187// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]188// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_EPILOG:.*]] [189// CHECK-NEXT: i32 1, label %[[SW_BB:.*]]190// CHECK-NEXT: i32 2, label %[[SW_BB]]191// CHECK-NEXT: i32 3, label %[[SW_BB]]192// CHECK-NEXT: i32 4, label %[[SW_BB]]193// CHECK-NEXT: i32 5, label %[[SW_BB]]194// CHECK-NEXT: i32 102, label %[[SW_BB1:.*]]195// CHECK-NEXT: i32 103, label %[[SW_BB2:.*]]196// CHECK-NEXT: i32 104, label %[[SW_BB2]]197// CHECK-NEXT: ], !prof [[PROF14:![0-9]+]]198// CHECK: [[SW_BB]]:199// CHECK-NEXT: [[TMP1:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]200// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1201// CHECK-NEXT: store volatile i32 [[INC]], ptr @i, align 4, !tbaa [[INT_TBAA2]]202// CHECK-NEXT: br label %[[SW_BB1]]203// CHECK: [[SW_BB1]]:204// CHECK-NEXT: br label %[[SW_BB2]]205// CHECK: [[SW_BB2]]:206// CHECK-NEXT: br label %[[SW_EPILOG]]207// CHECK: [[SW_EPILOG]]:208// CHECK-NEXT: ret void209//210void CasesFallthroughRangeSmallUN() {211 switch (i) {212 case 1 ... 5: ++i;213 case 102:214 [[unlikely]] case 103:215 case 104: break;216 }217}218 219// CHECK-LABEL: define dso_local void @_Z29CasesFallthroughRangeLargeLLNv(220// CHECK-SAME: ) #[[ATTR0]] {221// CHECK-NEXT: [[ENTRY:.*:]]222// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]223// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_CASERANGE:.*]] [224// CHECK-NEXT: i32 1003, label %[[SW_BB1:.*]]225// CHECK-NEXT: i32 104, label %[[SW_BB1]]226// CHECK-NEXT: ], !prof [[PROF8]]227// CHECK: [[SW_BB:.*]]:228// CHECK-NEXT: br label %[[SW_BB1]]229// CHECK: [[SW_BB1]]:230// CHECK-NEXT: br label %[[SW_EPILOG:.*]]231// CHECK: [[SW_CASERANGE]]:232// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 0233// CHECK-NEXT: [[INBOUNDS:%.*]] = icmp ule i32 [[TMP1]], 64234// CHECK-NEXT: [[INBOUNDS_EXPVAL:%.*]] = call i1 @llvm.expect.i1(i1 [[INBOUNDS]], i1 true)235// CHECK-NEXT: br i1 [[INBOUNDS_EXPVAL]], label %[[SW_BB]], label %[[SW_EPILOG]]236// CHECK: [[SW_EPILOG]]:237// CHECK-NEXT: ret void238//239void CasesFallthroughRangeLargeLLN() {240 switch (i) {241 [[likely]] case 0 ... 64:242 [[likely]] case 1003:243 case 104: break;244 }245}246 247// CHECK-LABEL: define dso_local void @_Z29CasesFallthroughRangeLargeUUNv(248// CHECK-SAME: ) #[[ATTR0]] {249// CHECK-NEXT: [[ENTRY:.*:]]250// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]251// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_CASERANGE:.*]] [252// CHECK-NEXT: i32 1003, label %[[SW_BB1:.*]]253// CHECK-NEXT: i32 104, label %[[SW_BB1]]254// CHECK-NEXT: ], !prof [[PROF9]]255// CHECK: [[SW_BB:.*]]:256// CHECK-NEXT: br label %[[SW_BB1]]257// CHECK: [[SW_BB1]]:258// CHECK-NEXT: br label %[[SW_EPILOG:.*]]259// CHECK: [[SW_CASERANGE]]:260// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 0261// CHECK-NEXT: [[INBOUNDS:%.*]] = icmp ule i32 [[TMP1]], 64262// CHECK-NEXT: [[INBOUNDS_EXPVAL:%.*]] = call i1 @llvm.expect.i1(i1 [[INBOUNDS]], i1 false)263// CHECK-NEXT: br i1 [[INBOUNDS_EXPVAL]], label %[[SW_BB]], label %[[SW_EPILOG]]264// CHECK: [[SW_EPILOG]]:265// CHECK-NEXT: ret void266//267void CasesFallthroughRangeLargeUUN() {268 switch (i) {269 [[unlikely]] case 0 ... 64:270 [[unlikely]] case 1003:271 case 104: break;272 }273}274 275// CHECK-LABEL: define dso_local void @_Z15OneCaseDefaultLv(276// CHECK-SAME: ) #[[ATTR0]] {277// CHECK-NEXT: [[ENTRY:.*:]]278// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]279// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_DEFAULT:.*]] [280// CHECK-NEXT: i32 1, label %[[SW_EPILOG:.*]]281// CHECK-NEXT: ], !prof [[PROF15:![0-9]+]]282// CHECK: [[SW_DEFAULT]]:283// CHECK-NEXT: br label %[[SW_EPILOG]]284// CHECK: [[SW_EPILOG]]:285// CHECK-NEXT: ret void286//287void OneCaseDefaultL() {288 switch (i) {289 case 1: break;290 [[likely]] default: break;291 }292}293 294// CHECK-LABEL: define dso_local void @_Z15OneCaseDefaultUv(295// CHECK-SAME: ) #[[ATTR0]] {296// CHECK-NEXT: [[ENTRY:.*:]]297// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]298// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_DEFAULT:.*]] [299// CHECK-NEXT: i32 1, label %[[SW_EPILOG:.*]]300// CHECK-NEXT: ], !prof [[PROF16:![0-9]+]]301// CHECK: [[SW_DEFAULT]]:302// CHECK-NEXT: br label %[[SW_EPILOG]]303// CHECK: [[SW_EPILOG]]:304// CHECK-NEXT: ret void305//306void OneCaseDefaultU() {307 switch (i) {308 case 1: break;309 [[unlikely]] default: break;310 }311}312 313// CHECK-LABEL: define dso_local void @_Z18TwoCasesDefaultLNLv(314// CHECK-SAME: ) #[[ATTR0]] {315// CHECK-NEXT: [[ENTRY:.*:]]316// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]317// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_DEFAULT:.*]] [318// CHECK-NEXT: i32 1, label %[[SW_EPILOG:.*]]319// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]320// CHECK-NEXT: ], !prof [[PROF17:![0-9]+]]321// CHECK: [[SW_DEFAULT]]:322// CHECK-NEXT: br label %[[SW_EPILOG]]323// CHECK: [[SW_EPILOG]]:324// CHECK-NEXT: ret void325//326void TwoCasesDefaultLNL() {327 switch (i) {328 [[likely]] case 1: break;329 case 2: break;330 [[likely]] default: break;331 }332}333 334// CHECK-LABEL: define dso_local void @_Z18TwoCasesDefaultLNNv(335// CHECK-SAME: ) #[[ATTR0]] {336// CHECK-NEXT: [[ENTRY:.*:]]337// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]338// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_DEFAULT:.*]] [339// CHECK-NEXT: i32 1, label %[[SW_EPILOG:.*]]340// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]341// CHECK-NEXT: ], !prof [[PROF8]]342// CHECK: [[SW_DEFAULT]]:343// CHECK-NEXT: br label %[[SW_EPILOG]]344// CHECK: [[SW_EPILOG]]:345// CHECK-NEXT: ret void346//347void TwoCasesDefaultLNN() {348 switch (i) {349 [[likely]] case 1: break;350 case 2: break;351 default: break;352 }353}354 355// CHECK-LABEL: define dso_local void @_Z18TwoCasesDefaultLNUv(356// CHECK-SAME: ) #[[ATTR0]] {357// CHECK-NEXT: [[ENTRY:.*:]]358// CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr @i, align 4, !tbaa [[INT_TBAA2]]359// CHECK-NEXT: switch i32 [[TMP0]], label %[[SW_DEFAULT:.*]] [360// CHECK-NEXT: i32 1, label %[[SW_EPILOG:.*]]361// CHECK-NEXT: i32 2, label %[[SW_EPILOG]]362// CHECK-NEXT: ], !prof [[PROF18:![0-9]+]]363// CHECK: [[SW_DEFAULT]]:364// CHECK-NEXT: br label %[[SW_EPILOG]]365// CHECK: [[SW_EPILOG]]:366// CHECK-NEXT: ret void367//368void TwoCasesDefaultLNU() {369 switch (i) {370 [[likely]] case 1: break;371 case 2: break;372 [[unlikely]] default: break;373 }374}375//.376// CHECK: [[INT_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}377// CHECK: [[META3]] = !{!"int", [[META4:![0-9]+]], i64 0}378// CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}379// CHECK: [[META5]] = !{!"Simple C++ TBAA"}380// CHECK: [[PROF6]] = !{!"branch_weights", i32 357913942, i32 715827883}381// CHECK: [[PROF7]] = !{!"branch_weights", i32 536870912, i32 1}382// CHECK: [[PROF8]] = !{!"branch_weights", i32 238609295, i32 715827883, i32 238609295}383// CHECK: [[PROF9]] = !{!"branch_weights", i32 357913942, i32 1, i32 357913942}384// CHECK: [[PROF10]] = !{!"branch_weights", i32 357913942, i32 715827883, i32 1}385// CHECK: [[PROF11]] = !{!"branch_weights", i32 143165577, i32 143165577, i32 143165577, i32 715827883, i32 143165577}386// CHECK: [[PROF12]] = !{!"branch_weights", i32 214748365, i32 214748365, i32 214748365, i32 1, i32 214748365}387// CHECK: [[PROF13]] = !{!"branch_weights", i32 79536432, i32 79536432, i32 79536432, i32 79536432, i32 79536432, i32 79536432, i32 79536432, i32 715827883, i32 79536432}388// CHECK: [[PROF14]] = !{!"branch_weights", i32 119304648, i32 119304648, i32 119304648, i32 119304648, i32 119304648, i32 119304648, i32 119304648, i32 1, i32 119304648}389// CHECK: [[PROF15]] = !{!"branch_weights", i32 715827883, i32 357913942}390// CHECK: [[PROF16]] = !{!"branch_weights", i32 1, i32 536870912}391// CHECK: [[PROF17]] = !{!"branch_weights", i32 536870912, i32 536870912, i32 268435456}392// CHECK: [[PROF18]] = !{!"branch_weights", i32 1, i32 715827883, i32 357913942}393//.394