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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -o - %s | FileCheck %s3 4typedef struct { struct {} a; } empty;5 6// CHECK-LABEL: @_Z17empty_record_testiz(7// CHECK-NEXT:  entry:8// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 49// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 1610// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 411// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 012// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])13// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 014// CHECK-NEXT:    ret void15//16empty empty_record_test(int z, ...) {17  __builtin_va_list list;18  __builtin_va_start(list, z);19  return __builtin_va_arg(list, empty);20}21 22typedef struct {23  struct{} a;24  double b;25} s1;26 27// CHECK-LABEL: @_Z1fiz(28// CHECK-NEXT:  entry:29// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S1:%.*]], align 830// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 431// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 1632// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S1]], align 833// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 434// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 035// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])36// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 037// CHECK-NEXT:    [[FP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 138// CHECK-NEXT:    [[FP_OFFSET:%.*]] = load i32, ptr [[FP_OFFSET_P]], align 439// CHECK-NEXT:    [[FITS_IN_FP:%.*]] = icmp ule i32 [[FP_OFFSET]], 16040// CHECK-NEXT:    br i1 [[FITS_IN_FP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]41// CHECK:       vaarg.in_reg:42// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 343// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 1644// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[FP_OFFSET]]45// CHECK-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP1]], align 846// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 847// CHECK-NEXT:    store double [[TMP2]], ptr [[TMP3]], align 848// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[FP_OFFSET]], 1649// CHECK-NEXT:    store i32 [[TMP4]], ptr [[FP_OFFSET_P]], align 450// CHECK-NEXT:    br label [[VAARG_END:%.*]]51// CHECK:       vaarg.in_mem:52// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 253// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 854// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 1655// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 856// CHECK-NEXT:    br label [[VAARG_END]]57// CHECK:       vaarg.end:58// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]59// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[VAARG_ADDR]], i64 16, i1 false)60// CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[RETVAL]], i64 861// CHECK-NEXT:    [[TMP6:%.*]] = load double, ptr [[TMP5]], align 862// CHECK-NEXT:    ret double [[TMP6]]63//64s1 f(int z, ...) {65  __builtin_va_list list;66  __builtin_va_start(list, z);67  return __builtin_va_arg(list, s1);68}69 70typedef struct {71  struct{} a[5];72  float b;73  float c;74} s2;75 76// CHECK-LABEL: @_Z2f2iz(77// CHECK-NEXT:  entry:78// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S2:%.*]], align 479// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 480// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 1681// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S2]], align 482// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 483// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 084// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])85// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 086// CHECK-NEXT:    [[FP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 187// CHECK-NEXT:    [[FP_OFFSET:%.*]] = load i32, ptr [[FP_OFFSET_P]], align 488// CHECK-NEXT:    [[FITS_IN_FP:%.*]] = icmp ule i32 [[FP_OFFSET]], 16089// CHECK-NEXT:    br i1 [[FITS_IN_FP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]90// CHECK:       vaarg.in_reg:91// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 392// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 1693// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[FP_OFFSET]]94// CHECK-NEXT:    [[TMP2:%.*]] = load <2 x float>, ptr [[TMP1]], align 495// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 896// CHECK-NEXT:    store <2 x float> [[TMP2]], ptr [[TMP3]], align 497// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[FP_OFFSET]], 1698// CHECK-NEXT:    store i32 [[TMP4]], ptr [[FP_OFFSET_P]], align 499// CHECK-NEXT:    br label [[VAARG_END:%.*]]100// CHECK:       vaarg.in_mem:101// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2102// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8103// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16104// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8105// CHECK-NEXT:    br label [[VAARG_END]]106// CHECK:       vaarg.end:107// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]108// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[RETVAL]], ptr align 4 [[VAARG_ADDR]], i64 16, i1 false)109// CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[RETVAL]], i64 8110// CHECK-NEXT:    [[TMP6:%.*]] = load <2 x float>, ptr [[TMP5]], align 4111// CHECK-NEXT:    ret <2 x float> [[TMP6]]112//113s2 f2(int z, ...) {114  __builtin_va_list list;115  __builtin_va_start(list, z);116  return __builtin_va_arg(list, s2);117}118 119typedef struct {120  struct{} a;121  long long b;122} s3;123 124// CHECK-LABEL: @_Z2f3iz(125// CHECK-NEXT:  entry:126// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S3:%.*]], align 8127// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 4128// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 16129// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S3]], align 8130// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 4131// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0132// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])133// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0134// CHECK-NEXT:    [[GP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 0135// CHECK-NEXT:    [[GP_OFFSET:%.*]] = load i32, ptr [[GP_OFFSET_P]], align 16136// CHECK-NEXT:    [[FITS_IN_GP:%.*]] = icmp ule i32 [[GP_OFFSET]], 40137// CHECK-NEXT:    br i1 [[FITS_IN_GP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]138// CHECK:       vaarg.in_reg:139// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 3140// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 16141// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[GP_OFFSET]]142// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8143// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 8144// CHECK-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 8145// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[GP_OFFSET]], 8146// CHECK-NEXT:    store i32 [[TMP4]], ptr [[GP_OFFSET_P]], align 16147// CHECK-NEXT:    br label [[VAARG_END:%.*]]148// CHECK:       vaarg.in_mem:149// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2150// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8151// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16152// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8153// CHECK-NEXT:    br label [[VAARG_END]]154// CHECK:       vaarg.end:155// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]156// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[VAARG_ADDR]], i64 16, i1 false)157// CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[RETVAL]], i64 8158// CHECK-NEXT:    [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8159// CHECK-NEXT:    ret i64 [[TMP6]]160//161s3 f3(int z, ...) {162  __builtin_va_list list;163  __builtin_va_start(list, z);164  return __builtin_va_arg(list, s3);165}166 167typedef struct {168  struct{} a[7];169  short b;170  int c;171} s4;172 173// CHECK-LABEL: @_Z2f4iz(174// CHECK-NEXT:  entry:175// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S4:%.*]], align 4176// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 4177// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 16178// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S4]], align 4179// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 4180// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0181// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])182// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0183// CHECK-NEXT:    [[GP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 0184// CHECK-NEXT:    [[GP_OFFSET:%.*]] = load i32, ptr [[GP_OFFSET_P]], align 16185// CHECK-NEXT:    [[FITS_IN_GP:%.*]] = icmp ule i32 [[GP_OFFSET]], 40186// CHECK-NEXT:    br i1 [[FITS_IN_GP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]187// CHECK:       vaarg.in_reg:188// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 3189// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 16190// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[GP_OFFSET]]191// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 4192// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 8193// CHECK-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 4194// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[GP_OFFSET]], 8195// CHECK-NEXT:    store i32 [[TMP4]], ptr [[GP_OFFSET_P]], align 16196// CHECK-NEXT:    br label [[VAARG_END:%.*]]197// CHECK:       vaarg.in_mem:198// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2199// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8200// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16201// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8202// CHECK-NEXT:    br label [[VAARG_END]]203// CHECK:       vaarg.end:204// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]205// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[RETVAL]], ptr align 4 [[VAARG_ADDR]], i64 16, i1 false)206// CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[RETVAL]], i64 8207// CHECK-NEXT:    [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 4208// CHECK-NEXT:    ret i64 [[TMP6]]209//210s4 f4(int z, ...) {211  __builtin_va_list list;212  __builtin_va_start(list, z);213  return __builtin_va_arg(list, s4);214}215 216typedef struct {217  struct{} a[5];218  float b;219  int c;220} s5;221 222// CHECK-LABEL: @_Z2f5iz(223// CHECK-NEXT:  entry:224// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S5:%.*]], align 4225// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 4226// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 16227// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S5]], align 4228// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 4229// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0230// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])231// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0232// CHECK-NEXT:    [[GP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 0233// CHECK-NEXT:    [[GP_OFFSET:%.*]] = load i32, ptr [[GP_OFFSET_P]], align 16234// CHECK-NEXT:    [[FITS_IN_GP:%.*]] = icmp ule i32 [[GP_OFFSET]], 40235// CHECK-NEXT:    br i1 [[FITS_IN_GP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]236// CHECK:       vaarg.in_reg:237// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 3238// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 16239// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[GP_OFFSET]]240// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 4241// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 8242// CHECK-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 4243// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[GP_OFFSET]], 8244// CHECK-NEXT:    store i32 [[TMP4]], ptr [[GP_OFFSET_P]], align 16245// CHECK-NEXT:    br label [[VAARG_END:%.*]]246// CHECK:       vaarg.in_mem:247// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2248// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8249// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16250// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8251// CHECK-NEXT:    br label [[VAARG_END]]252// CHECK:       vaarg.end:253// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]254// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[RETVAL]], ptr align 4 [[VAARG_ADDR]], i64 16, i1 false)255// CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[RETVAL]], i64 8256// CHECK-NEXT:    [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 4257// CHECK-NEXT:    ret i64 [[TMP6]]258//259s5 f5(int z, ...) {260  __builtin_va_list list;261  __builtin_va_start(list, z);262  return __builtin_va_arg(list, s5);263}264 265typedef struct {266  long long a;267  struct{} b;268} s6;269 270// CHECK-LABEL: @_Z2f6iz(271// CHECK-NEXT:  entry:272// CHECK-NEXT:    [[RETVAL:%.*]] = alloca [[STRUCT_S6:%.*]], align 8273// CHECK-NEXT:    [[Z_ADDR:%.*]] = alloca i32, align 4274// CHECK-NEXT:    [[LIST:%.*]] = alloca [1 x %struct.__va_list_tag], align 16275// CHECK-NEXT:    [[TMP:%.*]] = alloca [[STRUCT_S6]], align 8276// CHECK-NEXT:    store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 4277// CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0278// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])279// CHECK-NEXT:    [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[LIST]], i64 0, i64 0280// CHECK-NEXT:    [[GP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 0281// CHECK-NEXT:    [[GP_OFFSET:%.*]] = load i32, ptr [[GP_OFFSET_P]], align 16282// CHECK-NEXT:    [[FITS_IN_GP:%.*]] = icmp ule i32 [[GP_OFFSET]], 40283// CHECK-NEXT:    br i1 [[FITS_IN_GP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]284// CHECK:       vaarg.in_reg:285// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 3286// CHECK-NEXT:    [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 16287// CHECK-NEXT:    [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[GP_OFFSET]]288// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8289// CHECK-NEXT:    [[TMP3:%.*]] = getelementptr i8, ptr [[TMP]], i32 0290// CHECK-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 8291// CHECK-NEXT:    [[TMP4:%.*]] = add i32 [[GP_OFFSET]], 8292// CHECK-NEXT:    store i32 [[TMP4]], ptr [[GP_OFFSET_P]], align 16293// CHECK-NEXT:    br label [[VAARG_END:%.*]]294// CHECK:       vaarg.in_mem:295// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2296// CHECK-NEXT:    [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8297// CHECK-NEXT:    [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16298// CHECK-NEXT:    store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8299// CHECK-NEXT:    br label [[VAARG_END]]300// CHECK:       vaarg.end:301// CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]302// CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[VAARG_ADDR]], i64 16, i1 false)303// CHECK-NEXT:    [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_S6]], ptr [[RETVAL]], i32 0, i32 0304// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[COERCE_DIVE]], align 8305// CHECK-NEXT:    ret i64 [[TMP5]]306//307s6 f6(int z, ...) {308  __builtin_va_list list;309  __builtin_va_start(list, z);310  return __builtin_va_arg(list, s6);311}312