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1// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.6-compute -finclude-default-header \2// RUN: -emit-llvm -disable-llvm-passes -o - %s | llvm-cxxfilt | FileCheck %s -check-prefixes=CHECK,DXIL3// RUN: %clang_cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute \4// RUN: -emit-llvm -disable-llvm-passes -o - %s | llvm-cxxfilt | FileCheck %s -check-prefixes=CHECK,SPV5 6// CHECK: @[[BufA:.*]] = private unnamed_addr constant [2 x i8] c"A\00", align 17// CHECK: @[[BufB:.*]] = private unnamed_addr constant [2 x i8] c"B\00", align 18// CHECK: @[[BufC:.*]] = private unnamed_addr constant [2 x i8] c"C\00", align 19// CHECK: @[[BufD:.*]] = private unnamed_addr constant [2 x i8] c"D\00", align 110// CHECK: @[[BufE:.*]] = private unnamed_addr constant [2 x i8] c"E\00", align 111 12// different explicit binding for DXIL and SPIR-V13[[vk::binding(12, 2)]]14RWBuffer<float> A[4] : register(u10, space1);15 16[[vk::binding(13)]] // SPIR-V explicit binding 13, set 017RWBuffer<int> B[5]; // DXIL implicit binding in space018 19// same explicit binding for both DXIL and SPIR-V20// (SPIR-V takes the binding from register annotation if there is no vk::binding attribute))21RWBuffer<int> C[3] : register(u2);22 23// implicit binding for both DXIL and SPIR-V in space/set 0 24RWBuffer<double> D[10];25 26// implicit binding for both DXIL and SPIR-V with specified space/set 0 27RWBuffer<uint> E[15] : register(space2);28 29RWStructuredBuffer<float> Out;30 31[numthreads(4,1,1)]32void main() {33 // CHECK: define internal{{.*}} void @main()34 // CHECK: %[[Tmp0:.*]] = alloca %"class.hlsl::RWBuffer35 // CHECK: %[[Tmp1:.*]] = alloca %"class.hlsl::RWBuffer36 // CHECK: %[[Tmp2:.*]] = alloca %"class.hlsl::RWBuffer37 // CHECK: %[[Tmp3:.*]] = alloca %"class.hlsl::RWBuffer38 // CHECK: %[[Tmp4:.*]] = alloca %"class.hlsl::RWBuffer39 40 // Make sure A[2] is translated to a RWBuffer<float>::__createFromBinding call with range 4 and index 241 // and DXIL explicit binding (u10, space1)42 // and SPIR-V explicit binding (binding 12, set 2) 43 // DXIL: call void @hlsl::RWBuffer<float>::__createFromBinding(unsigned int, unsigned int, int, unsigned int, char const*)44 // DXIL-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer") align 4 %[[Tmp0]],45 // DXIL-SAME: i32 noundef 10, i32 noundef 1, i32 noundef 4, i32 noundef 2, ptr noundef @[[BufA]])46 // SPV: call void @hlsl::RWBuffer<float>::__createFromBinding(unsigned int, unsigned int, int, unsigned int, char const*)47 // SPV-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer") align 8 %[[Tmp0]],48 // SPV-SAME: i32 noundef 12, i32 noundef 2, i32 noundef 4, i32 noundef 2, ptr noundef @[[BufA]])49 50 // Make sure B[3] is translated to a RWBuffer<int>::__createFromImplicitBinding call with range 5 and index 351 // and DXIL for implicit binding in space0, order id 052 // and SPIR-V explicit binding (binding 13, set 0)53 // DXIL: call void @hlsl::RWBuffer<int>::__createFromImplicitBinding(unsigned int, unsigned int, int, unsigned int, char const*)54 // DXIL-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.0") align 4 %[[Tmp1]],55 // DXIL-SAME: i32 noundef 0, i32 noundef 0, i32 noundef 5, i32 noundef 3, ptr noundef @[[BufB]])56 // SPV: call void @hlsl::RWBuffer<int>::__createFromBinding(unsigned int, unsigned int, int, unsigned int, char const*)57 // SPV-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.0") align 8 %[[Tmp1]],58 // SPV-SAME: i32 noundef 13, i32 noundef 0, i32 noundef 5, i32 noundef 3, ptr noundef @[[BufB]])59 60 // Make sure C[1] is translated to a RWBuffer<int>::__createFromBinding call with range 3 and index 161 // and DXIL explicit binding (u2, space0)62 // and SPIR-V explicit binding (binding 2, set 0)63 // DXIL: call void @hlsl::RWBuffer<int>::__createFromBinding(unsigned int, unsigned int, int, unsigned int, char const*)64 // DXIL-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.0") align 4 %[[Tmp2]],65 // DXIL-SAME: i32 noundef 2, i32 noundef 0, i32 noundef 3, i32 noundef 1, ptr noundef @[[BufC]])66 // SPV: call void @hlsl::RWBuffer<int>::__createFromBinding(unsigned int, unsigned int, int, unsigned int, char const*)67 // SPV-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.0") align 8 %[[Tmp2]],68 // SPV-SAME: i32 noundef 2, i32 noundef 0, i32 noundef 3, i32 noundef 1, ptr noundef @[[BufC]])69 70 // Make sure D[7] is translated to a RWBuffer<double>::__createFromImplicitBinding call71 // for both DXIL and SPIR-V72 // DXIL: call void @hlsl::RWBuffer<double>::__createFromImplicitBinding(unsigned int, unsigned int, int, unsigned int, char const*)73 // DXIL-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.1") align 4 %[[Tmp3]],74 // DXIL-SAME: i32 noundef 1, i32 noundef 0, i32 noundef 10, i32 noundef 7, ptr noundef @D.str)75 // SPV: call void @hlsl::RWBuffer<double>::__createFromImplicitBinding(unsigned int, unsigned int, int, unsigned int, char const*)76 // SPV-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.1") align 8 %[[Tmp3]],77 // SPV-SAME: i32 noundef 0, i32 noundef 0, i32 noundef 10, i32 noundef 7, ptr noundef @[[BufD]])78 79 // Make sure E[5][0] is translated to RWBuffer<uint>::__createFromImplicitBinding call 80 // for both DXIL and SPIR-V with specified space/set 281 // DXIL: call void @hlsl::RWBuffer<unsigned int>::__createFromImplicitBinding(unsigned int, unsigned int, int, unsigned int, char const*)82 // DXIL-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.2") align 4 %[[Tmp4]],83 // DXIL-SAME: i32 noundef 2, i32 noundef 2, i32 noundef 15, i32 noundef 5, ptr noundef @[[BufE]])84 // SPV: call void @hlsl::RWBuffer<unsigned int>::__createFromImplicitBinding(unsigned int, unsigned int, int, unsigned int, char const*)85 // SPV-SAME: (ptr {{.*}} sret(%"class.hlsl::RWBuffer.2") align 8 %[[Tmp4]],86 // SPV-SAME: i32 noundef 1, i32 noundef 2, i32 noundef 15, i32 noundef 5, ptr noundef @[[BufE]])87 Out[0] = A[2][0] + (float)B[3][0] + (float)C[1][0] + (float)D[7][0] + (float)E[5][0];88}89