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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals all --include-generated-funcs --version 52// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \3// RUN: spirv-unknown-vulkan-compute %s -fnative-int16-type -emit-llvm -disable-llvm-passes \4// RUN: -o - | FileCheck %s5 6[[vk::constant_id(1)]]7const bool bool_const = true;8 9[[vk::constant_id(1)]]10const short short_const = 4;11 12[[vk::constant_id(3)]]13const int int_const = 5;14 15[[vk::constant_id(4)]]16const long long long_const = 8;17 18[[vk::constant_id(5)]]19const unsigned short ushort_const = 10;20 21[[vk::constant_id(6)]]22const unsigned int uint_const = 12;23 24[[vk::constant_id(6)]]25const uint uint_const_2 = 12;26 27[[vk::constant_id(7)]]28const unsigned long long ulong_const = 25;29 30[[vk::constant_id(8)]]31const half half_const = 40.4;32 33[[vk::constant_id(8)]]34const float float_const = 50.5;35 36[[vk::constant_id(9)]]37const double double_const = 100.2;38 39enum E {40 e0 = 10,41 e1 = 20,42 e2 = 3043};44 45[[vk::constant_id(10)]]46const E enum_const = e2;47 48[numthreads(1,1,1)]49void main() {50 bool b = bool_const;51 short s = short_const;52 int i = int_const;53 long long l = long_const;54 unsigned short us = ushort_const;55 unsigned int ui = uint_const;56 uint ui2 = uint_const_2;57 unsigned long long ul = ulong_const;58 half h = half_const;59 float f = float_const;60 double d = double_const;61 E e = enum_const;62}63//.64// CHECK: @_ZL10bool_const = internal addrspace(10) global i32 0, align 465// CHECK: @_ZL11short_const = internal addrspace(10) global i16 0, align 266// CHECK: @_ZL9int_const = internal addrspace(10) global i32 0, align 467// CHECK: @_ZL10long_const = internal addrspace(10) global i64 0, align 868// CHECK: @_ZL12ushort_const = internal addrspace(10) global i16 0, align 269// CHECK: @_ZL10uint_const = internal addrspace(10) global i32 0, align 470// CHECK: @_ZL12uint_const_2 = internal addrspace(10) global i32 0, align 471// CHECK: @_ZL11ulong_const = internal addrspace(10) global i64 0, align 872// CHECK: @_ZL10half_const = internal addrspace(10) global float 0.000000e+00, align 473// CHECK: @_ZL11float_const = internal addrspace(10) global float 0.000000e+00, align 474// CHECK: @_ZL12double_const = internal addrspace(10) global double 0.000000e+00, align 875// CHECK: @_ZL10enum_const = internal addrspace(10) global i32 0, align 476//.77// CHECK-LABEL: define internal spir_func void @_Z4mainv(78// CHECK-SAME: ) #[[ATTR0:[0-9]+]] {79// CHECK-NEXT: [[ENTRY:.*:]]80// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()81// CHECK-NEXT: [[B:%.*]] = alloca i32, align 482// CHECK-NEXT: [[S:%.*]] = alloca i16, align 283// CHECK-NEXT: [[I:%.*]] = alloca i32, align 484// CHECK-NEXT: [[L:%.*]] = alloca i64, align 885// CHECK-NEXT: [[US:%.*]] = alloca i16, align 286// CHECK-NEXT: [[UI:%.*]] = alloca i32, align 487// CHECK-NEXT: [[UI2:%.*]] = alloca i32, align 488// CHECK-NEXT: [[UL:%.*]] = alloca i64, align 889// CHECK-NEXT: [[H:%.*]] = alloca float, align 490// CHECK-NEXT: [[F:%.*]] = alloca float, align 491// CHECK-NEXT: [[D:%.*]] = alloca double, align 892// CHECK-NEXT: [[E:%.*]] = alloca i32, align 493// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(10) @_ZL10bool_const, align 494// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i32 [[TMP1]] to i195// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[LOADEDV]] to i3296// CHECK-NEXT: store i32 [[STOREDV]], ptr [[B]], align 497// CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr addrspace(10) @_ZL11short_const, align 298// CHECK-NEXT: store i16 [[TMP2]], ptr [[S]], align 299// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(10) @_ZL9int_const, align 4100// CHECK-NEXT: store i32 [[TMP3]], ptr [[I]], align 4101// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr addrspace(10) @_ZL10long_const, align 8102// CHECK-NEXT: store i64 [[TMP4]], ptr [[L]], align 8103// CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr addrspace(10) @_ZL12ushort_const, align 2104// CHECK-NEXT: store i16 [[TMP5]], ptr [[US]], align 2105// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(10) @_ZL10uint_const, align 4106// CHECK-NEXT: store i32 [[TMP6]], ptr [[UI]], align 4107// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(10) @_ZL12uint_const_2, align 4108// CHECK-NEXT: store i32 [[TMP7]], ptr [[UI2]], align 4109// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr addrspace(10) @_ZL11ulong_const, align 8110// CHECK-NEXT: store i64 [[TMP8]], ptr [[UL]], align 8111// CHECK-NEXT: [[TMP9:%.*]] = load float, ptr addrspace(10) @_ZL10half_const, align 4112// CHECK-NEXT: store float [[TMP9]], ptr [[H]], align 4113// CHECK-NEXT: [[TMP10:%.*]] = load float, ptr addrspace(10) @_ZL11float_const, align 4114// CHECK-NEXT: store float [[TMP10]], ptr [[F]], align 4115// CHECK-NEXT: [[TMP11:%.*]] = load double, ptr addrspace(10) @_ZL12double_const, align 8116// CHECK-NEXT: store double [[TMP11]], ptr [[D]], align 8117// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(10) @_ZL10enum_const, align 4118// CHECK-NEXT: store i32 [[TMP12]], ptr [[E]], align 4119// CHECK-NEXT: ret void120//121// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init(122// CHECK-SAME: ) #[[ATTR3:[0-9]+]] {123// CHECK-NEXT: [[ENTRY:.*:]]124// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()125// CHECK-NEXT: [[TMP1:%.*]] = call i1 @_Z20__spirv_SpecConstantib(i32 1, i1 true)126// CHECK-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP1]] to i32127// CHECK-NEXT: store i32 [[STOREDV]], ptr addrspace(10) @_ZL10bool_const, align 4128// CHECK-NEXT: ret void129//130//131// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.1(132// CHECK-SAME: ) #[[ATTR3]] {133// CHECK-NEXT: [[ENTRY:.*:]]134// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()135// CHECK-NEXT: [[TMP1:%.*]] = call i16 @_Z20__spirv_SpecConstantis(i32 1, i16 4)136// CHECK-NEXT: store i16 [[TMP1]], ptr addrspace(10) @_ZL11short_const, align 2137// CHECK-NEXT: ret void138//139//140// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.2(141// CHECK-SAME: ) #[[ATTR3]] {142// CHECK-NEXT: [[ENTRY:.*:]]143// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()144// CHECK-NEXT: [[TMP1:%.*]] = call i32 @_Z20__spirv_SpecConstantii(i32 3, i32 5)145// CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(10) @_ZL9int_const, align 4146// CHECK-NEXT: ret void147//148//149// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.3(150// CHECK-SAME: ) #[[ATTR3]] {151// CHECK-NEXT: [[ENTRY:.*:]]152// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()153// CHECK-NEXT: [[TMP1:%.*]] = call i64 @_Z20__spirv_SpecConstantix(i32 4, i64 8)154// CHECK-NEXT: store i64 [[TMP1]], ptr addrspace(10) @_ZL10long_const, align 8155// CHECK-NEXT: ret void156//157//158// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.4(159// CHECK-SAME: ) #[[ATTR3]] {160// CHECK-NEXT: [[ENTRY:.*:]]161// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()162// CHECK-NEXT: [[TMP1:%.*]] = call i16 @_Z20__spirv_SpecConstantit(i32 5, i16 10)163// CHECK-NEXT: store i16 [[TMP1]], ptr addrspace(10) @_ZL12ushort_const, align 2164// CHECK-NEXT: ret void165//166//167// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.5(168// CHECK-SAME: ) #[[ATTR3]] {169// CHECK-NEXT: [[ENTRY:.*:]]170// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()171// CHECK-NEXT: [[TMP1:%.*]] = call i32 @_Z20__spirv_SpecConstantij(i32 6, i32 12)172// CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(10) @_ZL10uint_const, align 4173// CHECK-NEXT: ret void174//175//176// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.6(177// CHECK-SAME: ) #[[ATTR3]] {178// CHECK-NEXT: [[ENTRY:.*:]]179// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()180// CHECK-NEXT: [[TMP1:%.*]] = call i32 @_Z20__spirv_SpecConstantij(i32 6, i32 12)181// CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(10) @_ZL12uint_const_2, align 4182// CHECK-NEXT: ret void183//184//185// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.7(186// CHECK-SAME: ) #[[ATTR3]] {187// CHECK-NEXT: [[ENTRY:.*:]]188// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()189// CHECK-NEXT: [[TMP1:%.*]] = call i64 @_Z20__spirv_SpecConstantiy(i32 7, i64 25)190// CHECK-NEXT: store i64 [[TMP1]], ptr addrspace(10) @_ZL11ulong_const, align 8191// CHECK-NEXT: ret void192//193//194// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.8(195// CHECK-SAME: ) #[[ATTR3]] {196// CHECK-NEXT: [[ENTRY:.*:]]197// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()198// CHECK-NEXT: [[TMP1:%.*]] = call reassoc nnan ninf nsz arcp afn float @_Z20__spirv_SpecConstantiDh(i32 8, float 0x4044333340000000)199// CHECK-NEXT: store float [[TMP1]], ptr addrspace(10) @_ZL10half_const, align 4200// CHECK-NEXT: ret void201//202//203// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.9(204// CHECK-SAME: ) #[[ATTR3]] {205// CHECK-NEXT: [[ENTRY:.*:]]206// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()207// CHECK-NEXT: [[TMP1:%.*]] = call reassoc nnan ninf nsz arcp afn float @_Z20__spirv_SpecConstantif(i32 8, float 5.050000e+01)208// CHECK-NEXT: store float [[TMP1]], ptr addrspace(10) @_ZL11float_const, align 4209// CHECK-NEXT: ret void210//211//212// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.10(213// CHECK-SAME: ) #[[ATTR3]] {214// CHECK-NEXT: [[ENTRY:.*:]]215// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()216// CHECK-NEXT: [[TMP1:%.*]] = call reassoc nnan ninf nsz arcp afn double @_Z20__spirv_SpecConstantid(i32 9, double 0x40590CCCC0000000)217// CHECK-NEXT: store double [[TMP1]], ptr addrspace(10) @_ZL12double_const, align 8218// CHECK-NEXT: ret void219//220//221// CHECK-LABEL: define internal spir_func void @__cxx_global_var_init.11(222// CHECK-SAME: ) #[[ATTR3]] {223// CHECK-NEXT: [[ENTRY:.*:]]224// CHECK-NEXT: [[TMP0:%.*]] = call token @llvm.experimental.convergence.entry()225// CHECK-NEXT: [[TMP1:%.*]] = call i32 @_Z20__spirv_SpecConstantii(i32 10, i32 30)226// CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(10) @_ZL10enum_const, align 4227// CHECK-NEXT: ret void228