1007 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -x c -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED3// RUN: %clang_cc1 -x c -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED4// RUN: %clang_cc1 -x c++ -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED5// RUN: %clang_cc1 -x c++ -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED6 7#ifdef __cplusplus8extern "C" {9#endif10 11short _Accum sa;12_Accum a, a2;13long _Accum la;14 15unsigned short _Accum usa;16unsigned _Accum ua;17unsigned long _Accum ula;18 19short _Fract sf;20_Fract f;21long _Fract lf;22unsigned _Fract uf;23 24_Sat short _Accum sat_sa;25_Sat _Accum sat_a;26_Sat long _Accum sat_la;27 28_Sat unsigned short _Accum sat_usa;29_Sat unsigned _Accum sat_ua;30_Sat unsigned long _Accum sat_ula;31 32_Sat short _Fract sat_sf;33_Sat _Fract sat_f;34_Sat long _Fract sat_lf;35_Sat unsigned _Fract sat_uf;36 37short s;38int i;39unsigned int ui;40 41float fl;42double d;43 44// CHECK-LABEL: @fix_same1(45// CHECK-NEXT: entry:46// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 447// CHECK-NEXT: store i32 [[TMP0]], ptr @a2, align 448// CHECK-NEXT: ret void49//50void fix_same1(void) {51 a2 = a;52}53 54// CHECK-LABEL: @fix_same2(55// CHECK-NEXT: entry:56// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 457// CHECK-NEXT: store i32 [[TMP0]], ptr @a2, align 458// CHECK-NEXT: ret void59//60void fix_same2(void) {61 a2 = (_Accum)a;62}63 64 65// CHECK-LABEL: @fix_castdown1(66// CHECK-NEXT: entry:67// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 868// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 1669// CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i3270// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 471// CHECK-NEXT: ret void72//73void fix_castdown1(void) {74 a = la;75}76 77// CHECK-LABEL: @fix_castdown2(78// CHECK-NEXT: entry:79// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 880// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 1681// CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i3282// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 483// CHECK-NEXT: ret void84//85void fix_castdown2(void) {86 a = (_Accum)la;87}88 89// CHECK-LABEL: @fix_castdown3(90// CHECK-NEXT: entry:91// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 492// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 893// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i1694// CHECK-NEXT: store i16 [[RESIZE]], ptr @sa, align 295// CHECK-NEXT: ret void96//97void fix_castdown3(void) {98 sa = a;99}100 101// CHECK-LABEL: @fix_castdown4(102// CHECK-NEXT: entry:103// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4104// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8105// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i16106// CHECK-NEXT: store i16 [[RESIZE]], ptr @sa, align 2107// CHECK-NEXT: ret void108//109void fix_castdown4(void) {110 sa = a;111}112 113 114// CHECK-LABEL: @fix_castup1(115// CHECK-NEXT: entry:116// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2117// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32118// CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8119// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4120// CHECK-NEXT: ret void121//122void fix_castup1(void) {123 a = sa;124}125 126// CHECK-LABEL: @fix_castup2(127// CHECK-NEXT: entry:128// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2129// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32130// CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8131// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4132// CHECK-NEXT: ret void133//134void fix_castup2(void) {135 a = (_Accum)sa;136}137 138// CHECK-LABEL: @fix_castup3(139// CHECK-NEXT: entry:140// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8141// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16142// CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32143// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4144// CHECK-NEXT: ret void145//146void fix_castup3(void) {147 a = la;148}149 150// CHECK-LABEL: @fix_castup4(151// CHECK-NEXT: entry:152// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8153// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16154// CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32155// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4156// CHECK-NEXT: ret void157//158void fix_castup4(void) {159 a = (long _Accum)la;160}161 162 163// SIGNED-LABEL: @fix_sign1(164// SIGNED-NEXT: entry:165// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4166// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[TMP0]], 1167// SIGNED-NEXT: store i32 [[UPSCALE]], ptr @ua, align 4168// SIGNED-NEXT: ret void169//170// UNSIGNED-LABEL: @fix_sign1(171// UNSIGNED-NEXT: entry:172// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4173// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @ua, align 4174// UNSIGNED-NEXT: ret void175//176void fix_sign1(void) {177 ua = a;178}179 180// SIGNED-LABEL: @fix_sign2(181// SIGNED-NEXT: entry:182// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4183// SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i32 [[TMP0]], 1184// SIGNED-NEXT: store i32 [[DOWNSCALE]], ptr @a, align 4185// SIGNED-NEXT: ret void186//187// UNSIGNED-LABEL: @fix_sign2(188// UNSIGNED-NEXT: entry:189// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4190// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @a, align 4191// UNSIGNED-NEXT: ret void192//193void fix_sign2(void) {194 a = ua;195}196 197// SIGNED-LABEL: @fix_sign3(198// SIGNED-NEXT: entry:199// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4200// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[TMP0]], 1201// SIGNED-NEXT: store i32 [[UPSCALE]], ptr @ua, align 4202// SIGNED-NEXT: ret void203//204// UNSIGNED-LABEL: @fix_sign3(205// UNSIGNED-NEXT: entry:206// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4207// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @ua, align 4208// UNSIGNED-NEXT: ret void209//210void fix_sign3(void) {211 ua = (unsigned _Accum)a;212}213 214// SIGNED-LABEL: @fix_sign4(215// SIGNED-NEXT: entry:216// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4217// SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i32 [[TMP0]], 1218// SIGNED-NEXT: store i32 [[DOWNSCALE]], ptr @a, align 4219// SIGNED-NEXT: ret void220//221// UNSIGNED-LABEL: @fix_sign4(222// UNSIGNED-NEXT: entry:223// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4224// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @a, align 4225// UNSIGNED-NEXT: ret void226//227void fix_sign4(void) {228 a = (_Accum)ua;229}230 231// SIGNED-LABEL: @fix_sign5(232// SIGNED-NEXT: entry:233// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4234// SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64235// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 17236// SIGNED-NEXT: store i64 [[UPSCALE]], ptr @ula, align 8237// SIGNED-NEXT: ret void238//239// UNSIGNED-LABEL: @fix_sign5(240// UNSIGNED-NEXT: entry:241// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4242// UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64243// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 16244// UNSIGNED-NEXT: store i64 [[UPSCALE]], ptr @ula, align 8245// UNSIGNED-NEXT: ret void246//247void fix_sign5(void) {248 ula = a;249}250 251 252// CHECK-LABEL: @fix_sat1(253// CHECK-NEXT: entry:254// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4255// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8256// CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 32767257// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[DOWNSCALE]]258// CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -32768259// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -32768, i32 [[SATMAX]]260// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16261// CHECK-NEXT: store i16 [[RESIZE]], ptr @sat_sa, align 2262// CHECK-NEXT: ret void263//264void fix_sat1(void) {265 // Casting down between types266 sat_sa = sat_a;267}268 269// CHECK-LABEL: @fix_sat2(270// CHECK-NEXT: entry:271// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4272// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8273// CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 127274// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 127, i32 [[DOWNSCALE]]275// CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -128276// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -128, i32 [[SATMAX]]277// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i8278// CHECK-NEXT: store i8 [[RESIZE]], ptr @sat_sf, align 1279// CHECK-NEXT: ret void280//281void fix_sat2(void) {282 // Accum to Fract, decreasing scale283 sat_sf = sat_a;284}285 286// CHECK-LABEL: @fix_sat3(287// CHECK-NEXT: entry:288// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4289// CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 32767290// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[TMP0]]291// CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -32768292// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -32768, i32 [[SATMAX]]293// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16294// CHECK-NEXT: store i16 [[RESIZE]], ptr @sat_f, align 2295// CHECK-NEXT: ret void296//297void fix_sat3(void) {298 // Accum to Fract, same scale299 sat_f = a;300}301 302// CHECK-LABEL: @fix_sat4(303// CHECK-NEXT: entry:304// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4305// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48306// CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16307// CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i48 [[UPSCALE]], 2147483647308// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i48 2147483647, i48 [[UPSCALE]]309// CHECK-NEXT: [[TMP2:%.*]] = icmp slt i48 [[SATMAX]], -2147483648310// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i48 -2147483648, i48 [[SATMAX]]311// CHECK-NEXT: [[RESIZE1:%.*]] = trunc i48 [[SATMIN]] to i32312// CHECK-NEXT: store i32 [[RESIZE1]], ptr @sat_lf, align 4313// CHECK-NEXT: ret void314//315void fix_sat4(void) {316 // Accum to Fract, increasing scale317 sat_lf = sat_a;318}319 320// SIGNED-LABEL: @fix_sat5(321// SIGNED-NEXT: entry:322// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4323// SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 7324// SIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 65535325// SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 65535, i32 [[DOWNSCALE]]326// SIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], 0327// SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[SATMAX]]328// SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16329// SIGNED-NEXT: store i16 [[RESIZE]], ptr @sat_usa, align 2330// SIGNED-NEXT: ret void331//332// UNSIGNED-LABEL: @fix_sat5(333// UNSIGNED-NEXT: entry:334// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4335// UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8336// UNSIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 32767337// UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[DOWNSCALE]]338// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], 0339// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[SATMAX]]340// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16341// UNSIGNED-NEXT: store i16 [[RESIZE]], ptr @sat_usa, align 2342// UNSIGNED-NEXT: ret void343//344void fix_sat5(void) {345 // Signed to unsigned, decreasing scale346 sat_usa = sat_a;347}348 349// SIGNED-LABEL: @fix_sat6(350// SIGNED-NEXT: entry:351// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4352// SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i33353// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1354// SIGNED-NEXT: [[TMP1:%.*]] = icmp slt i33 [[UPSCALE]], 0355// SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i33 0, i33 [[UPSCALE]]356// SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i33 [[SATMIN]] to i32357// SIGNED-NEXT: store i32 [[RESIZE1]], ptr @sat_ua, align 4358// SIGNED-NEXT: ret void359//360// UNSIGNED-LABEL: @fix_sat6(361// UNSIGNED-NEXT: entry:362// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4363// UNSIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 0364// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]]365// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4366// UNSIGNED-NEXT: ret void367//368void fix_sat6(void) {369 // Signed to unsigned, increasing scale370 sat_ua = sat_a;371}372 373// CHECK-LABEL: @fix_sat7(374// CHECK-NEXT: entry:375// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4376// CHECK-NEXT: store i32 [[TMP0]], ptr @sat_a, align 4377// CHECK-NEXT: ret void378//379void fix_sat7(void) {380 // Nothing when saturating to the same type and size381 sat_a = a;382}383 384// CHECK-LABEL: @fix_sat8(385// CHECK-NEXT: entry:386// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4387// CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 4388// CHECK-NEXT: ret void389//390void fix_sat8(void) {391 // Nothing when assigning back392 a = sat_a;393}394 395// CHECK-LABEL: @fix_sat9(396// CHECK-NEXT: entry:397// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sat_f, align 2398// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32399// CHECK-NEXT: store i32 [[RESIZE]], ptr @sat_a, align 4400// CHECK-NEXT: ret void401//402void fix_sat9(void) {403 // No overflow when casting from fract to signed accum404 sat_a = sat_f;405}406 407// SIGNED-LABEL: @fix_sat10(408// SIGNED-NEXT: entry:409// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @sat_sf, align 1410// SIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32411// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 9412// SIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[UPSCALE]], 0413// SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[UPSCALE]]414// SIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4415// SIGNED-NEXT: ret void416//417// UNSIGNED-LABEL: @fix_sat10(418// UNSIGNED-NEXT: entry:419// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @sat_sf, align 1420// UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32421// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8422// UNSIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[UPSCALE]], 0423// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[UPSCALE]]424// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4425// UNSIGNED-NEXT: ret void426//427void fix_sat10(void) {428 // Only get overflow checking if signed fract to unsigned accum429 sat_ua = sat_sf;430}431 432 433// CHECK-LABEL: @fix_fract1(434// CHECK-NEXT: entry:435// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4436// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8437// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i8438// CHECK-NEXT: store i8 [[RESIZE]], ptr @sf, align 1439// CHECK-NEXT: ret void440//441void fix_fract1(void) {442 // To lower scale443 sf = a;444}445 446// CHECK-LABEL: @fix_fract2(447// CHECK-NEXT: entry:448// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1449// CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32450// CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8451// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4452// CHECK-NEXT: ret void453//454void fix_fract2(void) {455 // To higher scale456 a = sf;457}458 459// CHECK-LABEL: @fix_fract3(460// CHECK-NEXT: entry:461// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4462// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16463// CHECK-NEXT: store i16 [[RESIZE]], ptr @f, align 2464// CHECK-NEXT: ret void465//466void fix_fract3(void) {467 // To same scale468 f = a;469}470 471// CHECK-LABEL: @fix_fract4(472// CHECK-NEXT: entry:473// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2474// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32475// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4476// CHECK-NEXT: ret void477//478void fix_fract4(void) {479 a = f;480}481 482// CHECK-LABEL: @fix_fract5(483// CHECK-NEXT: entry:484// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2485// CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32486// CHECK-NEXT: store i32 [[RESIZE]], ptr @ua, align 4487// CHECK-NEXT: ret void488//489void fix_fract5(void) {490 // To unsigned491 ua = uf;492}493 494// CHECK-LABEL: @fix_fract6(495// CHECK-NEXT: entry:496// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4497// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16498// CHECK-NEXT: store i16 [[RESIZE]], ptr @uf, align 2499// CHECK-NEXT: ret void500//501void fix_fract6(void) {502 uf = ua;503}504 505 506// CHECK-LABEL: @fix_int1(507// CHECK-NEXT: entry:508// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2509// CHECK-NEXT: [[TMP1:%.*]] = icmp slt i16 [[TMP0]], 0510// CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], 127511// CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i16 [[TMP2]], i16 [[TMP0]]512// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i16 [[TMP3]], 7513// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[DOWNSCALE]] to i32514// CHECK-NEXT: store i32 [[RESIZE]], ptr @i, align 4515// CHECK-NEXT: ret void516//517void fix_int1(void) {518 // Will need to check for negative values519 i = sa;520}521 522// SIGNED-LABEL: @fix_int2(523// SIGNED-NEXT: entry:524// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2525// SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i16 [[TMP0]], 8526// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[DOWNSCALE]] to i32527// SIGNED-NEXT: store i32 [[RESIZE]], ptr @i, align 4528// SIGNED-NEXT: ret void529//530// UNSIGNED-LABEL: @fix_int2(531// UNSIGNED-NEXT: entry:532// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2533// UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i16 [[TMP0]], 7534// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[DOWNSCALE]] to i32535// UNSIGNED-NEXT: store i32 [[RESIZE]], ptr @i, align 4536// UNSIGNED-NEXT: ret void537//538void fix_int2(void) {539 // No check needed for unsigned fixed points. Can just right shift.540 i = usa;541}542 543 544// CHECK-LABEL: @int_fix1(545// CHECK-NEXT: entry:546// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4547// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16548// CHECK-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7549// CHECK-NEXT: store i16 [[UPSCALE]], ptr @sa, align 2550// CHECK-NEXT: ret void551//552void int_fix1(void) {553 sa = i;554}555 556// CHECK-LABEL: @int_fix2(557// CHECK-NEXT: entry:558// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4559// CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16560// CHECK-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7561// CHECK-NEXT: store i16 [[UPSCALE]], ptr @sa, align 2562// CHECK-NEXT: ret void563//564void int_fix2(void) {565 sa = ui;566}567 568// SIGNED-LABEL: @int_fix3(569// SIGNED-NEXT: entry:570// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4571// SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16572// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8573// SIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2574// SIGNED-NEXT: ret void575//576// UNSIGNED-LABEL: @int_fix3(577// UNSIGNED-NEXT: entry:578// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4579// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16580// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7581// UNSIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2582// UNSIGNED-NEXT: ret void583//584void int_fix3(void) {585 usa = i;586}587 588// SIGNED-LABEL: @int_fix4(589// SIGNED-NEXT: entry:590// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4591// SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16592// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8593// SIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2594// SIGNED-NEXT: ret void595//596// UNSIGNED-LABEL: @int_fix4(597// UNSIGNED-NEXT: entry:598// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4599// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16600// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7601// UNSIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2602// UNSIGNED-NEXT: ret void603//604void int_fix4(void) {605 usa = ui;606}607 608// CHECK-LABEL: @int_fix5(609// CHECK-NEXT: entry:610// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @s, align 2611// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i64612// CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 31613// CHECK-NEXT: store i64 [[UPSCALE]], ptr @la, align 8614// CHECK-NEXT: ret void615//616void int_fix5(void) {617 la = s;618}619 620 621// CHECK-LABEL: @int_sat1(622// CHECK-NEXT: entry:623// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4624// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i39625// CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7626// CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i39 [[UPSCALE]], 32767627// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]]628// CHECK-NEXT: [[TMP2:%.*]] = icmp slt i39 [[SATMAX]], -32768629// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i39 -32768, i39 [[SATMAX]]630// CHECK-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMIN]] to i16631// CHECK-NEXT: store i16 [[RESIZE1]], ptr @sat_sa, align 2632// CHECK-NEXT: ret void633//634void int_sat1(void) {635 sat_sa = i;636}637 638// CHECK-LABEL: @int_sat2(639// CHECK-NEXT: entry:640// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4641// CHECK-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39642// CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7643// CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i39 [[UPSCALE]], 32767644// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]]645// CHECK-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMAX]] to i16646// CHECK-NEXT: store i16 [[RESIZE1]], ptr @sat_sa, align 2647// CHECK-NEXT: ret void648//649void int_sat2(void) {650 sat_sa = ui;651}652 653// SIGNED-LABEL: @int_sat3(654// SIGNED-NEXT: entry:655// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4656// SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i40657// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8658// SIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i40 [[UPSCALE]], 65535659// SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i40 65535, i40 [[UPSCALE]]660// SIGNED-NEXT: [[TMP2:%.*]] = icmp slt i40 [[SATMAX]], 0661// SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i40 0, i40 [[SATMAX]]662// SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i40 [[SATMIN]] to i16663// SIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2664// SIGNED-NEXT: ret void665//666// UNSIGNED-LABEL: @int_sat3(667// UNSIGNED-NEXT: entry:668// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4669// UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i39670// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7671// UNSIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i39 [[UPSCALE]], 32767672// UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]]673// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i39 [[SATMAX]], 0674// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i39 0, i39 [[SATMAX]]675// UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMIN]] to i16676// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2677// UNSIGNED-NEXT: ret void678//679void int_sat3(void) {680 sat_usa = i;681}682 683// SIGNED-LABEL: @int_sat4(684// SIGNED-NEXT: entry:685// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4686// SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40687// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8688// SIGNED-NEXT: [[TMP1:%.*]] = icmp ugt i40 [[UPSCALE]], 65535689// SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i40 65535, i40 [[UPSCALE]]690// SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i40 [[SATMAX]] to i16691// SIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2692// SIGNED-NEXT: ret void693//694// UNSIGNED-LABEL: @int_sat4(695// UNSIGNED-NEXT: entry:696// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4697// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39698// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7699// UNSIGNED-NEXT: [[TMP1:%.*]] = icmp ugt i39 [[UPSCALE]], 32767700// UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]]701// UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMAX]] to i16702// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2703// UNSIGNED-NEXT: ret void704//705void int_sat4(void) {706 sat_usa = ui;707}708 709 710// CHECK-LABEL: @float_fix1(711// CHECK-NEXT: entry:712// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4713// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02714// CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i16715// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2716// CHECK-NEXT: ret void717//718void float_fix1(void) {719 sa = fl;720}721 722// CHECK-LABEL: @float_fix2(723// CHECK-NEXT: entry:724// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4725// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04726// CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32727// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4728// CHECK-NEXT: ret void729//730void float_fix2(void) {731 a = fl;732}733 734// CHECK-LABEL: @float_fix3(735// CHECK-NEXT: entry:736// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4737// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000738// CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i64739// CHECK-NEXT: store i64 [[TMP2]], ptr @la, align 8740// CHECK-NEXT: ret void741//742void float_fix3(void) {743 la = fl;744}745 746// CHECK-LABEL: @float_fix4(747// CHECK-NEXT: entry:748// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4749// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02750// CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i8751// CHECK-NEXT: store i8 [[TMP2]], ptr @sf, align 1752// CHECK-NEXT: ret void753//754void float_fix4(void) {755 sf = fl;756}757 758// CHECK-LABEL: @float_fix5(759// CHECK-NEXT: entry:760// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4761// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000762// CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32763// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4764// CHECK-NEXT: ret void765//766void float_fix5(void) {767 lf = fl;768}769 770// SIGNED-LABEL: @float_fix6(771// SIGNED-NEXT: entry:772// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4773// SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04774// SIGNED-NEXT: [[TMP2:%.*]] = fptoui float [[TMP1]] to i32775// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4776// SIGNED-NEXT: ret void777//778// UNSIGNED-LABEL: @float_fix6(779// UNSIGNED-NEXT: entry:780// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4781// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04782// UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32783// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4784// UNSIGNED-NEXT: ret void785//786void float_fix6(void) {787 ua = fl;788}789 790// SIGNED-LABEL: @float_fix7(791// SIGNED-NEXT: entry:792// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4793// SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04794// SIGNED-NEXT: [[TMP2:%.*]] = fptoui float [[TMP1]] to i16795// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf, align 2796// SIGNED-NEXT: ret void797//798// UNSIGNED-LABEL: @float_fix7(799// UNSIGNED-NEXT: entry:800// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4801// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04802// UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i16803// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @uf, align 2804// UNSIGNED-NEXT: ret void805//806void float_fix7(void) {807 uf = fl;808}809 810 811// CHECK-LABEL: @fix_float1(812// CHECK-NEXT: entry:813// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2814// CHECK-NEXT: [[TMP1:%.*]] = sitofp i16 [[TMP0]] to float815// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03816// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4817// CHECK-NEXT: ret void818//819void fix_float1(void) {820 fl = sa;821}822 823// CHECK-LABEL: @fix_float2(824// CHECK-NEXT: entry:825// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4826// CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float827// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000828// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4829// CHECK-NEXT: ret void830//831void fix_float2(void) {832 fl = a;833}834 835// CHECK-LABEL: @fix_float3(836// CHECK-NEXT: entry:837// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8838// CHECK-NEXT: [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float839// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000840// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4841// CHECK-NEXT: ret void842//843void fix_float3(void) {844 fl = la;845}846 847// CHECK-LABEL: @fix_float4(848// CHECK-NEXT: entry:849// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1850// CHECK-NEXT: [[TMP1:%.*]] = sitofp i8 [[TMP0]] to float851// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03852// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4853// CHECK-NEXT: ret void854//855void fix_float4(void) {856 fl = sf;857}858 859// CHECK-LABEL: @fix_float5(860// CHECK-NEXT: entry:861// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4862// CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float863// CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000864// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4865// CHECK-NEXT: ret void866//867void fix_float5(void) {868 fl = lf;869}870 871// SIGNED-LABEL: @fix_float6(872// SIGNED-NEXT: entry:873// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4874// SIGNED-NEXT: [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float875// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000876// SIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4877// SIGNED-NEXT: ret void878//879// UNSIGNED-LABEL: @fix_float6(880// UNSIGNED-NEXT: entry:881// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4882// UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float883// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000884// UNSIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4885// UNSIGNED-NEXT: ret void886//887void fix_float6(void) {888 fl = ua;889}890 891// SIGNED-LABEL: @fix_float7(892// SIGNED-NEXT: entry:893// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2894// SIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float895// SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000896// SIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4897// SIGNED-NEXT: ret void898//899// UNSIGNED-LABEL: @fix_float7(900// UNSIGNED-NEXT: entry:901// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2902// UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float903// UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000904// UNSIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4905// UNSIGNED-NEXT: ret void906//907void fix_float7(void) {908 fl = uf;909}910 911 912// CHECK-LABEL: @float_sat1(913// CHECK-NEXT: entry:914// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4915// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02916// CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]])917// CHECK-NEXT: store i16 [[TMP2]], ptr @sat_sa, align 2918// CHECK-NEXT: ret void919//920void float_sat1(void) {921 sat_sa = fl;922}923 924// CHECK-LABEL: @float_sat2(925// CHECK-NEXT: entry:926// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4927// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04928// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]])929// CHECK-NEXT: store i32 [[TMP2]], ptr @sat_a, align 4930// CHECK-NEXT: ret void931//932void float_sat2(void) {933 sat_a = fl;934}935 936// CHECK-LABEL: @float_sat3(937// CHECK-NEXT: entry:938// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4939// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000940// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP1]])941// CHECK-NEXT: store i64 [[TMP2]], ptr @sat_la, align 8942// CHECK-NEXT: ret void943//944void float_sat3(void) {945 sat_la = fl;946}947 948// CHECK-LABEL: @float_sat4(949// CHECK-NEXT: entry:950// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4951// CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02952// CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f32(float [[TMP1]])953// CHECK-NEXT: store i8 [[TMP2]], ptr @sat_sf, align 1954// CHECK-NEXT: ret void955//956void float_sat4(void) {957 sat_sf = fl;958}959 960// SIGNED-LABEL: @float_sat5(961// SIGNED-NEXT: entry:962// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4963// SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04964// SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptoui.sat.i32.f32(float [[TMP1]])965// SIGNED-NEXT: store i32 [[TMP2]], ptr @sat_ua, align 4966// SIGNED-NEXT: ret void967//968// UNSIGNED-LABEL: @float_sat5(969// UNSIGNED-NEXT: entry:970// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4971// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04972// UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]])973// UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 0974// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i32 0, i32 [[TMP2]]975// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4976// UNSIGNED-NEXT: ret void977//978void float_sat5(void) {979 sat_ua = fl;980}981 982// SIGNED-LABEL: @float_sat6(983// SIGNED-NEXT: entry:984// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4985// SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04986// SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP1]])987// SIGNED-NEXT: store i16 [[TMP2]], ptr @sat_uf, align 2988// SIGNED-NEXT: ret void989//990// UNSIGNED-LABEL: @float_sat6(991// UNSIGNED-NEXT: entry:992// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4993// UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04994// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]])995// UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0996// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]]997// UNSIGNED-NEXT: store i16 [[SATMIN]], ptr @sat_uf, align 2998// UNSIGNED-NEXT: ret void999//1000void float_sat6(void) {1001 sat_uf = fl;1002}1003 1004#ifdef __cplusplus1005}1006#endif1007