680 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED3// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED4 5short _Accum sa;6_Accum a, a2, a3, a4;7long _Accum la;8unsigned short _Accum usa;9unsigned _Accum ua;10unsigned long _Accum ula;11 12short _Fract sf;13_Fract f;14long _Fract lf;15unsigned short _Fract usf;16unsigned _Fract uf;17unsigned long _Fract ulf;18 19_Sat short _Accum sa_sat;20_Sat _Accum a_sat;21_Sat long _Accum la_sat;22_Sat unsigned short _Accum usa_sat;23_Sat unsigned _Accum ua_sat;24_Sat unsigned long _Accum ula_sat;25_Sat unsigned _Fract uf_sat;26 27int i;28unsigned int ui;29_Bool b;30 31// CHECK-LABEL: @sdiv_sasasa(32// CHECK-NEXT: entry:33// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 234// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 235// CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)36// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 237// CHECK-NEXT: ret void38//39void sdiv_sasasa(void) {40 sa = sa / sa;41}42 43// CHECK-LABEL: @sdiv_asaa(44// CHECK-NEXT: entry:45// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 246// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 447// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i3248// CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 849// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)50// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 451// CHECK-NEXT: ret void52//53void sdiv_asaa(void) {54 a = sa / a;55}56 57// CHECK-LABEL: @sdiv_sasasf(58// CHECK-NEXT: entry:59// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 260// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 161// CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i1662// CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)63// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 264// CHECK-NEXT: ret void65//66void sdiv_sasasf(void) {67 sa = sa / sf;68}69 70// CHECK-LABEL: @sdiv_sasaf(71// CHECK-NEXT: entry:72// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 273// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @f, align 274// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i2475// CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 876// CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i2477// CHECK-NEXT: [[TMP2:%.*]] = call i24 @llvm.sdiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)78// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i24 [[TMP2]], 879// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i1680// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 281// CHECK-NEXT: ret void82//83void sdiv_sasaf(void) {84 sa = sa / f;85}86 87// CHECK-LABEL: @sdiv_aasf(88// CHECK-NEXT: entry:89// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 490// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 191// CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i3292// CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 893// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15)94// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 495// CHECK-NEXT: ret void96//97void sdiv_aasf(void) {98 a = a / sf;99}100 101// CHECK-LABEL: @sdiv_aalf(102// CHECK-NEXT: entry:103// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4104// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @lf, align 4105// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48106// CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16107// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i48108// CHECK-NEXT: [[TMP2:%.*]] = call i48 @llvm.sdiv.fix.i48(i48 [[UPSCALE]], i48 [[RESIZE1]], i32 31)109// CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i48 [[TMP2]], 16110// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[DOWNSCALE]] to i32111// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4112// CHECK-NEXT: ret void113//114void sdiv_aalf(void) {115 a = a / lf;116}117 118// SIGNED-LABEL: @sdiv_sasausa(119// SIGNED-NEXT: entry:120// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2121// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2122// SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17123// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1124// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17125// SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.sdiv.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8)126// SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1127// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16128// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2129// SIGNED-NEXT: ret void130//131// UNSIGNED-LABEL: @sdiv_sasausa(132// UNSIGNED-NEXT: entry:133// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2134// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2135// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)136// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2137// UNSIGNED-NEXT: ret void138//139void sdiv_sasausa(void) {140 sa = sa / usa;141}142 143// SIGNED-LABEL: @sdiv_asaua(144// SIGNED-NEXT: entry:145// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2146// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4147// SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33148// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9149// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33150// SIGNED-NEXT: [[TMP2:%.*]] = call i33 @llvm.sdiv.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32 16)151// SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1152// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32153// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4154// SIGNED-NEXT: ret void155//156// UNSIGNED-LABEL: @sdiv_asaua(157// UNSIGNED-NEXT: entry:158// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2159// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4160// UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32161// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8162// UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)163// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4164// UNSIGNED-NEXT: ret void165//166void sdiv_asaua(void) {167 a = sa / ua;168}169 170// SIGNED-LABEL: @sdiv_sasausf(171// SIGNED-NEXT: entry:172// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2173// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1174// SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17175// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1176// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17177// SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.sdiv.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8)178// SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1179// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16180// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2181// SIGNED-NEXT: ret void182//183// UNSIGNED-LABEL: @sdiv_sasausf(184// UNSIGNED-NEXT: entry:185// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2186// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1187// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16188// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)189// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2190// UNSIGNED-NEXT: ret void191//192void sdiv_sasausf(void) {193 sa = sa / usf;194}195 196// SIGNED-LABEL: @sdiv_sasaulf(197// SIGNED-NEXT: entry:198// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2199// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4200// SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41201// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25202// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41203// SIGNED-NEXT: [[TMP2:%.*]] = call i41 @llvm.sdiv.fix.i41(i41 [[UPSCALE]], i41 [[RESIZE1]], i32 32)204// SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25205// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16206// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2207// SIGNED-NEXT: ret void208//209// UNSIGNED-LABEL: @sdiv_sasaulf(210// UNSIGNED-NEXT: entry:211// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2212// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4213// UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40214// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 24215// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40216// UNSIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 31)217// UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i40 [[TMP2]], 24218// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[DOWNSCALE]] to i16219// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2220// UNSIGNED-NEXT: ret void221//222void sdiv_sasaulf(void) {223 sa = sa / ulf;224}225 226// CHECK-LABEL: @sdiv_aaaaa(227// CHECK-NEXT: entry:228// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4229// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a2, align 4230// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP0]], i32 [[TMP1]], i32 15)231// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a3, align 4232// CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP2]], i32 [[TMP3]], i32 15)233// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a4, align 4234// CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP4]], i32 [[TMP5]], i32 15)235// CHECK-NEXT: store i32 [[TMP6]], ptr @a, align 4236// CHECK-NEXT: ret void237//238void sdiv_aaaaa(void) {239 a = a / a2 / a3 / a4;240}241 242 243// SIGNED-LABEL: @udiv_usausausa(244// SIGNED-NEXT: entry:245// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2246// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2247// SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)248// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2249// SIGNED-NEXT: ret void250//251// UNSIGNED-LABEL: @udiv_usausausa(252// UNSIGNED-NEXT: entry:253// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2254// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2255// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)256// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2257// UNSIGNED-NEXT: ret void258//259void udiv_usausausa(void) {260 usa = usa / usa;261}262 263// SIGNED-LABEL: @udiv_uausaua(264// SIGNED-NEXT: entry:265// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2266// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4267// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32268// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8269// SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.udiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 16)270// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4271// SIGNED-NEXT: ret void272//273// UNSIGNED-LABEL: @udiv_uausaua(274// UNSIGNED-NEXT: entry:275// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2276// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4277// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32278// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8279// UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15)280// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4281// UNSIGNED-NEXT: ret void282//283void udiv_uausaua(void) {284 ua = usa / ua;285}286 287// SIGNED-LABEL: @udiv_usausausf(288// SIGNED-NEXT: entry:289// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2290// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1291// SIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16292// SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 8)293// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2294// SIGNED-NEXT: ret void295//296// UNSIGNED-LABEL: @udiv_usausausf(297// UNSIGNED-NEXT: entry:298// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2299// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1300// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16301// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7)302// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2303// UNSIGNED-NEXT: ret void304//305void udiv_usausausf(void) {306 usa = usa / usf;307}308 309// SIGNED-LABEL: @udiv_usausauf(310// SIGNED-NEXT: entry:311// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2312// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2313// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24314// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8315// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24316// SIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.udiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 16)317// SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8318// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16319// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2320// SIGNED-NEXT: ret void321//322// UNSIGNED-LABEL: @udiv_usausauf(323// UNSIGNED-NEXT: entry:324// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2325// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2326// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24327// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8328// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24329// UNSIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.sdiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15)330// UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8331// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16332// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2333// UNSIGNED-NEXT: ret void334//335void udiv_usausauf(void) {336 usa = usa / uf;337}338 339 340// CHECK-LABEL: @int_sasai(341// CHECK-NEXT: entry:342// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2343// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4344// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39345// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39346// CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7347// CHECK-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7)348// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16349// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2350// CHECK-NEXT: ret void351//352void int_sasai(void) {353 sa = sa / i;354}355 356// CHECK-LABEL: @int_sasaui(357// CHECK-NEXT: entry:358// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2359// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4360// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40361// CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40362// CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7363// CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 7)364// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16365// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2366// CHECK-NEXT: ret void367//368void int_sasaui(void) {369 sa = sa / ui;370}371 372// SIGNED-LABEL: @int_usausai(373// SIGNED-NEXT: entry:374// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2375// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4376// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40377// SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40378// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8379// SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8)380// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16381// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2382// SIGNED-NEXT: ret void383//384// UNSIGNED-LABEL: @int_usausai(385// UNSIGNED-NEXT: entry:386// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2387// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4388// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39389// UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39390// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7391// UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7)392// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16393// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2394// UNSIGNED-NEXT: ret void395//396void int_usausai(void) {397 usa = usa / i;398}399 400// SIGNED-LABEL: @int_usausaui(401// SIGNED-NEXT: entry:402// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2403// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4404// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40405// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40406// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8407// SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.udiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8)408// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16409// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2410// SIGNED-NEXT: ret void411//412// UNSIGNED-LABEL: @int_usausaui(413// UNSIGNED-NEXT: entry:414// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2415// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4416// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39417// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i39418// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7419// UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.udiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7)420// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16421// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2422// UNSIGNED-NEXT: ret void423//424void int_usausaui(void) {425 usa = usa / ui;426}427 428// CHECK-LABEL: @int_lflfui(429// CHECK-NEXT: entry:430// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4431// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4432// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64433// CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i64434// CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE1]], 31435// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.sdiv.fix.i64(i64 [[RESIZE]], i64 [[UPSCALE]], i32 31)436// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i64 [[TMP2]] to i32437// CHECK-NEXT: store i32 [[RESIZE2]], ptr @lf, align 4438// CHECK-NEXT: ret void439//440void int_lflfui(void) {441 lf = lf / ui;442}443 444// CHECK-LABEL: @int_aab(445// CHECK-NEXT: entry:446// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4447// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1448// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1449// CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32450// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47451// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[CONV]] to i47452// CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15453// CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.sdiv.fix.i47(i47 [[RESIZE]], i47 [[UPSCALE]], i32 15)454// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32455// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4456// CHECK-NEXT: ret void457//458void int_aab(void) {459 a = a / b;460}461 462// CHECK-LABEL: @int_aia(463// CHECK-NEXT: entry:464// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4465// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4466// CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47467// CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15468// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i47469// CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.sdiv.fix.i47(i47 [[UPSCALE]], i47 [[RESIZE1]], i32 15)470// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32471// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4472// CHECK-NEXT: ret void473//474void int_aia(void) {475 a = i / a;476}477 478// SIGNED-LABEL: @int_usauiusa(479// SIGNED-NEXT: entry:480// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4481// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2482// SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40483// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8484// SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i40485// SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.udiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 8)486// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16487// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2488// SIGNED-NEXT: ret void489//490// UNSIGNED-LABEL: @int_usauiusa(491// UNSIGNED-NEXT: entry:492// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4493// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2494// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39495// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7496// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i39497// UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.udiv.fix.i39(i39 [[UPSCALE]], i39 [[RESIZE1]], i32 7)498// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16499// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2500// UNSIGNED-NEXT: ret void501//502void int_usauiusa(void) {503 usa = ui / usa;504}505 506// CHECK-LABEL: @int_sauisa(507// CHECK-NEXT: entry:508// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4509// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2510// CHECK-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40511// CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 7512// CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i40513// CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 7)514// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16515// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2516// CHECK-NEXT: ret void517//518void int_sauisa(void) {519 sa = ui / sa;520}521 522 523// CHECK-LABEL: @sat_sassasas(524// CHECK-NEXT: entry:525// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2526// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa_sat, align 2527// CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)528// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2529// CHECK-NEXT: ret void530//531void sat_sassasas(void) {532 sa_sat = sa / sa_sat;533}534 535// SIGNED-LABEL: @sat_usasusausas(536// SIGNED-NEXT: entry:537// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2538// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2539// SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8)540// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2541// SIGNED-NEXT: ret void542//543// UNSIGNED-LABEL: @sat_usasusausas(544// UNSIGNED-NEXT: entry:545// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2546// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2547// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7)548// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15549// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16550// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @usa_sat, align 2551// UNSIGNED-NEXT: ret void552//553void sat_usasusausas(void) {554 usa_sat = usa / usa_sat;555}556 557// SIGNED-LABEL: @sat_uasuausas(558// SIGNED-NEXT: entry:559// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4560// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2561// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32562// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8563// SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.udiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 16)564// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4565// SIGNED-NEXT: ret void566//567// UNSIGNED-LABEL: @sat_uasuausas(568// UNSIGNED-NEXT: entry:569// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4570// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2571// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32572// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8573// UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15)574// UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31575// UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32576// UNSIGNED-NEXT: store i32 [[RESIZE2]], ptr @ua_sat, align 4577// UNSIGNED-NEXT: ret void578//579void sat_uasuausas(void) {580 ua_sat = ua / usa_sat;581}582 583// CHECK-LABEL: @sat_sassasi(584// CHECK-NEXT: entry:585// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2586// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4587// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39588// CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39589// CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7590// CHECK-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.sat.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7)591// CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i39 [[TMP2]], 32767592// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP3]], i39 32767, i39 [[TMP2]]593// CHECK-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], -32768594// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 -32768, i39 [[SATMAX]]595// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16596// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2597// CHECK-NEXT: ret void598//599void sat_sassasi(void) {600 sa_sat = sa_sat / i;601}602 603// CHECK-LABEL: @sat_sassasui(604// CHECK-NEXT: entry:605// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2606// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4607// CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40608// CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40609// CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7610// CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.sat.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 7)611// CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i40 [[TMP2]], 32767612// CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP3]], i40 32767, i40 [[TMP2]]613// CHECK-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], -32768614// CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 -32768, i40 [[SATMAX]]615// CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16616// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2617// CHECK-NEXT: ret void618//619void sat_sassasui(void) {620 sa_sat = sa_sat / ui;621}622 623// SIGNED-LABEL: @sat_ufsufsufs(624// SIGNED-NEXT: entry:625// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2626// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2627// SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 16)628// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2629// SIGNED-NEXT: ret void630//631// UNSIGNED-LABEL: @sat_ufsufsufs(632// UNSIGNED-NEXT: entry:633// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2634// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2635// UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 15)636// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15637// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16638// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @uf_sat, align 2639// UNSIGNED-NEXT: ret void640//641void sat_ufsufsufs(void) {642 uf_sat = uf_sat / uf_sat;643}644 645// SIGNED-LABEL: @sat_usasusasi(646// SIGNED-NEXT: entry:647// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2648// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4649// SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40650// SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40651// SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8652// SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.sat.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8)653// SIGNED-NEXT: [[TMP3:%.*]] = icmp sgt i40 [[TMP2]], 65535654// SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP3]], i40 65535, i40 [[TMP2]]655// SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0656// SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]]657// SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16658// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2659// SIGNED-NEXT: ret void660//661// UNSIGNED-LABEL: @sat_usasusasi(662// UNSIGNED-NEXT: entry:663// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2664// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4665// UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39666// UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39667// UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7668// UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.sat.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7)669// UNSIGNED-NEXT: [[TMP3:%.*]] = icmp sgt i39 [[TMP2]], 32767670// UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP3]], i39 32767, i39 [[TMP2]]671// UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], 0672// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 0, i39 [[SATMAX]]673// UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16674// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2675// UNSIGNED-NEXT: ret void676//677void sat_usasusasi(void) {678 usa_sat = usa_sat / i;679}680