581 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED3// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED4 5short _Accum sa;6_Accum a;7long _Accum la;8 9short _Fract sf;10_Fract f;11long _Fract lf;12 13unsigned short _Accum usa;14unsigned _Accum ua;15unsigned long _Accum ula;16 17unsigned short _Fract usf;18unsigned _Fract uf;19unsigned long _Fract ulf;20 21_Sat short _Accum sa_sat;22_Sat _Accum a_sat;23 24_Sat short _Fract sf_sat;25_Sat _Fract f_sat;26 27_Sat unsigned short _Accum usa_sat;28_Sat unsigned _Accum ua_sat;29 30_Sat unsigned short _Fract usf_sat;31_Sat unsigned _Fract uf_sat;32 33int i;34unsigned u;35 36 37// CHECK-LABEL: @sleft_sasai(38// CHECK-NEXT: entry:39// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 240// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 441// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i1642// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]43// CHECK-NEXT: store i16 [[TMP3]], ptr @sa, align 244// CHECK-NEXT: ret void45//46void sleft_sasai(void) {47 sa = sa << i;48}49 50// CHECK-LABEL: @sleft_aai(51// CHECK-NEXT: entry:52// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 453// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 454// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]55// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 456// CHECK-NEXT: ret void57//58void sleft_aai(void) {59 a = a << i;60}61 62// CHECK-LABEL: @sleft_lalai(63// CHECK-NEXT: entry:64// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 865// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 466// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6467// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]]68// CHECK-NEXT: store i64 [[TMP3]], ptr @la, align 869// CHECK-NEXT: ret void70//71void sleft_lalai(void) {72 la = la << i;73}74 75// CHECK-LABEL: @sleft_sfsfi(76// CHECK-NEXT: entry:77// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 178// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 479// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i880// CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]]81// CHECK-NEXT: store i8 [[TMP3]], ptr @sf, align 182// CHECK-NEXT: ret void83//84void sleft_sfsfi(void) {85 sf = sf << i;86}87 88// CHECK-LABEL: @sleft_ffi(89// CHECK-NEXT: entry:90// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 291// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 492// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i1693// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]94// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 295// CHECK-NEXT: ret void96//97void sleft_ffi(void) {98 f = f << i;99}100 101// CHECK-LABEL: @sleft_lflfi(102// CHECK-NEXT: entry:103// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4104// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4105// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]106// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4107// CHECK-NEXT: ret void108//109void sleft_lflfi(void) {110 lf = lf << i;111}112 113// CHECK-LABEL: @sleft_aau(114// CHECK-NEXT: entry:115// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4116// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4117// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]118// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4119// CHECK-NEXT: ret void120//121void sleft_aau(void) {122 a = a << u;123}124 125// CHECK-LABEL: @sleft_ffu(126// CHECK-NEXT: entry:127// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2128// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4129// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16130// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]131// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2132// CHECK-NEXT: ret void133//134void sleft_ffu(void) {135 f = f << u;136}137 138 139// CHECK-LABEL: @uleft_usausai(140// CHECK-NEXT: entry:141// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2142// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4143// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16144// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]145// CHECK-NEXT: store i16 [[TMP3]], ptr @usa, align 2146// CHECK-NEXT: ret void147//148void uleft_usausai(void) {149 usa = usa << i;150}151 152// CHECK-LABEL: @uleft_uauai(153// CHECK-NEXT: entry:154// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4155// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4156// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]157// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4158// CHECK-NEXT: ret void159//160void uleft_uauai(void) {161 ua = ua << i;162}163 164// CHECK-LABEL: @uleft_ulaulai(165// CHECK-NEXT: entry:166// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8167// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4168// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64169// CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]]170// CHECK-NEXT: store i64 [[TMP3]], ptr @ula, align 8171// CHECK-NEXT: ret void172//173void uleft_ulaulai(void) {174 ula = ula << i;175}176 177// CHECK-LABEL: @uleft_usfusfi(178// CHECK-NEXT: entry:179// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @usf, align 1180// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4181// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8182// CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]]183// CHECK-NEXT: store i8 [[TMP3]], ptr @usf, align 1184// CHECK-NEXT: ret void185//186void uleft_usfusfi(void) {187 usf = usf << i;188}189 190// CHECK-LABEL: @uleft_ufufi(191// CHECK-NEXT: entry:192// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2193// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4194// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16195// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]196// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2197// CHECK-NEXT: ret void198//199void uleft_ufufi(void) {200 uf = uf << i;201}202 203// CHECK-LABEL: @uleft_ulfulfi(204// CHECK-NEXT: entry:205// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ulf, align 4206// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4207// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]208// CHECK-NEXT: store i32 [[TMP2]], ptr @ulf, align 4209// CHECK-NEXT: ret void210//211void uleft_ulfulfi(void) {212 ulf = ulf << i;213}214 215// CHECK-LABEL: @uleft_uauau(216// CHECK-NEXT: entry:217// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4218// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4219// CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]220// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4221// CHECK-NEXT: ret void222//223void uleft_uauau(void) {224 ua = ua << u;225}226 227// CHECK-LABEL: @uleft_ufufu(228// CHECK-NEXT: entry:229// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2230// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4231// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16232// CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]233// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2234// CHECK-NEXT: ret void235//236void uleft_ufufu(void) {237 uf = uf << u;238}239 240 241// CHECK-LABEL: @sright_sasai(242// CHECK-NEXT: entry:243// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2244// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4245// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16246// CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]247// CHECK-NEXT: store i16 [[TMP3]], ptr @sa, align 2248// CHECK-NEXT: ret void249//250void sright_sasai(void) {251 sa = sa >> i;252}253 254// CHECK-LABEL: @sright_aai(255// CHECK-NEXT: entry:256// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4257// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4258// CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]259// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4260// CHECK-NEXT: ret void261//262void sright_aai(void) {263 a = a >> i;264}265 266// CHECK-LABEL: @sright_lalai(267// CHECK-NEXT: entry:268// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8269// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4270// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64271// CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP0]], [[TMP2]]272// CHECK-NEXT: store i64 [[TMP3]], ptr @la, align 8273// CHECK-NEXT: ret void274//275void sright_lalai(void) {276 la = la >> i;277}278 279// CHECK-LABEL: @sright_sfsfi(280// CHECK-NEXT: entry:281// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1282// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4283// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8284// CHECK-NEXT: [[TMP3:%.*]] = ashr i8 [[TMP0]], [[TMP2]]285// CHECK-NEXT: store i8 [[TMP3]], ptr @sf, align 1286// CHECK-NEXT: ret void287//288void sright_sfsfi(void) {289 sf = sf >> i;290}291 292// CHECK-LABEL: @sright_ffi(293// CHECK-NEXT: entry:294// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2295// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4296// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16297// CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]298// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2299// CHECK-NEXT: ret void300//301void sright_ffi(void) {302 f = f >> i;303}304 305// CHECK-LABEL: @sright_lflfi(306// CHECK-NEXT: entry:307// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4308// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4309// CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]310// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4311// CHECK-NEXT: ret void312//313void sright_lflfi(void) {314 lf = lf >> i;315}316 317// CHECK-LABEL: @sright_aau(318// CHECK-NEXT: entry:319// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4320// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4321// CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]322// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4323// CHECK-NEXT: ret void324//325void sright_aau(void) {326 a = a >> u;327}328 329// CHECK-LABEL: @sright_ffu(330// CHECK-NEXT: entry:331// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2332// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4333// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16334// CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]335// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2336// CHECK-NEXT: ret void337//338void sright_ffu(void) {339 f = f >> u;340}341 342 343// CHECK-LABEL: @uright_usausai(344// CHECK-NEXT: entry:345// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2346// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4347// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16348// CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]349// CHECK-NEXT: store i16 [[TMP3]], ptr @usa, align 2350// CHECK-NEXT: ret void351//352void uright_usausai(void) {353 usa = usa >> i;354}355 356// CHECK-LABEL: @uright_uauai(357// CHECK-NEXT: entry:358// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4359// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4360// CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]361// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4362// CHECK-NEXT: ret void363//364void uright_uauai(void) {365 ua = ua >> i;366}367 368// CHECK-LABEL: @uright_ulaulai(369// CHECK-NEXT: entry:370// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8371// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4372// CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64373// CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], [[TMP2]]374// CHECK-NEXT: store i64 [[TMP3]], ptr @ula, align 8375// CHECK-NEXT: ret void376//377void uright_ulaulai(void) {378 ula = ula >> i;379}380 381// CHECK-LABEL: @uright_usfusfi(382// CHECK-NEXT: entry:383// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @usf, align 1384// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4385// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8386// CHECK-NEXT: [[TMP3:%.*]] = lshr i8 [[TMP0]], [[TMP2]]387// CHECK-NEXT: store i8 [[TMP3]], ptr @usf, align 1388// CHECK-NEXT: ret void389//390void uright_usfusfi(void) {391 usf = usf >> i;392}393 394// CHECK-LABEL: @uright_ufufi(395// CHECK-NEXT: entry:396// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2397// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4398// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16399// CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]400// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2401// CHECK-NEXT: ret void402//403void uright_ufufi(void) {404 uf = uf >> i;405}406 407// CHECK-LABEL: @uright_ulfulfi(408// CHECK-NEXT: entry:409// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ulf, align 4410// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4411// CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]412// CHECK-NEXT: store i32 [[TMP2]], ptr @ulf, align 4413// CHECK-NEXT: ret void414//415void uright_ulfulfi(void) {416 ulf = ulf >> i;417}418 419// CHECK-LABEL: @uright_uauau(420// CHECK-NEXT: entry:421// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4422// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4423// CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]424// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4425// CHECK-NEXT: ret void426//427void uright_uauau(void) {428 ua = ua >> u;429}430 431// CHECK-LABEL: @uright_ufufu(432// CHECK-NEXT: entry:433// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2434// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4435// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16436// CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]437// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2438// CHECK-NEXT: ret void439//440void uright_ufufu(void) {441 uf = uf >> u;442}443 444 445// CHECK-LABEL: @satleft_sassasi(446// CHECK-NEXT: entry:447// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2448// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4449// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16450// CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])451// CHECK-NEXT: store i16 [[TMP3]], ptr @sa_sat, align 2452// CHECK-NEXT: ret void453//454void satleft_sassasi(void) {455 sa_sat = sa_sat << i;456}457 458// CHECK-LABEL: @satleft_asasi(459// CHECK-NEXT: entry:460// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a_sat, align 4461// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4462// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])463// CHECK-NEXT: store i32 [[TMP2]], ptr @a_sat, align 4464// CHECK-NEXT: ret void465//466void satleft_asasi(void) {467 a_sat = a_sat << i;468}469 470// CHECK-LABEL: @satleft_sfssfsi(471// CHECK-NEXT: entry:472// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf_sat, align 1473// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4474// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8475// CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])476// CHECK-NEXT: store i8 [[TMP3]], ptr @sf_sat, align 1477// CHECK-NEXT: ret void478//479void satleft_sfssfsi(void) {480 sf_sat = sf_sat << i;481}482 483// CHECK-LABEL: @satleft_fsfsi(484// CHECK-NEXT: entry:485// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f_sat, align 2486// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4487// CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16488// CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])489// CHECK-NEXT: store i16 [[TMP3]], ptr @f_sat, align 2490// CHECK-NEXT: ret void491//492void satleft_fsfsi(void) {493 f_sat = f_sat << i;494}495 496// SIGNED-LABEL: @satleft_usasusasi(497// SIGNED-NEXT: entry:498// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2499// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4500// SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16501// SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])502// SIGNED-NEXT: store i16 [[TMP3]], ptr @usa_sat, align 2503// SIGNED-NEXT: ret void504//505// UNSIGNED-LABEL: @satleft_usasusasi(506// UNSIGNED-NEXT: entry:507// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2508// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4509// UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16510// UNSIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])511// UNSIGNED-NEXT: store i16 [[TMP3]], ptr @usa_sat, align 2512// UNSIGNED-NEXT: ret void513//514void satleft_usasusasi(void) {515 usa_sat = usa_sat << i;516}517 518// SIGNED-LABEL: @satleft_uasuasi(519// SIGNED-NEXT: entry:520// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4521// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4522// SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.ushl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])523// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4524// SIGNED-NEXT: ret void525//526// UNSIGNED-LABEL: @satleft_uasuasi(527// UNSIGNED-NEXT: entry:528// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4529// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4530// UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])531// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4532// UNSIGNED-NEXT: ret void533//534void satleft_uasuasi(void) {535 ua_sat = ua_sat << i;536}537 538// SIGNED-LABEL: @satleft_usfsusfsi(539// SIGNED-NEXT: entry:540// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1541// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4542// SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8543// SIGNED-NEXT: [[TMP3:%.*]] = call i8 @llvm.ushl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])544// SIGNED-NEXT: store i8 [[TMP3]], ptr @usf_sat, align 1545// SIGNED-NEXT: ret void546//547// UNSIGNED-LABEL: @satleft_usfsusfsi(548// UNSIGNED-NEXT: entry:549// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1550// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4551// UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8552// UNSIGNED-NEXT: [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])553// UNSIGNED-NEXT: store i8 [[TMP3]], ptr @usf_sat, align 1554// UNSIGNED-NEXT: ret void555//556void satleft_usfsusfsi(void) {557 usf_sat = usf_sat << i;558}559 560// SIGNED-LABEL: @satleft_ufsufsi(561// SIGNED-NEXT: entry:562// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2563// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4564// SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16565// SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])566// SIGNED-NEXT: store i16 [[TMP3]], ptr @uf_sat, align 2567// SIGNED-NEXT: ret void568//569// UNSIGNED-LABEL: @satleft_ufsufsi(570// UNSIGNED-NEXT: entry:571// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2572// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4573// UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16574// UNSIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])575// UNSIGNED-NEXT: store i16 [[TMP3]], ptr @uf_sat, align 2576// UNSIGNED-NEXT: ret void577//578void satleft_ufsufsi(void) {579 uf_sat = uf_sat << i;580}581