569 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py2// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED3// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED4 5_Accum a;6_Fract f;7long _Fract lf;8unsigned _Accum ua;9short unsigned _Accum usa;10unsigned _Fract uf;11 12_Sat _Accum sa;13_Sat _Fract sf;14_Sat long _Fract slf;15_Sat unsigned _Accum sua;16_Sat short unsigned _Accum susa;17_Sat unsigned _Fract suf;18 19int i;20 21// CHECK-LABEL: @inc_a(22// CHECK-NEXT: entry:23// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 424// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -3276825// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 426// CHECK-NEXT: ret void27//28void inc_a(void) {29 a++;30}31 32// CHECK-LABEL: @inc_f(33// CHECK-NEXT: entry:34// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 235// CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -3276836// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 237// CHECK-NEXT: ret void38//39void inc_f(void) {40 f++;41}42 43// CHECK-LABEL: @inc_lf(44// CHECK-NEXT: entry:45// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 446// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -214748364847// CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 448// CHECK-NEXT: ret void49//50void inc_lf(void) {51 lf++;52}53 54// SIGNED-LABEL: @inc_ua(55// SIGNED-NEXT: entry:56// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 457// SIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 6553658// SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 459// SIGNED-NEXT: ret void60//61// UNSIGNED-LABEL: @inc_ua(62// UNSIGNED-NEXT: entry:63// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 464// UNSIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 3276865// UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 466// UNSIGNED-NEXT: ret void67//68void inc_ua(void) {69 ua++;70}71 72// SIGNED-LABEL: @inc_usa(73// SIGNED-NEXT: entry:74// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 275// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 25676// SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 277// SIGNED-NEXT: ret void78//79// UNSIGNED-LABEL: @inc_usa(80// UNSIGNED-NEXT: entry:81// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 282// UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 12883// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 284// UNSIGNED-NEXT: ret void85//86void inc_usa(void) {87 usa++;88}89 90// SIGNED-LABEL: @inc_uf(91// SIGNED-NEXT: entry:92// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 293// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], poison94// SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 295// SIGNED-NEXT: ret void96//97// UNSIGNED-LABEL: @inc_uf(98// UNSIGNED-NEXT: entry:99// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2100// UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768101// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2102// UNSIGNED-NEXT: ret void103//104void inc_uf(void) {105 uf++;106}107 108// CHECK-LABEL: @inc_sa(109// CHECK-NEXT: entry:110// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4111// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -32768)112// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4113// CHECK-NEXT: ret void114//115void inc_sa(void) {116 sa++;117}118 119// CHECK-LABEL: @inc_sf(120// CHECK-NEXT: entry:121// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2122// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 -32768)123// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2124// CHECK-NEXT: ret void125//126void inc_sf(void) {127 sf++;128}129 130// CHECK-LABEL: @inc_slf(131// CHECK-NEXT: entry:132// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4133// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -2147483648)134// CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4135// CHECK-NEXT: ret void136//137void inc_slf(void) {138 slf++;139}140 141// SIGNED-LABEL: @inc_sua(142// SIGNED-NEXT: entry:143// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4144// SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536)145// SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4146// SIGNED-NEXT: ret void147//148// UNSIGNED-LABEL: @inc_sua(149// UNSIGNED-NEXT: entry:150// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4151// UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768)152// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31153// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32154// UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4155// UNSIGNED-NEXT: ret void156//157void inc_sua(void) {158 sua++;159}160 161// SIGNED-LABEL: @inc_susa(162// SIGNED-NEXT: entry:163// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2164// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256)165// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2166// SIGNED-NEXT: ret void167//168// UNSIGNED-LABEL: @inc_susa(169// UNSIGNED-NEXT: entry:170// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2171// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128)172// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15173// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16174// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2175// UNSIGNED-NEXT: ret void176//177void inc_susa(void) {178 susa++;179}180 181// SIGNED-LABEL: @inc_suf(182// SIGNED-NEXT: entry:183// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2184// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1)185// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2186// SIGNED-NEXT: ret void187//188// UNSIGNED-LABEL: @inc_suf(189// UNSIGNED-NEXT: entry:190// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2191// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767)192// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15193// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16194// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2195// UNSIGNED-NEXT: ret void196//197void inc_suf(void) {198 suf++;199}200 201 202// CHECK-LABEL: @dec_a(203// CHECK-NEXT: entry:204// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4205// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -32768206// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4207// CHECK-NEXT: ret void208//209void dec_a(void) {210 a--;211}212 213// CHECK-LABEL: @dec_f(214// CHECK-NEXT: entry:215// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2216// CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768217// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2218// CHECK-NEXT: ret void219//220void dec_f(void) {221 f--;222}223 224// CHECK-LABEL: @dec_lf(225// CHECK-NEXT: entry:226// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4227// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -2147483648228// CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 4229// CHECK-NEXT: ret void230//231void dec_lf(void) {232 lf--;233}234 235// SIGNED-LABEL: @dec_ua(236// SIGNED-NEXT: entry:237// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4238// SIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 65536239// SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4240// SIGNED-NEXT: ret void241//242// UNSIGNED-LABEL: @dec_ua(243// UNSIGNED-NEXT: entry:244// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4245// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 32768246// UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4247// UNSIGNED-NEXT: ret void248//249void dec_ua(void) {250 ua--;251}252 253// SIGNED-LABEL: @dec_usa(254// SIGNED-NEXT: entry:255// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2256// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 256257// SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2258// SIGNED-NEXT: ret void259//260// UNSIGNED-LABEL: @dec_usa(261// UNSIGNED-NEXT: entry:262// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2263// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 128264// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2265// UNSIGNED-NEXT: ret void266//267void dec_usa(void) {268 usa--;269}270 271// SIGNED-LABEL: @dec_uf(272// SIGNED-NEXT: entry:273// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2274// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], poison275// SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2276// SIGNED-NEXT: ret void277//278// UNSIGNED-LABEL: @dec_uf(279// UNSIGNED-NEXT: entry:280// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2281// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768282// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2283// UNSIGNED-NEXT: ret void284//285void dec_uf(void) {286 uf--;287}288 289// CHECK-LABEL: @dec_sa(290// CHECK-NEXT: entry:291// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4292// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -32768)293// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4294// CHECK-NEXT: ret void295//296void dec_sa(void) {297 sa--;298}299 300// CHECK-LABEL: @dec_sf(301// CHECK-NEXT: entry:302// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2303// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 -32768)304// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2305// CHECK-NEXT: ret void306//307void dec_sf(void) {308 sf--;309}310 311// CHECK-LABEL: @dec_slf(312// CHECK-NEXT: entry:313// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4314// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -2147483648)315// CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4316// CHECK-NEXT: ret void317//318void dec_slf(void) {319 slf--;320}321 322// SIGNED-LABEL: @dec_sua(323// SIGNED-NEXT: entry:324// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4325// SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536)326// SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4327// SIGNED-NEXT: ret void328//329// UNSIGNED-LABEL: @dec_sua(330// UNSIGNED-NEXT: entry:331// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4332// UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768)333// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0334// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]335// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31336// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32337// UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4338// UNSIGNED-NEXT: ret void339//340void dec_sua(void) {341 sua--;342}343 344// SIGNED-LABEL: @dec_susa(345// SIGNED-NEXT: entry:346// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2347// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256)348// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2349// SIGNED-NEXT: ret void350//351// UNSIGNED-LABEL: @dec_susa(352// UNSIGNED-NEXT: entry:353// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2354// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128)355// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0356// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]357// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15358// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16359// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2360// UNSIGNED-NEXT: ret void361//362void dec_susa(void) {363 susa--;364}365 366// SIGNED-LABEL: @dec_suf(367// SIGNED-NEXT: entry:368// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2369// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1)370// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2371// SIGNED-NEXT: ret void372//373// UNSIGNED-LABEL: @dec_suf(374// UNSIGNED-NEXT: entry:375// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2376// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767)377// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0378// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]379// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15380// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16381// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2382// UNSIGNED-NEXT: ret void383//384void dec_suf(void) {385 suf--;386}387 388 389// CHECK-LABEL: @neg_a(390// CHECK-NEXT: entry:391// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4392// CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]]393// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4394// CHECK-NEXT: ret void395//396void neg_a(void) {397 a = -a;398}399 400// CHECK-LABEL: @neg_f(401// CHECK-NEXT: entry:402// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2403// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]404// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2405// CHECK-NEXT: ret void406//407void neg_f(void) {408 f = -f;409}410 411// CHECK-LABEL: @neg_usa(412// CHECK-NEXT: entry:413// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2414// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]415// CHECK-NEXT: store i16 [[TMP1]], ptr @usa, align 2416// CHECK-NEXT: ret void417//418void neg_usa(void) {419 usa = -usa;420}421 422// CHECK-LABEL: @neg_uf(423// CHECK-NEXT: entry:424// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2425// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]426// CHECK-NEXT: store i16 [[TMP1]], ptr @uf, align 2427// CHECK-NEXT: ret void428//429void neg_uf(void) {430 uf = -uf;431}432 433// CHECK-LABEL: @neg_sa(434// CHECK-NEXT: entry:435// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4436// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 0, i32 [[TMP0]])437// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4438// CHECK-NEXT: ret void439//440void neg_sa(void) {441 sa = -sa;442}443 444// CHECK-LABEL: @neg_sf(445// CHECK-NEXT: entry:446// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2447// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])448// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2449// CHECK-NEXT: ret void450//451void neg_sf(void) {452 sf = -sf;453}454 455// SIGNED-LABEL: @neg_susa(456// SIGNED-NEXT: entry:457// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2458// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])459// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2460// SIGNED-NEXT: ret void461//462// UNSIGNED-LABEL: @neg_susa(463// UNSIGNED-NEXT: entry:464// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2465// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])466// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0467// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]468// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15469// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16470// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2471// UNSIGNED-NEXT: ret void472//473void neg_susa(void) {474 susa = -susa;475}476 477// SIGNED-LABEL: @neg_suf(478// SIGNED-NEXT: entry:479// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2480// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])481// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2482// SIGNED-NEXT: ret void483//484// UNSIGNED-LABEL: @neg_suf(485// UNSIGNED-NEXT: entry:486// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2487// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])488// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0489// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]490// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15491// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16492// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2493// UNSIGNED-NEXT: ret void494//495void neg_suf(void) {496 suf = -suf;497}498 499 500// CHECK-LABEL: @plus_a(501// CHECK-NEXT: entry:502// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4503// CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 4504// CHECK-NEXT: ret void505//506void plus_a(void) {507 a = +a;508}509 510// CHECK-LABEL: @plus_uf(511// CHECK-NEXT: entry:512// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2513// CHECK-NEXT: store i16 [[TMP0]], ptr @uf, align 2514// CHECK-NEXT: ret void515//516void plus_uf(void) {517 uf = +uf;518}519 520// CHECK-LABEL: @plus_sa(521// CHECK-NEXT: entry:522// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4523// CHECK-NEXT: store i32 [[TMP0]], ptr @sa, align 4524// CHECK-NEXT: ret void525//526void plus_sa(void) {527 sa = +sa;528}529 530 531// CHECK-LABEL: @not_a(532// CHECK-NEXT: entry:533// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4534// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0535// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true536// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32537// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4538// CHECK-NEXT: ret void539//540void not_a(void) {541 i = !a;542}543 544// CHECK-LABEL: @not_uf(545// CHECK-NEXT: entry:546// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2547// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0548// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true549// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32550// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4551// CHECK-NEXT: ret void552//553void not_uf(void) {554 i = !uf;555}556 557// CHECK-LABEL: @not_susa(558// CHECK-NEXT: entry:559// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2560// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0561// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true562// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32563// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4564// CHECK-NEXT: ret void565//566void not_susa(void) {567 i = !susa;568}569