337 lines · c
1// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s2// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s3// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s4 5// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s6// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s7// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s8// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}9// expected-no-diagnostics10// REQUIRES: x86-registered-target11#ifndef HEADER12#define HEADER13 14_Bool bv, bx;15char cv, cx;16unsigned char ucv, ucx;17short sv, sx;18unsigned short usv, usx;19int iv, ix;20unsigned int uiv, uix;21long lv, lx;22unsigned long ulv, ulx;23long long llv, llx;24unsigned long long ullv, ullx;25float fv, fx;26double dv, dx;27long double ldv, ldx;28_Complex int civ, cix;29_Complex float cfv, cfx;30_Complex double cdv, cdx;31 32typedef int int4 __attribute__((__vector_size__(16)));33int4 int4x;34 35struct BitFields {36 int : 32;37 int a : 31;38} bfx;39 40struct BitFields_packed {41 int : 32;42 int a : 31;43} __attribute__ ((__packed__)) bfx_packed;44 45struct BitFields2 {46 int : 31;47 int a : 1;48} bfx2;49 50struct BitFields2_packed {51 int : 31;52 int a : 1;53} __attribute__ ((__packed__)) bfx2_packed;54 55struct BitFields3 {56 int : 11;57 int a : 14;58} bfx3;59 60struct BitFields3_packed {61 int : 11;62 int a : 14;63} __attribute__ ((__packed__)) bfx3_packed;64 65struct BitFields4 {66 short : 16;67 int a: 1;68 long b : 7;69} bfx4;70 71struct BitFields4_packed {72 short : 16;73 int a: 1;74 long b : 7;75} __attribute__ ((__packed__)) bfx4_packed;76 77typedef float float2 __attribute__((ext_vector_type(2)));78float2 float2x;79 80// Register "0" is currently an invalid register for global register variables.81// Use "esp" instead of "0".82// register int rix __asm__("0");83register int rix __asm__("esp");84 85// CHECK-LABEL: @main(86int main(void) {87// CHECK: load atomic i8, ptr {{.*}} monotonic, align 188// CHECK: store i889#pragma omp atomic read90 bv = bx;91// CHECK: load atomic i8, ptr {{.*}} monotonic, align 192// CHECK: store i893#pragma omp atomic read94 cv = cx;95// CHECK: load atomic i8, ptr {{.*}} monotonic, align 196// CHECK: store i897#pragma omp atomic read98 ucv = ucx;99// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2100// CHECK: store i16101#pragma omp atomic read102 sv = sx;103// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2104// CHECK: store i16105#pragma omp atomic read106 usv = usx;107// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4108// CHECK: store i32109#pragma omp atomic read110 iv = ix;111// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4112// CHECK: store i32113#pragma omp atomic read114 uiv = uix;115// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8116// CHECK: store i64117#pragma omp atomic read118 lv = lx;119// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8120// CHECK: store i64121#pragma omp atomic read122 ulv = ulx;123// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8124// CHECK: store i64125#pragma omp atomic read126 llv = llx;127// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8128// CHECK: store i64129#pragma omp atomic read130 ullv = ullx;131// CHECK: load atomic float, ptr {{.*}} monotonic, align 4132// CHECK: store float133#pragma omp atomic read134 fv = fx;135// CHECK: load atomic double, ptr {{.*}} monotonic, align 8136// CHECK: store double137#pragma omp atomic read138 dv = dx;139// CHECK: [[LD:%.+]] = load atomic i128, ptr {{.*}} monotonic, align 16140// CHECK: store i128 [[LD]], ptr [[LDTEMP:%.+]]141// CHECK: [[LD:%.+]] = load x86_fp80, ptr [[LDTEMP]]142// CHECK: store x86_fp80 [[LD]]143#pragma omp atomic read144 ldv = ldx;145// CHECK: call{{.*}} void @__atomic_load(i64 noundef 8,146// CHECK: store i32147// CHECK: store i32148#pragma omp atomic read149 civ = cix;150// CHECK: call{{.*}} void @__atomic_load(i64 noundef 8,151// CHECK: store float152// CHECK: store float153#pragma omp atomic read154 cfv = cfx;155// CHECK: call{{.*}} void @__atomic_load(i64 noundef 16,156// CHECK: call{{.*}} @__kmpc_flush(157// CHECK: store double158// CHECK: store double159#pragma omp atomic seq_cst read160 cdv = cdx;161// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8162// CHECK: store i8163#pragma omp atomic read164 bv = ulx;165// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1166// CHECK: store i8167#pragma omp atomic read168 cv = bx;169// CHECK: load atomic i8, ptr {{.*}} seq_cst, align 1170// CHECK: call{{.*}} @__kmpc_flush(171// CHECK: store i8172#pragma omp atomic read seq_cst173 ucv = cx;174// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8175// CHECK: store i16176#pragma omp atomic read177 sv = ulx;178// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8179// CHECK: store i16180#pragma omp atomic read181 usv = lx;182// CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4183// CHECK: call{{.*}} @__kmpc_flush(184// CHECK: store i32185#pragma omp atomic seq_cst, read186 iv = uix;187// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4188// CHECK: store i32189#pragma omp atomic read190 uiv = ix;191// CHECK: call{{.*}} void @__atomic_load(i64 noundef 8,192// CHECK: store i64193#pragma omp atomic read194 lv = cix;195// CHECK: load atomic float, ptr {{.*}} monotonic, align 4196// CHECK: store i64197#pragma omp atomic read198 ulv = fx;199// CHECK: load atomic double, ptr {{.*}} monotonic, align 8200// CHECK: store i64201#pragma omp atomic read202 llv = dx;203// CHECK: load atomic i128, ptr {{.*}} monotonic, align 16204// CHECK: store i64205#pragma omp atomic read206 ullv = ldx;207// CHECK: call{{.*}} void @__atomic_load(i64 noundef 8,208// CHECK: store float209#pragma omp atomic read210 fv = cix;211// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2212// CHECK: store double213#pragma omp atomic read214 dv = sx;215// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1216// CHECK: store x86_fp80217#pragma omp atomic read218 ldv = bx;219// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1220// CHECK: store i32221// CHECK: store i32222#pragma omp atomic read223 civ = bx;224// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2225// CHECK: store float226// CHECK: store float227#pragma omp atomic read228 cfv = usx;229// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8230// CHECK: store double231// CHECK: store double232#pragma omp atomic read233 cdv = llx;234// CHECK: [[I128VAL:%.+]] = load atomic i128, ptr @{{.+}} monotonic, align 16235// CHECK: store i128 [[I128VAL]], ptr [[LDTEMP:%.+]]236// CHECK: [[LD:%.+]] = load <4 x i32>, ptr [[LDTEMP]]237// CHECK: extractelement <4 x i32> [[LD]]238// CHECK: store i8239#pragma omp atomic read240 bv = int4x[0];241// CHECK: [[LD:%.+]] = load atomic i32, ptr getelementptr (i8, ptr @{{.+}}, i64 4) monotonic, align 4242// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]]243// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]]244// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1245// CHECK: ashr i32 [[SHL]], 1246// CHECK: store x86_fp80247#pragma omp atomic read248 ldv = bfx.a;249// CHECK: call void @__atomic_load(i64 noundef 4, ptr noundef getelementptr (i8, ptr @bfx_packed, i64 4), ptr noundef [[LDTEMP:%.+]], i32 noundef 0)250// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]]251// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1252// CHECK: ashr i32 [[SHL]], 1253// CHECK: store x86_fp80254#pragma omp atomic read255 ldv = bfx_packed.a;256// CHECK: [[LD:%.+]] = load atomic i32, ptr @bfx2 monotonic, align 4257// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]]258// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]]259// CHECK: ashr i32 [[LD]], 31260// CHECK: store x86_fp80261#pragma omp atomic read262 ldv = bfx2.a;263// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @bfx2_packed, i64 3) monotonic, align 1264// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]]265// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]]266// CHECK: ashr i8 [[LD]], 7267// CHECK: store x86_fp80268#pragma omp atomic read269 ldv = bfx2_packed.a;270// CHECK: [[LD:%.+]] = load atomic i32, ptr @bfx3 monotonic, align 4271// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]]272// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]]273// CHECK: [[SHL:%.+]] = shl i32 [[LD]], 7274// CHECK: ashr i32 [[SHL]], 18275// CHECK: store x86_fp80276#pragma omp atomic read277 ldv = bfx3.a;278// CHECK: call void @__atomic_load(i64 noundef 3, ptr noundef getelementptr (i8, ptr @bfx3_packed, i64 1), ptr noundef [[LDTEMP:%.+]], i32 noundef 0)279// CHECK: [[LD:%.+]] = load i24, ptr [[LDTEMP]]280// CHECK: [[SHL:%.+]] = shl i24 [[LD]], 7281// CHECK: [[ASHR:%.+]] = ashr i24 [[SHL]], 10282// CHECK: sext i24 [[ASHR]] to i32283// CHECK: store x86_fp80284#pragma omp atomic read285 ldv = bfx3_packed.a;286// CHECK: [[LD:%.+]] = load atomic i64, ptr @bfx4 monotonic, align 8287// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]]288// CHECK: [[LD:%.+]] = load i64, ptr [[LDTEMP]]289// CHECK: [[SHL:%.+]] = shl i64 [[LD]], 47290// CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 63291// CHECK: trunc i64 [[ASHR]] to i32292// CHECK: store x86_fp80293#pragma omp atomic read294 ldv = bfx4.a;295// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr inbounds nuw (%struct.BitFields4_packed, ptr @bfx4_packed, i32 0, i32 1) monotonic, align 1296// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]]297// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]]298// CHECK: [[SHL:%.+]] = shl i8 [[LD]], 7299// CHECK: [[ASHR:%.+]] = ashr i8 [[SHL]], 7300// CHECK: sext i8 [[ASHR]] to i32301// CHECK: store x86_fp80302#pragma omp atomic relaxed read303 ldv = bfx4_packed.a;304// CHECK: [[LD:%.+]] = load atomic i64, ptr @bfx4 monotonic, align 8305// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]]306// CHECK: [[LD:%.+]] = load i64, ptr [[LDTEMP]]307// CHECK: [[SHL:%.+]] = shl i64 [[LD]], 40308// CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 57309// CHECK: store x86_fp80310#pragma omp atomic read relaxed311 ldv = bfx4.b;312// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr inbounds nuw (%struct.BitFields4_packed, ptr @bfx4_packed, i32 0, i32 1) acquire, align 1313// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]]314// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]]315// CHECK: [[ASHR:%.+]] = ashr i8 [[LD]], 1316// CHECK: sext i8 [[ASHR]] to i64317// CHECK: call{{.*}} @__kmpc_flush(318// CHECK: store x86_fp80319#pragma omp atomic read acquire320 ldv = bfx4_packed.b;321// CHECK: [[LD:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8322// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]]323// CHECK: [[LD:%.+]] = load <2 x float>, ptr [[LDTEMP]]324// CHECK: extractelement <2 x float> [[LD]]325// CHECK: store i64326#pragma omp atomic read327 ulv = float2x.x;328// CHECK: call{{.*}} i{{[0-9]+}} @llvm.read_register329// CHECK: call{{.*}} @__kmpc_flush(330// CHECK: store double331#pragma omp atomic read seq_cst332 dv = rix;333 return 0;334}335 336#endif337