1793 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"24// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"26// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"27// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"29// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35 T f;36 S(T a) : f(a) {}37 S() : f() {}38 operator T() { return T(); }39 ~S() {}40};41 42template <typename T>43T tmain() {44 S<T> test;45 T t_var = T();46 T vec[] = {1, 2};47 S<T> s_arr[] = {1, 2};48 S<T> &var = test;49 #pragma omp target50 #pragma omp teams51#pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var)52 for (int i = 0; i < 2; ++i) {53 vec[i] = t_var;54 s_arr[i] = var;55 }56 return T();57}58 59int main() {60 static int svar;61 volatile double g;62 volatile double &g1 = g;63 64 #ifdef LAMBDA65 [&]() {66 static float sfvar;67 68 #pragma omp target69 #pragma omp teams70#pragma omp distribute firstprivate(g, g1, svar, sfvar)71 for (int i = 0; i < 2; ++i) {72 // Private alloca's for conversion73 74 // Actual private variables to be used in the body (tmp is used for the reference type)75 76 // Store input parameter addresses into private alloca's for conversion77 78 g += 1;79 g1 += 1;80 svar += 3;81 sfvar += 4.0;82 83 // call inner lambda (use refs to private alloca's)84 [&]() {85 g += 2;86 g1 += 2;87 svar += 4;88 sfvar += 8.0;89 90 91 92 }();93 }94 }();95 return 0;96 #else97 S<float> test;98 int t_var = 0;99 int vec[] = {1, 2};100 S<float> s_arr[] = {1, 2};101 S<float> &var = test;102 103 #pragma omp target104 #pragma omp teams105 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)106 for (int i = 0; i < 2; ++i) {107 vec[i] = t_var;108 s_arr[i] = var;109 }110 return tmain<int>();111 #endif112}113 114 115 116 117// discard omp loop variables118 119 120 121// init t_var122 123// init vec124 125// init s_arr126 127 128// init var129 130// init svar131 132 133 134// Template135 136 137 138// discard omp loop variables139 140 141 142// init t_var143 144// init vec145 146// init s_arr147 148 149// init var150 151 152#endif153// CHECK1-LABEL: define {{[^@]+}}@main154// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {155// CHECK1-NEXT: entry:156// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4157// CHECK1-NEXT: [[G:%.*]] = alloca double, align 8158// CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8159// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8160// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4161// CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8162// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0163// CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8164// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1165// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8166// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8167// CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])168// CHECK1-NEXT: ret i32 0169//170//171// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68172// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {173// CHECK1-NEXT: entry:174// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8175// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8176// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8177// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8178// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8179// CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8180// CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8181// CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8182// CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8183// CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8184// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8185// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])186// CHECK1-NEXT: ret void187//188//189// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined190// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {191// CHECK1-NEXT: entry:192// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8193// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8194// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8195// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8196// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8197// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8198// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8199// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8200// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4201// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4202// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4203// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4204// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4205// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4206// CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8207// CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8208// CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8209// CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4210// CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4211// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4212// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8213// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8214// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8215// CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8216// CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8217// CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8218// CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8219// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8220// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8221// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8222// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8223// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8224// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8225// CHECK1-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8226// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4227// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4228// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4229// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4230// CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, ptr [[TMP0]], align 8231// CHECK1-NEXT: store double [[TMP5]], ptr [[G3]], align 8232// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8233// CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, ptr [[TMP6]], align 8234// CHECK1-NEXT: store double [[TMP7]], ptr [[G14]], align 8235// CHECK1-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 8236// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4237// CHECK1-NEXT: store i32 [[TMP8]], ptr [[SVAR6]], align 4238// CHECK1-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4239// CHECK1-NEXT: store float [[TMP9]], ptr [[SFVAR7]], align 4240// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8241// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4242// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)243// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4244// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1245// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]246// CHECK1: cond.true:247// CHECK1-NEXT: br label [[COND_END:%.*]]248// CHECK1: cond.false:249// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4250// CHECK1-NEXT: br label [[COND_END]]251// CHECK1: cond.end:252// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]253// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4254// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4255// CHECK1-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4256// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]257// CHECK1: omp.inner.for.cond:258// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4259// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4260// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]261// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]262// CHECK1: omp.inner.for.body:263// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4264// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1265// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]266// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4267// CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[G3]], align 8268// CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00269// CHECK1-NEXT: store double [[ADD9]], ptr [[G3]], align 8270// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 8271// CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, ptr [[TMP19]], align 8272// CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00273// CHECK1-NEXT: store volatile double [[ADD10]], ptr [[TMP19]], align 8274// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR6]], align 4275// CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3276// CHECK1-NEXT: store i32 [[ADD11]], ptr [[SVAR6]], align 4277// CHECK1-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR7]], align 4278// CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double279// CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00280// CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float281// CHECK1-NEXT: store float [[CONV13]], ptr [[SFVAR7]], align 4282// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0283// CHECK1-NEXT: store ptr [[G3]], ptr [[TMP23]], align 8284// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1285// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 8286// CHECK1-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8287// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2288// CHECK1-NEXT: store ptr [[SVAR6]], ptr [[TMP26]], align 8289// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3290// CHECK1-NEXT: store ptr [[SFVAR7]], ptr [[TMP27]], align 8291// CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])292// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]293// CHECK1: omp.body.continue:294// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]295// CHECK1: omp.inner.for.inc:296// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4297// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1298// CHECK1-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV]], align 4299// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]300// CHECK1: omp.inner.for.end:301// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]302// CHECK1: omp.loop.exit:303// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]])304// CHECK1-NEXT: ret void305//306//307// CHECK3-LABEL: define {{[^@]+}}@main308// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {309// CHECK3-NEXT: entry:310// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4311// CHECK3-NEXT: [[G:%.*]] = alloca double, align 8312// CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4313// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4314// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4315// CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4316// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0317// CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4318// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1319// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4320// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4321// CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])322// CHECK3-NEXT: ret i32 0323//324//325// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68326// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {327// CHECK3-NEXT: entry:328// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4329// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4330// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4331// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4332// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4333// CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8334// CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8335// CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4336// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4337// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4338// CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4339// CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4340// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4341// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4342// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4343// CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8344// CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8345// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4346// CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4347// CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8348// CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4349// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4350// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])351// CHECK3-NEXT: ret void352//353//354// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined355// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {356// CHECK3-NEXT: entry:357// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4358// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4359// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4360// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4361// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4362// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4363// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4364// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4365// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4366// CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4367// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4368// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4369// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4370// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4371// CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8372// CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8373// CHECK3-NEXT: [[_TMP5:%.*]] = alloca ptr, align 4374// CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4375// CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4376// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4377// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4378// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4379// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4380// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4381// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4382// CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4383// CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4384// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4385// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4386// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4387// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4388// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4389// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4390// CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4391// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4392// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4393// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4394// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4395// CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, ptr [[TMP0]], align 8396// CHECK3-NEXT: store double [[TMP5]], ptr [[G3]], align 8397// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4398// CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, ptr [[TMP6]], align 4399// CHECK3-NEXT: store double [[TMP7]], ptr [[G14]], align 8400// CHECK3-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 4401// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4402// CHECK3-NEXT: store i32 [[TMP8]], ptr [[SVAR6]], align 4403// CHECK3-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4404// CHECK3-NEXT: store float [[TMP9]], ptr [[SFVAR7]], align 4405// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4406// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4407// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)408// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4409// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1410// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]411// CHECK3: cond.true:412// CHECK3-NEXT: br label [[COND_END:%.*]]413// CHECK3: cond.false:414// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4415// CHECK3-NEXT: br label [[COND_END]]416// CHECK3: cond.end:417// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]418// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4419// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4420// CHECK3-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4421// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]422// CHECK3: omp.inner.for.cond:423// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4424// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4425// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]426// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]427// CHECK3: omp.inner.for.body:428// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4429// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1430// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]431// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4432// CHECK3-NEXT: [[TMP18:%.*]] = load double, ptr [[G3]], align 8433// CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00434// CHECK3-NEXT: store double [[ADD9]], ptr [[G3]], align 8435// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 4436// CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, ptr [[TMP19]], align 4437// CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00438// CHECK3-NEXT: store volatile double [[ADD10]], ptr [[TMP19]], align 4439// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR6]], align 4440// CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3441// CHECK3-NEXT: store i32 [[ADD11]], ptr [[SVAR6]], align 4442// CHECK3-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR7]], align 4443// CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double444// CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00445// CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float446// CHECK3-NEXT: store float [[CONV13]], ptr [[SFVAR7]], align 4447// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0448// CHECK3-NEXT: store ptr [[G3]], ptr [[TMP23]], align 4449// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1450// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 4451// CHECK3-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 4452// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2453// CHECK3-NEXT: store ptr [[SVAR6]], ptr [[TMP26]], align 4454// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3455// CHECK3-NEXT: store ptr [[SFVAR7]], ptr [[TMP27]], align 4456// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])457// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]458// CHECK3: omp.body.continue:459// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]460// CHECK3: omp.inner.for.inc:461// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4462// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1463// CHECK3-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV]], align 4464// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]465// CHECK3: omp.inner.for.end:466// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]467// CHECK3: omp.loop.exit:468// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]])469// CHECK3-NEXT: ret void470//471//472// CHECK9-LABEL: define {{[^@]+}}@main473// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {474// CHECK9-NEXT: entry:475// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4476// CHECK9-NEXT: [[G:%.*]] = alloca double, align 8477// CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8478// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4479// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4480// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4481// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4482// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8483// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8484// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8485// CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8486// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8487// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8488// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8489// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4490// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8491// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4492// CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8493// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])494// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4495// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)496// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)497// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1498// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)499// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8500// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8501// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8502// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4503// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4504// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8505// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8506// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4507// CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4508// CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8509// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8510// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8511// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0512// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8513// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0514// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8515// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0516// CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8517// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1518// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8519// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1520// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8521// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1522// CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8523// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2524// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8525// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2526// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8527// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2528// CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8529// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3530// CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8531// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3532// CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8533// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3534// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8535// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4536// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8537// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4538// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8539// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4540// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8541// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0542// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0543// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0544// CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4545// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1546// CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4547// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2548// CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8549// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3550// CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8551// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4552// CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8553// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5554// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8555// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6556// CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8557// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7558// CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8559// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8560// CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8561// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9562// CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8563// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10564// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4565// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11566// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4567// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12568// CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4569// CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, ptr [[KERNEL_ARGS]])570// CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0571// CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]572// CHECK9: omp_offload.failed:573// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]574// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]575// CHECK9: omp_offload.cont:576// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()577// CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4578// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0579// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2580// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]581// CHECK9: arraydestroy.body:582// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]583// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1584// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]585// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]586// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]587// CHECK9: arraydestroy.done2:588// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]589// CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4590// CHECK9-NEXT: ret i32 [[TMP41]]591//592//593// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev594// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {595// CHECK9-NEXT: entry:596// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8597// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8598// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8599// CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])600// CHECK9-NEXT: ret void601//602//603// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef604// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {605// CHECK9-NEXT: entry:606// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8607// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4608// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8609// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4610// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8611// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4612// CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])613// CHECK9-NEXT: ret void614//615//616// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103617// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {618// CHECK9-NEXT: entry:619// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8620// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8621// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8622// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8623// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8624// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8625// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8626// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8627// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8628// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8629// CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8630// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8631// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8632// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8633// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8634// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8635// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])636// CHECK9-NEXT: ret void637//638//639// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined640// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {641// CHECK9-NEXT: entry:642// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8643// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8644// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8645// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8646// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8647// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8648// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8649// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8650// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8651// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4652// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4653// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4654// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4655// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4656// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4657// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4658// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4659// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4660// CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4661// CHECK9-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8662// CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4663// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4664// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8665// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8666// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8667// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8668// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8669// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8670// CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8671// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8672// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8673// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8674// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8675// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8676// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8677// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8678// CHECK9-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 8679// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4680// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4681// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4682// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4683// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4684// CHECK9-NEXT: store i32 [[TMP6]], ptr [[T_VAR3]], align 4685// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false)686// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0687// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2688// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]]689// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]690// CHECK9: omp.arraycpy.body:691// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]692// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]693// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)694// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1695// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1696// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]]697// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]698// CHECK9: omp.arraycpy.done6:699// CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 8700// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i64 4, i1 false)701// CHECK9-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 8702// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 4703// CHECK9-NEXT: store i32 [[TMP9]], ptr [[SVAR9]], align 4704// CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8705// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4706// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)707// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4708// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1709// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]710// CHECK9: cond.true:711// CHECK9-NEXT: br label [[COND_END:%.*]]712// CHECK9: cond.false:713// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4714// CHECK9-NEXT: br label [[COND_END]]715// CHECK9: cond.end:716// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]717// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4718// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4719// CHECK9-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4720// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]721// CHECK9: omp.inner.for.cond:722// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4723// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4724// CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]725// CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]726// CHECK9: omp.inner.for.cond.cleanup:727// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]728// CHECK9: omp.inner.for.body:729// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4730// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1731// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]732// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4733// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR3]], align 4734// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4735// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64736// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]737// CHECK9-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX]], align 4738// CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP8]], align 8739// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4740// CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP21]] to i64741// CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM11]]742// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX12]], ptr align 4 [[TMP20]], i64 4, i1 false)743// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]744// CHECK9: omp.body.continue:745// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]746// CHECK9: omp.inner.for.inc:747// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4748// CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], 1749// CHECK9-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 4750// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]751// CHECK9: omp.inner.for.end:752// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]753// CHECK9: omp.loop.exit:754// CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8755// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4756// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])757// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]758// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0759// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2760// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]761// CHECK9: arraydestroy.body:762// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]763// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1764// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]765// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]766// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]767// CHECK9: arraydestroy.done15:768// CHECK9-NEXT: ret void769//770//771// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev772// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {773// CHECK9-NEXT: entry:774// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8775// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8776// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8777// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]778// CHECK9-NEXT: ret void779//780//781// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v782// CHECK9-SAME: () #[[ATTR1]] comdat {783// CHECK9-NEXT: entry:784// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4785// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4786// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4787// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4788// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4789// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8790// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8791// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8792// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8793// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8794// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8795// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4796// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8797// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])798// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4799// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)800// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)801// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1802// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)803// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8804// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8805// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8806// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4807// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4808// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8809// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8810// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8811// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8812// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0813// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8814// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0815// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8816// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0817// CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8818// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1819// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8820// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1821// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8822// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1823// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8824// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2825// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8826// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2827// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8828// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2829// CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8830// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3831// CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8832// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3833// CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8834// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3835// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8836// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0837// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0838// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0839// CHECK9-NEXT: store i32 3, ptr [[TMP20]], align 4840// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1841// CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4842// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2843// CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8844// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3845// CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8846// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4847// CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8848// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5849// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8850// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6851// CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8852// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7853// CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8854// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8855// CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8856// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9857// CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8858// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10859// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4860// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11861// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4862// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12863// CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4864// CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])865// CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0866// CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]867// CHECK9: omp_offload.failed:868// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]869// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]870// CHECK9: omp_offload.cont:871// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4872// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0873// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2874// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]875// CHECK9: arraydestroy.body:876// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]877// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1878// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]879// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]880// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]881// CHECK9: arraydestroy.done2:882// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]883// CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4884// CHECK9-NEXT: ret i32 [[TMP36]]885//886//887// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev888// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {889// CHECK9-NEXT: entry:890// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8891// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8892// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8893// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0894// CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4895// CHECK9-NEXT: ret void896//897//898// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef899// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {900// CHECK9-NEXT: entry:901// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8902// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4903// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8904// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4905// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8906// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0907// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4908// CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4909// CHECK9-NEXT: ret void910//911//912// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev913// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {914// CHECK9-NEXT: entry:915// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8916// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8917// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8918// CHECK9-NEXT: ret void919//920//921// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev922// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {923// CHECK9-NEXT: entry:924// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8925// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8926// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8927// CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])928// CHECK9-NEXT: ret void929//930//931// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei932// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {933// CHECK9-NEXT: entry:934// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8935// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4936// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8937// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4938// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8939// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4940// CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])941// CHECK9-NEXT: ret void942//943//944// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49945// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {946// CHECK9-NEXT: entry:947// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8948// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8949// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8950// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8951// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8952// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8953// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8954// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8955// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8956// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8957// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8958// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8959// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8960// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8961// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])962// CHECK9-NEXT: ret void963//964//965// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined966// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {967// CHECK9-NEXT: entry:968// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8969// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8970// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8971// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8972// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8973// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8974// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8975// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8976// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4977// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4978// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4979// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4980// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4981// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4982// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4983// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4984// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4985// CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4986// CHECK9-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8987// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4988// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8989// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8990// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8991// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8992// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8993// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8994// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8995// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8996// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8997// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8998// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8999// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81000// CHECK9-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 81001// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41002// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41003// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41004// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41005// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41006// CHECK9-NEXT: store i32 [[TMP5]], ptr [[T_VAR3]], align 41007// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false)1008// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01009// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21010// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]]1011// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1012// CHECK9: omp.arraycpy.body:1013// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1014// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1015// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1016// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11017// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11018// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]1019// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]1020// CHECK9: omp.arraycpy.done6:1021// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 81022// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i64 4, i1 false)1023// CHECK9-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 81024// CHECK9-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81025// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41026// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1027// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41028// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 11029// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1030// CHECK9: cond.true:1031// CHECK9-NEXT: br label [[COND_END:%.*]]1032// CHECK9: cond.false:1033// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41034// CHECK9-NEXT: br label [[COND_END]]1035// CHECK9: cond.end:1036// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1037// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41038// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41039// CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41040// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1041// CHECK9: omp.inner.for.cond:1042// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41043// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41044// CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1045// CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1046// CHECK9: omp.inner.for.cond.cleanup:1047// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1048// CHECK9: omp.inner.for.body:1049// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41050// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11051// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1052// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 41053// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 41054// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 41055// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i641056// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1057// CHECK9-NEXT: store i32 [[TMP16]], ptr [[ARRAYIDX]], align 41058// CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP8]], align 81059// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 41060// CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i641061// CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]1062// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP18]], i64 4, i1 false)1063// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1064// CHECK9: omp.body.continue:1065// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1066// CHECK9: omp.inner.for.inc:1067// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41068// CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP20]], 11069// CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 41070// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]1071// CHECK9: omp.inner.for.end:1072// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1073// CHECK9: omp.loop.exit:1074// CHECK9-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81075// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 41076// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])1077// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]1078// CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01079// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 21080// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1081// CHECK9: arraydestroy.body:1082// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1083// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11084// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1085// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1086// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1087// CHECK9: arraydestroy.done14:1088// CHECK9-NEXT: ret void1089//1090//1091// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1092// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1093// CHECK9-NEXT: entry:1094// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81095// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81096// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81097// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1098// CHECK9-NEXT: ret void1099//1100//1101// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1102// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1103// CHECK9-NEXT: entry:1104// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81105// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81106// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81107// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01108// CHECK9-NEXT: store i32 0, ptr [[F]], align 41109// CHECK9-NEXT: ret void1110//1111//1112// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1113// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1114// CHECK9-NEXT: entry:1115// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81116// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41117// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81118// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41119// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81120// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01121// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41122// CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 41123// CHECK9-NEXT: ret void1124//1125//1126// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1127// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1128// CHECK9-NEXT: entry:1129// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81130// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81131// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81132// CHECK9-NEXT: ret void1133//1134//1135// CHECK11-LABEL: define {{[^@]+}}@main1136// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1137// CHECK11-NEXT: entry:1138// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41139// CHECK11-NEXT: [[G:%.*]] = alloca double, align 81140// CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 41141// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41142// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41143// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41144// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41145// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41146// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41147// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41148// CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 41149// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41150// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41151// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41152// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41153// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81154// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41155// CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 41156// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1157// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41158// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1159// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1160// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11161// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1162// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41163// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41164// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41165// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41166// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41167// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41168// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41169// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41170// CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41171// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41172// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 41173// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 41174// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01175// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 41176// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01177// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 41178// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01179// CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 41180// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11181// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 41182// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11183// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 41184// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11185// CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 41186// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21187// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 41188// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21189// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 41190// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21191// CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 41192// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31193// CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 41194// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31195// CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 41196// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31197// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 41198// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41199// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 41200// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41201// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 41202// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41203// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 41204// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01205// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01206// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01207// CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 41208// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11209// CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 41210// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21211// CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 41212// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31213// CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 41214// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41215// CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 41216// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51217// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 41218// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61219// CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 41220// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71221// CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 41222// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81223// CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 81224// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91225// CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 81226// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101227// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41228// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111229// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 41230// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121231// CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 41232// CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, ptr [[KERNEL_ARGS]])1233// CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01234// CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1235// CHECK11: omp_offload.failed:1236// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1237// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1238// CHECK11: omp_offload.cont:1239// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1240// CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41241// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01242// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21243// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1244// CHECK11: arraydestroy.body:1245// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1246// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11247// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1248// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1249// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1250// CHECK11: arraydestroy.done2:1251// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1252// CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 41253// CHECK11-NEXT: ret i32 [[TMP41]]1254//1255//1256// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1257// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1258// CHECK11-NEXT: entry:1259// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41260// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41261// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41262// CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1263// CHECK11-NEXT: ret void1264//1265//1266// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1267// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1268// CHECK11-NEXT: entry:1269// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41270// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41271// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41272// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41273// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41274// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41275// CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1276// CHECK11-NEXT: ret void1277//1278//1279// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1031280// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1281// CHECK11-NEXT: entry:1282// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41283// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41284// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41285// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41286// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 41287// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41288// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41289// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41290// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41291// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41292// CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41293// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41294// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41295// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41296// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41297// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41298// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])1299// CHECK11-NEXT: ret void1300//1301//1302// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.omp_outlined1303// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1304// CHECK11-NEXT: entry:1305// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41306// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41307// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41308// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41309// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41310// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41311// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 41312// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41313// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41314// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41315// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41316// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41317// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41318// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41319// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41320// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41321// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41322// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 41323// CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 41324// CHECK11-NEXT: [[_TMP8:%.*]] = alloca ptr, align 41325// CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 41326// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41327// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41328// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41329// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41330// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41331// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41332// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41333// CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 41334// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 41335// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41336// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41337// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41338// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 41339// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41340// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41341// CHECK11-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 41342// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41343// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41344// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41345// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41346// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 41347// CHECK11-NEXT: store i32 [[TMP6]], ptr [[T_VAR3]], align 41348// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false)1349// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01350// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21351// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]]1352// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1353// CHECK11: omp.arraycpy.body:1354// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1355// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1356// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1357// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11358// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11359// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]]1360// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]1361// CHECK11: omp.arraycpy.done6:1362// CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 41363// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i32 4, i1 false)1364// CHECK11-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 41365// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 41366// CHECK11-NEXT: store i32 [[TMP9]], ptr [[SVAR9]], align 41367// CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41368// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 41369// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1370// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41371// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 11372// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1373// CHECK11: cond.true:1374// CHECK11-NEXT: br label [[COND_END:%.*]]1375// CHECK11: cond.false:1376// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41377// CHECK11-NEXT: br label [[COND_END]]1378// CHECK11: cond.end:1379// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]1380// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41381// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41382// CHECK11-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 41383// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1384// CHECK11: omp.inner.for.cond:1385// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41386// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41387// CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]1388// CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1389// CHECK11: omp.inner.for.cond.cleanup:1390// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1391// CHECK11: omp.inner.for.body:1392// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41393// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 11394// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1395// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 41396// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR3]], align 41397// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 41398// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP19]]1399// CHECK11-NEXT: store i32 [[TMP18]], ptr [[ARRAYIDX]], align 41400// CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP8]], align 41401// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 41402// CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP21]]1403// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP20]], i32 4, i1 false)1404// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1405// CHECK11: omp.body.continue:1406// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1407// CHECK11: omp.inner.for.inc:1408// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41409// CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 11410// CHECK11-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 41411// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]1412// CHECK11: omp.inner.for.end:1413// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1414// CHECK11: omp.loop.exit:1415// CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41416// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 41417// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])1418// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]1419// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01420// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 21421// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1422// CHECK11: arraydestroy.body:1423// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1424// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11425// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1426// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1427// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1428// CHECK11: arraydestroy.done14:1429// CHECK11-NEXT: ret void1430//1431//1432// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1433// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1434// CHECK11-NEXT: entry:1435// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41436// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41437// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41438// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1439// CHECK11-NEXT: ret void1440//1441//1442// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1443// CHECK11-SAME: () #[[ATTR1]] comdat {1444// CHECK11-NEXT: entry:1445// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41446// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41447// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41448// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41449// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41450// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41451// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41452// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41453// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41454// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41455// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41456// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41457// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81458// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1459// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41460// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1461// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1462// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11463// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1464// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41465// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41466// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41467// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41468// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41469// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41470// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41471// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 41472// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41473// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01474// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 41475// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01476// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 41477// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01478// CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 41479// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11480// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 41481// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11482// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 41483// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11484// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 41485// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21486// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 41487// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21488// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 41489// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21490// CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 41491// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31492// CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 41493// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31494// CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 41495// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31496// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 41497// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01498// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01499// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01500// CHECK11-NEXT: store i32 3, ptr [[TMP20]], align 41501// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11502// CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 41503// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21504// CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 41505// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31506// CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 41507// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41508// CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 41509// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51510// CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 41511// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61512// CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 41513// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71514// CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 41515// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81516// CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 81517// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91518// CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 81519// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101520// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 41521// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111522// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 41523// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121524// CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 41525// CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1526// CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 01527// CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1528// CHECK11: omp_offload.failed:1529// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1530// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1531// CHECK11: omp_offload.cont:1532// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41533// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01534// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21535// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1536// CHECK11: arraydestroy.body:1537// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1538// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11539// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1540// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1541// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1542// CHECK11: arraydestroy.done2:1543// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1544// CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 41545// CHECK11-NEXT: ret i32 [[TMP36]]1546//1547//1548// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1549// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1550// CHECK11-NEXT: entry:1551// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41552// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41553// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41554// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01555// CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 41556// CHECK11-NEXT: ret void1557//1558//1559// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1560// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1561// CHECK11-NEXT: entry:1562// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41563// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41564// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41565// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41566// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41567// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01568// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41569// CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 41570// CHECK11-NEXT: ret void1571//1572//1573// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1574// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1575// CHECK11-NEXT: entry:1576// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41577// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41578// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41579// CHECK11-NEXT: ret void1580//1581//1582// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1583// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1584// CHECK11-NEXT: entry:1585// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41586// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41587// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41588// CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1589// CHECK11-NEXT: ret void1590//1591//1592// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1593// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1594// CHECK11-NEXT: entry:1595// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41596// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41597// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41598// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41599// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41600// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41601// CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1602// CHECK11-NEXT: ret void1603//1604//1605// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491606// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1607// CHECK11-NEXT: entry:1608// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41609// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41610// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41611// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41612// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41613// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41614// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41615// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41616// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41617// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41618// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41619// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41620// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41621// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41622// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])1623// CHECK11-NEXT: ret void1624//1625//1626// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1627// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1628// CHECK11-NEXT: entry:1629// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41630// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41631// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41632// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41633// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41634// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41635// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41636// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41637// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41638// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41639// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41640// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41641// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41642// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41643// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41644// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41645// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41646// CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41647// CHECK11-NEXT: [[_TMP8:%.*]] = alloca ptr, align 41648// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41649// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41650// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41651// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41652// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41653// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41654// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41655// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 41656// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41657// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41658// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41659// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41660// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 41661// CHECK11-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 41662// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41663// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41664// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41665// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41666// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41667// CHECK11-NEXT: store i32 [[TMP5]], ptr [[T_VAR3]], align 41668// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false)1669// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01670// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21671// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]]1672// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1673// CHECK11: omp.arraycpy.body:1674// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1675// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1676// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1677// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11678// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11679// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]1680// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]1681// CHECK11: omp.arraycpy.done6:1682// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 41683// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i32 4, i1 false)1684// CHECK11-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 41685// CHECK11-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41686// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41687// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1688// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41689// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 11690// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1691// CHECK11: cond.true:1692// CHECK11-NEXT: br label [[COND_END:%.*]]1693// CHECK11: cond.false:1694// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41695// CHECK11-NEXT: br label [[COND_END]]1696// CHECK11: cond.end:1697// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1698// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41699// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41700// CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41701// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1702// CHECK11: omp.inner.for.cond:1703// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41704// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41705// CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1706// CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1707// CHECK11: omp.inner.for.cond.cleanup:1708// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1709// CHECK11: omp.inner.for.body:1710// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41711// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11712// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1713// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 41714// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 41715// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 41716// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP17]]1717// CHECK11-NEXT: store i32 [[TMP16]], ptr [[ARRAYIDX]], align 41718// CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP8]], align 41719// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 41720// CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP19]]1721// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP18]], i32 4, i1 false)1722// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1723// CHECK11: omp.body.continue:1724// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1725// CHECK11: omp.inner.for.inc:1726// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41727// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP20]], 11728// CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 41729// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]1730// CHECK11: omp.inner.for.end:1731// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1732// CHECK11: omp.loop.exit:1733// CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41734// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 41735// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])1736// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]1737// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01738// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 21739// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1740// CHECK11: arraydestroy.body:1741// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP23]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1742// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11743// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1744// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]1745// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]1746// CHECK11: arraydestroy.done13:1747// CHECK11-NEXT: ret void1748//1749//1750// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1751// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1752// CHECK11-NEXT: entry:1753// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41754// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41755// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41756// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1757// CHECK11-NEXT: ret void1758//1759//1760// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1761// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1762// CHECK11-NEXT: entry:1763// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41764// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41765// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41766// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01767// CHECK11-NEXT: store i32 0, ptr [[F]], align 41768// CHECK11-NEXT: ret void1769//1770//1771// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1772// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1773// CHECK11-NEXT: entry:1774// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41775// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41776// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41777// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41778// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41779// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01780// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41781// CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 41782// CHECK11-NEXT: ret void1783//1784//1785// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1786// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1787// CHECK11-NEXT: entry:1788// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41789// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41790// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41791// CHECK11-NEXT: ret void1792//1793