1851 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"24// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"26// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"27// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"29// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35 T f;36 S(T a) : f(a) {}37 S() : f() {}38 operator T() { return T(); }39 ~S() {}40};41 42template <typename T>43T tmain() {44 S<T> test;45 T t_var = T();46 T vec[] = {1, 2};47 S<T> s_arr[] = {1, 2};48 S<T> &var = test;49 #pragma omp target50 #pragma omp teams51#pragma omp distribute lastprivate(t_var, vec, s_arr, s_arr, var, var)52 for (int i = 0; i < 2; ++i) {53 vec[i] = t_var;54 s_arr[i] = var;55 }56 return T();57}58 59int main() {60 static int svar;61 volatile double g;62 volatile double &g1 = g;63 64 #ifdef LAMBDA65 [&]() {66 static float sfvar;67 68 #pragma omp target69 #pragma omp teams70#pragma omp distribute lastprivate(g, g1, svar, sfvar)71 for (int i = 0; i < 2; ++i) {72 // loop variables73 74 // init private variables75 g = 1;76 g1 = 1;77 svar = 3;78 sfvar = 4.0;79 80 81 [&]() {82 g = 2;83 g1 = 2;84 svar = 4;85 sfvar = 8.0;86 87 }();88 }89 }();90 return 0;91 #else92 S<float> test;93 int t_var = 0;94 int vec[] = {1, 2};95 S<float> s_arr[] = {1, 2};96 S<float> &var = test;97 98 #pragma omp target99 #pragma omp teams100#pragma omp distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)101 for (int i = 0; i < 2; ++i) {102 vec[i] = t_var;103 s_arr[i] = var;104 }105 int i;106 107 return tmain<int>();108 #endif109}110 111 112// skip loop variables113 114// copy from parameters to local address variables115 116// load content of local address variables117// the distribute loop118// assignment: vec[i] = t_var;119 120// assignment: s_arr[i] = var;121 122// lastprivates123 124 125// template tmain126 127 128 129// skip alloca of global_tid and bound_tid130// skip loop variables131 132// skip init of bound and global tid133// copy from parameters to local address variables134 135// load content of local address variables136// assignment: vec[i] = t_var;137 138// assignment: s_arr[i] = var;139 140// lastprivates141 142#endif143// CHECK1-LABEL: define {{[^@]+}}@main144// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {145// CHECK1-NEXT: entry:146// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4147// CHECK1-NEXT: [[G:%.*]] = alloca double, align 8148// CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8149// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8150// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4151// CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8152// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0153// CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8154// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1155// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8156// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8157// CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])158// CHECK1-NEXT: ret i32 0159//160//161// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68162// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {163// CHECK1-NEXT: entry:164// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8165// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8166// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8167// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8168// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8169// CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8170// CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8171// CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8172// CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8173// CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8174// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8175// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])176// CHECK1-NEXT: ret void177//178//179// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined180// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {181// CHECK1-NEXT: entry:182// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8183// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8184// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8185// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8186// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8187// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8188// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8189// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8190// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4191// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4192// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4193// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4194// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4195// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4196// CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8197// CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8198// CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8199// CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4200// CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4201// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4202// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8203// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8204// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8205// CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8206// CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8207// CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8208// CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8209// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8210// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8211// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8212// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8213// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8214// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8215// CHECK1-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8216// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4217// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4218// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4219// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4220// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8221// CHECK1-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 8222// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8223// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4224// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)225// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4226// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1227// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]228// CHECK1: cond.true:229// CHECK1-NEXT: br label [[COND_END:%.*]]230// CHECK1: cond.false:231// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4232// CHECK1-NEXT: br label [[COND_END]]233// CHECK1: cond.end:234// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]235// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4236// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4237// CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4238// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]239// CHECK1: omp.inner.for.cond:240// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4241// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4242// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]243// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]244// CHECK1: omp.inner.for.body:245// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4246// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1247// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]248// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4249// CHECK1-NEXT: store double 1.000000e+00, ptr [[G3]], align 8250// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 8251// CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 8252// CHECK1-NEXT: store i32 3, ptr [[SVAR6]], align 4253// CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4254// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0255// CHECK1-NEXT: store ptr [[G3]], ptr [[TMP15]], align 8256// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1257// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 8258// CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 8259// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2260// CHECK1-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 8261// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3262// CHECK1-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 8263// CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])264// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]265// CHECK1: omp.body.continue:266// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]267// CHECK1: omp.inner.for.inc:268// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4269// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1270// CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4271// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]272// CHECK1: omp.inner.for.end:273// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]274// CHECK1: omp.loop.exit:275// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])276// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4277// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0278// CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]279// CHECK1: .omp.lastprivate.then:280// CHECK1-NEXT: [[TMP23:%.*]] = load double, ptr [[G3]], align 8281// CHECK1-NEXT: store volatile double [[TMP23]], ptr [[TMP0]], align 8282// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[_TMP5]], align 8283// CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[TMP24]], align 8284// CHECK1-NEXT: store volatile double [[TMP25]], ptr [[TMP5]], align 8285// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR6]], align 4286// CHECK1-NEXT: store i32 [[TMP26]], ptr [[TMP2]], align 4287// CHECK1-NEXT: [[TMP27:%.*]] = load float, ptr [[SFVAR7]], align 4288// CHECK1-NEXT: store float [[TMP27]], ptr [[TMP3]], align 4289// CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]290// CHECK1: .omp.lastprivate.done:291// CHECK1-NEXT: ret void292//293//294// CHECK3-LABEL: define {{[^@]+}}@main295// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {296// CHECK3-NEXT: entry:297// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4298// CHECK3-NEXT: [[G:%.*]] = alloca double, align 8299// CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4300// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4301// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4302// CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4303// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0304// CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4305// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1306// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4307// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4308// CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])309// CHECK3-NEXT: ret i32 0310//311//312// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68313// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {314// CHECK3-NEXT: entry:315// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4316// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4317// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4318// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4319// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4320// CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8321// CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8322// CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4323// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4324// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4325// CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4326// CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4327// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4328// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4329// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4330// CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8331// CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8332// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4333// CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4334// CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8335// CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4336// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4337// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])338// CHECK3-NEXT: ret void339//340//341// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined342// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {343// CHECK3-NEXT: entry:344// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4345// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4346// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4347// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4348// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4349// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4350// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4351// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4352// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4353// CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4354// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4355// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4356// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4357// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4358// CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8359// CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8360// CHECK3-NEXT: [[_TMP5:%.*]] = alloca ptr, align 4361// CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4362// CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4363// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4364// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4365// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4366// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4367// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4368// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4369// CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4370// CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4371// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4372// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4373// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4374// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4375// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4376// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4377// CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4378// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4379// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4380// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4381// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4382// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4383// CHECK3-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 4384// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4385// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4386// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)387// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4388// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1389// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]390// CHECK3: cond.true:391// CHECK3-NEXT: br label [[COND_END:%.*]]392// CHECK3: cond.false:393// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4394// CHECK3-NEXT: br label [[COND_END]]395// CHECK3: cond.end:396// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]397// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4398// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4399// CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4400// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]401// CHECK3: omp.inner.for.cond:402// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4403// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4404// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]405// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]406// CHECK3: omp.inner.for.body:407// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4408// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1409// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]410// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4411// CHECK3-NEXT: store double 1.000000e+00, ptr [[G3]], align 8412// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 4413// CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 4414// CHECK3-NEXT: store i32 3, ptr [[SVAR6]], align 4415// CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4416// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0417// CHECK3-NEXT: store ptr [[G3]], ptr [[TMP15]], align 4418// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1419// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 4420// CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 4421// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2422// CHECK3-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 4423// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3424// CHECK3-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 4425// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])426// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]427// CHECK3: omp.body.continue:428// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]429// CHECK3: omp.inner.for.inc:430// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4431// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1432// CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4433// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]434// CHECK3: omp.inner.for.end:435// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]436// CHECK3: omp.loop.exit:437// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])438// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4439// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0440// CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]441// CHECK3: .omp.lastprivate.then:442// CHECK3-NEXT: [[TMP23:%.*]] = load double, ptr [[G3]], align 8443// CHECK3-NEXT: store volatile double [[TMP23]], ptr [[TMP0]], align 8444// CHECK3-NEXT: [[TMP24:%.*]] = load ptr, ptr [[_TMP5]], align 4445// CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[TMP24]], align 4446// CHECK3-NEXT: store volatile double [[TMP25]], ptr [[TMP5]], align 4447// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR6]], align 4448// CHECK3-NEXT: store i32 [[TMP26]], ptr [[TMP2]], align 4449// CHECK3-NEXT: [[TMP27:%.*]] = load float, ptr [[SFVAR7]], align 4450// CHECK3-NEXT: store float [[TMP27]], ptr [[TMP3]], align 4451// CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]452// CHECK3: .omp.lastprivate.done:453// CHECK3-NEXT: ret void454//455//456// CHECK9-LABEL: define {{[^@]+}}@main457// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {458// CHECK9-NEXT: entry:459// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4460// CHECK9-NEXT: [[G:%.*]] = alloca double, align 8461// CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8462// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4463// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4464// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4465// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4466// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8467// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8468// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8469// CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8470// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8471// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8472// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8473// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4474// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8475// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4476// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4477// CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8478// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])479// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4480// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)481// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)482// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1483// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)484// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8485// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8486// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8487// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4488// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4489// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8490// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8491// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4492// CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4493// CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8494// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8495// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8496// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0497// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8498// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0499// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8500// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0501// CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8502// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1503// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8504// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1505// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8506// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1507// CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8508// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2509// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8510// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2511// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8512// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2513// CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8514// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3515// CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8516// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3517// CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8518// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3519// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8520// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4521// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8522// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4523// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8524// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4525// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8526// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0527// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0528// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0529// CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4530// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1531// CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4532// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2533// CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8534// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3535// CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8536// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4537// CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8538// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5539// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8540// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6541// CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8542// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7543// CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8544// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8545// CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8546// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9547// CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8548// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10549// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4550// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11551// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4552// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12553// CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4554// CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS]])555// CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0556// CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]557// CHECK9: omp_offload.failed:558// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]559// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]560// CHECK9: omp_offload.cont:561// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()562// CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4563// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0564// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2565// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]566// CHECK9: arraydestroy.body:567// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]568// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1569// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]570// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]571// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]572// CHECK9: arraydestroy.done2:573// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]574// CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4575// CHECK9-NEXT: ret i32 [[TMP41]]576//577//578// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev579// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {580// CHECK9-NEXT: entry:581// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8582// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8583// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8584// CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])585// CHECK9-NEXT: ret void586//587//588// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef589// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {590// CHECK9-NEXT: entry:591// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8592// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4593// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8594// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4595// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8596// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4597// CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])598// CHECK9-NEXT: ret void599//600//601// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98602// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {603// CHECK9-NEXT: entry:604// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8605// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8606// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8607// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8608// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8609// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8610// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8611// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8612// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8613// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8614// CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8615// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8616// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8617// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8618// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8619// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8620// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])621// CHECK9-NEXT: ret void622//623//624// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined625// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {626// CHECK9-NEXT: entry:627// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8628// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8629// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8630// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8631// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8632// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8633// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8634// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8635// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8636// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4637// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4638// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4639// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4640// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4641// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4642// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4643// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4644// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4645// CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4646// CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8647// CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4648// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4649// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8650// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8651// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8652// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8653// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8654// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8655// CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8656// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8657// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8658// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8659// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8660// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8661// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8662// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8663// CHECK9-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 8664// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4665// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4666// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4667// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4668// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0669// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2670// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]671// CHECK9: arrayctor.loop:672// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]673// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])674// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1675// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]676// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]677// CHECK9: arrayctor.cont:678// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8679// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])680// CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8681// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8682// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4683// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)684// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4685// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1686// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]687// CHECK9: cond.true:688// CHECK9-NEXT: br label [[COND_END:%.*]]689// CHECK9: cond.false:690// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4691// CHECK9-NEXT: br label [[COND_END]]692// CHECK9: cond.end:693// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]694// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4695// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4696// CHECK9-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4697// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]698// CHECK9: omp.inner.for.cond:699// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4700// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4701// CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]702// CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]703// CHECK9: omp.inner.for.cond.cleanup:704// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]705// CHECK9: omp.inner.for.body:706// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4707// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1708// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]709// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4710// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4711// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4712// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64713// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]714// CHECK9-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4715// CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8716// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4717// CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64718// CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]719// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP17]], i64 4, i1 false)720// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]721// CHECK9: omp.body.continue:722// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]723// CHECK9: omp.inner.for.inc:724// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4725// CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP19]], 1726// CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4727// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]728// CHECK9: omp.inner.for.end:729// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]730// CHECK9: omp.loop.exit:731// CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8732// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4733// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])734// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4735// CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0736// CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]737// CHECK9: .omp.lastprivate.then:738// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[T_VAR3]], align 4739// CHECK9-NEXT: store i32 [[TMP24]], ptr [[TMP0]], align 4740// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)741// CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0742// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2743// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP25]]744// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]745// CHECK9: omp.arraycpy.body:746// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]747// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]748// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)749// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1750// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1751// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]752// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]753// CHECK9: omp.arraycpy.done14:754// CHECK9-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP7]], align 8755// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i64 4, i1 false)756// CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[SVAR8]], align 4757// CHECK9-NEXT: store i32 [[TMP27]], ptr [[TMP4]], align 4758// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]759// CHECK9: .omp.lastprivate.done:760// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]761// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0762// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2763// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]764// CHECK9: arraydestroy.body:765// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]766// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1767// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]768// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]769// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]770// CHECK9: arraydestroy.done16:771// CHECK9-NEXT: ret void772//773//774// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev775// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {776// CHECK9-NEXT: entry:777// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8778// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8779// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8780// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]781// CHECK9-NEXT: ret void782//783//784// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v785// CHECK9-SAME: () #[[ATTR1]] comdat {786// CHECK9-NEXT: entry:787// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4788// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4789// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4790// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4791// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4792// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8793// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8794// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8795// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8796// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8797// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8798// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4799// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8800// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])801// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4802// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)803// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)804// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1805// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)806// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8807// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8808// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8809// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4810// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4811// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8812// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8813// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8814// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8815// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0816// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8817// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0818// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8819// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0820// CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8821// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1822// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8823// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1824// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8825// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1826// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8827// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2828// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8829// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2830// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8831// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2832// CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8833// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3834// CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8835// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3836// CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8837// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3838// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8839// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0840// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0841// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0842// CHECK9-NEXT: store i32 3, ptr [[TMP20]], align 4843// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1844// CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4845// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2846// CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8847// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3848// CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8849// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4850// CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8851// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5852// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8853// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6854// CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8855// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7856// CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8857// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8858// CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8859// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9860// CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8861// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10862// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4863// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11864// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4865// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12866// CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4867// CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])868// CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0869// CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]870// CHECK9: omp_offload.failed:871// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]872// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]873// CHECK9: omp_offload.cont:874// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4875// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0876// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2877// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]878// CHECK9: arraydestroy.body:879// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]880// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1881// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]882// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]883// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]884// CHECK9: arraydestroy.done2:885// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]886// CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4887// CHECK9-NEXT: ret i32 [[TMP36]]888//889//890// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev891// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {892// CHECK9-NEXT: entry:893// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8894// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8895// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8896// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0897// CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4898// CHECK9-NEXT: ret void899//900//901// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef902// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {903// CHECK9-NEXT: entry:904// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8905// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4906// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8907// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4908// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8909// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0910// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4911// CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4912// CHECK9-NEXT: ret void913//914//915// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev916// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {917// CHECK9-NEXT: entry:918// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8919// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8920// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8921// CHECK9-NEXT: ret void922//923//924// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev925// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {926// CHECK9-NEXT: entry:927// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8928// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8929// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8930// CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])931// CHECK9-NEXT: ret void932//933//934// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei935// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {936// CHECK9-NEXT: entry:937// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8938// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4939// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8940// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4941// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8942// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4943// CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])944// CHECK9-NEXT: ret void945//946//947// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49948// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {949// CHECK9-NEXT: entry:950// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8951// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8952// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8953// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8954// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8955// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8956// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8957// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8958// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8959// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8960// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8961// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8962// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8963// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8964// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])965// CHECK9-NEXT: ret void966//967//968// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined969// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {970// CHECK9-NEXT: entry:971// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8972// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8973// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8974// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8975// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8976// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8977// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8978// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8979// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4980// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4981// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4982// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4983// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4984// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4985// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4986// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4987// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4988// CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4989// CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8990// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4991// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8992// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8993// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8994// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8995// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8996// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8997// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8998// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8999// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 81000// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 81001// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 81002// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81003// CHECK9-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 81004// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41005// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41006// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41007// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41008// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01009// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21010// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1011// CHECK9: arrayctor.loop:1012// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1013// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1014// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11015// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1016// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1017// CHECK9: arrayctor.cont:1018// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81019// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1020// CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 81021// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81022// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41023// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1024// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41025// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11026// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1027// CHECK9: cond.true:1028// CHECK9-NEXT: br label [[COND_END:%.*]]1029// CHECK9: cond.false:1030// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41031// CHECK9-NEXT: br label [[COND_END]]1032// CHECK9: cond.end:1033// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1034// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41035// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41036// CHECK9-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41037// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1038// CHECK9: omp.inner.for.cond:1039// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41040// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41041// CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1042// CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1043// CHECK9: omp.inner.for.cond.cleanup:1044// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1045// CHECK9: omp.inner.for.body:1046// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41047// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11048// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1049// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 41050// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 41051// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 41052// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i641053// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1054// CHECK9-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 41055// CHECK9-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 81056// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 41057// CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i641058// CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]1059// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP16]], i64 4, i1 false)1060// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1061// CHECK9: omp.body.continue:1062// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1063// CHECK9: omp.inner.for.inc:1064// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41065// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 11066// CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 41067// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]1068// CHECK9: omp.inner.for.end:1069// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1070// CHECK9: omp.loop.exit:1071// CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81072// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41073// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1074// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41075// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01076// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1077// CHECK9: .omp.lastprivate.then:1078// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 41079// CHECK9-NEXT: store i32 [[TMP23]], ptr [[TMP0]], align 41080// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)1081// CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01082// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 21083// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]1084// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1085// CHECK9: omp.arraycpy.body:1086// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1087// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1088// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1089// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11090// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11091// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1092// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]1093// CHECK9: omp.arraycpy.done13:1094// CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 81095// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP25]], i64 4, i1 false)1096// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1097// CHECK9: .omp.lastprivate.done:1098// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1099// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01100// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 21101// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1102// CHECK9: arraydestroy.body:1103// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1104// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11105// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1106// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]1107// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]1108// CHECK9: arraydestroy.done15:1109// CHECK9-NEXT: ret void1110//1111//1112// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1113// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1114// CHECK9-NEXT: entry:1115// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81116// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81117// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81118// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1119// CHECK9-NEXT: ret void1120//1121//1122// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1123// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1124// CHECK9-NEXT: entry:1125// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81126// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81127// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81128// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01129// CHECK9-NEXT: store i32 0, ptr [[F]], align 41130// CHECK9-NEXT: ret void1131//1132//1133// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1134// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1135// CHECK9-NEXT: entry:1136// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81137// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41138// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81139// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41140// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81141// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01142// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41143// CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 41144// CHECK9-NEXT: ret void1145//1146//1147// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1148// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1149// CHECK9-NEXT: entry:1150// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81151// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81152// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81153// CHECK9-NEXT: ret void1154//1155//1156// CHECK11-LABEL: define {{[^@]+}}@main1157// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1158// CHECK11-NEXT: entry:1159// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41160// CHECK11-NEXT: [[G:%.*]] = alloca double, align 81161// CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 41162// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41163// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41164// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41165// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41166// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41167// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41168// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41169// CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 41170// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41171// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41172// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41173// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41174// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81175// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41176// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41177// CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 41178// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1179// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41180// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1181// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1182// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11183// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1184// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41185// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41186// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41187// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41188// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41189// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41190// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41191// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41192// CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41193// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41194// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 41195// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 41196// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01197// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 41198// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01199// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 41200// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01201// CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 41202// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11203// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 41204// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11205// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 41206// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11207// CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 41208// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21209// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 41210// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21211// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 41212// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21213// CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 41214// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31215// CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 41216// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31217// CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 41218// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31219// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 41220// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41221// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 41222// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41223// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 41224// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41225// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 41226// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01227// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01228// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01229// CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 41230// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11231// CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 41232// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21233// CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 41234// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31235// CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 41236// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41237// CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 41238// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51239// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 41240// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61241// CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 41242// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71243// CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 41244// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81245// CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 81246// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91247// CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 81248// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101249// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41250// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111251// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 41252// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121253// CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 41254// CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS]])1255// CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01256// CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1257// CHECK11: omp_offload.failed:1258// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1259// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1260// CHECK11: omp_offload.cont:1261// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1262// CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41263// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01264// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21265// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1266// CHECK11: arraydestroy.body:1267// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1268// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11269// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1270// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1271// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1272// CHECK11: arraydestroy.done2:1273// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1274// CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 41275// CHECK11-NEXT: ret i32 [[TMP41]]1276//1277//1278// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1279// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1280// CHECK11-NEXT: entry:1281// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41282// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41283// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41284// CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1285// CHECK11-NEXT: ret void1286//1287//1288// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1289// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1290// CHECK11-NEXT: entry:1291// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41292// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41293// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41294// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41295// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41296// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41297// CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1298// CHECK11-NEXT: ret void1299//1300//1301// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l981302// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1303// CHECK11-NEXT: entry:1304// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41305// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41306// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41307// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41308// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 41309// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41310// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41311// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41312// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41313// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41314// CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41315// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41316// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41317// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41318// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41319// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41320// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])1321// CHECK11-NEXT: ret void1322//1323//1324// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined1325// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1326// CHECK11-NEXT: entry:1327// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41328// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41329// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41330// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41331// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41332// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41333// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 41334// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41335// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41336// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41337// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41338// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41339// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41340// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41341// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41342// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41343// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41344// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 41345// CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 41346// CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 41347// CHECK11-NEXT: [[SVAR8:%.*]] = alloca i32, align 41348// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41349// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41350// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41351// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41352// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41353// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41354// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41355// CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 41356// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 41357// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41358// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41359// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41360// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 41361// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41362// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41363// CHECK11-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 41364// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41365// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41366// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41367// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41368// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01369// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21370// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1371// CHECK11: arrayctor.loop:1372// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1373// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1374// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11375// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1376// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1377// CHECK11: arrayctor.cont:1378// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 41379// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1380// CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 41381// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41382// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41383// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1384// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41385// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 11386// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1387// CHECK11: cond.true:1388// CHECK11-NEXT: br label [[COND_END:%.*]]1389// CHECK11: cond.false:1390// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41391// CHECK11-NEXT: br label [[COND_END]]1392// CHECK11: cond.end:1393// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1394// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41395// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41396// CHECK11-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41397// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1398// CHECK11: omp.inner.for.cond:1399// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41400// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41401// CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]1402// CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1403// CHECK11: omp.inner.for.cond.cleanup:1404// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1405// CHECK11: omp.inner.for.body:1406// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41407// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 11408// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1409// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 41410// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 41411// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 41412// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP16]]1413// CHECK11-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 41414// CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 41415// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 41416// CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP18]]1417// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i32 4, i1 false)1418// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1419// CHECK11: omp.body.continue:1420// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1421// CHECK11: omp.inner.for.inc:1422// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41423// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP19]], 11424// CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 41425// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]1426// CHECK11: omp.inner.for.end:1427// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1428// CHECK11: omp.loop.exit:1429// CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41430// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41431// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])1432// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41433// CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01434// CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1435// CHECK11: .omp.lastprivate.then:1436// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[T_VAR3]], align 41437// CHECK11-NEXT: store i32 [[TMP24]], ptr [[TMP0]], align 41438// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)1439// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 01440// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 21441// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP25]]1442// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1443// CHECK11: omp.arraycpy.body:1444// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1445// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1446// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1447// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11448// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11449// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]1450// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]1451// CHECK11: omp.arraycpy.done13:1452// CHECK11-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP7]], align 41453// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP26]], i32 4, i1 false)1454// CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[SVAR8]], align 41455// CHECK11-NEXT: store i32 [[TMP27]], ptr [[TMP4]], align 41456// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1457// CHECK11: .omp.lastprivate.done:1458// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1459// CHECK11-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01460// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i32 21461// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1462// CHECK11: arraydestroy.body:1463// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1464// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11465// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1466// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]1467// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]1468// CHECK11: arraydestroy.done15:1469// CHECK11-NEXT: ret void1470//1471//1472// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1473// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1474// CHECK11-NEXT: entry:1475// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41476// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41477// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41478// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1479// CHECK11-NEXT: ret void1480//1481//1482// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1483// CHECK11-SAME: () #[[ATTR1]] comdat {1484// CHECK11-NEXT: entry:1485// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41486// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41487// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41488// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41489// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41490// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41491// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41492// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41493// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41494// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41495// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41496// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41497// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81498// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1499// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41500// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1501// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1502// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11503// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1504// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41505// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41506// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41507// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41508// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41509// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41510// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41511// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 41512// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41513// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01514// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 41515// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01516// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 41517// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01518// CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 41519// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11520// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 41521// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11522// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 41523// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11524// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 41525// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21526// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 41527// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21528// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 41529// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21530// CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 41531// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31532// CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 41533// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31534// CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 41535// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31536// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 41537// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01538// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01539// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01540// CHECK11-NEXT: store i32 3, ptr [[TMP20]], align 41541// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11542// CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 41543// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21544// CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 41545// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31546// CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 41547// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41548// CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 41549// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51550// CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 41551// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61552// CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 41553// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71554// CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 41555// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81556// CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 81557// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91558// CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 81559// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101560// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 41561// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111562// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP31]], align 41563// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121564// CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 41565// CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1566// CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 01567// CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1568// CHECK11: omp_offload.failed:1569// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1570// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1571// CHECK11: omp_offload.cont:1572// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41573// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01574// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21575// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1576// CHECK11: arraydestroy.body:1577// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1578// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11579// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1580// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1581// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1582// CHECK11: arraydestroy.done2:1583// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1584// CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 41585// CHECK11-NEXT: ret i32 [[TMP36]]1586//1587//1588// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1589// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1590// CHECK11-NEXT: entry:1591// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41592// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41593// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41594// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01595// CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 41596// CHECK11-NEXT: ret void1597//1598//1599// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1600// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1601// CHECK11-NEXT: entry:1602// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41603// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41604// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41605// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41606// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41607// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01608// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41609// CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 41610// CHECK11-NEXT: ret void1611//1612//1613// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1614// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1615// CHECK11-NEXT: entry:1616// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41617// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41618// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41619// CHECK11-NEXT: ret void1620//1621//1622// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1623// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1624// CHECK11-NEXT: entry:1625// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41626// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41627// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41628// CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1629// CHECK11-NEXT: ret void1630//1631//1632// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1633// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1634// CHECK11-NEXT: entry:1635// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41636// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41637// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41638// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41639// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41640// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41641// CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1642// CHECK11-NEXT: ret void1643//1644//1645// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491646// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1647// CHECK11-NEXT: entry:1648// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41649// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41650// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41651// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41652// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41653// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41654// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41655// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41656// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41657// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41658// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41659// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41660// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41661// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41662// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])1663// CHECK11-NEXT: ret void1664//1665//1666// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1667// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1668// CHECK11-NEXT: entry:1669// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41670// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41671// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41672// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41673// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41674// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41675// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41676// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41677// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41678// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41679// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41680// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41681// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41682// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41683// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41684// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41685// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41686// CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41687// CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 41688// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41689// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41690// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41691// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41692// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41693// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41694// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41695// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 41696// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41697// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41698// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41699// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41700// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 41701// CHECK11-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 41702// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41703// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41704// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41705// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41706// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01707// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21708// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1709// CHECK11: arrayctor.loop:1710// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1711// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1712// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11713// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1714// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1715// CHECK11: arrayctor.cont:1716// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 41717// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1718// CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 41719// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41720// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41721// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1722// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41723// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11724// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1725// CHECK11: cond.true:1726// CHECK11-NEXT: br label [[COND_END:%.*]]1727// CHECK11: cond.false:1728// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41729// CHECK11-NEXT: br label [[COND_END]]1730// CHECK11: cond.end:1731// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1732// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41733// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41734// CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41735// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1736// CHECK11: omp.inner.for.cond:1737// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41738// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41739// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1740// CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1741// CHECK11: omp.inner.for.cond.cleanup:1742// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1743// CHECK11: omp.inner.for.body:1744// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41745// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11746// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1747// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 41748// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 41749// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 41750// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP15]]1751// CHECK11-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 41752// CHECK11-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 41753// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 41754// CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP17]]1755// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP16]], i32 4, i1 false)1756// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1757// CHECK11: omp.body.continue:1758// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1759// CHECK11: omp.inner.for.inc:1760// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41761// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 11762// CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 41763// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]1764// CHECK11: omp.inner.for.end:1765// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1766// CHECK11: omp.loop.exit:1767// CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41768// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41769// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1770// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41771// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01772// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1773// CHECK11: .omp.lastprivate.then:1774// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 41775// CHECK11-NEXT: store i32 [[TMP23]], ptr [[TMP0]], align 41776// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)1777// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01778// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 21779// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]1780// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1781// CHECK11: omp.arraycpy.body:1782// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1783// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1784// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1785// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11786// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11787// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1788// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1789// CHECK11: omp.arraycpy.done12:1790// CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 41791// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP25]], i32 4, i1 false)1792// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1793// CHECK11: .omp.lastprivate.done:1794// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1795// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01796// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 21797// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1798// CHECK11: arraydestroy.body:1799// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1800// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11801// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1802// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1803// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1804// CHECK11: arraydestroy.done14:1805// CHECK11-NEXT: ret void1806//1807//1808// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1809// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1810// CHECK11-NEXT: entry:1811// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41812// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41813// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41814// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1815// CHECK11-NEXT: ret void1816//1817//1818// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1819// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1820// CHECK11-NEXT: entry:1821// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41822// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41823// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41824// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01825// CHECK11-NEXT: store i32 0, ptr [[F]], align 41826// CHECK11-NEXT: ret void1827//1828//1829// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1830// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1831// CHECK11-NEXT: entry:1832// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41833// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41834// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41835// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41836// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41837// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01838// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41839// CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 41840// CHECK11-NEXT: ret void1841//1842//1843// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1844// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1845// CHECK11-NEXT: entry:1846// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41847// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41848// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41849// CHECK11-NEXT: ret void1850//1851