632 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 6// RUN: %clang_cc1 -triple x86_64-unknown-linux -verify -fopenmp-simd -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"7// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// expected-no-diagnostics10#ifndef HEADER11#define HEADER12 13int main(int argc, char **argv) {14#pragma omp target teams15#pragma omp distribute parallel for reduction(task, +: argc, argv[0:10][0:argc])16 for (long long i = 0; i < 10; ++i) {17#pragma omp task in_reduction(+: argc, argv[0:10][0:argc])18 ;19 }20}21 22 23 24// Init firstprivate copy of argc25 26// Init firstprivate copy of argv[0:10][0:argc]27 28// Register task reduction.29 30 31 32 33 34 35 36 37 38#endif39// CHECK1-LABEL: define {{[^@]+}}@main40// CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {41// CHECK1-NEXT: entry:42// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 443// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 844// CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 845// CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 446// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 847// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 448// CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARGC_CASTED]], align 449// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARGC_CASTED]], align 850// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 851// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14(i64 [[TMP1]], ptr [[TMP2]]) #[[ATTR2:[0-9]+]]52// CHECK1-NEXT: ret i32 053//54//55// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1456// CHECK1-SAME: (i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {57// CHECK1-NEXT: entry:58// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 859// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 860// CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 861// CHECK1-NEXT: store i64 [[ARGC]], ptr [[ARGC_ADDR]], align 862// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 863// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 464// CHECK1-NEXT: store i32 [[TMP0]], ptr [[ARGC_CASTED]], align 465// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARGC_CASTED]], align 866// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 867// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined, i64 [[TMP1]], ptr [[TMP2]])68// CHECK1-NEXT: ret void69//70//71// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined72// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] {73// CHECK1-NEXT: entry:74// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 875// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 876// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 877// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 878// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 879// CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 880// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 881// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 882// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 883// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 484// CHECK1-NEXT: [[I:%.*]] = alloca i64, align 885// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 886// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 887// CHECK1-NEXT: store i64 [[ARGC]], ptr [[ARGC_ADDR]], align 888// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 889// CHECK1-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 890// CHECK1-NEXT: store i64 9, ptr [[DOTOMP_COMB_UB]], align 891// CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 892// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 493// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 894// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 495// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)96// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 897// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP2]], 998// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]99// CHECK1: cond.true:100// CHECK1-NEXT: br label [[COND_END:%.*]]101// CHECK1: cond.false:102// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8103// CHECK1-NEXT: br label [[COND_END]]104// CHECK1: cond.end:105// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]106// CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8107// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8108// CHECK1-NEXT: store i64 [[TMP4]], ptr [[DOTOMP_IV]], align 8109// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]110// CHECK1: omp.inner.for.cond:111// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8112// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8113// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i64 [[TMP5]], [[TMP6]]114// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]115// CHECK1: omp.inner.for.body:116// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8117// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8118// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8119// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined, i64 [[TMP7]], i64 [[TMP8]], ptr [[ARGC_ADDR]], ptr [[TMP9]])120// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]121// CHECK1: omp.inner.for.inc:122// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8123// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8124// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP10]], [[TMP11]]125// CHECK1-NEXT: store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8126// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]127// CHECK1: omp.inner.for.end:128// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]129// CHECK1: omp.loop.exit:130// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])131// CHECK1-NEXT: ret void132//133//134// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined135// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1]] {136// CHECK1-NEXT: entry:137// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8138// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8139// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8140// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8141// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8142// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8143// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8144// CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8145// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8146// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8147// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8148// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4149// CHECK1-NEXT: [[ARGC1:%.*]] = alloca i32, align 4150// CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8151// CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8152// CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8153// CHECK1-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8154// CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [2 x %struct.kmp_taskred_input_t], align 8155// CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 8156// CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8157// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8158// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8159// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1160// CHECK1-NEXT: [[_TMP28:%.*]] = alloca i8, align 1161// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8162// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8163// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8164// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8165// CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8166// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8167// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8168// CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8169// CHECK1-NEXT: store i64 9, ptr [[DOTOMP_UB]], align 8170// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8171// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8172// CHECK1-NEXT: store i64 [[TMP1]], ptr [[DOTOMP_LB]], align 8173// CHECK1-NEXT: store i64 [[TMP2]], ptr [[DOTOMP_UB]], align 8174// CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8175// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4176// CHECK1-NEXT: store i32 0, ptr [[ARGC1]], align 4177// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8178// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP3]], i64 0179// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8180// CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP4]], i64 0181// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4182// CHECK1-NEXT: [[TMP6:%.*]] = sext i32 [[TMP5]] to i64183// CHECK1-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP6]]184// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8185// CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP7]], i64 9186// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARRAYIDX3]], align 8187// CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP8]], i64 [[LB_ADD_LEN]]188// CHECK1-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[ARRAYIDX4]] to i64189// CHECK1-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64190// CHECK1-NEXT: [[TMP11:%.*]] = sub i64 [[TMP9]], [[TMP10]]191// CHECK1-NEXT: [[TMP12:%.*]] = sdiv exact i64 [[TMP11]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)192// CHECK1-NEXT: [[TMP13:%.*]] = add nuw i64 [[TMP12]], 1193// CHECK1-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)194// CHECK1-NEXT: [[TMP15:%.*]] = call ptr @llvm.stacksave.p0()195// CHECK1-NEXT: store ptr [[TMP15]], ptr [[SAVED_STACK]], align 8196// CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP13]], align 16197// CHECK1-NEXT: store i64 [[TMP13]], ptr [[__VLA_EXPR0]], align 8198// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP13]]199// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP16]]200// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]201// CHECK1: omp.arrayinit.body:202// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]203// CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1204// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1205// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP16]]206// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]207// CHECK1: omp.arrayinit.done:208// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8209// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8210// CHECK1-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[TMP18]] to i64211// CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[ARRAYIDX2]] to i64212// CHECK1-NEXT: [[TMP21:%.*]] = sub i64 [[TMP19]], [[TMP20]]213// CHECK1-NEXT: [[TMP22:%.*]] = sdiv exact i64 [[TMP21]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)214// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[VLA]], i64 [[TMP22]]215// CHECK1-NEXT: store ptr [[_TMP6]], ptr [[_TMP5]], align 8216// CHECK1-NEXT: store ptr [[TMP23]], ptr [[_TMP6]], align 8217// CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 0218// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 0219// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP24]], align 8220// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 1221// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP25]], align 8222// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 2223// CHECK1-NEXT: store i64 4, ptr [[TMP26]], align 8224// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 3225// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP27]], align 8226// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 4227// CHECK1-NEXT: store ptr null, ptr [[TMP28]], align 8228// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 5229// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP29]], align 8230// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 6231// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP30]], i8 0, i64 4, i1 false)232// CHECK1-NEXT: [[DOTRD_INPUT_GEP_7:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 1233// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 0234// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8235// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP32]], i64 0236// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[ARRAYIDX8]], align 8237// CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP33]], i64 0238// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP0]], align 4239// CHECK1-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64240// CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP35]]241// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8242// CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP36]], i64 9243// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[ARRAYIDX11]], align 8244// CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP37]], i64 [[LB_ADD_LEN10]]245// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP31]], align 8246// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 1247// CHECK1-NEXT: store ptr [[ARRAYIDX9]], ptr [[TMP38]], align 8248// CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[ARRAYIDX12]] to i64249// CHECK1-NEXT: [[TMP40:%.*]] = ptrtoint ptr [[ARRAYIDX9]] to i64250// CHECK1-NEXT: [[TMP41:%.*]] = sub i64 [[TMP39]], [[TMP40]]251// CHECK1-NEXT: [[TMP42:%.*]] = sdiv exact i64 [[TMP41]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)252// CHECK1-NEXT: [[TMP43:%.*]] = add nuw i64 [[TMP42]], 1253// CHECK1-NEXT: [[TMP44:%.*]] = mul nuw i64 [[TMP43]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)254// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 2255// CHECK1-NEXT: store i64 [[TMP44]], ptr [[TMP45]], align 8256// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 3257// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP46]], align 8258// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 4259// CHECK1-NEXT: store ptr null, ptr [[TMP47]], align 8260// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 5261// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP48]], align 8262// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_7]], i32 0, i32 6263// CHECK1-NEXT: store i32 1, ptr [[TMP49]], align 8264// CHECK1-NEXT: [[TMP50:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8265// CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4266// CHECK1-NEXT: [[TMP52:%.*]] = call ptr @__kmpc_taskred_modifier_init(ptr @[[GLOB2]], i32 [[TMP51]], i32 1, i32 2, ptr [[DOTRD_INPUT_]])267// CHECK1-NEXT: store ptr [[TMP52]], ptr [[DOTTASK_RED_]], align 8268// CHECK1-NEXT: [[TMP53:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8269// CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[TMP53]], align 4270// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3:[0-9]+]], i32 [[TMP54]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)271// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8272// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP55]], 9273// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]274// CHECK1: cond.true:275// CHECK1-NEXT: br label [[COND_END:%.*]]276// CHECK1: cond.false:277// CHECK1-NEXT: [[TMP56:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8278// CHECK1-NEXT: br label [[COND_END]]279// CHECK1: cond.end:280// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP56]], [[COND_FALSE]] ]281// CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8282// CHECK1-NEXT: [[TMP57:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8283// CHECK1-NEXT: store i64 [[TMP57]], ptr [[DOTOMP_IV]], align 8284// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]285// CHECK1: omp.inner.for.cond:286// CHECK1-NEXT: [[TMP58:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8287// CHECK1-NEXT: [[TMP59:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8288// CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP58]], [[TMP59]]289// CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]290// CHECK1: omp.inner.for.cond.cleanup:291// CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]292// CHECK1: omp.inner.for.body:293// CHECK1-NEXT: [[TMP60:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8294// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP60]], 1295// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL]]296// CHECK1-NEXT: store i64 [[ADD]], ptr [[I]], align 8297// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0298// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[TMP61]], align 8299// CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1300// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP62]], align 8301// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2302// CHECK1-NEXT: [[TMP64:%.*]] = load ptr, ptr [[_TMP5]], align 8303// CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP63]], align 8304// CHECK1-NEXT: [[TMP65:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8305// CHECK1-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4306// CHECK1-NEXT: [[TMP67:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB2]], i32 [[TMP66]], i32 1, i64 48, i64 24, ptr @.omp_task_entry.)307// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP67]], i32 0, i32 0308// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP68]], i32 0, i32 0309// CHECK1-NEXT: [[TMP70:%.*]] = load ptr, ptr [[TMP69]], align 8310// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP70]], ptr align 8 [[AGG_CAPTURED]], i64 24, i1 false)311// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP67]], i32 0, i32 1312// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP71]], i32 0, i32 0313// CHECK1-NEXT: [[TMP73:%.*]] = load ptr, ptr [[DOTTASK_RED_]], align 8314// CHECK1-NEXT: store ptr [[TMP73]], ptr [[TMP72]], align 8315// CHECK1-NEXT: [[TMP74:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8316// CHECK1-NEXT: [[TMP75:%.*]] = load i32, ptr [[TMP74]], align 4317// CHECK1-NEXT: [[TMP76:%.*]] = call i32 @__kmpc_omp_task(ptr @[[GLOB2]], i32 [[TMP75]], ptr [[TMP67]])318// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]319// CHECK1: omp.body.continue:320// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]321// CHECK1: omp.inner.for.inc:322// CHECK1-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8323// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP77]], 1324// CHECK1-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8325// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]326// CHECK1: omp.inner.for.end:327// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]328// CHECK1: omp.loop.exit:329// CHECK1-NEXT: [[TMP78:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8330// CHECK1-NEXT: [[TMP79:%.*]] = load i32, ptr [[TMP78]], align 4331// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP79]])332// CHECK1-NEXT: [[TMP80:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8333// CHECK1-NEXT: [[TMP81:%.*]] = load i32, ptr [[TMP80]], align 4334// CHECK1-NEXT: call void @__kmpc_task_reduction_modifier_fini(ptr @[[GLOB2]], i32 [[TMP81]], i32 1)335// CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0336// CHECK1-NEXT: store ptr [[ARGC1]], ptr [[TMP82]], align 8337// CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1338// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP83]], align 8339// CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2340// CHECK1-NEXT: [[TMP85:%.*]] = inttoptr i64 [[TMP13]] to ptr341// CHECK1-NEXT: store ptr [[TMP85]], ptr [[TMP84]], align 8342// CHECK1-NEXT: [[TMP86:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8343// CHECK1-NEXT: [[TMP87:%.*]] = load i32, ptr [[TMP86]], align 4344// CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB4:[0-9]+]], i32 [[TMP87]], i32 2, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)345// CHECK1-NEXT: switch i32 [[TMP88]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [346// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]347// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]348// CHECK1-NEXT: ]349// CHECK1: .omp.reduction.case1:350// CHECK1-NEXT: [[TMP89:%.*]] = load i32, ptr [[TMP0]], align 4351// CHECK1-NEXT: [[TMP90:%.*]] = load i32, ptr [[ARGC1]], align 4352// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP89]], [[TMP90]]353// CHECK1-NEXT: store i32 [[ADD15]], ptr [[TMP0]], align 4354// CHECK1-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]]355// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP91]]356// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]357// CHECK1: omp.arraycpy.body:358// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]359// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST16:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ]360// CHECK1-NEXT: [[TMP92:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1361// CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP92]] to i32362// CHECK1-NEXT: [[TMP93:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1363// CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP93]] to i32364// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV]], [[CONV17]]365// CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8366// CHECK1-NEXT: store i8 [[CONV19]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1367// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST16]], i32 1368// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1369// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP91]]370// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]]371// CHECK1: omp.arraycpy.done22:372// CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(ptr @[[GLOB4]], i32 [[TMP87]], ptr @.gomp_critical_user_.reduction.var)373// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]374// CHECK1: .omp.reduction.case2:375// CHECK1-NEXT: [[TMP94:%.*]] = load i32, ptr [[ARGC1]], align 4376// CHECK1-NEXT: [[TMP95:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP94]] monotonic, align 4377// CHECK1-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr [[ARRAYIDX2]], i64 [[TMP13]]378// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq ptr [[ARRAYIDX2]], [[TMP96]]379// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE36:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]]380// CHECK1: omp.arraycpy.body24:381// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT34:%.*]], [[ATOMIC_EXIT:%.*]] ]382// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi ptr [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT33:%.*]], [[ATOMIC_EXIT]] ]383// CHECK1-NEXT: [[TMP97:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1384// CHECK1-NEXT: [[CONV27:%.*]] = sext i8 [[TMP97]] to i32385// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]] monotonic, align 1386// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]387// CHECK1: atomic_cont:388// CHECK1-NEXT: [[TMP98:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY24]] ], [ [[TMP103:%.*]], [[ATOMIC_CONT]] ]389// CHECK1-NEXT: store i8 [[TMP98]], ptr [[_TMP28]], align 1390// CHECK1-NEXT: [[TMP99:%.*]] = load i8, ptr [[_TMP28]], align 1391// CHECK1-NEXT: [[CONV29:%.*]] = sext i8 [[TMP99]] to i32392// CHECK1-NEXT: [[TMP100:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1393// CHECK1-NEXT: [[CONV30:%.*]] = sext i8 [[TMP100]] to i32394// CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 [[CONV29]], [[CONV30]]395// CHECK1-NEXT: [[CONV32:%.*]] = trunc i32 [[ADD31]] to i8396// CHECK1-NEXT: store i8 [[CONV32]], ptr [[ATOMIC_TEMP]], align 1397// CHECK1-NEXT: [[TMP101:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1398// CHECK1-NEXT: [[TMP102:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i8 [[TMP98]], i8 [[TMP101]] monotonic monotonic, align 1399// CHECK1-NEXT: [[TMP103]] = extractvalue { i8, i1 } [[TMP102]], 0400// CHECK1-NEXT: [[TMP104:%.*]] = extractvalue { i8, i1 } [[TMP102]], 1401// CHECK1-NEXT: br i1 [[TMP104]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]402// CHECK1: atomic_exit:403// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT33]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1404// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT34]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1405// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE35:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT33]], [[TMP96]]406// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE35]], label [[OMP_ARRAYCPY_DONE36]], label [[OMP_ARRAYCPY_BODY24]]407// CHECK1: omp.arraycpy.done36:408// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]409// CHECK1: .omp.reduction.default:410// CHECK1-NEXT: [[TMP105:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8411// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP105]])412// CHECK1-NEXT: ret void413//414//415// CHECK1-LABEL: define {{[^@]+}}@.red_init.416// CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {417// CHECK1-NEXT: entry:418// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8419// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8420// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8421// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8422// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8423// CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4424// CHECK1-NEXT: ret void425//426//427// CHECK1-LABEL: define {{[^@]+}}@.red_comb.428// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {429// CHECK1-NEXT: entry:430// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8431// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8432// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8433// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8434// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8435// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8436// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4437// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4438// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]]439// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4440// CHECK1-NEXT: ret void441//442//443// CHECK1-LABEL: define {{[^@]+}}@.red_init..1444// CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {445// CHECK1-NEXT: entry:446// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8447// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8448// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8449// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8450// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8451// CHECK1-NEXT: [[TMP3:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}})452// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8453// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP4]]454// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP5]]455// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]456// CHECK1: omp.arrayinit.body:457// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]458// CHECK1-NEXT: store i8 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1459// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1460// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]461// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]462// CHECK1: omp.arrayinit.done:463// CHECK1-NEXT: ret void464//465//466// CHECK1-LABEL: define {{[^@]+}}@.red_comb..2467// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {468// CHECK1-NEXT: entry:469// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8470// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8471// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8472// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8473// CHECK1-NEXT: [[TMP2:%.*]] = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @{{reduction_size[.].+[.]}})474// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8475// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR]], align 8476// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8477// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP3]]478// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP4]], [[TMP6]]479// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]480// CHECK1: omp.arraycpy.body:481// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]482// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP4]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]483// CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1484// CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP7]] to i32485// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1486// CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP8]] to i32487// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]488// CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i8489// CHECK1-NEXT: store i8 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1490// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1491// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1492// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]493// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]494// CHECK1: omp.arraycpy.done4:495// CHECK1-NEXT: ret void496//497//498// CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.499// CHECK1-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {500// CHECK1-NEXT: entry:501// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8502// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8503// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8504// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8505// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8506// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP2]], i32 0, i32 0507// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8508// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP4]], align 8509// CHECK1-NEXT: ret void510//511//512// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.513// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {514// CHECK1-NEXT: entry:515// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4516// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8517// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8518// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8519// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8520// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8521// CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8522// CHECK1-NEXT: [[TMP_I:%.*]] = alloca ptr, align 8523// CHECK1-NEXT: [[TMP4_I:%.*]] = alloca ptr, align 8524// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4525// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8526// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4527// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8528// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4529// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8530// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0531// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2532// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0533// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8534// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1535// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])536// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])537// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])538// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])539// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12:![0-9]+]]540// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META12]]541// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]542// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]543// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META12]]544// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]545// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META12]]546// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META12]]547// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META12]]548// CHECK1-NEXT: call void [[TMP10]](ptr [[TMP11]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR2]]549// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META12]]550// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP9]], i32 0, i32 1551// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8552// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP12]], align 8553// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META12]]554// CHECK1-NEXT: [[TMP17:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP15]], ptr [[TMP14]])555// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2556// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8557// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP19]], align 8558// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 1559// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8560// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4561// CHECK1-NEXT: [[TMP24:%.*]] = sext i32 [[TMP23]] to i64562// CHECK1-NEXT: [[LB_ADD_LEN_I:%.*]] = add nsw i64 -1, [[TMP24]]563// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2564// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP25]], align 8565// CHECK1-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds nuw ptr, ptr [[TMP26]], i64 9566// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[ARRAYIDX2_I]], align 8567// CHECK1-NEXT: [[ARRAYIDX3_I:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP27]], i64 [[LB_ADD_LEN_I]]568// CHECK1-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[ARRAYIDX3_I]] to i64569// CHECK1-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[TMP20]] to i64570// CHECK1-NEXT: [[TMP30:%.*]] = sub i64 [[TMP28]], [[TMP29]]571// CHECK1-NEXT: [[TMP31:%.*]] = add nuw i64 [[TMP30]], 1572// CHECK1-NEXT: [[TMP32:%.*]] = mul nuw i64 [[TMP31]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)573// CHECK1-NEXT: store i64 [[TMP31]], ptr @{{reduction_size[.].+[.]}}, align 8, !noalias [[META12]]574// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[TMP12]], align 8575// CHECK1-NEXT: [[TMP34:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP16]], ptr [[TMP33]], ptr [[TMP20]])576// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP9]], i32 0, i32 2577// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[TMP35]], align 8578// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[TMP36]], align 8579// CHECK1-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[TMP37]] to i64580// CHECK1-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP20]] to i64581// CHECK1-NEXT: [[TMP40:%.*]] = sub i64 [[TMP38]], [[TMP39]]582// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr [[TMP34]], i64 [[TMP40]]583// CHECK1-NEXT: store ptr [[TMP4_I]], ptr [[TMP_I]], align 8, !noalias [[META12]]584// CHECK1-NEXT: store ptr [[TMP41]], ptr [[TMP4_I]], align 8, !noalias [[META12]]585// CHECK1-NEXT: ret i32 0586//587//588// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14.omp_outlined.omp_outlined.omp.reduction.reduction_func589// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {590// CHECK1-NEXT: entry:591// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8592// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8593// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8594// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8595// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8596// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8597// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0598// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8599// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0600// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8601// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1602// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8603// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1604// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8605// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2606// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8607// CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[TMP13]] to i64608// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP7]], align 4609// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP5]], align 4610// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]611// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4612// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP11]], i64 [[TMP14]]613// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP11]], [[TMP17]]614// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]615// CHECK1: omp.arraycpy.body:616// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]617// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]618// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1619// CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP18]] to i32620// CHECK1-NEXT: [[TMP19:%.*]] = load i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1621// CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP19]] to i32622// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[CONV2]]623// CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i8624// CHECK1-NEXT: store i8 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1625// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1626// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1627// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP17]]628// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]]629// CHECK1: omp.arraycpy.done5:630// CHECK1-NEXT: ret void631//632