8149 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s7// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s11// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s14// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s25// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s28// RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33void fn1();34void fn2();35void fn3();36void fn4();37void fn5();38void fn6();39 40int Arg;41 42void gtid_test() {43#pragma omp target44#pragma omp teams45#pragma omp distribute parallel for simd46 for(int i = 0 ; i < 100; i++) {}47 48#pragma omp target49#pragma omp teams50#pragma omp distribute parallel for simd if (parallel: false)51 for(int i = 0 ; i < 100; i++) {52 gtid_test();53 }54}55 56 57template <typename T>58int tmain(T Arg) {59#pragma omp target60#pragma omp teams61#pragma omp distribute parallel for simd if (true)62 for(int i = 0 ; i < 100; i++) {63 fn1();64 }65#pragma omp target66#pragma omp teams67#pragma omp distribute parallel for simd if (false)68 for(int i = 0 ; i < 100; i++) {69 fn2();70 }71#pragma omp target72#pragma omp teams73#pragma omp distribute parallel for simd if (parallel: Arg)74 for(int i = 0 ; i < 100; i++) {75 fn3();76 }77 return 0;78}79 80int main() {81#pragma omp target82#pragma omp teams83#pragma omp distribute parallel for simd if (true)84 for(int i = 0 ; i < 100; i++) {85 86 87 fn4();88 }89 90#pragma omp target91#pragma omp teams92#pragma omp distribute parallel for simd if (false)93 for(int i = 0 ; i < 100; i++) {94 95 96 fn5();97 }98 99#pragma omp target100#pragma omp teams101#pragma omp distribute parallel for simd if (Arg)102 for(int i = 0 ; i < 100; i++) {103 104 105 fn6();106 }107 108 return tmain(Arg);109}110 111 112 113 114 115 116// call void [[T_OUTLINE_FUN_3:@.+]](117 118 119#endif120// CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv121// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {122// CHECK1-NEXT: entry:123// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4124// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8125// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4126// CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8127// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0128// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4129// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1130// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4131// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2132// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8133// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3134// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8135// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4136// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8137// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5138// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8139// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6140// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8141// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7142// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8143// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8144// CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8145// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9146// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8147// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10148// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4149// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11150// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4151// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12152// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4153// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])154// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0155// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]156// CHECK1: omp_offload.failed:157// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]158// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]159// CHECK1: omp_offload.cont:160// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0161// CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4162// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1163// CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4164// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2165// CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8166// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3167// CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8168// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4169// CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8170// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5171// CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8172// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6173// CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8174// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7175// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8176// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8177// CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8178// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9179// CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8180// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10181// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4182// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11183// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4184// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12185// CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4186// CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])187// CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0188// CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]189// CHECK1: omp_offload.failed3:190// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]191// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]192// CHECK1: omp_offload.cont4:193// CHECK1-NEXT: ret void194//195//196// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43197// CHECK1-SAME: () #[[ATTR1:[0-9]+]] {198// CHECK1-NEXT: entry:199// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)200// CHECK1-NEXT: ret void201//202//203// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined204// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {205// CHECK1-NEXT: entry:206// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8207// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8208// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4209// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4210// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4211// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4212// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4213// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4214// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4215// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8216// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8217// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4218// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4219// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4220// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4221// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8222// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4223// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)224// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4225// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99226// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]227// CHECK1: cond.true:228// CHECK1-NEXT: br label [[COND_END:%.*]]229// CHECK1: cond.false:230// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4231// CHECK1-NEXT: br label [[COND_END]]232// CHECK1: cond.end:233// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]234// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4235// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4236// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4237// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]238// CHECK1: omp.inner.for.cond:239// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]240// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]241// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]242// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]243// CHECK1: omp.inner.for.body:244// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]245// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64246// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]247// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64248// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]249// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]250// CHECK1: omp.inner.for.inc:251// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]252// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]253// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]254// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]255// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]256// CHECK1: omp.inner.for.end:257// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]258// CHECK1: omp.loop.exit:259// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])260// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4261// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0262// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]263// CHECK1: .omp.final.then:264// CHECK1-NEXT: store i32 100, ptr [[I]], align 4265// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]266// CHECK1: .omp.final.done:267// CHECK1-NEXT: ret void268//269//270// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined271// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {272// CHECK1-NEXT: entry:273// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8274// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8275// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8276// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8277// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4278// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4279// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4280// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4281// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4282// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4283// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4284// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8285// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8286// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8287// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8288// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4289// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4290// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8291// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32292// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8293// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32294// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4295// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4296// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4297// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4298// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8299// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4300// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)301// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4302// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99303// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]304// CHECK1: cond.true:305// CHECK1-NEXT: br label [[COND_END:%.*]]306// CHECK1: cond.false:307// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4308// CHECK1-NEXT: br label [[COND_END]]309// CHECK1: cond.end:310// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]311// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4312// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4313// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4314// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]315// CHECK1: omp.inner.for.cond:316// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]317// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]318// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]319// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]320// CHECK1: omp.inner.for.body:321// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]322// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1323// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]324// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]325// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]326// CHECK1: omp.body.continue:327// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]328// CHECK1: omp.inner.for.inc:329// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]330// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1331// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]332// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]333// CHECK1: omp.inner.for.end:334// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]335// CHECK1: omp.loop.exit:336// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])337// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4338// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0339// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]340// CHECK1: .omp.final.then:341// CHECK1-NEXT: store i32 100, ptr [[I]], align 4342// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]343// CHECK1: .omp.final.done:344// CHECK1-NEXT: ret void345//346//347// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48348// CHECK1-SAME: () #[[ATTR1]] {349// CHECK1-NEXT: entry:350// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)351// CHECK1-NEXT: ret void352//353//354// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined355// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {356// CHECK1-NEXT: entry:357// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8358// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8359// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4360// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4361// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4362// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4363// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4364// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4365// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4366// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4367// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8368// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8369// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4370// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4371// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4372// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4373// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8374// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4375// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)376// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4377// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99378// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]379// CHECK1: cond.true:380// CHECK1-NEXT: br label [[COND_END:%.*]]381// CHECK1: cond.false:382// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4383// CHECK1-NEXT: br label [[COND_END]]384// CHECK1: cond.end:385// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]386// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4387// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4388// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4389// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]390// CHECK1: omp.inner.for.cond:391// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]392// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]393// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]394// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]395// CHECK1: omp.inner.for.body:396// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]397// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64398// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]399// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64400// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]401// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]402// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]403// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]404// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]405// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]406// CHECK1: omp.inner.for.inc:407// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]408// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]409// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]410// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]411// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]412// CHECK1: omp.inner.for.end:413// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]414// CHECK1: omp.loop.exit:415// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])416// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4417// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0418// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]419// CHECK1: .omp.final.then:420// CHECK1-NEXT: store i32 100, ptr [[I]], align 4421// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]422// CHECK1: .omp.final.done:423// CHECK1-NEXT: ret void424//425//426// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined427// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {428// CHECK1-NEXT: entry:429// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8430// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8431// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8432// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8433// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4434// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4435// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4436// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4437// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4438// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4439// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4440// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8441// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8442// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8443// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8444// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4445// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4446// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8447// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32448// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8449// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32450// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4451// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4452// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4453// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4454// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8455// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4456// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)457// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4458// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99459// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]460// CHECK1: cond.true:461// CHECK1-NEXT: br label [[COND_END:%.*]]462// CHECK1: cond.false:463// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4464// CHECK1-NEXT: br label [[COND_END]]465// CHECK1: cond.end:466// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]467// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4468// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4469// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4470// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]471// CHECK1: omp.inner.for.cond:472// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]473// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]474// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]475// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]476// CHECK1: omp.inner.for.body:477// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]478// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1479// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]480// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]481// CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]482// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]483// CHECK1: omp.body.continue:484// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]485// CHECK1: omp.inner.for.inc:486// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]487// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1488// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]489// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]490// CHECK1: omp.inner.for.end:491// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]492// CHECK1: omp.loop.exit:493// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])494// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4495// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0496// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]497// CHECK1: .omp.final.then:498// CHECK1-NEXT: store i32 100, ptr [[I]], align 4499// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]500// CHECK1: .omp.final.done:501// CHECK1-NEXT: ret void502//503//504// CHECK1-LABEL: define {{[^@]+}}@main505// CHECK1-SAME: () #[[ATTR3:[0-9]+]] {506// CHECK1-NEXT: entry:507// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4508// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4509// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8510// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4511// CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8512// CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8513// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8514// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8515// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8516// CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4517// CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8518// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4519// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0520// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 4521// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1522// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 4523// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2524// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8525// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3526// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 8527// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4528// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8529// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5530// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 8531// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6532// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8533// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7534// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 8535// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8536// CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 8537// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9538// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 8539// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10540// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4541// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11542// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4543// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12544// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 4545// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])546// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0547// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]548// CHECK1: omp_offload.failed:549// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]550// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]551// CHECK1: omp_offload.cont:552// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0553// CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 4554// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1555// CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 4556// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2557// CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8558// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3559// CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8560// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4561// CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 8562// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5563// CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 8564// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6565// CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 8566// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7567// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8568// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8569// CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 8570// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9571// CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 8572// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10573// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4574// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11575// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4576// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12577// CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 4578// CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])579// CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0580// CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]581// CHECK1: omp_offload.failed3:582// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]583// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]584// CHECK1: omp_offload.cont4:585// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr @Arg, align 4586// CHECK1-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4587// CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8588// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0589// CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 8590// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0591// CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 8592// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0593// CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 8594// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0595// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0596// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0597// CHECK1-NEXT: store i32 3, ptr [[TMP37]], align 4598// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1599// CHECK1-NEXT: store i32 1, ptr [[TMP38]], align 4600// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2601// CHECK1-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 8602// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3603// CHECK1-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 8604// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4605// CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP41]], align 8606// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5607// CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP42]], align 8608// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6609// CHECK1-NEXT: store ptr null, ptr [[TMP43]], align 8610// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7611// CHECK1-NEXT: store ptr null, ptr [[TMP44]], align 8612// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8613// CHECK1-NEXT: store i64 100, ptr [[TMP45]], align 8614// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9615// CHECK1-NEXT: store i64 0, ptr [[TMP46]], align 8616// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10617// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4618// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11619// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4620// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12621// CHECK1-NEXT: store i32 0, ptr [[TMP49]], align 4622// CHECK1-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])623// CHECK1-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0624// CHECK1-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]625// CHECK1: omp_offload.failed7:626// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]627// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]628// CHECK1: omp_offload.cont8:629// CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr @Arg, align 4630// CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])631// CHECK1-NEXT: ret i32 [[CALL]]632//633//634// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81635// CHECK1-SAME: () #[[ATTR1]] {636// CHECK1-NEXT: entry:637// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)638// CHECK1-NEXT: ret void639//640//641// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined642// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {643// CHECK1-NEXT: entry:644// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8645// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8646// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4647// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4648// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4649// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4650// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4651// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4652// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4653// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8654// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8655// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4656// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4657// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4658// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4659// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8660// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4661// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)662// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4663// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99664// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]665// CHECK1: cond.true:666// CHECK1-NEXT: br label [[COND_END:%.*]]667// CHECK1: cond.false:668// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4669// CHECK1-NEXT: br label [[COND_END]]670// CHECK1: cond.end:671// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]672// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4673// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4674// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4675// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]676// CHECK1: omp.inner.for.cond:677// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]678// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]679// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]680// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]681// CHECK1: omp.inner.for.body:682// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]683// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64684// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]685// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64686// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]687// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]688// CHECK1: omp.inner.for.inc:689// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]690// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]691// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]692// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]693// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]694// CHECK1: omp.inner.for.end:695// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]696// CHECK1: omp.loop.exit:697// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])698// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4699// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0700// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]701// CHECK1: .omp.final.then:702// CHECK1-NEXT: store i32 100, ptr [[I]], align 4703// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]704// CHECK1: .omp.final.done:705// CHECK1-NEXT: ret void706//707//708// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined709// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {710// CHECK1-NEXT: entry:711// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8712// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8713// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8714// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8715// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4716// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4717// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4718// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4719// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4720// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4721// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4722// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8723// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8724// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8725// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8726// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4727// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4728// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8729// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32730// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8731// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32732// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4733// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4734// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4735// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4736// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8737// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4738// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)739// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4740// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99741// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]742// CHECK1: cond.true:743// CHECK1-NEXT: br label [[COND_END:%.*]]744// CHECK1: cond.false:745// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4746// CHECK1-NEXT: br label [[COND_END]]747// CHECK1: cond.end:748// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]749// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4750// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4751// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4752// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]753// CHECK1: omp.inner.for.cond:754// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]755// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]756// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]757// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]758// CHECK1: omp.inner.for.body:759// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]760// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1761// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]762// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]763// CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]764// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]765// CHECK1: omp.body.continue:766// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]767// CHECK1: omp.inner.for.inc:768// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]769// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1770// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]771// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]772// CHECK1: omp.inner.for.end:773// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]774// CHECK1: omp.loop.exit:775// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])776// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4777// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0778// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]779// CHECK1: .omp.final.then:780// CHECK1-NEXT: store i32 100, ptr [[I]], align 4781// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]782// CHECK1: .omp.final.done:783// CHECK1-NEXT: ret void784//785//786// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90787// CHECK1-SAME: () #[[ATTR1]] {788// CHECK1-NEXT: entry:789// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)790// CHECK1-NEXT: ret void791//792//793// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined794// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {795// CHECK1-NEXT: entry:796// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8797// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8798// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4799// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4800// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4801// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4802// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4803// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4804// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4805// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4806// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8807// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8808// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4809// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4810// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4811// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4812// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8813// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4814// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)815// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4816// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99817// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]818// CHECK1: cond.true:819// CHECK1-NEXT: br label [[COND_END:%.*]]820// CHECK1: cond.false:821// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4822// CHECK1-NEXT: br label [[COND_END]]823// CHECK1: cond.end:824// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]825// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4826// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4827// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4828// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]829// CHECK1: omp.inner.for.cond:830// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]831// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]832// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]833// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]834// CHECK1: omp.inner.for.body:835// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]836// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64837// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]838// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64839// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]840// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]841// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]842// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]843// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]844// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]845// CHECK1: omp.inner.for.inc:846// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]847// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]848// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]849// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]850// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]851// CHECK1: omp.inner.for.end:852// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]853// CHECK1: omp.loop.exit:854// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])855// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4856// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0857// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]858// CHECK1: .omp.final.then:859// CHECK1-NEXT: store i32 100, ptr [[I]], align 4860// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]861// CHECK1: .omp.final.done:862// CHECK1-NEXT: ret void863//864//865// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined866// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {867// CHECK1-NEXT: entry:868// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8869// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8870// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8871// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8872// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4873// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4874// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4875// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4876// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4877// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4878// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4879// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8880// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8881// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8882// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8883// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4884// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4885// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8886// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32887// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8888// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32889// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4890// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4891// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4892// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4893// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8894// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4895// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)896// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4897// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99898// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]899// CHECK1: cond.true:900// CHECK1-NEXT: br label [[COND_END:%.*]]901// CHECK1: cond.false:902// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4903// CHECK1-NEXT: br label [[COND_END]]904// CHECK1: cond.end:905// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]906// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4907// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4908// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4909// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]910// CHECK1: omp.inner.for.cond:911// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]912// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]913// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]914// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]915// CHECK1: omp.inner.for.body:916// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]917// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1918// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]919// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]920// CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]921// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]922// CHECK1: omp.body.continue:923// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]924// CHECK1: omp.inner.for.inc:925// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]926// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1927// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]928// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]929// CHECK1: omp.inner.for.end:930// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]931// CHECK1: omp.loop.exit:932// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])933// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4934// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0935// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]936// CHECK1: .omp.final.then:937// CHECK1-NEXT: store i32 100, ptr [[I]], align 4938// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]939// CHECK1: .omp.final.done:940// CHECK1-NEXT: ret void941//942//943// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99944// CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {945// CHECK1-NEXT: entry:946// CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8947// CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 8948// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])949// CHECK1-NEXT: ret void950//951//952// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined953// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {954// CHECK1-NEXT: entry:955// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8956// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8957// CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 8958// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4959// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4960// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4961// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4962// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4963// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4964// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4965// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4966// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8967// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8968// CHECK1-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 8969// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8970// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4971// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4972// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4973// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4974// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8975// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4976// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)977// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4978// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99979// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]980// CHECK1: cond.true:981// CHECK1-NEXT: br label [[COND_END:%.*]]982// CHECK1: cond.false:983// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4984// CHECK1-NEXT: br label [[COND_END]]985// CHECK1: cond.end:986// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]987// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4988// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4989// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4990// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]991// CHECK1: omp.inner.for.cond:992// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]993// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]994// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]995// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]996// CHECK1: omp.inner.for.body:997// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]998// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64999// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]1000// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i641001// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]1002// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 01003// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]1004// CHECK1: omp_if.then:1005// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]1006// CHECK1-NEXT: br label [[OMP_IF_END:%.*]]1007// CHECK1: omp_if.else:1008// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]1009// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]1010// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]1011// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]1012// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]1013// CHECK1-NEXT: br label [[OMP_IF_END]]1014// CHECK1: omp_if.end:1015// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1016// CHECK1: omp.inner.for.inc:1017// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]1018// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]1019// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]1020// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]1021// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]1022// CHECK1: omp.inner.for.end:1023// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1024// CHECK1: omp.loop.exit:1025// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1026// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41027// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 01028// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1029// CHECK1: .omp.final.then:1030// CHECK1-NEXT: store i32 100, ptr [[I]], align 41031// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1032// CHECK1: .omp.final.done:1033// CHECK1-NEXT: ret void1034//1035//1036// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined1037// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {1038// CHECK1-NEXT: entry:1039// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81040// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81041// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81042// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81043// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41044// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41045// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41046// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41047// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41048// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41049// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41050// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81051// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81052// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81053// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81054// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41055// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41056// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81057// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i321058// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81059// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i321060// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41061// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41062// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41063// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41064// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81065// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41066// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1067// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41068// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991069// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1070// CHECK1: cond.true:1071// CHECK1-NEXT: br label [[COND_END:%.*]]1072// CHECK1: cond.false:1073// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41074// CHECK1-NEXT: br label [[COND_END]]1075// CHECK1: cond.end:1076// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1077// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41078// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41079// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41080// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1081// CHECK1: omp.inner.for.cond:1082// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]1083// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]1084// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1085// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1086// CHECK1: omp.inner.for.body:1087// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]1088// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11089// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1090// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]1091// CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]1092// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1093// CHECK1: omp.body.continue:1094// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1095// CHECK1: omp.inner.for.inc:1096// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]1097// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11098// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]1099// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]1100// CHECK1: omp.inner.for.end:1101// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1102// CHECK1: omp.loop.exit:1103// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1104// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41105// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01106// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1107// CHECK1: .omp.final.then:1108// CHECK1-NEXT: store i32 100, ptr [[I]], align 41109// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1110// CHECK1: .omp.final.done:1111// CHECK1-NEXT: ret void1112//1113//1114// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_1115// CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {1116// CHECK1-NEXT: entry:1117// CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 41118// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41119// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81120// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 41121// CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81122// CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 81123// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 81124// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 81125// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 81126// CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 41127// CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81128// CHECK1-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 41129// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01130// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 41131// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11132// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 41133// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21134// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 81135// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31136// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 81137// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41138// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 81139// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51140// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 81141// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61142// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 81143// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71144// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 81145// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81146// CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 81147// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91148// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 81149// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101150// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41151// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111152// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41153// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121154// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 41155// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])1156// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01157// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1158// CHECK1: omp_offload.failed:1159// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]1160// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]1161// CHECK1: omp_offload.cont:1162// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 01163// CHECK1-NEXT: store i32 3, ptr [[TMP15]], align 41164// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11165// CHECK1-NEXT: store i32 0, ptr [[TMP16]], align 41166// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 21167// CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 81168// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 31169// CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 81170// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 41171// CHECK1-NEXT: store ptr null, ptr [[TMP19]], align 81172// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 51173// CHECK1-NEXT: store ptr null, ptr [[TMP20]], align 81174// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 61175// CHECK1-NEXT: store ptr null, ptr [[TMP21]], align 81176// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 71177// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 81178// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 81179// CHECK1-NEXT: store i64 100, ptr [[TMP23]], align 81180// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 91181// CHECK1-NEXT: store i64 0, ptr [[TMP24]], align 81182// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 101183// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 41184// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 111185// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 41186// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 121187// CHECK1-NEXT: store i32 0, ptr [[TMP27]], align 41188// CHECK1-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])1189// CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 01190// CHECK1-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]1191// CHECK1: omp_offload.failed3:1192// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]1193// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]1194// CHECK1: omp_offload.cont4:1195// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 41196// CHECK1-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 41197// CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 81198// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01199// CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 81200// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01201// CHECK1-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 81202// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01203// CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 81204// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01205// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01206// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 01207// CHECK1-NEXT: store i32 3, ptr [[TMP37]], align 41208// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11209// CHECK1-NEXT: store i32 1, ptr [[TMP38]], align 41210// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 21211// CHECK1-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 81212// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 31213// CHECK1-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 81214// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 41215// CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP41]], align 81216// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 51217// CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP42]], align 81218// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 61219// CHECK1-NEXT: store ptr null, ptr [[TMP43]], align 81220// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 71221// CHECK1-NEXT: store ptr null, ptr [[TMP44]], align 81222// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 81223// CHECK1-NEXT: store i64 100, ptr [[TMP45]], align 81224// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 91225// CHECK1-NEXT: store i64 0, ptr [[TMP46]], align 81226// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 101227// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 41228// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 111229// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 41230// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 121231// CHECK1-NEXT: store i32 0, ptr [[TMP49]], align 41232// CHECK1-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])1233// CHECK1-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 01234// CHECK1-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]1235// CHECK1: omp_offload.failed7:1236// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]1237// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]1238// CHECK1: omp_offload.cont8:1239// CHECK1-NEXT: ret i32 01240//1241//1242// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l591243// CHECK1-SAME: () #[[ATTR1]] {1244// CHECK1-NEXT: entry:1245// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)1246// CHECK1-NEXT: ret void1247//1248//1249// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined1250// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {1251// CHECK1-NEXT: entry:1252// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81253// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81254// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41255// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41256// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41257// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41258// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41259// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41260// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41261// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81262// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81263// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41264// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41265// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41266// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41267// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81268// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41269// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1270// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41271// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 991272// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1273// CHECK1: cond.true:1274// CHECK1-NEXT: br label [[COND_END:%.*]]1275// CHECK1: cond.false:1276// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41277// CHECK1-NEXT: br label [[COND_END]]1278// CHECK1: cond.end:1279// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1280// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41281// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41282// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41283// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1284// CHECK1: omp.inner.for.cond:1285// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]1286// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]1287// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1288// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1289// CHECK1: omp.inner.for.body:1290// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]1291// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i641292// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]1293// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i641294// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]1295// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1296// CHECK1: omp.inner.for.inc:1297// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]1298// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]1299// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]1300// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]1301// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]1302// CHECK1: omp.inner.for.end:1303// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1304// CHECK1: omp.loop.exit:1305// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1306// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41307// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01308// CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1309// CHECK1: .omp.final.then:1310// CHECK1-NEXT: store i32 100, ptr [[I]], align 41311// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1312// CHECK1: .omp.final.done:1313// CHECK1-NEXT: ret void1314//1315//1316// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined1317// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {1318// CHECK1-NEXT: entry:1319// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81320// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81321// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81322// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81323// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41324// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41325// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41326// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41327// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41328// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41329// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41330// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81331// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81332// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81333// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81334// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41335// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41336// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81337// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i321338// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81339// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i321340// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41341// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41342// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41343// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41344// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81345// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41346// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1347// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41348// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991349// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1350// CHECK1: cond.true:1351// CHECK1-NEXT: br label [[COND_END:%.*]]1352// CHECK1: cond.false:1353// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41354// CHECK1-NEXT: br label [[COND_END]]1355// CHECK1: cond.end:1356// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1357// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41358// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41359// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41360// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1361// CHECK1: omp.inner.for.cond:1362// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]1363// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]1364// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1365// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1366// CHECK1: omp.inner.for.body:1367// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]1368// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11369// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1370// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]1371// CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]1372// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1373// CHECK1: omp.body.continue:1374// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1375// CHECK1: omp.inner.for.inc:1376// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]1377// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11378// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]1379// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]1380// CHECK1: omp.inner.for.end:1381// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1382// CHECK1: omp.loop.exit:1383// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1384// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41385// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01386// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1387// CHECK1: .omp.final.then:1388// CHECK1-NEXT: store i32 100, ptr [[I]], align 41389// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1390// CHECK1: .omp.final.done:1391// CHECK1-NEXT: ret void1392//1393//1394// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l651395// CHECK1-SAME: () #[[ATTR1]] {1396// CHECK1-NEXT: entry:1397// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)1398// CHECK1-NEXT: ret void1399//1400//1401// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined1402// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {1403// CHECK1-NEXT: entry:1404// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81405// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81406// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41407// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41408// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41409// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41410// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41411// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41412// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41413// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 41414// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81415// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81416// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41417// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41418// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41419// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41420// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81421// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41422// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1423// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41424// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 991425// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1426// CHECK1: cond.true:1427// CHECK1-NEXT: br label [[COND_END:%.*]]1428// CHECK1: cond.false:1429// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41430// CHECK1-NEXT: br label [[COND_END]]1431// CHECK1: cond.end:1432// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1433// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41434// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41435// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41436// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1437// CHECK1: omp.inner.for.cond:1438// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]1439// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]1440// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1441// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1442// CHECK1: omp.inner.for.body:1443// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]1444// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i641445// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]1446// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i641447// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]1448// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]1449// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]1450// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]1451// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]1452// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1453// CHECK1: omp.inner.for.inc:1454// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]1455// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]1456// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]1457// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]1458// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]1459// CHECK1: omp.inner.for.end:1460// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1461// CHECK1: omp.loop.exit:1462// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1463// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41464// CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 01465// CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1466// CHECK1: .omp.final.then:1467// CHECK1-NEXT: store i32 100, ptr [[I]], align 41468// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1469// CHECK1: .omp.final.done:1470// CHECK1-NEXT: ret void1471//1472//1473// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined1474// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {1475// CHECK1-NEXT: entry:1476// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81477// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81478// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81479// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81480// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41481// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41482// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41483// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41484// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41485// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41486// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41487// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81488// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81489// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81490// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81491// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41492// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41493// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81494// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i321495// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81496// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i321497// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41498// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41499// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41500// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41501// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81502// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41503// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1504// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41505// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991506// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1507// CHECK1: cond.true:1508// CHECK1-NEXT: br label [[COND_END:%.*]]1509// CHECK1: cond.false:1510// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41511// CHECK1-NEXT: br label [[COND_END]]1512// CHECK1: cond.end:1513// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1514// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41515// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41516// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41517// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1518// CHECK1: omp.inner.for.cond:1519// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]1520// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]1521// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1522// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1523// CHECK1: omp.inner.for.body:1524// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]1525// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11526// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1527// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]1528// CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]1529// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1530// CHECK1: omp.body.continue:1531// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1532// CHECK1: omp.inner.for.inc:1533// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]1534// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11535// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]1536// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]1537// CHECK1: omp.inner.for.end:1538// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1539// CHECK1: omp.loop.exit:1540// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1541// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41542// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01543// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1544// CHECK1: .omp.final.then:1545// CHECK1-NEXT: store i32 100, ptr [[I]], align 41546// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1547// CHECK1: .omp.final.done:1548// CHECK1-NEXT: ret void1549//1550//1551// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l711552// CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {1553// CHECK1-NEXT: entry:1554// CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 81555// CHECK1-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 81556// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])1557// CHECK1-NEXT: ret void1558//1559//1560// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined1561// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {1562// CHECK1-NEXT: entry:1563// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81564// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81565// CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 81566// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41567// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41568// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41569// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41570// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41571// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41572// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41573// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 41574// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81575// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81576// CHECK1-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 81577// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 81578// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41579// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41580// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41581// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41582// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81583// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41584// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1585// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41586// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 991587// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1588// CHECK1: cond.true:1589// CHECK1-NEXT: br label [[COND_END:%.*]]1590// CHECK1: cond.false:1591// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41592// CHECK1-NEXT: br label [[COND_END]]1593// CHECK1: cond.end:1594// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1595// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41596// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41597// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41598// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1599// CHECK1: omp.inner.for.cond:1600// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]1601// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]1602// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1603// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1604// CHECK1: omp.inner.for.body:1605// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]1606// CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i641607// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]1608// CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i641609// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]1610// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 01611// CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]1612// CHECK1: omp_if.then:1613// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]1614// CHECK1-NEXT: br label [[OMP_IF_END:%.*]]1615// CHECK1: omp_if.else:1616// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]1617// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]1618// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]1619// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]1620// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]1621// CHECK1-NEXT: br label [[OMP_IF_END]]1622// CHECK1: omp_if.end:1623// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1624// CHECK1: omp.inner.for.inc:1625// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]1626// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]1627// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]1628// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]1629// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]1630// CHECK1: omp.inner.for.end:1631// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1632// CHECK1: omp.loop.exit:1633// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1634// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41635// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 01636// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1637// CHECK1: .omp.final.then:1638// CHECK1-NEXT: store i32 100, ptr [[I]], align 41639// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1640// CHECK1: .omp.final.done:1641// CHECK1-NEXT: ret void1642//1643//1644// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined1645// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {1646// CHECK1-NEXT: entry:1647// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81648// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81649// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81650// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81651// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41652// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41653// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41654// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41655// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41656// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41657// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41658// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81659// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81660// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81661// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81662// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41663// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41664// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81665// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i321666// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81667// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i321668// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41669// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41670// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41671// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41672// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81673// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41674// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1675// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41676// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991677// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1678// CHECK1: cond.true:1679// CHECK1-NEXT: br label [[COND_END:%.*]]1680// CHECK1: cond.false:1681// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41682// CHECK1-NEXT: br label [[COND_END]]1683// CHECK1: cond.end:1684// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1685// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41686// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41687// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41688// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1689// CHECK1: omp.inner.for.cond:1690// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]1691// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]1692// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1693// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1694// CHECK1: omp.inner.for.body:1695// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]1696// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11697// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1698// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]1699// CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]1700// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1701// CHECK1: omp.body.continue:1702// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1703// CHECK1: omp.inner.for.inc:1704// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]1705// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11706// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]1707// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]1708// CHECK1: omp.inner.for.end:1709// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1710// CHECK1: omp.loop.exit:1711// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1712// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41713// CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01714// CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1715// CHECK1: .omp.final.then:1716// CHECK1-NEXT: store i32 100, ptr [[I]], align 41717// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]1718// CHECK1: .omp.final.done:1719// CHECK1-NEXT: ret void1720//1721//1722// CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv1723// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {1724// CHECK3-NEXT: entry:1725// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41726// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81727// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 41728// CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81729// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01730// CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 41731// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11732// CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 41733// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21734// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 81735// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31736// CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 81737// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41738// CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 81739// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51740// CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 81741// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61742// CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 81743// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71744// CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 81745// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81746// CHECK3-NEXT: store i64 100, ptr [[TMP8]], align 81747// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91748// CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 81749// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101750// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41751// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111752// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41753// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121754// CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 41755// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])1756// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01757// CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1758// CHECK3: omp_offload.failed:1759// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]1760// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]1761// CHECK3: omp_offload.cont:1762// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 01763// CHECK3-NEXT: store i32 3, ptr [[TMP15]], align 41764// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11765// CHECK3-NEXT: store i32 0, ptr [[TMP16]], align 41766// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 21767// CHECK3-NEXT: store ptr null, ptr [[TMP17]], align 81768// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 31769// CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 81770// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 41771// CHECK3-NEXT: store ptr null, ptr [[TMP19]], align 81772// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 51773// CHECK3-NEXT: store ptr null, ptr [[TMP20]], align 81774// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 61775// CHECK3-NEXT: store ptr null, ptr [[TMP21]], align 81776// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 71777// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 81778// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 81779// CHECK3-NEXT: store i64 100, ptr [[TMP23]], align 81780// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 91781// CHECK3-NEXT: store i64 0, ptr [[TMP24]], align 81782// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 101783// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 41784// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 111785// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 41786// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 121787// CHECK3-NEXT: store i32 0, ptr [[TMP27]], align 41788// CHECK3-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])1789// CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 01790// CHECK3-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]1791// CHECK3: omp_offload.failed3:1792// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]1793// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]1794// CHECK3: omp_offload.cont4:1795// CHECK3-NEXT: ret void1796//1797//1798// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l431799// CHECK3-SAME: () #[[ATTR1:[0-9]+]] {1800// CHECK3-NEXT: entry:1801// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)1802// CHECK3-NEXT: ret void1803//1804//1805// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined1806// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {1807// CHECK3-NEXT: entry:1808// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81809// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81810// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41811// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41812// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41813// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41814// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41815// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41816// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41817// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81818// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81819// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41820// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41821// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41822// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41823// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81824// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41825// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1826// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41827// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 991828// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1829// CHECK3: cond.true:1830// CHECK3-NEXT: br label [[COND_END:%.*]]1831// CHECK3: cond.false:1832// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41833// CHECK3-NEXT: br label [[COND_END]]1834// CHECK3: cond.end:1835// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1836// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41837// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41838// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41839// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1840// CHECK3: omp.inner.for.cond:1841// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]1842// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]1843// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1844// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1845// CHECK3: omp.inner.for.body:1846// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]1847// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i641848// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]1849// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i641850// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]1851// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1852// CHECK3: omp.inner.for.inc:1853// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1854// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]1855// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]1856// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1857// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]1858// CHECK3: omp.inner.for.end:1859// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1860// CHECK3: omp.loop.exit:1861// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1862// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41863// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01864// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1865// CHECK3: .omp.final.then:1866// CHECK3-NEXT: store i32 100, ptr [[I]], align 41867// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1868// CHECK3: .omp.final.done:1869// CHECK3-NEXT: ret void1870//1871//1872// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined1873// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {1874// CHECK3-NEXT: entry:1875// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81876// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81877// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81878// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81879// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41880// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41881// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41882// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41883// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41884// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41885// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41886// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81887// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81888// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81889// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81890// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41891// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41892// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81893// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i321894// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81895// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i321896// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41897// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41898// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41899// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41900// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81901// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41902// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1903// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41904// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991905// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1906// CHECK3: cond.true:1907// CHECK3-NEXT: br label [[COND_END:%.*]]1908// CHECK3: cond.false:1909// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41910// CHECK3-NEXT: br label [[COND_END]]1911// CHECK3: cond.end:1912// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1913// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41914// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41915// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41916// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1917// CHECK3: omp.inner.for.cond:1918// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1919// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1920// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1921// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1922// CHECK3: omp.inner.for.body:1923// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1924// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11925// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1926// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1927// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1928// CHECK3: omp.body.continue:1929// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1930// CHECK3: omp.inner.for.inc:1931// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1932// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11933// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1934// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1935// CHECK3: omp.inner.for.end:1936// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1937// CHECK3: omp.loop.exit:1938// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])1939// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41940// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 01941// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1942// CHECK3: .omp.final.then:1943// CHECK3-NEXT: store i32 100, ptr [[I]], align 41944// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]1945// CHECK3: .omp.final.done:1946// CHECK3-NEXT: ret void1947//1948//1949// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l481950// CHECK3-SAME: () #[[ATTR1]] {1951// CHECK3-NEXT: entry:1952// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)1953// CHECK3-NEXT: ret void1954//1955//1956// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined1957// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {1958// CHECK3-NEXT: entry:1959// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81960// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81961// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41962// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 41963// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41964// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41965// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41966// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41967// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41968// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 41969// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81970// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81971// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41972// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41973// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41974// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41975// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81976// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41977// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1978// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41979// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 991980// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1981// CHECK3: cond.true:1982// CHECK3-NEXT: br label [[COND_END:%.*]]1983// CHECK3: cond.false:1984// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41985// CHECK3-NEXT: br label [[COND_END]]1986// CHECK3: cond.end:1987// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1988// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41989// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41990// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41991// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1992// CHECK3: omp.inner.for.cond:1993// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]1994// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]1995// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1996// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1997// CHECK3: omp.inner.for.body:1998// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]1999// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i642000// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]2001// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i642002// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]2003// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]2004// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]2005// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]2006// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]2007// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2008// CHECK3: omp.inner.for.inc:2009// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]2010// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]2011// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]2012// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]2013// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]2014// CHECK3: omp.inner.for.end:2015// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2016// CHECK3: omp.loop.exit:2017// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])2018// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42019// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 02020// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2021// CHECK3: .omp.final.then:2022// CHECK3-NEXT: store i32 100, ptr [[I]], align 42023// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2024// CHECK3: .omp.final.done:2025// CHECK3-NEXT: ret void2026//2027//2028// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined2029// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {2030// CHECK3-NEXT: entry:2031// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82032// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82033// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82034// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82035// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42036// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42037// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42038// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42039// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42040// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42041// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42042// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82043// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82044// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82045// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82046// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42047// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 42048// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82049// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i322050// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82051// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i322052// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42053// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42054// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42055// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42056// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82057// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42058// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2059// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42060// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 992061// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2062// CHECK3: cond.true:2063// CHECK3-NEXT: br label [[COND_END:%.*]]2064// CHECK3: cond.false:2065// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42066// CHECK3-NEXT: br label [[COND_END]]2067// CHECK3: cond.end:2068// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2069// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42070// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42071// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42072// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2073// CHECK3: omp.inner.for.cond:2074// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]2075// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]2076// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2077// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2078// CHECK3: omp.inner.for.body:2079// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]2080// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 12081// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2082// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]2083// CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]2084// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2085// CHECK3: omp.body.continue:2086// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2087// CHECK3: omp.inner.for.inc:2088// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]2089// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 12090// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]2091// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]2092// CHECK3: omp.inner.for.end:2093// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2094// CHECK3: omp.loop.exit:2095// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])2096// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42097// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02098// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2099// CHECK3: .omp.final.then:2100// CHECK3-NEXT: store i32 100, ptr [[I]], align 42101// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2102// CHECK3: .omp.final.done:2103// CHECK3-NEXT: ret void2104//2105//2106// CHECK3-LABEL: define {{[^@]+}}@main2107// CHECK3-SAME: () #[[ATTR3:[0-9]+]] {2108// CHECK3-NEXT: entry:2109// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 42110// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42111// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82112// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 42113// CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82114// CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 82115// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 82116// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 82117// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 82118// CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 42119// CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82120// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 42121// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02122// CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 42123// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12124// CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 42125// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22126// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 82127// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32128// CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 82129// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42130// CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 82131// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52132// CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 82133// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62134// CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 82135// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72136// CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 82137// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82138// CHECK3-NEXT: store i64 100, ptr [[TMP8]], align 82139// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92140// CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 82141// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102142// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 42143// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112144// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 42145// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122146// CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 42147// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])2148// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 02149// CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2150// CHECK3: omp_offload.failed:2151// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]2152// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]2153// CHECK3: omp_offload.cont:2154// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 02155// CHECK3-NEXT: store i32 3, ptr [[TMP15]], align 42156// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12157// CHECK3-NEXT: store i32 0, ptr [[TMP16]], align 42158// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 22159// CHECK3-NEXT: store ptr null, ptr [[TMP17]], align 82160// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 32161// CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 82162// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 42163// CHECK3-NEXT: store ptr null, ptr [[TMP19]], align 82164// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 52165// CHECK3-NEXT: store ptr null, ptr [[TMP20]], align 82166// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 62167// CHECK3-NEXT: store ptr null, ptr [[TMP21]], align 82168// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 72169// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 82170// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 82171// CHECK3-NEXT: store i64 100, ptr [[TMP23]], align 82172// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 92173// CHECK3-NEXT: store i64 0, ptr [[TMP24]], align 82174// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 102175// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 42176// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 112177// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 42178// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 122179// CHECK3-NEXT: store i32 0, ptr [[TMP27]], align 42180// CHECK3-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])2181// CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 02182// CHECK3-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]2183// CHECK3: omp_offload.failed3:2184// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]2185// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]2186// CHECK3: omp_offload.cont4:2187// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr @Arg, align 42188// CHECK3-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 42189// CHECK3-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 82190// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02191// CHECK3-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 82192// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02193// CHECK3-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 82194// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02195// CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 82196// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02197// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02198// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 02199// CHECK3-NEXT: store i32 3, ptr [[TMP37]], align 42200// CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12201// CHECK3-NEXT: store i32 1, ptr [[TMP38]], align 42202// CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 22203// CHECK3-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 82204// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 32205// CHECK3-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 82206// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 42207// CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP41]], align 82208// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 52209// CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP42]], align 82210// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 62211// CHECK3-NEXT: store ptr null, ptr [[TMP43]], align 82212// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 72213// CHECK3-NEXT: store ptr null, ptr [[TMP44]], align 82214// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 82215// CHECK3-NEXT: store i64 100, ptr [[TMP45]], align 82216// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 92217// CHECK3-NEXT: store i64 0, ptr [[TMP46]], align 82218// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 102219// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 42220// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 112221// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 42222// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 122223// CHECK3-NEXT: store i32 0, ptr [[TMP49]], align 42224// CHECK3-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])2225// CHECK3-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 02226// CHECK3-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]2227// CHECK3: omp_offload.failed7:2228// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]2229// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]2230// CHECK3: omp_offload.cont8:2231// CHECK3-NEXT: [[TMP52:%.*]] = load i32, ptr @Arg, align 42232// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])2233// CHECK3-NEXT: ret i32 [[CALL]]2234//2235//2236// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l812237// CHECK3-SAME: () #[[ATTR1]] {2238// CHECK3-NEXT: entry:2239// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)2240// CHECK3-NEXT: ret void2241//2242//2243// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined2244// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {2245// CHECK3-NEXT: entry:2246// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82247// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82248// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42249// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42250// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42251// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42252// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42253// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42254// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42255// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82256// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82257// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42258// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 42259// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42260// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42261// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82262// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42263// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2264// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42265// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 992266// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2267// CHECK3: cond.true:2268// CHECK3-NEXT: br label [[COND_END:%.*]]2269// CHECK3: cond.false:2270// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42271// CHECK3-NEXT: br label [[COND_END]]2272// CHECK3: cond.end:2273// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]2274// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42275// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42276// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42277// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2278// CHECK3: omp.inner.for.cond:2279// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]2280// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]2281// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2282// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2283// CHECK3: omp.inner.for.body:2284// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]2285// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i642286// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]2287// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i642288// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]2289// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2290// CHECK3: omp.inner.for.inc:2291// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]2292// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]2293// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]2294// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]2295// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]2296// CHECK3: omp.inner.for.end:2297// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2298// CHECK3: omp.loop.exit:2299// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])2300// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42301// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 02302// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2303// CHECK3: .omp.final.then:2304// CHECK3-NEXT: store i32 100, ptr [[I]], align 42305// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2306// CHECK3: .omp.final.done:2307// CHECK3-NEXT: ret void2308//2309//2310// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined2311// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {2312// CHECK3-NEXT: entry:2313// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82314// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82315// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82316// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82317// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42318// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42319// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42320// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42321// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42322// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42323// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42324// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82325// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82326// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82327// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82328// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42329// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 42330// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82331// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i322332// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82333// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i322334// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42335// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42336// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42337// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42338// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82339// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42340// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2341// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42342// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 992343// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2344// CHECK3: cond.true:2345// CHECK3-NEXT: br label [[COND_END:%.*]]2346// CHECK3: cond.false:2347// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42348// CHECK3-NEXT: br label [[COND_END]]2349// CHECK3: cond.end:2350// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2351// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42352// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42353// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42354// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2355// CHECK3: omp.inner.for.cond:2356// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]2357// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]2358// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2359// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2360// CHECK3: omp.inner.for.body:2361// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]2362// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 12363// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2364// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]2365// CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]2366// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2367// CHECK3: omp.body.continue:2368// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2369// CHECK3: omp.inner.for.inc:2370// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]2371// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 12372// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]2373// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]2374// CHECK3: omp.inner.for.end:2375// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2376// CHECK3: omp.loop.exit:2377// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])2378// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42379// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02380// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2381// CHECK3: .omp.final.then:2382// CHECK3-NEXT: store i32 100, ptr [[I]], align 42383// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2384// CHECK3: .omp.final.done:2385// CHECK3-NEXT: ret void2386//2387//2388// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l902389// CHECK3-SAME: () #[[ATTR1]] {2390// CHECK3-NEXT: entry:2391// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)2392// CHECK3-NEXT: ret void2393//2394//2395// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined2396// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {2397// CHECK3-NEXT: entry:2398// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82399// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82400// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42401// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42402// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42403// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42404// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42405// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42406// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42407// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 42408// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82409// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82410// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42411// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 42412// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42413// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42414// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82415// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42416// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2417// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42418// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 992419// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2420// CHECK3: cond.true:2421// CHECK3-NEXT: br label [[COND_END:%.*]]2422// CHECK3: cond.false:2423// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42424// CHECK3-NEXT: br label [[COND_END]]2425// CHECK3: cond.end:2426// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]2427// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42428// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42429// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42430// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2431// CHECK3: omp.inner.for.cond:2432// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42433// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42434// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2435// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2436// CHECK3: omp.inner.for.body:2437// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42438// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i642439// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42440// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i642441// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])2442// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82443// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 42444// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]2445// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])2446// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2447// CHECK3: omp.inner.for.inc:2448// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42449// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42450// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]2451// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42452// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]2453// CHECK3: omp.inner.for.end:2454// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2455// CHECK3: omp.loop.exit:2456// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])2457// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42458// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 02459// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2460// CHECK3: .omp.final.then:2461// CHECK3-NEXT: store i32 100, ptr [[I]], align 42462// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2463// CHECK3: .omp.final.done:2464// CHECK3-NEXT: ret void2465//2466//2467// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined2468// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {2469// CHECK3-NEXT: entry:2470// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82471// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82472// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82473// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82474// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42475// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42476// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42477// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42478// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42479// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42480// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42481// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82482// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82483// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82484// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82485// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42486// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 42487// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82488// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i322489// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82490// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i322491// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42492// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42493// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42494// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42495// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82496// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42497// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2498// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42499// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 992500// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2501// CHECK3: cond.true:2502// CHECK3-NEXT: br label [[COND_END:%.*]]2503// CHECK3: cond.false:2504// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42505// CHECK3-NEXT: br label [[COND_END]]2506// CHECK3: cond.end:2507// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2508// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42509// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42510// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42511// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2512// CHECK3: omp.inner.for.cond:2513// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42514// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42515// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2516// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2517// CHECK3: omp.inner.for.body:2518// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42519// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 12520// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2521// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 42522// CHECK3-NEXT: call void @_Z3fn5v()2523// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2524// CHECK3: omp.body.continue:2525// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2526// CHECK3: omp.inner.for.inc:2527// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42528// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 12529// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 42530// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]2531// CHECK3: omp.inner.for.end:2532// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2533// CHECK3: omp.loop.exit:2534// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])2535// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42536// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02537// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2538// CHECK3: .omp.final.then:2539// CHECK3-NEXT: store i32 100, ptr [[I]], align 42540// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2541// CHECK3: .omp.final.done:2542// CHECK3-NEXT: ret void2543//2544//2545// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l992546// CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {2547// CHECK3-NEXT: entry:2548// CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 82549// CHECK3-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 82550// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])2551// CHECK3-NEXT: ret void2552//2553//2554// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined2555// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {2556// CHECK3-NEXT: entry:2557// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82558// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82559// CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 82560// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 12561// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42562// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42563// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42564// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42565// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42566// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42567// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42568// CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 82569// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 42570// CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 82571// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR16:%.*]] = alloca i32, align 42572// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82573// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82574// CHECK3-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 82575// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 82576// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42577// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 02578// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i82579// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 12580// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42581// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 42582// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42583// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42584// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82585// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42586// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2587// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42588// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 992589// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2590// CHECK3: cond.true:2591// CHECK3-NEXT: br label [[COND_END:%.*]]2592// CHECK3: cond.false:2593// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42594// CHECK3-NEXT: br label [[COND_END]]2595// CHECK3: cond.end:2596// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2597// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42598// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42599// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42600// CHECK3-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12601// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i12602// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]2603// CHECK3: omp_if.then:2604// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2605// CHECK3: omp.inner.for.cond:2606// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]2607// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]2608// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2609// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2610// CHECK3: omp.inner.for.body:2611// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]2612// CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i642613// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]2614// CHECK3-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i642615// CHECK3-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]2616// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i12617// CHECK3-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i82618// CHECK3-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]2619// CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]2620// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]2621// CHECK3-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i12622// CHECK3-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]2623// CHECK3: omp_if.then5:2624// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]2625// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]2626// CHECK3: omp_if.else:2627// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]2628// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]2629// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]2630// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP17]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]2631// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]2632// CHECK3-NEXT: br label [[OMP_IF_END]]2633// CHECK3: omp_if.end:2634// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2635// CHECK3: omp.inner.for.inc:2636// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]2637// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]2638// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]2639// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]2640// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]2641// CHECK3: omp.inner.for.end:2642// CHECK3-NEXT: br label [[OMP_IF_END21:%.*]]2643// CHECK3: omp_if.else6:2644// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]2645// CHECK3: omp.inner.for.cond7:2646// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42647// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42648// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]2649// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END20:%.*]]2650// CHECK3: omp.inner.for.body9:2651// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42652// CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i642653// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42654// CHECK3-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i642655// CHECK3-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12656// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i12657// CHECK3-NEXT: [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i82658// CHECK3-NEXT: store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 12659// CHECK3-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 82660// CHECK3-NEXT: [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12661// CHECK3-NEXT: [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i12662// CHECK3-NEXT: br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]2663// CHECK3: omp_if.then14:2664// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])2665// CHECK3-NEXT: br label [[OMP_IF_END17:%.*]]2666// CHECK3: omp_if.else15:2667// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])2668// CHECK3-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82669// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR16]], align 42670// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1(ptr [[TMP29]], ptr [[DOTBOUND_ZERO_ADDR16]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]2671// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])2672// CHECK3-NEXT: br label [[OMP_IF_END17]]2673// CHECK3: omp_if.end17:2674// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC18:%.*]]2675// CHECK3: omp.inner.for.inc18:2676// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42677// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42678// CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]2679// CHECK3-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 42680// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]2681// CHECK3: omp.inner.for.end20:2682// CHECK3-NEXT: br label [[OMP_IF_END21]]2683// CHECK3: omp_if.end21:2684// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2685// CHECK3: omp.loop.exit:2686// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])2687// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42688// CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 02689// CHECK3-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2690// CHECK3: .omp.final.then:2691// CHECK3-NEXT: store i32 100, ptr [[I]], align 42692// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2693// CHECK3: .omp.final.done:2694// CHECK3-NEXT: ret void2695//2696//2697// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined2698// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {2699// CHECK3-NEXT: entry:2700// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82701// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82702// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82703// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82704// CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 82705// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42706// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42707// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42708// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42709// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42710// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42711// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42712// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82713// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82714// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82715// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82716// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 82717// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42718// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 42719// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82720// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i322721// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82722// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i322723// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42724// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42725// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42726// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42727// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 12728// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i12729// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]2730// CHECK3: omp_if.then:2731// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82732// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42733// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2734// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42735// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 992736// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2737// CHECK3: cond.true:2738// CHECK3-NEXT: br label [[COND_END:%.*]]2739// CHECK3: cond.false:2740// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42741// CHECK3-NEXT: br label [[COND_END]]2742// CHECK3: cond.end:2743// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2744// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42745// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42746// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42747// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2748// CHECK3: omp.inner.for.cond:2749// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]2750// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]2751// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2752// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2753// CHECK3: omp.inner.for.body:2754// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]2755// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12756// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2757// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]2758// CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]2759// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2760// CHECK3: omp.body.continue:2761// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2762// CHECK3: omp.inner.for.inc:2763// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]2764// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 12765// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]2766// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]2767// CHECK3: omp.inner.for.end:2768// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]2769// CHECK3: omp_if.else:2770// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82771// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 42772// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2773// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42774// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 992775// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]2776// CHECK3: cond.true5:2777// CHECK3-NEXT: br label [[COND_END7:%.*]]2778// CHECK3: cond.false6:2779// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42780// CHECK3-NEXT: br label [[COND_END7]]2781// CHECK3: cond.end7:2782// CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]2783// CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 42784// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42785// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 42786// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]]2787// CHECK3: omp.inner.for.cond9:2788// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42789// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42790// CHECK3-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]2791// CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]2792// CHECK3: omp.inner.for.body11:2793// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42794// CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 12795// CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]2796// CHECK3-NEXT: store i32 [[ADD13]], ptr [[I]], align 42797// CHECK3-NEXT: call void @_Z3fn6v()2798// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]2799// CHECK3: omp.body.continue14:2800// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]2801// CHECK3: omp.inner.for.inc15:2802// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42803// CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 12804// CHECK3-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 42805// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]2806// CHECK3: omp.inner.for.end17:2807// CHECK3-NEXT: br label [[OMP_IF_END]]2808// CHECK3: omp_if.end:2809// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2810// CHECK3: omp.loop.exit:2811// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82812// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 42813// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])2814// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42815// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02816// CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2817// CHECK3: .omp.final.then:2818// CHECK3-NEXT: store i32 100, ptr [[I]], align 42819// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2820// CHECK3: .omp.final.done:2821// CHECK3-NEXT: ret void2822//2823//2824// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.12825// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {2826// CHECK3-NEXT: entry:2827// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82828// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82829// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82830// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82831// CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 82832// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42833// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42834// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42835// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42836// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42837// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42838// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42839// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82840// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82841// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82842// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82843// CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 82844// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42845// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 42846// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82847// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i322848// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82849// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i322850// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42851// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 42852// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42853// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42854// CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 12855// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i12856// CHECK3-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]2857// CHECK3: omp_if.then:2858// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82859// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42860// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2861// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42862// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 992863// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2864// CHECK3: cond.true:2865// CHECK3-NEXT: br label [[COND_END:%.*]]2866// CHECK3: cond.false:2867// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42868// CHECK3-NEXT: br label [[COND_END]]2869// CHECK3: cond.end:2870// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2871// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42872// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42873// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42874// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2875// CHECK3: omp.inner.for.cond:2876// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]2877// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]2878// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2879// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2880// CHECK3: omp.inner.for.body:2881// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]2882// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12883// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2884// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]2885// CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]2886// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2887// CHECK3: omp.body.continue:2888// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2889// CHECK3: omp.inner.for.inc:2890// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]2891// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 12892// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]2893// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]2894// CHECK3: omp.inner.for.end:2895// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]2896// CHECK3: omp_if.else:2897// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82898// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 42899// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2900// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42901// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 992902// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]2903// CHECK3: cond.true5:2904// CHECK3-NEXT: br label [[COND_END7:%.*]]2905// CHECK3: cond.false6:2906// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42907// CHECK3-NEXT: br label [[COND_END7]]2908// CHECK3: cond.end7:2909// CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]2910// CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 42911// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42912// CHECK3-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 42913// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]]2914// CHECK3: omp.inner.for.cond9:2915// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42916// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42917// CHECK3-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]2918// CHECK3-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]2919// CHECK3: omp.inner.for.body11:2920// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42921// CHECK3-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 12922// CHECK3-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]2923// CHECK3-NEXT: store i32 [[ADD13]], ptr [[I]], align 42924// CHECK3-NEXT: call void @_Z3fn6v()2925// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]2926// CHECK3: omp.body.continue14:2927// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]2928// CHECK3: omp.inner.for.inc15:2929// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42930// CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 12931// CHECK3-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 42932// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]2933// CHECK3: omp.inner.for.end17:2934// CHECK3-NEXT: br label [[OMP_IF_END]]2935// CHECK3: omp_if.end:2936// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2937// CHECK3: omp.loop.exit:2938// CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82939// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 42940// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])2941// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42942// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02943// CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2944// CHECK3: .omp.final.then:2945// CHECK3-NEXT: store i32 100, ptr [[I]], align 42946// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]2947// CHECK3: .omp.final.done:2948// CHECK3-NEXT: ret void2949//2950//2951// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_2952// CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {2953// CHECK3-NEXT: entry:2954// CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 42955// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42956// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82957// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 42958// CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82959// CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 82960// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 82961// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 82962// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 82963// CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 42964// CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82965// CHECK3-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 42966// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02967// CHECK3-NEXT: store i32 3, ptr [[TMP0]], align 42968// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12969// CHECK3-NEXT: store i32 0, ptr [[TMP1]], align 42970// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22971// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 82972// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32973// CHECK3-NEXT: store ptr null, ptr [[TMP3]], align 82974// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42975// CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 82976// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52977// CHECK3-NEXT: store ptr null, ptr [[TMP5]], align 82978// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62979// CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 82980// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72981// CHECK3-NEXT: store ptr null, ptr [[TMP7]], align 82982// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82983// CHECK3-NEXT: store i64 100, ptr [[TMP8]], align 82984// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92985// CHECK3-NEXT: store i64 0, ptr [[TMP9]], align 82986// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102987// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 42988// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112989// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 42990// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122991// CHECK3-NEXT: store i32 0, ptr [[TMP12]], align 42992// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])2993// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 02994// CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2995// CHECK3: omp_offload.failed:2996// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]2997// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]2998// CHECK3: omp_offload.cont:2999// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 03000// CHECK3-NEXT: store i32 3, ptr [[TMP15]], align 43001// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 13002// CHECK3-NEXT: store i32 0, ptr [[TMP16]], align 43003// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 23004// CHECK3-NEXT: store ptr null, ptr [[TMP17]], align 83005// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 33006// CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 83007// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 43008// CHECK3-NEXT: store ptr null, ptr [[TMP19]], align 83009// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 53010// CHECK3-NEXT: store ptr null, ptr [[TMP20]], align 83011// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 63012// CHECK3-NEXT: store ptr null, ptr [[TMP21]], align 83013// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 73014// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 83015// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 83016// CHECK3-NEXT: store i64 100, ptr [[TMP23]], align 83017// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 93018// CHECK3-NEXT: store i64 0, ptr [[TMP24]], align 83019// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 103020// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 43021// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 113022// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 43023// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 123024// CHECK3-NEXT: store i32 0, ptr [[TMP27]], align 43025// CHECK3-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])3026// CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 03027// CHECK3-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]3028// CHECK3: omp_offload.failed3:3029// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]3030// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]3031// CHECK3: omp_offload.cont4:3032// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 43033// CHECK3-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 43034// CHECK3-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 83035// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03036// CHECK3-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 83037// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03038// CHECK3-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 83039// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 03040// CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 83041// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03042// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03043// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 03044// CHECK3-NEXT: store i32 3, ptr [[TMP37]], align 43045// CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 13046// CHECK3-NEXT: store i32 1, ptr [[TMP38]], align 43047// CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 23048// CHECK3-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 83049// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 33050// CHECK3-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 83051// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 43052// CHECK3-NEXT: store ptr @.offload_sizes.2, ptr [[TMP41]], align 83053// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 53054// CHECK3-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP42]], align 83055// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 63056// CHECK3-NEXT: store ptr null, ptr [[TMP43]], align 83057// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 73058// CHECK3-NEXT: store ptr null, ptr [[TMP44]], align 83059// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 83060// CHECK3-NEXT: store i64 100, ptr [[TMP45]], align 83061// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 93062// CHECK3-NEXT: store i64 0, ptr [[TMP46]], align 83063// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 103064// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 43065// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 113066// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 43067// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 123068// CHECK3-NEXT: store i32 0, ptr [[TMP49]], align 43069// CHECK3-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])3070// CHECK3-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 03071// CHECK3-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]3072// CHECK3: omp_offload.failed7:3073// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]3074// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]3075// CHECK3: omp_offload.cont8:3076// CHECK3-NEXT: ret i32 03077//3078//3079// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l593080// CHECK3-SAME: () #[[ATTR1]] {3081// CHECK3-NEXT: entry:3082// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)3083// CHECK3-NEXT: ret void3084//3085//3086// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined3087// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {3088// CHECK3-NEXT: entry:3089// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83090// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83091// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43092// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43093// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43094// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43095// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43096// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43097// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43098// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83099// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83100// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43101// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 43102// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43103// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43104// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83105// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 43106// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3107// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43108// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 993109// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3110// CHECK3: cond.true:3111// CHECK3-NEXT: br label [[COND_END:%.*]]3112// CHECK3: cond.false:3113// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43114// CHECK3-NEXT: br label [[COND_END]]3115// CHECK3: cond.end:3116// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]3117// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43118// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43119// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43120// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3121// CHECK3: omp.inner.for.cond:3122// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]3123// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]3124// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]3125// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3126// CHECK3: omp.inner.for.body:3127// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]3128// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i643129// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]3130// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i643131// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]3132// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3133// CHECK3: omp.inner.for.inc:3134// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]3135// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]3136// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]3137// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]3138// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]3139// CHECK3: omp.inner.for.end:3140// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3141// CHECK3: omp.loop.exit:3142// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])3143// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43144// CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 03145// CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3146// CHECK3: .omp.final.then:3147// CHECK3-NEXT: store i32 100, ptr [[I]], align 43148// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3149// CHECK3: .omp.final.done:3150// CHECK3-NEXT: ret void3151//3152//3153// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined3154// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {3155// CHECK3-NEXT: entry:3156// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83157// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83158// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83159// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83160// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43161// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43162// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43163// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43164// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43165// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43166// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43167// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83168// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83169// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83170// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83171// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43172// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43173// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83174// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i323175// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83176// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i323177// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43178// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43179// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43180// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43181// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83182// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43183// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3184// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43185// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 993186// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3187// CHECK3: cond.true:3188// CHECK3-NEXT: br label [[COND_END:%.*]]3189// CHECK3: cond.false:3190// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43191// CHECK3-NEXT: br label [[COND_END]]3192// CHECK3: cond.end:3193// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3194// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43195// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43196// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43197// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3198// CHECK3: omp.inner.for.cond:3199// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]3200// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]3201// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3202// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3203// CHECK3: omp.inner.for.body:3204// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]3205// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13206// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3207// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]3208// CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]3209// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3210// CHECK3: omp.body.continue:3211// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3212// CHECK3: omp.inner.for.inc:3213// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]3214// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 13215// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]3216// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]3217// CHECK3: omp.inner.for.end:3218// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3219// CHECK3: omp.loop.exit:3220// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])3221// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43222// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03223// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3224// CHECK3: .omp.final.then:3225// CHECK3-NEXT: store i32 100, ptr [[I]], align 43226// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3227// CHECK3: .omp.final.done:3228// CHECK3-NEXT: ret void3229//3230//3231// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l653232// CHECK3-SAME: () #[[ATTR1]] {3233// CHECK3-NEXT: entry:3234// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)3235// CHECK3-NEXT: ret void3236//3237//3238// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined3239// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {3240// CHECK3-NEXT: entry:3241// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83242// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83243// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43244// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43245// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43246// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43247// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43248// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43249// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43250// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 43251// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83252// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83253// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43254// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 43255// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43256// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43257// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83258// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 43259// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3260// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43261// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 993262// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3263// CHECK3: cond.true:3264// CHECK3-NEXT: br label [[COND_END:%.*]]3265// CHECK3: cond.false:3266// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43267// CHECK3-NEXT: br label [[COND_END]]3268// CHECK3: cond.end:3269// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]3270// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43271// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43272// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43273// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3274// CHECK3: omp.inner.for.cond:3275// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43276// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43277// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]3278// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3279// CHECK3: omp.inner.for.body:3280// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43281// CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i643282// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43283// CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i643284// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])3285// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83286// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 43287// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]3288// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])3289// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3290// CHECK3: omp.inner.for.inc:3291// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43292// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43293// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]3294// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43295// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]3296// CHECK3: omp.inner.for.end:3297// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3298// CHECK3: omp.loop.exit:3299// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])3300// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43301// CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 03302// CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3303// CHECK3: .omp.final.then:3304// CHECK3-NEXT: store i32 100, ptr [[I]], align 43305// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3306// CHECK3: .omp.final.done:3307// CHECK3-NEXT: ret void3308//3309//3310// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined3311// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {3312// CHECK3-NEXT: entry:3313// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83314// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83315// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83316// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83317// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43318// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43319// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43320// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43321// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43322// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43323// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43324// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83325// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83326// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83327// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83328// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43329// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43330// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83331// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i323332// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83333// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i323334// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43335// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43336// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43337// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43338// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83339// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43340// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3341// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43342// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 993343// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3344// CHECK3: cond.true:3345// CHECK3-NEXT: br label [[COND_END:%.*]]3346// CHECK3: cond.false:3347// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43348// CHECK3-NEXT: br label [[COND_END]]3349// CHECK3: cond.end:3350// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3351// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43352// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43353// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43354// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3355// CHECK3: omp.inner.for.cond:3356// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43357// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43358// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3359// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3360// CHECK3: omp.inner.for.body:3361// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43362// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13363// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3364// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 43365// CHECK3-NEXT: call void @_Z3fn2v()3366// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3367// CHECK3: omp.body.continue:3368// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3369// CHECK3: omp.inner.for.inc:3370// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43371// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 13372// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 43373// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]3374// CHECK3: omp.inner.for.end:3375// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3376// CHECK3: omp.loop.exit:3377// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])3378// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43379// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03380// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3381// CHECK3: .omp.final.then:3382// CHECK3-NEXT: store i32 100, ptr [[I]], align 43383// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3384// CHECK3: .omp.final.done:3385// CHECK3-NEXT: ret void3386//3387//3388// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l713389// CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {3390// CHECK3-NEXT: entry:3391// CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 83392// CHECK3-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 83393// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])3394// CHECK3-NEXT: ret void3395//3396//3397// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined3398// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {3399// CHECK3-NEXT: entry:3400// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83401// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83402// CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 83403// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43404// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43405// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43406// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43407// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43408// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43409// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43410// CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 43411// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83412// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83413// CHECK3-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 83414// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 83415// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43416// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 43417// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43418// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43419// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83420// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43421// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3422// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43423// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 993424// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3425// CHECK3: cond.true:3426// CHECK3-NEXT: br label [[COND_END:%.*]]3427// CHECK3: cond.false:3428// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43429// CHECK3-NEXT: br label [[COND_END]]3430// CHECK3: cond.end:3431// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3432// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43433// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43434// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43435// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3436// CHECK3: omp.inner.for.cond:3437// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]3438// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]3439// CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3440// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3441// CHECK3: omp.inner.for.body:3442// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]3443// CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i643444// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]3445// CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i643446// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]3447// CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 03448// CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]3449// CHECK3: omp_if.then:3450// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]3451// CHECK3-NEXT: br label [[OMP_IF_END:%.*]]3452// CHECK3: omp_if.else:3453// CHECK3-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]3454// CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]3455// CHECK3-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]3456// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]3457// CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]3458// CHECK3-NEXT: br label [[OMP_IF_END]]3459// CHECK3: omp_if.end:3460// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3461// CHECK3: omp.inner.for.inc:3462// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]3463// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]3464// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]3465// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]3466// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]3467// CHECK3: omp.inner.for.end:3468// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3469// CHECK3: omp.loop.exit:3470// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3471// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43472// CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 03473// CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3474// CHECK3: .omp.final.then:3475// CHECK3-NEXT: store i32 100, ptr [[I]], align 43476// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3477// CHECK3: .omp.final.done:3478// CHECK3-NEXT: ret void3479//3480//3481// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined3482// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {3483// CHECK3-NEXT: entry:3484// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83485// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83486// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 83487// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 83488// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43489// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43490// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43491// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43492// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43493// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43494// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43495// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83496// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83497// CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 83498// CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 83499// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43500// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43501// CHECK3-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 83502// CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i323503// CHECK3-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 83504// CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i323505// CHECK3-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 43506// CHECK3-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 43507// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43508// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43509// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83510// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43511// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3512// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43513// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 993514// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3515// CHECK3: cond.true:3516// CHECK3-NEXT: br label [[COND_END:%.*]]3517// CHECK3: cond.false:3518// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43519// CHECK3-NEXT: br label [[COND_END]]3520// CHECK3: cond.end:3521// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3522// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43523// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43524// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43525// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3526// CHECK3: omp.inner.for.cond:3527// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]3528// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]3529// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3530// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3531// CHECK3: omp.inner.for.body:3532// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]3533// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13534// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3535// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]3536// CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]3537// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3538// CHECK3: omp.body.continue:3539// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3540// CHECK3: omp.inner.for.inc:3541// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]3542// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 13543// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]3544// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]3545// CHECK3: omp.inner.for.end:3546// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3547// CHECK3: omp.loop.exit:3548// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])3549// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43550// CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03551// CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3552// CHECK3: .omp.final.then:3553// CHECK3-NEXT: store i32 100, ptr [[I]], align 43554// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]3555// CHECK3: .omp.final.done:3556// CHECK3-NEXT: ret void3557//3558//3559// CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv3560// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {3561// CHECK5-NEXT: entry:3562// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43563// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43564// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43565// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43566// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43567// CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 43568// CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43569// CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43570// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43571// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 43572// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43573// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43574// CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43575// CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43576// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3577// CHECK5: omp.inner.for.cond:3578// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]3579// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]3580// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3581// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3582// CHECK5: omp.inner.for.body:3583// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3584// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13585// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3586// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]3587// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3588// CHECK5: omp.body.continue:3589// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3590// CHECK5: omp.inner.for.inc:3591// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3592// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 13593// CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3594// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]3595// CHECK5: omp.inner.for.end:3596// CHECK5-NEXT: store i32 100, ptr [[I]], align 43597// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43598// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 43599// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43600// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 43601// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3602// CHECK5: omp.inner.for.cond7:3603// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]3604// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]3605// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3606// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]3607// CHECK5: omp.inner.for.body9:3608// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3609// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 13610// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3611// CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]3612// CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]3613// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]3614// CHECK5: omp.body.continue12:3615// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]3616// CHECK5: omp.inner.for.inc13:3617// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3618// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 13619// CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3620// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]3621// CHECK5: omp.inner.for.end15:3622// CHECK5-NEXT: store i32 100, ptr [[I6]], align 43623// CHECK5-NEXT: ret void3624//3625//3626// CHECK5-LABEL: define {{[^@]+}}@main3627// CHECK5-SAME: () #[[ATTR1:[0-9]+]] {3628// CHECK5-NEXT: entry:3629// CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 43630// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43631// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43632// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43633// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43634// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43635// CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 43636// CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43637// CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43638// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43639// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 43640// CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 43641// CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 43642// CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 43643// CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 43644// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 43645// CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 43646// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43647// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43648// CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43649// CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43650// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3651// CHECK5: omp.inner.for.cond:3652// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3653// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]3654// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3655// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3656// CHECK5: omp.inner.for.body:3657// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3658// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13659// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3660// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3661// CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]3662// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3663// CHECK5: omp.body.continue:3664// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3665// CHECK5: omp.inner.for.inc:3666// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3667// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 13668// CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3669// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]3670// CHECK5: omp.inner.for.end:3671// CHECK5-NEXT: store i32 100, ptr [[I]], align 43672// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43673// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 43674// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43675// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 43676// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3677// CHECK5: omp.inner.for.cond7:3678// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]3679// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]3680// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3681// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]3682// CHECK5: omp.inner.for.body9:3683// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]3684// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 13685// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3686// CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]3687// CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]3688// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]3689// CHECK5: omp.body.continue12:3690// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]3691// CHECK5: omp.inner.for.inc13:3692// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]3693// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 13694// CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]3695// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]3696// CHECK5: omp.inner.for.end15:3697// CHECK5-NEXT: store i32 100, ptr [[I6]], align 43698// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 43699// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 43700// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 43701// CHECK5-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 43702// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]3703// CHECK5: omp.inner.for.cond21:3704// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]3705// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]3706// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]3707// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]3708// CHECK5: omp.inner.for.body23:3709// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]3710// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 13711// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]3712// CHECK5-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]3713// CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]3714// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]3715// CHECK5: omp.body.continue26:3716// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]3717// CHECK5: omp.inner.for.inc27:3718// CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]3719// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 13720// CHECK5-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]3721// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]3722// CHECK5: omp.inner.for.end29:3723// CHECK5-NEXT: store i32 100, ptr [[I20]], align 43724// CHECK5-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 43725// CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])3726// CHECK5-NEXT: ret i32 [[CALL]]3727//3728//3729// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_3730// CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {3731// CHECK5-NEXT: entry:3732// CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 43733// CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 43734// CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43735// CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43736// CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43737// CHECK5-NEXT: [[I:%.*]] = alloca i32, align 43738// CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 43739// CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43740// CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43741// CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43742// CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 43743// CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 43744// CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 43745// CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 43746// CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 43747// CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 43748// CHECK5-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 43749// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43750// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43751// CHECK5-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43752// CHECK5-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43753// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3754// CHECK5: omp.inner.for.cond:3755// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]3756// CHECK5-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]3757// CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3758// CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3759// CHECK5: omp.inner.for.body:3760// CHECK5-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]3761// CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13762// CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3763// CHECK5-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]3764// CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]3765// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3766// CHECK5: omp.body.continue:3767// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3768// CHECK5: omp.inner.for.inc:3769// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]3770// CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 13771// CHECK5-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]3772// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]3773// CHECK5: omp.inner.for.end:3774// CHECK5-NEXT: store i32 100, ptr [[I]], align 43775// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43776// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 43777// CHECK5-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43778// CHECK5-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 43779// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3780// CHECK5: omp.inner.for.cond7:3781// CHECK5-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]3782// CHECK5-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]3783// CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3784// CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]3785// CHECK5: omp.inner.for.body9:3786// CHECK5-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]3787// CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 13788// CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3789// CHECK5-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]3790// CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]3791// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]3792// CHECK5: omp.body.continue12:3793// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]3794// CHECK5: omp.inner.for.inc13:3795// CHECK5-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]3796// CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 13797// CHECK5-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]3798// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]3799// CHECK5: omp.inner.for.end15:3800// CHECK5-NEXT: store i32 100, ptr [[I6]], align 43801// CHECK5-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 43802// CHECK5-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 43803// CHECK5-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 43804// CHECK5-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 43805// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]3806// CHECK5: omp.inner.for.cond21:3807// CHECK5-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]3808// CHECK5-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]3809// CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]3810// CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]3811// CHECK5: omp.inner.for.body23:3812// CHECK5-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]3813// CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 13814// CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]3815// CHECK5-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]3816// CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]3817// CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]3818// CHECK5: omp.body.continue26:3819// CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]3820// CHECK5: omp.inner.for.inc27:3821// CHECK5-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]3822// CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 13823// CHECK5-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]3824// CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]3825// CHECK5: omp.inner.for.end29:3826// CHECK5-NEXT: store i32 100, ptr [[I20]], align 43827// CHECK5-NEXT: ret i32 03828//3829//3830// CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv3831// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {3832// CHECK7-NEXT: entry:3833// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43834// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43835// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43836// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43837// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43838// CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 43839// CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43840// CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43841// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43842// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 43843// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43844// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43845// CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43846// CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43847// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3848// CHECK7: omp.inner.for.cond:3849// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]3850// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]3851// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3852// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3853// CHECK7: omp.inner.for.body:3854// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3855// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13856// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3857// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]3858// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3859// CHECK7: omp.body.continue:3860// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3861// CHECK7: omp.inner.for.inc:3862// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3863// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 13864// CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3865// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]3866// CHECK7: omp.inner.for.end:3867// CHECK7-NEXT: store i32 100, ptr [[I]], align 43868// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43869// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 43870// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43871// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 43872// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3873// CHECK7: omp.inner.for.cond7:3874// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]3875// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]3876// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3877// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]3878// CHECK7: omp.inner.for.body9:3879// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3880// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 13881// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3882// CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]3883// CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]3884// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]3885// CHECK7: omp.body.continue12:3886// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]3887// CHECK7: omp.inner.for.inc13:3888// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3889// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 13890// CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]3891// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]3892// CHECK7: omp.inner.for.end15:3893// CHECK7-NEXT: store i32 100, ptr [[I6]], align 43894// CHECK7-NEXT: ret void3895//3896//3897// CHECK7-LABEL: define {{[^@]+}}@main3898// CHECK7-SAME: () #[[ATTR1:[0-9]+]] {3899// CHECK7-NEXT: entry:3900// CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 43901// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 43902// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43903// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43904// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43905// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 43906// CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 43907// CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 43908// CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 43909// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 43910// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 43911// CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 13912// CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 43913// CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 43914// CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 43915// CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 43916// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 43917// CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 43918// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43919// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43920// CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43921// CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43922// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3923// CHECK7: omp.inner.for.cond:3924// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3925// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]3926// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3927// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3928// CHECK7: omp.inner.for.body:3929// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3930// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13931// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3932// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3933// CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]3934// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3935// CHECK7: omp.body.continue:3936// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3937// CHECK7: omp.inner.for.inc:3938// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3939// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 13940// CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3941// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]3942// CHECK7: omp.inner.for.end:3943// CHECK7-NEXT: store i32 100, ptr [[I]], align 43944// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 43945// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 43946// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43947// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 43948// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]3949// CHECK7: omp.inner.for.cond7:3950// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 43951// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 43952// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3953// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]3954// CHECK7: omp.inner.for.body9:3955// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 43956// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 13957// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3958// CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 43959// CHECK7-NEXT: call void @_Z3fn5v()3960// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]3961// CHECK7: omp.body.continue12:3962// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]3963// CHECK7: omp.inner.for.inc13:3964// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 43965// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 13966// CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 43967// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]3968// CHECK7: omp.inner.for.end15:3969// CHECK7-NEXT: store i32 100, ptr [[I6]], align 43970// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 43971// CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 03972// CHECK7-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i83973// CHECK7-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 13974// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 43975// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 43976// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 43977// CHECK7-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 43978// CHECK7-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13979// CHECK7-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i13980// CHECK7-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]3981// CHECK7: omp_if.then:3982// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]3983// CHECK7: omp.inner.for.cond21:3984// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]3985// CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]3986// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]3987// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]3988// CHECK7: omp.inner.for.body23:3989// CHECK7-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]3990// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 13991// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]3992// CHECK7-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]3993// CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]3994// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]3995// CHECK7: omp.body.continue26:3996// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]3997// CHECK7: omp.inner.for.inc27:3998// CHECK7-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]3999// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP16]], 14000// CHECK7-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]4001// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]4002// CHECK7: omp.inner.for.end29:4003// CHECK7-NEXT: br label [[OMP_IF_END:%.*]]4004// CHECK7: omp_if.else:4005// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND30:%.*]]4006// CHECK7: omp.inner.for.cond30:4007// CHECK7-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 44008// CHECK7-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 44009// CHECK7-NEXT: [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]4010// CHECK7-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]4011// CHECK7: omp.inner.for.body32:4012// CHECK7-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 44013// CHECK7-NEXT: [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 14014// CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]4015// CHECK7-NEXT: store i32 [[ADD34]], ptr [[I20]], align 44016// CHECK7-NEXT: call void @_Z3fn6v()4017// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]4018// CHECK7: omp.body.continue35:4019// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]4020// CHECK7: omp.inner.for.inc36:4021// CHECK7-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 44022// CHECK7-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP20]], 14023// CHECK7-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 44024// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]4025// CHECK7: omp.inner.for.end38:4026// CHECK7-NEXT: br label [[OMP_IF_END]]4027// CHECK7: omp_if.end:4028// CHECK7-NEXT: store i32 100, ptr [[I20]], align 44029// CHECK7-NEXT: [[TMP21:%.*]] = load i32, ptr @Arg, align 44030// CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])4031// CHECK7-NEXT: ret i32 [[CALL]]4032//4033//4034// CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_4035// CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {4036// CHECK7-NEXT: entry:4037// CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 44038// CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 44039// CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44040// CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44041// CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44042// CHECK7-NEXT: [[I:%.*]] = alloca i32, align 44043// CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 44044// CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 44045// CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 44046// CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 44047// CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 44048// CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 44049// CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 44050// CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 44051// CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 44052// CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 44053// CHECK7-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 44054// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44055// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 44056// CHECK7-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44057// CHECK7-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44058// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4059// CHECK7: omp.inner.for.cond:4060// CHECK7-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]4061// CHECK7-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]4062// CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4063// CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4064// CHECK7: omp.inner.for.body:4065// CHECK7-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]4066// CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 14067// CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4068// CHECK7-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]4069// CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]4070// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4071// CHECK7: omp.body.continue:4072// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4073// CHECK7: omp.inner.for.inc:4074// CHECK7-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]4075// CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 14076// CHECK7-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]4077// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]4078// CHECK7: omp.inner.for.end:4079// CHECK7-NEXT: store i32 100, ptr [[I]], align 44080// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 44081// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 44082// CHECK7-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 44083// CHECK7-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 44084// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]4085// CHECK7: omp.inner.for.cond7:4086// CHECK7-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 44087// CHECK7-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 44088// CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4089// CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]4090// CHECK7: omp.inner.for.body9:4091// CHECK7-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 44092// CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 14093// CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]4094// CHECK7-NEXT: store i32 [[ADD11]], ptr [[I6]], align 44095// CHECK7-NEXT: call void @_Z3fn2v()4096// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]4097// CHECK7: omp.body.continue12:4098// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]4099// CHECK7: omp.inner.for.inc13:4100// CHECK7-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 44101// CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 14102// CHECK7-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 44103// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]4104// CHECK7: omp.inner.for.end15:4105// CHECK7-NEXT: store i32 100, ptr [[I6]], align 44106// CHECK7-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 44107// CHECK7-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 44108// CHECK7-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 44109// CHECK7-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 44110// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]4111// CHECK7: omp.inner.for.cond21:4112// CHECK7-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]4113// CHECK7-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]4114// CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]4115// CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]4116// CHECK7: omp.inner.for.body23:4117// CHECK7-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]4118// CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 14119// CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]4120// CHECK7-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]4121// CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]4122// CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]4123// CHECK7: omp.body.continue26:4124// CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]4125// CHECK7: omp.inner.for.inc27:4126// CHECK7-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]4127// CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 14128// CHECK7-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]4129// CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]4130// CHECK7: omp.inner.for.end29:4131// CHECK7-NEXT: store i32 100, ptr [[I20]], align 44132// CHECK7-NEXT: ret i32 04133//4134//4135// CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv4136// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {4137// CHECK9-NEXT: entry:4138// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44139// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 84140// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 44141// CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84142// CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04143// CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 44144// CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14145// CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 44146// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24147// CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 84148// CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34149// CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 84150// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44151// CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 84152// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54153// CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 84154// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64155// CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 84156// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74157// CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 84158// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84159// CHECK9-NEXT: store i64 100, ptr [[TMP8]], align 84160// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94161// CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 84162// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104163// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 44164// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114165// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 44166// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124167// CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 44168// CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])4169// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 04170// CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4171// CHECK9: omp_offload.failed:4172// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]4173// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]4174// CHECK9: omp_offload.cont:4175// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 04176// CHECK9-NEXT: store i32 3, ptr [[TMP15]], align 44177// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 14178// CHECK9-NEXT: store i32 0, ptr [[TMP16]], align 44179// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 24180// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 84181// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 34182// CHECK9-NEXT: store ptr null, ptr [[TMP18]], align 84183// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 44184// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 84185// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 54186// CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 84187// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 64188// CHECK9-NEXT: store ptr null, ptr [[TMP21]], align 84189// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 74190// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 84191// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 84192// CHECK9-NEXT: store i64 100, ptr [[TMP23]], align 84193// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 94194// CHECK9-NEXT: store i64 0, ptr [[TMP24]], align 84195// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 104196// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 44197// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 114198// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 44199// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 124200// CHECK9-NEXT: store i32 0, ptr [[TMP27]], align 44201// CHECK9-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])4202// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 04203// CHECK9-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]4204// CHECK9: omp_offload.failed3:4205// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]4206// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]4207// CHECK9: omp_offload.cont4:4208// CHECK9-NEXT: ret void4209//4210//4211// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l434212// CHECK9-SAME: () #[[ATTR1:[0-9]+]] {4213// CHECK9-NEXT: entry:4214// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)4215// CHECK9-NEXT: ret void4216//4217//4218// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined4219// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {4220// CHECK9-NEXT: entry:4221// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84222// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84223// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44224// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44225// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44226// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44227// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44228// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44229// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44230// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84231// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84232// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44233// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 44234// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44235// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44236// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84237// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 44238// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4239// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44240// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 994241// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4242// CHECK9: cond.true:4243// CHECK9-NEXT: br label [[COND_END:%.*]]4244// CHECK9: cond.false:4245// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44246// CHECK9-NEXT: br label [[COND_END]]4247// CHECK9: cond.end:4248// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]4249// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44250// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44251// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 44252// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4253// CHECK9: omp.inner.for.cond:4254// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]4255// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]4256// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]4257// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4258// CHECK9: omp.inner.for.body:4259// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]4260// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i644261// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]4262// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i644263// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]4264// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4265// CHECK9: omp.inner.for.inc:4266// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]4267// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]4268// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]4269// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]4270// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]4271// CHECK9: omp.inner.for.end:4272// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4273// CHECK9: omp.loop.exit:4274// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])4275// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44276// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 04277// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4278// CHECK9: .omp.final.then:4279// CHECK9-NEXT: store i32 100, ptr [[I]], align 44280// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4281// CHECK9: .omp.final.done:4282// CHECK9-NEXT: ret void4283//4284//4285// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined4286// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {4287// CHECK9-NEXT: entry:4288// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84289// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84290// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 84291// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 84292// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44293// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44294// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44295// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44296// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44297// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44298// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44299// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84300// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84301// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 84302// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 84303// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44304// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 44305// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 84306// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i324307// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 84308// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i324309// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 44310// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 44311// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44312// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44313// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84314// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 44315// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4316// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44317// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 994318// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4319// CHECK9: cond.true:4320// CHECK9-NEXT: br label [[COND_END:%.*]]4321// CHECK9: cond.false:4322// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44323// CHECK9-NEXT: br label [[COND_END]]4324// CHECK9: cond.end:4325// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]4326// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44327// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44328// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44329// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4330// CHECK9: omp.inner.for.cond:4331// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]4332// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]4333// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4334// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4335// CHECK9: omp.inner.for.body:4336// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4337// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 14338// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4339// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]4340// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4341// CHECK9: omp.body.continue:4342// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4343// CHECK9: omp.inner.for.inc:4344// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4345// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 14346// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4347// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]4348// CHECK9: omp.inner.for.end:4349// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4350// CHECK9: omp.loop.exit:4351// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])4352// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44353// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 04354// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4355// CHECK9: .omp.final.then:4356// CHECK9-NEXT: store i32 100, ptr [[I]], align 44357// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4358// CHECK9: .omp.final.done:4359// CHECK9-NEXT: ret void4360//4361//4362// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l484363// CHECK9-SAME: () #[[ATTR1]] {4364// CHECK9-NEXT: entry:4365// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)4366// CHECK9-NEXT: ret void4367//4368//4369// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined4370// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {4371// CHECK9-NEXT: entry:4372// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84373// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84374// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44375// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44376// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44377// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44378// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44379// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44380// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44381// CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 44382// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84383// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84384// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44385// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 44386// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44387// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44388// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84389// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 44390// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4391// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44392// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 994393// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4394// CHECK9: cond.true:4395// CHECK9-NEXT: br label [[COND_END:%.*]]4396// CHECK9: cond.false:4397// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44398// CHECK9-NEXT: br label [[COND_END]]4399// CHECK9: cond.end:4400// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]4401// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44402// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44403// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 44404// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4405// CHECK9: omp.inner.for.cond:4406// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]4407// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]4408// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]4409// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4410// CHECK9: omp.inner.for.body:4411// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]4412// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i644413// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]4414// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i644415// CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]4416// CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]4417// CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]4418// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]4419// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]4420// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4421// CHECK9: omp.inner.for.inc:4422// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]4423// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]4424// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]4425// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]4426// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]4427// CHECK9: omp.inner.for.end:4428// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4429// CHECK9: omp.loop.exit:4430// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])4431// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44432// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 04433// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4434// CHECK9: .omp.final.then:4435// CHECK9-NEXT: store i32 100, ptr [[I]], align 44436// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4437// CHECK9: .omp.final.done:4438// CHECK9-NEXT: ret void4439//4440//4441// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined4442// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {4443// CHECK9-NEXT: entry:4444// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84445// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84446// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 84447// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 84448// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44449// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44450// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44451// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44452// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44453// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44454// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44455// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84456// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84457// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 84458// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 84459// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44460// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 44461// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 84462// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i324463// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 84464// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i324465// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 44466// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 44467// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44468// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44469// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84470// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 44471// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4472// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44473// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 994474// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4475// CHECK9: cond.true:4476// CHECK9-NEXT: br label [[COND_END:%.*]]4477// CHECK9: cond.false:4478// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44479// CHECK9-NEXT: br label [[COND_END]]4480// CHECK9: cond.end:4481// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]4482// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44483// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44484// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44485// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4486// CHECK9: omp.inner.for.cond:4487// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]4488// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]4489// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4490// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4491// CHECK9: omp.inner.for.body:4492// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]4493// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 14494// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4495// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]4496// CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]4497// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4498// CHECK9: omp.body.continue:4499// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4500// CHECK9: omp.inner.for.inc:4501// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]4502// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 14503// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]4504// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]4505// CHECK9: omp.inner.for.end:4506// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4507// CHECK9: omp.loop.exit:4508// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])4509// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44510// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 04511// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4512// CHECK9: .omp.final.then:4513// CHECK9-NEXT: store i32 100, ptr [[I]], align 44514// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4515// CHECK9: .omp.final.done:4516// CHECK9-NEXT: ret void4517//4518//4519// CHECK9-LABEL: define {{[^@]+}}@main4520// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {4521// CHECK9-NEXT: entry:4522// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 44523// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44524// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 84525// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 44526// CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84527// CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 84528// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 84529// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 84530// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 84531// CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 44532// CHECK9-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84533// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 44534// CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04535// CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 44536// CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14537// CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 44538// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24539// CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 84540// CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34541// CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 84542// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44543// CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 84544// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54545// CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 84546// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64547// CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 84548// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74549// CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 84550// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84551// CHECK9-NEXT: store i64 100, ptr [[TMP8]], align 84552// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94553// CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 84554// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104555// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 44556// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114557// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 44558// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124559// CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 44560// CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])4561// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 04562// CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4563// CHECK9: omp_offload.failed:4564// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]4565// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]4566// CHECK9: omp_offload.cont:4567// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 04568// CHECK9-NEXT: store i32 3, ptr [[TMP15]], align 44569// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 14570// CHECK9-NEXT: store i32 0, ptr [[TMP16]], align 44571// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 24572// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 84573// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 34574// CHECK9-NEXT: store ptr null, ptr [[TMP18]], align 84575// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 44576// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 84577// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 54578// CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 84579// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 64580// CHECK9-NEXT: store ptr null, ptr [[TMP21]], align 84581// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 74582// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 84583// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 84584// CHECK9-NEXT: store i64 100, ptr [[TMP23]], align 84585// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 94586// CHECK9-NEXT: store i64 0, ptr [[TMP24]], align 84587// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 104588// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 44589// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 114590// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 44591// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 124592// CHECK9-NEXT: store i32 0, ptr [[TMP27]], align 44593// CHECK9-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])4594// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 04595// CHECK9-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]4596// CHECK9: omp_offload.failed3:4597// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]4598// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]4599// CHECK9: omp_offload.cont4:4600// CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr @Arg, align 44601// CHECK9-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 44602// CHECK9-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 84603// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04604// CHECK9-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 84605// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04606// CHECK9-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 84607// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 04608// CHECK9-NEXT: store ptr null, ptr [[TMP34]], align 84609// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04610// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04611// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 04612// CHECK9-NEXT: store i32 3, ptr [[TMP37]], align 44613// CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 14614// CHECK9-NEXT: store i32 1, ptr [[TMP38]], align 44615// CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 24616// CHECK9-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 84617// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 34618// CHECK9-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 84619// CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 44620// CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP41]], align 84621// CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 54622// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP42]], align 84623// CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 64624// CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 84625// CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 74626// CHECK9-NEXT: store ptr null, ptr [[TMP44]], align 84627// CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 84628// CHECK9-NEXT: store i64 100, ptr [[TMP45]], align 84629// CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 94630// CHECK9-NEXT: store i64 0, ptr [[TMP46]], align 84631// CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 104632// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 44633// CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 114634// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 44635// CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 124636// CHECK9-NEXT: store i32 0, ptr [[TMP49]], align 44637// CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])4638// CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 04639// CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]4640// CHECK9: omp_offload.failed7:4641// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]4642// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT8]]4643// CHECK9: omp_offload.cont8:4644// CHECK9-NEXT: [[TMP52:%.*]] = load i32, ptr @Arg, align 44645// CHECK9-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])4646// CHECK9-NEXT: ret i32 [[CALL]]4647//4648//4649// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l814650// CHECK9-SAME: () #[[ATTR1]] {4651// CHECK9-NEXT: entry:4652// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)4653// CHECK9-NEXT: ret void4654//4655//4656// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined4657// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {4658// CHECK9-NEXT: entry:4659// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84660// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84661// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44662// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44663// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44664// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44665// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44666// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44667// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44668// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84669// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84670// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44671// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 44672// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44673// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44674// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84675// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 44676// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4677// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44678// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 994679// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4680// CHECK9: cond.true:4681// CHECK9-NEXT: br label [[COND_END:%.*]]4682// CHECK9: cond.false:4683// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44684// CHECK9-NEXT: br label [[COND_END]]4685// CHECK9: cond.end:4686// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]4687// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44688// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44689// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 44690// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4691// CHECK9: omp.inner.for.cond:4692// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]4693// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]4694// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]4695// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4696// CHECK9: omp.inner.for.body:4697// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]4698// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i644699// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]4700// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i644701// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]4702// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4703// CHECK9: omp.inner.for.inc:4704// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]4705// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]4706// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]4707// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]4708// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]4709// CHECK9: omp.inner.for.end:4710// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4711// CHECK9: omp.loop.exit:4712// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])4713// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44714// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 04715// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4716// CHECK9: .omp.final.then:4717// CHECK9-NEXT: store i32 100, ptr [[I]], align 44718// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4719// CHECK9: .omp.final.done:4720// CHECK9-NEXT: ret void4721//4722//4723// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined4724// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {4725// CHECK9-NEXT: entry:4726// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84727// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84728// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 84729// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 84730// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44731// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44732// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44733// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44734// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44735// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44736// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44737// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84738// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84739// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 84740// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 84741// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44742// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 44743// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 84744// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i324745// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 84746// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i324747// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 44748// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 44749// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44750// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44751// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84752// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 44753// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4754// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44755// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 994756// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4757// CHECK9: cond.true:4758// CHECK9-NEXT: br label [[COND_END:%.*]]4759// CHECK9: cond.false:4760// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44761// CHECK9-NEXT: br label [[COND_END]]4762// CHECK9: cond.end:4763// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]4764// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44765// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44766// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44767// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4768// CHECK9: omp.inner.for.cond:4769// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]4770// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]4771// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4772// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4773// CHECK9: omp.inner.for.body:4774// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]4775// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 14776// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4777// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]4778// CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]4779// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4780// CHECK9: omp.body.continue:4781// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4782// CHECK9: omp.inner.for.inc:4783// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]4784// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 14785// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]4786// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]4787// CHECK9: omp.inner.for.end:4788// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4789// CHECK9: omp.loop.exit:4790// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])4791// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44792// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 04793// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4794// CHECK9: .omp.final.then:4795// CHECK9-NEXT: store i32 100, ptr [[I]], align 44796// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4797// CHECK9: .omp.final.done:4798// CHECK9-NEXT: ret void4799//4800//4801// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l904802// CHECK9-SAME: () #[[ATTR1]] {4803// CHECK9-NEXT: entry:4804// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)4805// CHECK9-NEXT: ret void4806//4807//4808// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined4809// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {4810// CHECK9-NEXT: entry:4811// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84812// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84813// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44814// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44815// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44816// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44817// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44818// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44819// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44820// CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 44821// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84822// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84823// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44824// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 44825// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44826// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44827// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84828// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 44829// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4830// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44831// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 994832// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4833// CHECK9: cond.true:4834// CHECK9-NEXT: br label [[COND_END:%.*]]4835// CHECK9: cond.false:4836// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44837// CHECK9-NEXT: br label [[COND_END]]4838// CHECK9: cond.end:4839// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]4840// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 44841// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 44842// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 44843// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4844// CHECK9: omp.inner.for.cond:4845// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]4846// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]4847// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]4848// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4849// CHECK9: omp.inner.for.body:4850// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]4851// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i644852// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]4853// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i644854// CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]4855// CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]4856// CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]4857// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]4858// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]4859// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4860// CHECK9: omp.inner.for.inc:4861// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]4862// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]4863// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]4864// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]4865// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]4866// CHECK9: omp.inner.for.end:4867// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4868// CHECK9: omp.loop.exit:4869// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])4870// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44871// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 04872// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4873// CHECK9: .omp.final.then:4874// CHECK9-NEXT: store i32 100, ptr [[I]], align 44875// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4876// CHECK9: .omp.final.done:4877// CHECK9-NEXT: ret void4878//4879//4880// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined4881// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {4882// CHECK9-NEXT: entry:4883// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84884// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84885// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 84886// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 84887// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44888// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44889// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44890// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44891// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44892// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44893// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44894// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84895// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84896// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 84897// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 84898// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44899// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 44900// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 84901// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i324902// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 84903// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i324904// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 44905// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 44906// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44907// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44908// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84909// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 44910// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4911// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44912// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 994913// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4914// CHECK9: cond.true:4915// CHECK9-NEXT: br label [[COND_END:%.*]]4916// CHECK9: cond.false:4917// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44918// CHECK9-NEXT: br label [[COND_END]]4919// CHECK9: cond.end:4920// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]4921// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44922// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44923// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44924// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4925// CHECK9: omp.inner.for.cond:4926// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]4927// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]4928// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4929// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4930// CHECK9: omp.inner.for.body:4931// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]4932// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 14933// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4934// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]4935// CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]4936// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4937// CHECK9: omp.body.continue:4938// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4939// CHECK9: omp.inner.for.inc:4940// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]4941// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 14942// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]4943// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]4944// CHECK9: omp.inner.for.end:4945// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4946// CHECK9: omp.loop.exit:4947// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])4948// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44949// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 04950// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4951// CHECK9: .omp.final.then:4952// CHECK9-NEXT: store i32 100, ptr [[I]], align 44953// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]4954// CHECK9: .omp.final.done:4955// CHECK9-NEXT: ret void4956//4957//4958// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l994959// CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {4960// CHECK9-NEXT: entry:4961// CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 84962// CHECK9-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 84963// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])4964// CHECK9-NEXT: ret void4965//4966//4967// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined4968// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {4969// CHECK9-NEXT: entry:4970// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 84971// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 84972// CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 84973// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44974// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 44975// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 44976// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 44977// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44978// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44979// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 44980// CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 44981// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 84982// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 84983// CHECK9-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 84984// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 84985// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 44986// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 44987// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44988// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44989// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 84990// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44991// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4992// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44993// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 994994// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4995// CHECK9: cond.true:4996// CHECK9-NEXT: br label [[COND_END:%.*]]4997// CHECK9: cond.false:4998// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 44999// CHECK9-NEXT: br label [[COND_END]]5000// CHECK9: cond.end:5001// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5002// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45003// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45004// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45005// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5006// CHECK9: omp.inner.for.cond:5007// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]5008// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]5009// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5010// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5011// CHECK9: omp.inner.for.body:5012// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]5013// CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i645014// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]5015// CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i645016// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]5017// CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 05018// CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]5019// CHECK9: omp_if.then:5020// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]5021// CHECK9-NEXT: br label [[OMP_IF_END:%.*]]5022// CHECK9: omp_if.else:5023// CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]5024// CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]5025// CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]5026// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]5027// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]5028// CHECK9-NEXT: br label [[OMP_IF_END]]5029// CHECK9: omp_if.end:5030// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5031// CHECK9: omp.inner.for.inc:5032// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]5033// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]5034// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]5035// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]5036// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]5037// CHECK9: omp.inner.for.end:5038// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5039// CHECK9: omp.loop.exit:5040// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5041// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45042// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 05043// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5044// CHECK9: .omp.final.then:5045// CHECK9-NEXT: store i32 100, ptr [[I]], align 45046// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5047// CHECK9: .omp.final.done:5048// CHECK9-NEXT: ret void5049//5050//5051// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined5052// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {5053// CHECK9-NEXT: entry:5054// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85055// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85056// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85057// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85058// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45059// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45060// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45061// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45062// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45063// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45064// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45065// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85066// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85067// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85068// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85069// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45070// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 45071// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85072// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i325073// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85074// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i325075// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45076// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 45077// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45078// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45079// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85080// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45081// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5082// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45083// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 995084// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5085// CHECK9: cond.true:5086// CHECK9-NEXT: br label [[COND_END:%.*]]5087// CHECK9: cond.false:5088// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45089// CHECK9-NEXT: br label [[COND_END]]5090// CHECK9: cond.end:5091// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]5092// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45093// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45094// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 45095// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5096// CHECK9: omp.inner.for.cond:5097// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]5098// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]5099// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]5100// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5101// CHECK9: omp.inner.for.body:5102// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]5103// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 15104// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5105// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]5106// CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]5107// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5108// CHECK9: omp.body.continue:5109// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5110// CHECK9: omp.inner.for.inc:5111// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]5112// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 15113// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]5114// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]5115// CHECK9: omp.inner.for.end:5116// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5117// CHECK9: omp.loop.exit:5118// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])5119// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45120// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 05121// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5122// CHECK9: .omp.final.then:5123// CHECK9-NEXT: store i32 100, ptr [[I]], align 45124// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5125// CHECK9: .omp.final.done:5126// CHECK9-NEXT: ret void5127//5128//5129// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_5130// CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {5131// CHECK9-NEXT: entry:5132// CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 45133// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45134// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 85135// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 45136// CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85137// CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 85138// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 85139// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 85140// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 85141// CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 45142// CHECK9-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85143// CHECK9-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 45144// CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 05145// CHECK9-NEXT: store i32 3, ptr [[TMP0]], align 45146// CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 15147// CHECK9-NEXT: store i32 0, ptr [[TMP1]], align 45148// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 25149// CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 85150// CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 35151// CHECK9-NEXT: store ptr null, ptr [[TMP3]], align 85152// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 45153// CHECK9-NEXT: store ptr null, ptr [[TMP4]], align 85154// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 55155// CHECK9-NEXT: store ptr null, ptr [[TMP5]], align 85156// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 65157// CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 85158// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 75159// CHECK9-NEXT: store ptr null, ptr [[TMP7]], align 85160// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 85161// CHECK9-NEXT: store i64 100, ptr [[TMP8]], align 85162// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 95163// CHECK9-NEXT: store i64 0, ptr [[TMP9]], align 85164// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 105165// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 45166// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 115167// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 45168// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 125169// CHECK9-NEXT: store i32 0, ptr [[TMP12]], align 45170// CHECK9-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])5171// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 05172// CHECK9-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]5173// CHECK9: omp_offload.failed:5174// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]5175// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]5176// CHECK9: omp_offload.cont:5177// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 05178// CHECK9-NEXT: store i32 3, ptr [[TMP15]], align 45179// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 15180// CHECK9-NEXT: store i32 0, ptr [[TMP16]], align 45181// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 25182// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 85183// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 35184// CHECK9-NEXT: store ptr null, ptr [[TMP18]], align 85185// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 45186// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 85187// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 55188// CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 85189// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 65190// CHECK9-NEXT: store ptr null, ptr [[TMP21]], align 85191// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 75192// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 85193// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 85194// CHECK9-NEXT: store i64 100, ptr [[TMP23]], align 85195// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 95196// CHECK9-NEXT: store i64 0, ptr [[TMP24]], align 85197// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 105198// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 45199// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 115200// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 45201// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 125202// CHECK9-NEXT: store i32 0, ptr [[TMP27]], align 45203// CHECK9-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])5204// CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 05205// CHECK9-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]5206// CHECK9: omp_offload.failed3:5207// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]5208// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]5209// CHECK9: omp_offload.cont4:5210// CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 45211// CHECK9-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 45212// CHECK9-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 85213// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 05214// CHECK9-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 85215// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 05216// CHECK9-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 85217// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 05218// CHECK9-NEXT: store ptr null, ptr [[TMP34]], align 85219// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 05220// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 05221// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 05222// CHECK9-NEXT: store i32 3, ptr [[TMP37]], align 45223// CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 15224// CHECK9-NEXT: store i32 1, ptr [[TMP38]], align 45225// CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 25226// CHECK9-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 85227// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 35228// CHECK9-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 85229// CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 45230// CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP41]], align 85231// CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 55232// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP42]], align 85233// CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 65234// CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 85235// CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 75236// CHECK9-NEXT: store ptr null, ptr [[TMP44]], align 85237// CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 85238// CHECK9-NEXT: store i64 100, ptr [[TMP45]], align 85239// CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 95240// CHECK9-NEXT: store i64 0, ptr [[TMP46]], align 85241// CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 105242// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 45243// CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 115244// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 45245// CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 125246// CHECK9-NEXT: store i32 0, ptr [[TMP49]], align 45247// CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])5248// CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 05249// CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]5250// CHECK9: omp_offload.failed7:5251// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]5252// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT8]]5253// CHECK9: omp_offload.cont8:5254// CHECK9-NEXT: ret i32 05255//5256//5257// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l595258// CHECK9-SAME: () #[[ATTR1]] {5259// CHECK9-NEXT: entry:5260// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)5261// CHECK9-NEXT: ret void5262//5263//5264// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined5265// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {5266// CHECK9-NEXT: entry:5267// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85268// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85269// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45270// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45271// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45272// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45273// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45274// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45275// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45276// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85277// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85278// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45279// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 45280// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45281// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45282// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85283// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 45284// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5285// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45286// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 995287// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5288// CHECK9: cond.true:5289// CHECK9-NEXT: br label [[COND_END:%.*]]5290// CHECK9: cond.false:5291// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45292// CHECK9-NEXT: br label [[COND_END]]5293// CHECK9: cond.end:5294// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]5295// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45296// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45297// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 45298// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5299// CHECK9: omp.inner.for.cond:5300// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]5301// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]5302// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]5303// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5304// CHECK9: omp.inner.for.body:5305// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]5306// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i645307// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]5308// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i645309// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]5310// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5311// CHECK9: omp.inner.for.inc:5312// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]5313// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]5314// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]5315// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]5316// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]5317// CHECK9: omp.inner.for.end:5318// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5319// CHECK9: omp.loop.exit:5320// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])5321// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45322// CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 05323// CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5324// CHECK9: .omp.final.then:5325// CHECK9-NEXT: store i32 100, ptr [[I]], align 45326// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5327// CHECK9: .omp.final.done:5328// CHECK9-NEXT: ret void5329//5330//5331// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined5332// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {5333// CHECK9-NEXT: entry:5334// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85335// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85336// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85337// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85338// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45339// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45340// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45341// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45342// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45343// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45344// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45345// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85346// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85347// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85348// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85349// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45350// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 45351// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85352// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i325353// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85354// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i325355// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45356// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 45357// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45358// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45359// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85360// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45361// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5362// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45363// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 995364// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5365// CHECK9: cond.true:5366// CHECK9-NEXT: br label [[COND_END:%.*]]5367// CHECK9: cond.false:5368// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45369// CHECK9-NEXT: br label [[COND_END]]5370// CHECK9: cond.end:5371// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]5372// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45373// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45374// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 45375// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5376// CHECK9: omp.inner.for.cond:5377// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]5378// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]5379// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]5380// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5381// CHECK9: omp.inner.for.body:5382// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]5383// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 15384// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5385// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]5386// CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]5387// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5388// CHECK9: omp.body.continue:5389// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5390// CHECK9: omp.inner.for.inc:5391// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]5392// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 15393// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]5394// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]5395// CHECK9: omp.inner.for.end:5396// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5397// CHECK9: omp.loop.exit:5398// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])5399// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45400// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 05401// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5402// CHECK9: .omp.final.then:5403// CHECK9-NEXT: store i32 100, ptr [[I]], align 45404// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5405// CHECK9: .omp.final.done:5406// CHECK9-NEXT: ret void5407//5408//5409// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l655410// CHECK9-SAME: () #[[ATTR1]] {5411// CHECK9-NEXT: entry:5412// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)5413// CHECK9-NEXT: ret void5414//5415//5416// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined5417// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {5418// CHECK9-NEXT: entry:5419// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85420// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85421// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45422// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45423// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45424// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45425// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45426// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45427// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45428// CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 45429// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85430// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85431// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45432// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 45433// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45434// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45435// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85436// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 45437// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5438// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45439// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 995440// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5441// CHECK9: cond.true:5442// CHECK9-NEXT: br label [[COND_END:%.*]]5443// CHECK9: cond.false:5444// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45445// CHECK9-NEXT: br label [[COND_END]]5446// CHECK9: cond.end:5447// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]5448// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45449// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45450// CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 45451// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5452// CHECK9: omp.inner.for.cond:5453// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]5454// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]5455// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]5456// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5457// CHECK9: omp.inner.for.body:5458// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]5459// CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i645460// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]5461// CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i645462// CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]5463// CHECK9-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]5464// CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]5465// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]5466// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]5467// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5468// CHECK9: omp.inner.for.inc:5469// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]5470// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]5471// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]5472// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]5473// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]5474// CHECK9: omp.inner.for.end:5475// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5476// CHECK9: omp.loop.exit:5477// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])5478// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45479// CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 05480// CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5481// CHECK9: .omp.final.then:5482// CHECK9-NEXT: store i32 100, ptr [[I]], align 45483// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5484// CHECK9: .omp.final.done:5485// CHECK9-NEXT: ret void5486//5487//5488// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined5489// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {5490// CHECK9-NEXT: entry:5491// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85492// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85493// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85494// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85495// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45496// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45497// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45498// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45499// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45500// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45501// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45502// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85503// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85504// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85505// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85506// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45507// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 45508// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85509// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i325510// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85511// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i325512// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45513// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 45514// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45515// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45516// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85517// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45518// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5519// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45520// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 995521// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5522// CHECK9: cond.true:5523// CHECK9-NEXT: br label [[COND_END:%.*]]5524// CHECK9: cond.false:5525// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45526// CHECK9-NEXT: br label [[COND_END]]5527// CHECK9: cond.end:5528// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]5529// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45530// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45531// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 45532// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5533// CHECK9: omp.inner.for.cond:5534// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]5535// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]5536// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]5537// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5538// CHECK9: omp.inner.for.body:5539// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]5540// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 15541// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5542// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]5543// CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]5544// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5545// CHECK9: omp.body.continue:5546// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5547// CHECK9: omp.inner.for.inc:5548// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]5549// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 15550// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]5551// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]5552// CHECK9: omp.inner.for.end:5553// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5554// CHECK9: omp.loop.exit:5555// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])5556// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45557// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 05558// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5559// CHECK9: .omp.final.then:5560// CHECK9-NEXT: store i32 100, ptr [[I]], align 45561// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5562// CHECK9: .omp.final.done:5563// CHECK9-NEXT: ret void5564//5565//5566// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l715567// CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {5568// CHECK9-NEXT: entry:5569// CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 85570// CHECK9-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 85571// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])5572// CHECK9-NEXT: ret void5573//5574//5575// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined5576// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {5577// CHECK9-NEXT: entry:5578// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85579// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85580// CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 85581// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45582// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45583// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45584// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45585// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45586// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45587// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45588// CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 45589// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85590// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85591// CHECK9-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 85592// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 85593// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45594// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 45595// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45596// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45597// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85598// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45599// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5600// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45601// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 995602// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5603// CHECK9: cond.true:5604// CHECK9-NEXT: br label [[COND_END:%.*]]5605// CHECK9: cond.false:5606// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45607// CHECK9-NEXT: br label [[COND_END]]5608// CHECK9: cond.end:5609// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5610// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45611// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45612// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45613// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5614// CHECK9: omp.inner.for.cond:5615// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]5616// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]5617// CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5618// CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5619// CHECK9: omp.inner.for.body:5620// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]5621// CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i645622// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]5623// CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i645624// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]5625// CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 05626// CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]5627// CHECK9: omp_if.then:5628// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]5629// CHECK9-NEXT: br label [[OMP_IF_END:%.*]]5630// CHECK9: omp_if.else:5631// CHECK9-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]5632// CHECK9-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]5633// CHECK9-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]5634// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]5635// CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]5636// CHECK9-NEXT: br label [[OMP_IF_END]]5637// CHECK9: omp_if.end:5638// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5639// CHECK9: omp.inner.for.inc:5640// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]5641// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]5642// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]5643// CHECK9-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]5644// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]5645// CHECK9: omp.inner.for.end:5646// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5647// CHECK9: omp.loop.exit:5648// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5649// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45650// CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 05651// CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5652// CHECK9: .omp.final.then:5653// CHECK9-NEXT: store i32 100, ptr [[I]], align 45654// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5655// CHECK9: .omp.final.done:5656// CHECK9-NEXT: ret void5657//5658//5659// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined5660// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {5661// CHECK9-NEXT: entry:5662// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85663// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85664// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85665// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85666// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45667// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 45668// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45669// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45670// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45671// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45672// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 45673// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85674// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85675// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85676// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85677// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45678// CHECK9-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 45679// CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85680// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i325681// CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85682// CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i325683// CHECK9-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45684// CHECK9-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 45685// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45686// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45687// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85688// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45689// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5690// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45691// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 995692// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5693// CHECK9: cond.true:5694// CHECK9-NEXT: br label [[COND_END:%.*]]5695// CHECK9: cond.false:5696// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45697// CHECK9-NEXT: br label [[COND_END]]5698// CHECK9: cond.end:5699// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]5700// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45701// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45702// CHECK9-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 45703// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5704// CHECK9: omp.inner.for.cond:5705// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]5706// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]5707// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]5708// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5709// CHECK9: omp.inner.for.body:5710// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]5711// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 15712// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5713// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]5714// CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]5715// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5716// CHECK9: omp.body.continue:5717// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5718// CHECK9: omp.inner.for.inc:5719// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]5720// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 15721// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]5722// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]5723// CHECK9: omp.inner.for.end:5724// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5725// CHECK9: omp.loop.exit:5726// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])5727// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45728// CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 05729// CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5730// CHECK9: .omp.final.then:5731// CHECK9-NEXT: store i32 100, ptr [[I]], align 45732// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]5733// CHECK9: .omp.final.done:5734// CHECK9-NEXT: ret void5735//5736//5737// CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv5738// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {5739// CHECK11-NEXT: entry:5740// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 45741// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 85742// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 45743// CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85744// CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 05745// CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 45746// CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 15747// CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 45748// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 25749// CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 85750// CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 35751// CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 85752// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 45753// CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 85754// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 55755// CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 85756// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 65757// CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 85758// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 75759// CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 85760// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 85761// CHECK11-NEXT: store i64 100, ptr [[TMP8]], align 85762// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 95763// CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 85764// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 105765// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 45766// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 115767// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 45768// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 125769// CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 45770// CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])5771// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 05772// CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]5773// CHECK11: omp_offload.failed:5774// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]5775// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]5776// CHECK11: omp_offload.cont:5777// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 05778// CHECK11-NEXT: store i32 3, ptr [[TMP15]], align 45779// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 15780// CHECK11-NEXT: store i32 0, ptr [[TMP16]], align 45781// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 25782// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 85783// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 35784// CHECK11-NEXT: store ptr null, ptr [[TMP18]], align 85785// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 45786// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 85787// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 55788// CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 85789// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 65790// CHECK11-NEXT: store ptr null, ptr [[TMP21]], align 85791// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 75792// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 85793// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 85794// CHECK11-NEXT: store i64 100, ptr [[TMP23]], align 85795// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 95796// CHECK11-NEXT: store i64 0, ptr [[TMP24]], align 85797// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 105798// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 45799// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 115800// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 45801// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 125802// CHECK11-NEXT: store i32 0, ptr [[TMP27]], align 45803// CHECK11-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])5804// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 05805// CHECK11-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]5806// CHECK11: omp_offload.failed3:5807// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]5808// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]5809// CHECK11: omp_offload.cont4:5810// CHECK11-NEXT: ret void5811//5812//5813// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l435814// CHECK11-SAME: () #[[ATTR1:[0-9]+]] {5815// CHECK11-NEXT: entry:5816// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)5817// CHECK11-NEXT: ret void5818//5819//5820// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined5821// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {5822// CHECK11-NEXT: entry:5823// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85824// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85825// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45826// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 45827// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45828// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45829// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45830// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45831// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 45832// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85833// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85834// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45835// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 45836// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45837// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45838// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85839// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 45840// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5841// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45842// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 995843// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5844// CHECK11: cond.true:5845// CHECK11-NEXT: br label [[COND_END:%.*]]5846// CHECK11: cond.false:5847// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45848// CHECK11-NEXT: br label [[COND_END]]5849// CHECK11: cond.end:5850// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]5851// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 45852// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 45853// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 45854// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5855// CHECK11: omp.inner.for.cond:5856// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]5857// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]5858// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]5859// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5860// CHECK11: omp.inner.for.body:5861// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]5862// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i645863// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]5864// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i645865// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]5866// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5867// CHECK11: omp.inner.for.inc:5868// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]5869// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]5870// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]5871// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]5872// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]5873// CHECK11: omp.inner.for.end:5874// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5875// CHECK11: omp.loop.exit:5876// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])5877// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45878// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 05879// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5880// CHECK11: .omp.final.then:5881// CHECK11-NEXT: store i32 100, ptr [[I]], align 45882// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]5883// CHECK11: .omp.final.done:5884// CHECK11-NEXT: ret void5885//5886//5887// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined5888// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {5889// CHECK11-NEXT: entry:5890// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85891// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85892// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 85893// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 85894// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45895// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 45896// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45897// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45898// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45899// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45900// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 45901// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85902// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85903// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 85904// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 85905// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45906// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 45907// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 85908// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i325909// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 85910// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i325911// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 45912// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 45913// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45914// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45915// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85916// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45917// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5918// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45919// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 995920// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5921// CHECK11: cond.true:5922// CHECK11-NEXT: br label [[COND_END:%.*]]5923// CHECK11: cond.false:5924// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45925// CHECK11-NEXT: br label [[COND_END]]5926// CHECK11: cond.end:5927// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]5928// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45929// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45930// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 45931// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5932// CHECK11: omp.inner.for.cond:5933// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]5934// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]5935// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]5936// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5937// CHECK11: omp.inner.for.body:5938// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5939// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 15940// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5941// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]5942// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5943// CHECK11: omp.body.continue:5944// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5945// CHECK11: omp.inner.for.inc:5946// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5947// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 15948// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]5949// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]5950// CHECK11: omp.inner.for.end:5951// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5952// CHECK11: omp.loop.exit:5953// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])5954// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45955// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 05956// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5957// CHECK11: .omp.final.then:5958// CHECK11-NEXT: store i32 100, ptr [[I]], align 45959// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]5960// CHECK11: .omp.final.done:5961// CHECK11-NEXT: ret void5962//5963//5964// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l485965// CHECK11-SAME: () #[[ATTR1]] {5966// CHECK11-NEXT: entry:5967// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)5968// CHECK11-NEXT: ret void5969//5970//5971// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined5972// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {5973// CHECK11-NEXT: entry:5974// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85975// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85976// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45977// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 45978// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 45979// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 45980// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45981// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45982// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 45983// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 45984// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85985// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85986// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 45987// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 45988// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45989// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45990// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85991// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 45992// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5993// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 45994// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 995995// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5996// CHECK11: cond.true:5997// CHECK11-NEXT: br label [[COND_END:%.*]]5998// CHECK11: cond.false:5999// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46000// CHECK11-NEXT: br label [[COND_END]]6001// CHECK11: cond.end:6002// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]6003// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46004// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46005// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 46006// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6007// CHECK11: omp.inner.for.cond:6008// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]6009// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]6010// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]6011// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6012// CHECK11: omp.inner.for.body:6013// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]6014// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i646015// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]6016// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i646017// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]6018// CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]6019// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]6020// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]6021// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]6022// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6023// CHECK11: omp.inner.for.inc:6024// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]6025// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]6026// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]6027// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]6028// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]6029// CHECK11: omp.inner.for.end:6030// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6031// CHECK11: omp.loop.exit:6032// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])6033// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46034// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 06035// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6036// CHECK11: .omp.final.then:6037// CHECK11-NEXT: store i32 100, ptr [[I]], align 46038// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6039// CHECK11: .omp.final.done:6040// CHECK11-NEXT: ret void6041//6042//6043// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined6044// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {6045// CHECK11-NEXT: entry:6046// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86047// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86048// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86049// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86050// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46051// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46052// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46053// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46054// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46055// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46056// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46057// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86058// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86059// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86060// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86061// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46062// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 46063// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86064// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i326065// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86066// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i326067// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46068// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46069// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46070// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46071// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86072// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46073// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6074// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46075// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996076// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6077// CHECK11: cond.true:6078// CHECK11-NEXT: br label [[COND_END:%.*]]6079// CHECK11: cond.false:6080// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46081// CHECK11-NEXT: br label [[COND_END]]6082// CHECK11: cond.end:6083// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6084// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46085// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46086// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46087// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6088// CHECK11: omp.inner.for.cond:6089// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]6090// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]6091// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6092// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6093// CHECK11: omp.inner.for.body:6094// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]6095// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16096// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6097// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]6098// CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]6099// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6100// CHECK11: omp.body.continue:6101// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6102// CHECK11: omp.inner.for.inc:6103// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]6104// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 16105// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]6106// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]6107// CHECK11: omp.inner.for.end:6108// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6109// CHECK11: omp.loop.exit:6110// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])6111// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46112// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 06113// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6114// CHECK11: .omp.final.then:6115// CHECK11-NEXT: store i32 100, ptr [[I]], align 46116// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6117// CHECK11: .omp.final.done:6118// CHECK11-NEXT: ret void6119//6120//6121// CHECK11-LABEL: define {{[^@]+}}@main6122// CHECK11-SAME: () #[[ATTR3:[0-9]+]] {6123// CHECK11-NEXT: entry:6124// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 46125// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46126// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 86127// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 46128// CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86129// CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 86130// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 86131// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 86132// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 86133// CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 46134// CHECK11-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86135// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 46136// CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 06137// CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 46138// CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 16139// CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 46140// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 26141// CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 86142// CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 36143// CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 86144// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 46145// CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 86146// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 56147// CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 86148// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 66149// CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 86150// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 76151// CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 86152// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 86153// CHECK11-NEXT: store i64 100, ptr [[TMP8]], align 86154// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 96155// CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 86156// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 106157// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 46158// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 116159// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 46160// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 126161// CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 46162// CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])6163// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 06164// CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]6165// CHECK11: omp_offload.failed:6166// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]6167// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]6168// CHECK11: omp_offload.cont:6169// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 06170// CHECK11-NEXT: store i32 3, ptr [[TMP15]], align 46171// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 16172// CHECK11-NEXT: store i32 0, ptr [[TMP16]], align 46173// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 26174// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 86175// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 36176// CHECK11-NEXT: store ptr null, ptr [[TMP18]], align 86177// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 46178// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 86179// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 56180// CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 86181// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 66182// CHECK11-NEXT: store ptr null, ptr [[TMP21]], align 86183// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 76184// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 86185// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 86186// CHECK11-NEXT: store i64 100, ptr [[TMP23]], align 86187// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 96188// CHECK11-NEXT: store i64 0, ptr [[TMP24]], align 86189// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 106190// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 46191// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 116192// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 46193// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 126194// CHECK11-NEXT: store i32 0, ptr [[TMP27]], align 46195// CHECK11-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])6196// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 06197// CHECK11-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]6198// CHECK11: omp_offload.failed3:6199// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]6200// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]6201// CHECK11: omp_offload.cont4:6202// CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr @Arg, align 46203// CHECK11-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 46204// CHECK11-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 86205// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06206// CHECK11-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 86207// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06208// CHECK11-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 86209// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 06210// CHECK11-NEXT: store ptr null, ptr [[TMP34]], align 86211// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06212// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06213// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 06214// CHECK11-NEXT: store i32 3, ptr [[TMP37]], align 46215// CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 16216// CHECK11-NEXT: store i32 1, ptr [[TMP38]], align 46217// CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 26218// CHECK11-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 86219// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 36220// CHECK11-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 86221// CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 46222// CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP41]], align 86223// CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 56224// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP42]], align 86225// CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 66226// CHECK11-NEXT: store ptr null, ptr [[TMP43]], align 86227// CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 76228// CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 86229// CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 86230// CHECK11-NEXT: store i64 100, ptr [[TMP45]], align 86231// CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 96232// CHECK11-NEXT: store i64 0, ptr [[TMP46]], align 86233// CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 106234// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 46235// CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 116236// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 46237// CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 126238// CHECK11-NEXT: store i32 0, ptr [[TMP49]], align 46239// CHECK11-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])6240// CHECK11-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 06241// CHECK11-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]6242// CHECK11: omp_offload.failed7:6243// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]6244// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT8]]6245// CHECK11: omp_offload.cont8:6246// CHECK11-NEXT: [[TMP52:%.*]] = load i32, ptr @Arg, align 46247// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])6248// CHECK11-NEXT: ret i32 [[CALL]]6249//6250//6251// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l816252// CHECK11-SAME: () #[[ATTR1]] {6253// CHECK11-NEXT: entry:6254// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)6255// CHECK11-NEXT: ret void6256//6257//6258// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined6259// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {6260// CHECK11-NEXT: entry:6261// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86262// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86263// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46264// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46265// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46266// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46267// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46268// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46269// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46270// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86271// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86272// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46273// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 46274// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46275// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46276// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86277// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 46278// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6279// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46280// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 996281// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6282// CHECK11: cond.true:6283// CHECK11-NEXT: br label [[COND_END:%.*]]6284// CHECK11: cond.false:6285// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46286// CHECK11-NEXT: br label [[COND_END]]6287// CHECK11: cond.end:6288// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]6289// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46290// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46291// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 46292// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6293// CHECK11: omp.inner.for.cond:6294// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]6295// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]6296// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]6297// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6298// CHECK11: omp.inner.for.body:6299// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]6300// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i646301// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]6302// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i646303// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]6304// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6305// CHECK11: omp.inner.for.inc:6306// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]6307// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]6308// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]6309// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]6310// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]6311// CHECK11: omp.inner.for.end:6312// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6313// CHECK11: omp.loop.exit:6314// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])6315// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46316// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 06317// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6318// CHECK11: .omp.final.then:6319// CHECK11-NEXT: store i32 100, ptr [[I]], align 46320// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6321// CHECK11: .omp.final.done:6322// CHECK11-NEXT: ret void6323//6324//6325// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined6326// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {6327// CHECK11-NEXT: entry:6328// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86329// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86330// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86331// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86332// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46333// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46334// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46335// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46336// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46337// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46338// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46339// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86340// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86341// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86342// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86343// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46344// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 46345// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86346// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i326347// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86348// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i326349// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46350// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46351// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46352// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46353// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86354// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46355// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6356// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46357// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996358// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6359// CHECK11: cond.true:6360// CHECK11-NEXT: br label [[COND_END:%.*]]6361// CHECK11: cond.false:6362// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46363// CHECK11-NEXT: br label [[COND_END]]6364// CHECK11: cond.end:6365// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6366// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46367// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46368// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46369// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6370// CHECK11: omp.inner.for.cond:6371// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]6372// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]6373// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6374// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6375// CHECK11: omp.inner.for.body:6376// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]6377// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16378// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6379// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]6380// CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]6381// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6382// CHECK11: omp.body.continue:6383// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6384// CHECK11: omp.inner.for.inc:6385// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]6386// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 16387// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]6388// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]6389// CHECK11: omp.inner.for.end:6390// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6391// CHECK11: omp.loop.exit:6392// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])6393// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46394// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 06395// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6396// CHECK11: .omp.final.then:6397// CHECK11-NEXT: store i32 100, ptr [[I]], align 46398// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6399// CHECK11: .omp.final.done:6400// CHECK11-NEXT: ret void6401//6402//6403// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l906404// CHECK11-SAME: () #[[ATTR1]] {6405// CHECK11-NEXT: entry:6406// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)6407// CHECK11-NEXT: ret void6408//6409//6410// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined6411// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {6412// CHECK11-NEXT: entry:6413// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86414// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86415// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46416// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46417// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46418// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46419// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46420// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46421// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46422// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 46423// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86424// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86425// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46426// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 46427// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46428// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46429// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86430// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 46431// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6432// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46433// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 996434// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6435// CHECK11: cond.true:6436// CHECK11-NEXT: br label [[COND_END:%.*]]6437// CHECK11: cond.false:6438// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46439// CHECK11-NEXT: br label [[COND_END]]6440// CHECK11: cond.end:6441// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]6442// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46443// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46444// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 46445// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6446// CHECK11: omp.inner.for.cond:6447// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46448// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46449// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]6450// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6451// CHECK11: omp.inner.for.body:6452// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46453// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i646454// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46455// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i646456// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])6457// CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86458// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 46459// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]6460// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])6461// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6462// CHECK11: omp.inner.for.inc:6463// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46464// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46465// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]6466// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46467// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]6468// CHECK11: omp.inner.for.end:6469// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6470// CHECK11: omp.loop.exit:6471// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])6472// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46473// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 06474// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6475// CHECK11: .omp.final.then:6476// CHECK11-NEXT: store i32 100, ptr [[I]], align 46477// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6478// CHECK11: .omp.final.done:6479// CHECK11-NEXT: ret void6480//6481//6482// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined6483// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {6484// CHECK11-NEXT: entry:6485// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86486// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86487// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86488// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86489// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46490// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46491// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46492// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46493// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46494// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46495// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46496// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86497// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86498// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86499// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86500// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46501// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 46502// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86503// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i326504// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86505// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i326506// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46507// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46508// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46509// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46510// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86511// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46512// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6513// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46514// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996515// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6516// CHECK11: cond.true:6517// CHECK11-NEXT: br label [[COND_END:%.*]]6518// CHECK11: cond.false:6519// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46520// CHECK11-NEXT: br label [[COND_END]]6521// CHECK11: cond.end:6522// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6523// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46524// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46525// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46526// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6527// CHECK11: omp.inner.for.cond:6528// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46529// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46530// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6531// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6532// CHECK11: omp.inner.for.body:6533// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46534// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16535// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6536// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 46537// CHECK11-NEXT: call void @_Z3fn5v()6538// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6539// CHECK11: omp.body.continue:6540// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6541// CHECK11: omp.inner.for.inc:6542// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46543// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 16544// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 46545// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]6546// CHECK11: omp.inner.for.end:6547// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6548// CHECK11: omp.loop.exit:6549// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])6550// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46551// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 06552// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6553// CHECK11: .omp.final.then:6554// CHECK11-NEXT: store i32 100, ptr [[I]], align 46555// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6556// CHECK11: .omp.final.done:6557// CHECK11-NEXT: ret void6558//6559//6560// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l996561// CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {6562// CHECK11-NEXT: entry:6563// CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 86564// CHECK11-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 86565// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])6566// CHECK11-NEXT: ret void6567//6568//6569// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined6570// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {6571// CHECK11-NEXT: entry:6572// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86573// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86574// CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 86575// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 16576// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46577// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46578// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 46579// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 46580// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46581// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46582// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46583// CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 86584// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 46585// CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 86586// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR16:%.*]] = alloca i32, align 46587// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86588// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86589// CHECK11-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 86590// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 86591// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 46592// CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 06593// CHECK11-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i86594// CHECK11-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 16595// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 46596// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 46597// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46598// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46599// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86600// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46601// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6602// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46603// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996604// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6605// CHECK11: cond.true:6606// CHECK11-NEXT: br label [[COND_END:%.*]]6607// CHECK11: cond.false:6608// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46609// CHECK11-NEXT: br label [[COND_END]]6610// CHECK11: cond.end:6611// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6612// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 46613// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46614// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46615// CHECK11-NEXT: [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16616// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i16617// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]6618// CHECK11: omp_if.then:6619// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6620// CHECK11: omp.inner.for.cond:6621// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]6622// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]6623// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]6624// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6625// CHECK11: omp.inner.for.body:6626// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]6627// CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i646628// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]6629// CHECK11-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i646630// CHECK11-NEXT: [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]6631// CHECK11-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i16632// CHECK11-NEXT: [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i86633// CHECK11-NEXT: store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]6634// CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]6635// CHECK11-NEXT: [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]6636// CHECK11-NEXT: [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i16637// CHECK11-NEXT: br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]6638// CHECK11: omp_if.then5:6639// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]6640// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]6641// CHECK11: omp_if.else:6642// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]6643// CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]6644// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]6645// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP17]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]6646// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]6647// CHECK11-NEXT: br label [[OMP_IF_END]]6648// CHECK11: omp_if.end:6649// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6650// CHECK11: omp.inner.for.inc:6651// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]6652// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]6653// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]6654// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]6655// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]6656// CHECK11: omp.inner.for.end:6657// CHECK11-NEXT: br label [[OMP_IF_END21:%.*]]6658// CHECK11: omp_if.else6:6659// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]6660// CHECK11: omp.inner.for.cond7:6661// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46662// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46663// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]6664// CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END20:%.*]]6665// CHECK11: omp.inner.for.body9:6666// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 46667// CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i646668// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 46669// CHECK11-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i646670// CHECK11-NEXT: [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16671// CHECK11-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i16672// CHECK11-NEXT: [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i86673// CHECK11-NEXT: store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 16674// CHECK11-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 86675// CHECK11-NEXT: [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16676// CHECK11-NEXT: [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i16677// CHECK11-NEXT: br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]6678// CHECK11: omp_if.then14:6679// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])6680// CHECK11-NEXT: br label [[OMP_IF_END17:%.*]]6681// CHECK11: omp_if.else15:6682// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])6683// CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86684// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR16]], align 46685// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1(ptr [[TMP29]], ptr [[DOTBOUND_ZERO_ADDR16]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]6686// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])6687// CHECK11-NEXT: br label [[OMP_IF_END17]]6688// CHECK11: omp_if.end17:6689// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC18:%.*]]6690// CHECK11: omp.inner.for.inc18:6691// CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46692// CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46693// CHECK11-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]6694// CHECK11-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 46695// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]6696// CHECK11: omp.inner.for.end20:6697// CHECK11-NEXT: br label [[OMP_IF_END21]]6698// CHECK11: omp_if.end21:6699// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6700// CHECK11: omp.loop.exit:6701// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6702// CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46703// CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 06704// CHECK11-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6705// CHECK11: .omp.final.then:6706// CHECK11-NEXT: store i32 100, ptr [[I]], align 46707// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6708// CHECK11: .omp.final.done:6709// CHECK11-NEXT: ret void6710//6711//6712// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined6713// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {6714// CHECK11-NEXT: entry:6715// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86716// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86717// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86718// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86719// CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86720// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46721// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46722// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46723// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46724// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46725// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46726// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46727// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86728// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86729// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86730// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86731// CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86732// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46733// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 46734// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86735// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i326736// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86737// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i326738// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46739// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46740// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46741// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46742// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 16743// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i16744// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]6745// CHECK11: omp_if.then:6746// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86747// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 46748// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6749// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46750// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 996751// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6752// CHECK11: cond.true:6753// CHECK11-NEXT: br label [[COND_END:%.*]]6754// CHECK11: cond.false:6755// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46756// CHECK11-NEXT: br label [[COND_END]]6757// CHECK11: cond.end:6758// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]6759// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46760// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46761// CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 46762// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6763// CHECK11: omp.inner.for.cond:6764// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]6765// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]6766// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]6767// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6768// CHECK11: omp.inner.for.body:6769// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]6770// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 16771// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6772// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]6773// CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]6774// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6775// CHECK11: omp.body.continue:6776// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6777// CHECK11: omp.inner.for.inc:6778// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]6779// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 16780// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]6781// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]6782// CHECK11: omp.inner.for.end:6783// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]6784// CHECK11: omp_if.else:6785// CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86786// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 46787// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6788// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46789// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 996790// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]6791// CHECK11: cond.true5:6792// CHECK11-NEXT: br label [[COND_END7:%.*]]6793// CHECK11: cond.false6:6794// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46795// CHECK11-NEXT: br label [[COND_END7]]6796// CHECK11: cond.end7:6797// CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]6798// CHECK11-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 46799// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46800// CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 46801// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]]6802// CHECK11: omp.inner.for.cond9:6803// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46804// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46805// CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]6806// CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]6807// CHECK11: omp.inner.for.body11:6808// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46809// CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 16810// CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]6811// CHECK11-NEXT: store i32 [[ADD13]], ptr [[I]], align 46812// CHECK11-NEXT: call void @_Z3fn6v()6813// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]6814// CHECK11: omp.body.continue14:6815// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]6816// CHECK11: omp.inner.for.inc15:6817// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46818// CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 16819// CHECK11-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 46820// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]6821// CHECK11: omp.inner.for.end17:6822// CHECK11-NEXT: br label [[OMP_IF_END]]6823// CHECK11: omp_if.end:6824// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6825// CHECK11: omp.loop.exit:6826// CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86827// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 46828// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])6829// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46830// CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 06831// CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6832// CHECK11: .omp.final.then:6833// CHECK11-NEXT: store i32 100, ptr [[I]], align 46834// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6835// CHECK11: .omp.final.done:6836// CHECK11-NEXT: ret void6837//6838//6839// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.16840// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {6841// CHECK11-NEXT: entry:6842// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86843// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86844// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 86845// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 86846// CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 86847// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46848// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46849// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46850// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46851// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46852// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46853// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 46854// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86855// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86856// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 86857// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 86858// CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 86859// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46860// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 46861// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 86862// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i326863// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 86864// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i326865// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 46866// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 46867// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46868// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46869// CHECK11-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 16870// CHECK11-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i16871// CHECK11-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]6872// CHECK11: omp_if.then:6873// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86874// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 46875// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6876// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46877// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 996878// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6879// CHECK11: cond.true:6880// CHECK11-NEXT: br label [[COND_END:%.*]]6881// CHECK11: cond.false:6882// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46883// CHECK11-NEXT: br label [[COND_END]]6884// CHECK11: cond.end:6885// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]6886// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46887// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46888// CHECK11-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 46889// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6890// CHECK11: omp.inner.for.cond:6891// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]6892// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]6893// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]6894// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6895// CHECK11: omp.inner.for.body:6896// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]6897// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 16898// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6899// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]6900// CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]6901// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6902// CHECK11: omp.body.continue:6903// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6904// CHECK11: omp.inner.for.inc:6905// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]6906// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 16907// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]6908// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]6909// CHECK11: omp.inner.for.end:6910// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]6911// CHECK11: omp_if.else:6912// CHECK11-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86913// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 46914// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6915// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46916// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 996917// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]6918// CHECK11: cond.true5:6919// CHECK11-NEXT: br label [[COND_END7:%.*]]6920// CHECK11: cond.false6:6921// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46922// CHECK11-NEXT: br label [[COND_END7]]6923// CHECK11: cond.end7:6924// CHECK11-NEXT: [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]6925// CHECK11-NEXT: store i32 [[COND8]], ptr [[DOTOMP_UB]], align 46926// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46927// CHECK11-NEXT: store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 46928// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9:%.*]]6929// CHECK11: omp.inner.for.cond9:6930// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46931// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46932// CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]6933// CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]6934// CHECK11: omp.inner.for.body11:6935// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46936// CHECK11-NEXT: [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 16937// CHECK11-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]6938// CHECK11-NEXT: store i32 [[ADD13]], ptr [[I]], align 46939// CHECK11-NEXT: call void @_Z3fn6v()6940// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]6941// CHECK11: omp.body.continue14:6942// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]6943// CHECK11: omp.inner.for.inc15:6944// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46945// CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP20]], 16946// CHECK11-NEXT: store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 46947// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]6948// CHECK11: omp.inner.for.end17:6949// CHECK11-NEXT: br label [[OMP_IF_END]]6950// CHECK11: omp_if.end:6951// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6952// CHECK11: omp.loop.exit:6953// CHECK11-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86954// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 46955// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])6956// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46957// CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 06958// CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6959// CHECK11: .omp.final.then:6960// CHECK11-NEXT: store i32 100, ptr [[I]], align 46961// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]6962// CHECK11: .omp.final.done:6963// CHECK11-NEXT: ret void6964//6965//6966// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_6967// CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {6968// CHECK11-NEXT: entry:6969// CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 46970// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 46971// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 86972// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 46973// CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86974// CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 86975// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 86976// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 86977// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 86978// CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 46979// CHECK11-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 86980// CHECK11-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 46981// CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 06982// CHECK11-NEXT: store i32 3, ptr [[TMP0]], align 46983// CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 16984// CHECK11-NEXT: store i32 0, ptr [[TMP1]], align 46985// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 26986// CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 86987// CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 36988// CHECK11-NEXT: store ptr null, ptr [[TMP3]], align 86989// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 46990// CHECK11-NEXT: store ptr null, ptr [[TMP4]], align 86991// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 56992// CHECK11-NEXT: store ptr null, ptr [[TMP5]], align 86993// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 66994// CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 86995// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 76996// CHECK11-NEXT: store ptr null, ptr [[TMP7]], align 86997// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 86998// CHECK11-NEXT: store i64 100, ptr [[TMP8]], align 86999// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 97000// CHECK11-NEXT: store i64 0, ptr [[TMP9]], align 87001// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 107002// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 47003// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 117004// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 47005// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 127006// CHECK11-NEXT: store i32 0, ptr [[TMP12]], align 47007// CHECK11-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])7008// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 07009// CHECK11-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]7010// CHECK11: omp_offload.failed:7011// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]7012// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]7013// CHECK11: omp_offload.cont:7014// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 07015// CHECK11-NEXT: store i32 3, ptr [[TMP15]], align 47016// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 17017// CHECK11-NEXT: store i32 0, ptr [[TMP16]], align 47018// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 27019// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 87020// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 37021// CHECK11-NEXT: store ptr null, ptr [[TMP18]], align 87022// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 47023// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 87024// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 57025// CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 87026// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 67027// CHECK11-NEXT: store ptr null, ptr [[TMP21]], align 87028// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 77029// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 87030// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 87031// CHECK11-NEXT: store i64 100, ptr [[TMP23]], align 87032// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 97033// CHECK11-NEXT: store i64 0, ptr [[TMP24]], align 87034// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 107035// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP25]], align 47036// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 117037// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP26]], align 47038// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 127039// CHECK11-NEXT: store i32 0, ptr [[TMP27]], align 47040// CHECK11-NEXT: [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])7041// CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 07042// CHECK11-NEXT: br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]7043// CHECK11: omp_offload.failed3:7044// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]7045// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]7046// CHECK11: omp_offload.cont4:7047// CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 47048// CHECK11-NEXT: store i32 [[TMP30]], ptr [[ARG_CASTED]], align 47049// CHECK11-NEXT: [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 87050// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 07051// CHECK11-NEXT: store i64 [[TMP31]], ptr [[TMP32]], align 87052// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 07053// CHECK11-NEXT: store i64 [[TMP31]], ptr [[TMP33]], align 87054// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 07055// CHECK11-NEXT: store ptr null, ptr [[TMP34]], align 87056// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 07057// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 07058// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 07059// CHECK11-NEXT: store i32 3, ptr [[TMP37]], align 47060// CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 17061// CHECK11-NEXT: store i32 1, ptr [[TMP38]], align 47062// CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 27063// CHECK11-NEXT: store ptr [[TMP35]], ptr [[TMP39]], align 87064// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 37065// CHECK11-NEXT: store ptr [[TMP36]], ptr [[TMP40]], align 87066// CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 47067// CHECK11-NEXT: store ptr @.offload_sizes.2, ptr [[TMP41]], align 87068// CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 57069// CHECK11-NEXT: store ptr @.offload_maptypes.3, ptr [[TMP42]], align 87070// CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 67071// CHECK11-NEXT: store ptr null, ptr [[TMP43]], align 87072// CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 77073// CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 87074// CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 87075// CHECK11-NEXT: store i64 100, ptr [[TMP45]], align 87076// CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 97077// CHECK11-NEXT: store i64 0, ptr [[TMP46]], align 87078// CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 107079// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 47080// CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 117081// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP48]], align 47082// CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 127083// CHECK11-NEXT: store i32 0, ptr [[TMP49]], align 47084// CHECK11-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])7085// CHECK11-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 07086// CHECK11-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]7087// CHECK11: omp_offload.failed7:7088// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]7089// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT8]]7090// CHECK11: omp_offload.cont8:7091// CHECK11-NEXT: ret i32 07092//7093//7094// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l597095// CHECK11-SAME: () #[[ATTR1]] {7096// CHECK11-NEXT: entry:7097// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)7098// CHECK11-NEXT: ret void7099//7100//7101// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined7102// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {7103// CHECK11-NEXT: entry:7104// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87105// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87106// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47107// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47108// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47109// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47110// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47111// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47112// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47113// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87114// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87115// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47116// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 47117// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47118// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47119// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87120// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 47121// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7122// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47123// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 997124// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7125// CHECK11: cond.true:7126// CHECK11-NEXT: br label [[COND_END:%.*]]7127// CHECK11: cond.false:7128// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47129// CHECK11-NEXT: br label [[COND_END]]7130// CHECK11: cond.end:7131// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]7132// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47133// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47134// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 47135// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7136// CHECK11: omp.inner.for.cond:7137// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]7138// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]7139// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]7140// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7141// CHECK11: omp.inner.for.body:7142// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]7143// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i647144// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]7145// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i647146// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]7147// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7148// CHECK11: omp.inner.for.inc:7149// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]7150// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]7151// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]7152// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]7153// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]7154// CHECK11: omp.inner.for.end:7155// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7156// CHECK11: omp.loop.exit:7157// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])7158// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47159// CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 07160// CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7161// CHECK11: .omp.final.then:7162// CHECK11-NEXT: store i32 100, ptr [[I]], align 47163// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7164// CHECK11: .omp.final.done:7165// CHECK11-NEXT: ret void7166//7167//7168// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined7169// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {7170// CHECK11-NEXT: entry:7171// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87172// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87173// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 87174// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 87175// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47176// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47177// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47178// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47179// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47180// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47181// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47182// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87183// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87184// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 87185// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 87186// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47187// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47188// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 87189// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i327190// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 87191// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i327192// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 47193// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 47194// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47195// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47196// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87197// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47198// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7199// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47200// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 997201// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7202// CHECK11: cond.true:7203// CHECK11-NEXT: br label [[COND_END:%.*]]7204// CHECK11: cond.false:7205// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47206// CHECK11-NEXT: br label [[COND_END]]7207// CHECK11: cond.end:7208// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7209// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47210// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47211// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47212// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7213// CHECK11: omp.inner.for.cond:7214// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]7215// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]7216// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7217// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7218// CHECK11: omp.inner.for.body:7219// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]7220// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17221// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7222// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]7223// CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]7224// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7225// CHECK11: omp.body.continue:7226// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7227// CHECK11: omp.inner.for.inc:7228// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]7229// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 17230// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]7231// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]7232// CHECK11: omp.inner.for.end:7233// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7234// CHECK11: omp.loop.exit:7235// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])7236// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47237// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 07238// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7239// CHECK11: .omp.final.then:7240// CHECK11-NEXT: store i32 100, ptr [[I]], align 47241// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7242// CHECK11: .omp.final.done:7243// CHECK11-NEXT: ret void7244//7245//7246// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l657247// CHECK11-SAME: () #[[ATTR1]] {7248// CHECK11-NEXT: entry:7249// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)7250// CHECK11-NEXT: ret void7251//7252//7253// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined7254// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {7255// CHECK11-NEXT: entry:7256// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87257// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87258// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47259// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47260// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47261// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47262// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47263// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47264// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47265// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 47266// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87267// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87268// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47269// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 47270// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47271// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47272// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87273// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 47274// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7275// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47276// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 997277// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7278// CHECK11: cond.true:7279// CHECK11-NEXT: br label [[COND_END:%.*]]7280// CHECK11: cond.false:7281// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47282// CHECK11-NEXT: br label [[COND_END]]7283// CHECK11: cond.end:7284// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]7285// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47286// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47287// CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 47288// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7289// CHECK11: omp.inner.for.cond:7290// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47291// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47292// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]7293// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7294// CHECK11: omp.inner.for.body:7295// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47296// CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i647297// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47298// CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i647299// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])7300// CHECK11-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87301// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 47302// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]7303// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])7304// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7305// CHECK11: omp.inner.for.inc:7306// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47307// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47308// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]7309// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 47310// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]7311// CHECK11: omp.inner.for.end:7312// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7313// CHECK11: omp.loop.exit:7314// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])7315// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47316// CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 07317// CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7318// CHECK11: .omp.final.then:7319// CHECK11-NEXT: store i32 100, ptr [[I]], align 47320// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7321// CHECK11: .omp.final.done:7322// CHECK11-NEXT: ret void7323//7324//7325// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined7326// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {7327// CHECK11-NEXT: entry:7328// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87329// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87330// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 87331// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 87332// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47333// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47334// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47335// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47336// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47337// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47338// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47339// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87340// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87341// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 87342// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 87343// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47344// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47345// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 87346// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i327347// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 87348// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i327349// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 47350// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 47351// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47352// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47353// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87354// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47355// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7356// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47357// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 997358// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7359// CHECK11: cond.true:7360// CHECK11-NEXT: br label [[COND_END:%.*]]7361// CHECK11: cond.false:7362// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47363// CHECK11-NEXT: br label [[COND_END]]7364// CHECK11: cond.end:7365// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7366// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47367// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47368// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47369// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7370// CHECK11: omp.inner.for.cond:7371// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47372// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47373// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7374// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7375// CHECK11: omp.inner.for.body:7376// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47377// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17378// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7379// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 47380// CHECK11-NEXT: call void @_Z3fn2v()7381// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7382// CHECK11: omp.body.continue:7383// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7384// CHECK11: omp.inner.for.inc:7385// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47386// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 17387// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 47388// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]7389// CHECK11: omp.inner.for.end:7390// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7391// CHECK11: omp.loop.exit:7392// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])7393// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47394// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 07395// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7396// CHECK11: .omp.final.then:7397// CHECK11-NEXT: store i32 100, ptr [[I]], align 47398// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7399// CHECK11: .omp.final.done:7400// CHECK11-NEXT: ret void7401//7402//7403// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l717404// CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {7405// CHECK11-NEXT: entry:7406// CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 87407// CHECK11-NEXT: store i64 [[ARG]], ptr [[ARG_ADDR]], align 87408// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])7409// CHECK11-NEXT: ret void7410//7411//7412// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined7413// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {7414// CHECK11-NEXT: entry:7415// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87416// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87417// CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca ptr, align 87418// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47419// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47420// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 47421// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 47422// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47423// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47424// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47425// CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 47426// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87427// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87428// CHECK11-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]], align 87429// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 87430// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 47431// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 47432// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47433// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47434// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87435// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 47436// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7437// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47438// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 997439// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7440// CHECK11: cond.true:7441// CHECK11-NEXT: br label [[COND_END:%.*]]7442// CHECK11: cond.false:7443// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 47444// CHECK11-NEXT: br label [[COND_END]]7445// CHECK11: cond.end:7446// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]7447// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 47448// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 47449// CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 47450// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7451// CHECK11: omp.inner.for.cond:7452// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]7453// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]7454// CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7455// CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7456// CHECK11: omp.inner.for.body:7457// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]7458// CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i647459// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]7460// CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i647461// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]7462// CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 07463// CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]7464// CHECK11: omp_if.then:7465// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]7466// CHECK11-NEXT: br label [[OMP_IF_END:%.*]]7467// CHECK11: omp_if.else:7468// CHECK11-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]7469// CHECK11-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]7470// CHECK11-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]7471// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]7472// CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]7473// CHECK11-NEXT: br label [[OMP_IF_END]]7474// CHECK11: omp_if.end:7475// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7476// CHECK11: omp.inner.for.inc:7477// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]7478// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]7479// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]7480// CHECK11-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]7481// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]7482// CHECK11: omp.inner.for.end:7483// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7484// CHECK11: omp.loop.exit:7485// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])7486// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47487// CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 07488// CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7489// CHECK11: .omp.final.then:7490// CHECK11-NEXT: store i32 100, ptr [[I]], align 47491// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7492// CHECK11: .omp.final.done:7493// CHECK11-NEXT: ret void7494//7495//7496// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined7497// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {7498// CHECK11-NEXT: entry:7499// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87500// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87501// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 87502// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 87503// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47504// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 47505// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47506// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47507// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47508// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47509// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 47510// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87511// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87512// CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 87513// CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 87514// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47515// CHECK11-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47516// CHECK11-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 87517// CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i327518// CHECK11-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 87519// CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i327520// CHECK11-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 47521// CHECK11-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 47522// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47523// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47524// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87525// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47526// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7527// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47528// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 997529// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7530// CHECK11: cond.true:7531// CHECK11-NEXT: br label [[COND_END:%.*]]7532// CHECK11: cond.false:7533// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47534// CHECK11-NEXT: br label [[COND_END]]7535// CHECK11: cond.end:7536// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7537// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47538// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47539// CHECK11-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47540// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7541// CHECK11: omp.inner.for.cond:7542// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]7543// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]7544// CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7545// CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7546// CHECK11: omp.inner.for.body:7547// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]7548// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17549// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7550// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]7551// CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]7552// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7553// CHECK11: omp.body.continue:7554// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7555// CHECK11: omp.inner.for.inc:7556// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]7557// CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 17558// CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]7559// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]7560// CHECK11: omp.inner.for.end:7561// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7562// CHECK11: omp.loop.exit:7563// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])7564// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47565// CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 07566// CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7567// CHECK11: .omp.final.then:7568// CHECK11-NEXT: store i32 100, ptr [[I]], align 47569// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]7570// CHECK11: .omp.final.done:7571// CHECK11-NEXT: ret void7572//7573//7574// CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv7575// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {7576// CHECK13-NEXT: entry:7577// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 47578// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47579// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47580// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47581// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 47582// CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 47583// CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 47584// CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 47585// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 47586// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 47587// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47588// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47589// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47590// CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 47591// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7592// CHECK13: omp.inner.for.cond:7593// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]7594// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]7595// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]7596// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7597// CHECK13: omp.inner.for.body:7598// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7599// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 17600// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7601// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]7602// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7603// CHECK13: omp.body.continue:7604// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7605// CHECK13: omp.inner.for.inc:7606// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7607// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 17608// CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7609// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]7610// CHECK13: omp.inner.for.end:7611// CHECK13-NEXT: store i32 100, ptr [[I]], align 47612// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 47613// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 47614// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 47615// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 47616// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]7617// CHECK13: omp.inner.for.cond7:7618// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]7619// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]7620// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7621// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]7622// CHECK13: omp.inner.for.body9:7623// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7624// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 17625// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]7626// CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]7627// CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]7628// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]7629// CHECK13: omp.body.continue12:7630// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]7631// CHECK13: omp.inner.for.inc13:7632// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7633// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 17634// CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7635// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]7636// CHECK13: omp.inner.for.end15:7637// CHECK13-NEXT: store i32 100, ptr [[I6]], align 47638// CHECK13-NEXT: ret void7639//7640//7641// CHECK13-LABEL: define {{[^@]+}}@main7642// CHECK13-SAME: () #[[ATTR1:[0-9]+]] {7643// CHECK13-NEXT: entry:7644// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 47645// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 47646// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47647// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47648// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47649// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 47650// CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 47651// CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 47652// CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 47653// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 47654// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 47655// CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 47656// CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 47657// CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 47658// CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 47659// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 47660// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 47661// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47662// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47663// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47664// CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 47665// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7666// CHECK13: omp.inner.for.cond:7667// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]7668// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]7669// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]7670// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7671// CHECK13: omp.inner.for.body:7672// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7673// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 17674// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7675// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]7676// CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]7677// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7678// CHECK13: omp.body.continue:7679// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7680// CHECK13: omp.inner.for.inc:7681// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7682// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 17683// CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7684// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]7685// CHECK13: omp.inner.for.end:7686// CHECK13-NEXT: store i32 100, ptr [[I]], align 47687// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 47688// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 47689// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 47690// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 47691// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]7692// CHECK13: omp.inner.for.cond7:7693// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]7694// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]7695// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7696// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]7697// CHECK13: omp.inner.for.body9:7698// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]7699// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 17700// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]7701// CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]7702// CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]7703// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]7704// CHECK13: omp.body.continue12:7705// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]7706// CHECK13: omp.inner.for.inc13:7707// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]7708// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 17709// CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]7710// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]7711// CHECK13: omp.inner.for.end15:7712// CHECK13-NEXT: store i32 100, ptr [[I6]], align 47713// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 47714// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 47715// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 47716// CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 47717// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]7718// CHECK13: omp.inner.for.cond21:7719// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]7720// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]7721// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]7722// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]7723// CHECK13: omp.inner.for.body23:7724// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]7725// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 17726// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]7727// CHECK13-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]7728// CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]7729// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]7730// CHECK13: omp.body.continue26:7731// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]7732// CHECK13: omp.inner.for.inc27:7733// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]7734// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 17735// CHECK13-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]7736// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]7737// CHECK13: omp.inner.for.end29:7738// CHECK13-NEXT: store i32 100, ptr [[I20]], align 47739// CHECK13-NEXT: [[TMP15:%.*]] = load i32, ptr @Arg, align 47740// CHECK13-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])7741// CHECK13-NEXT: ret i32 [[CALL]]7742//7743//7744// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_7745// CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {7746// CHECK13-NEXT: entry:7747// CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 47748// CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 47749// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47750// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47751// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47752// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 47753// CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 47754// CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 47755// CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 47756// CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 47757// CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 47758// CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 47759// CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 47760// CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 47761// CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 47762// CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 47763// CHECK13-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 47764// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47765// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47766// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47767// CHECK13-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 47768// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7769// CHECK13: omp.inner.for.cond:7770// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]7771// CHECK13-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]7772// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]7773// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7774// CHECK13: omp.inner.for.body:7775// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]7776// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 17777// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7778// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]7779// CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]7780// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7781// CHECK13: omp.body.continue:7782// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7783// CHECK13: omp.inner.for.inc:7784// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]7785// CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 17786// CHECK13-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]7787// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]7788// CHECK13: omp.inner.for.end:7789// CHECK13-NEXT: store i32 100, ptr [[I]], align 47790// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 47791// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 47792// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 47793// CHECK13-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 47794// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]7795// CHECK13: omp.inner.for.cond7:7796// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]7797// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]7798// CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7799// CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]7800// CHECK13: omp.inner.for.body9:7801// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]7802// CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 17803// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]7804// CHECK13-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]7805// CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]7806// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]7807// CHECK13: omp.body.continue12:7808// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]7809// CHECK13: omp.inner.for.inc13:7810// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]7811// CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 17812// CHECK13-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]7813// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]7814// CHECK13: omp.inner.for.end15:7815// CHECK13-NEXT: store i32 100, ptr [[I6]], align 47816// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 47817// CHECK13-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 47818// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 47819// CHECK13-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 47820// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]7821// CHECK13: omp.inner.for.cond21:7822// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]7823// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]7824// CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]7825// CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]7826// CHECK13: omp.inner.for.body23:7827// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]7828// CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 17829// CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]7830// CHECK13-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]7831// CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]7832// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]7833// CHECK13: omp.body.continue26:7834// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]7835// CHECK13: omp.inner.for.inc27:7836// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]7837// CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 17838// CHECK13-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]7839// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]7840// CHECK13: omp.inner.for.end29:7841// CHECK13-NEXT: store i32 100, ptr [[I20]], align 47842// CHECK13-NEXT: ret i32 07843//7844//7845// CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv7846// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {7847// CHECK15-NEXT: entry:7848// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47849// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47850// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47851// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47852// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47853// CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 47854// CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 47855// CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 47856// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 47857// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 47858// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47859// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47860// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47861// CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 47862// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7863// CHECK15: omp.inner.for.cond:7864// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]7865// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]7866// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]7867// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7868// CHECK15: omp.inner.for.body:7869// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7870// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 17871// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7872// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]7873// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7874// CHECK15: omp.body.continue:7875// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7876// CHECK15: omp.inner.for.inc:7877// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7878// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 17879// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]7880// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]7881// CHECK15: omp.inner.for.end:7882// CHECK15-NEXT: store i32 100, ptr [[I]], align 47883// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 47884// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 47885// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 47886// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 47887// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]7888// CHECK15: omp.inner.for.cond7:7889// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]7890// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]7891// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7892// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]7893// CHECK15: omp.inner.for.body9:7894// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7895// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 17896// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]7897// CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]7898// CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]7899// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]7900// CHECK15: omp.body.continue12:7901// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]7902// CHECK15: omp.inner.for.inc13:7903// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7904// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 17905// CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]7906// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]7907// CHECK15: omp.inner.for.end15:7908// CHECK15-NEXT: store i32 100, ptr [[I6]], align 47909// CHECK15-NEXT: ret void7910//7911//7912// CHECK15-LABEL: define {{[^@]+}}@main7913// CHECK15-SAME: () #[[ATTR1:[0-9]+]] {7914// CHECK15-NEXT: entry:7915// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 47916// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 47917// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47918// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47919// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47920// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 47921// CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 47922// CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 47923// CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 47924// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 47925// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 47926// CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 17927// CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 47928// CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 47929// CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 47930// CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 47931// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 47932// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 47933// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47934// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 47935// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47936// CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 47937// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7938// CHECK15: omp.inner.for.cond:7939// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]7940// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]7941// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]7942// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7943// CHECK15: omp.inner.for.body:7944// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7945// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 17946// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7947// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]7948// CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]7949// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7950// CHECK15: omp.body.continue:7951// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7952// CHECK15: omp.inner.for.inc:7953// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7954// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 17955// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]7956// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]7957// CHECK15: omp.inner.for.end:7958// CHECK15-NEXT: store i32 100, ptr [[I]], align 47959// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 47960// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 47961// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 47962// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 47963// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]7964// CHECK15: omp.inner.for.cond7:7965// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 47966// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 47967// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]7968// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]7969// CHECK15: omp.inner.for.body9:7970// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 47971// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 17972// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]7973// CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 47974// CHECK15-NEXT: call void @_Z3fn5v()7975// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]7976// CHECK15: omp.body.continue12:7977// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]7978// CHECK15: omp.inner.for.inc13:7979// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 47980// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 17981// CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 47982// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]7983// CHECK15: omp.inner.for.end15:7984// CHECK15-NEXT: store i32 100, ptr [[I6]], align 47985// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr @Arg, align 47986// CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 07987// CHECK15-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i87988// CHECK15-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 17989// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 47990// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 47991// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 47992// CHECK15-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 47993// CHECK15-NEXT: [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17994// CHECK15-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i17995// CHECK15-NEXT: br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]7996// CHECK15: omp_if.then:7997// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]7998// CHECK15: omp.inner.for.cond21:7999// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]8000// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]8001// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]8002// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]8003// CHECK15: omp.inner.for.body23:8004// CHECK15-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]8005// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 18006// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]8007// CHECK15-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]8008// CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]8009// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]8010// CHECK15: omp.body.continue26:8011// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]8012// CHECK15: omp.inner.for.inc27:8013// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]8014// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP16]], 18015// CHECK15-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]8016// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]8017// CHECK15: omp.inner.for.end29:8018// CHECK15-NEXT: br label [[OMP_IF_END:%.*]]8019// CHECK15: omp_if.else:8020// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND30:%.*]]8021// CHECK15: omp.inner.for.cond30:8022// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 48023// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 48024// CHECK15-NEXT: [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]8025// CHECK15-NEXT: br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]8026// CHECK15: omp.inner.for.body32:8027// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 48028// CHECK15-NEXT: [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 18029// CHECK15-NEXT: [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]8030// CHECK15-NEXT: store i32 [[ADD34]], ptr [[I20]], align 48031// CHECK15-NEXT: call void @_Z3fn6v()8032// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]8033// CHECK15: omp.body.continue35:8034// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]8035// CHECK15: omp.inner.for.inc36:8036// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 48037// CHECK15-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP20]], 18038// CHECK15-NEXT: store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 48039// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]8040// CHECK15: omp.inner.for.end38:8041// CHECK15-NEXT: br label [[OMP_IF_END]]8042// CHECK15: omp_if.end:8043// CHECK15-NEXT: store i32 100, ptr [[I20]], align 48044// CHECK15-NEXT: [[TMP21:%.*]] = load i32, ptr @Arg, align 48045// CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])8046// CHECK15-NEXT: ret i32 [[CALL]]8047//8048//8049// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_8050// CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {8051// CHECK15-NEXT: entry:8052// CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 48053// CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 48054// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48055// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48056// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48057// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 48058// CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 48059// CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 48060// CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 48061// CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 48062// CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 48063// CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 48064// CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 48065// CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 48066// CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 48067// CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 48068// CHECK15-NEXT: store i32 [[ARG]], ptr [[ARG_ADDR]], align 48069// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48070// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 48071// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48072// CHECK15-NEXT: store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 48073// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8074// CHECK15: omp.inner.for.cond:8075// CHECK15-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]8076// CHECK15-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]8077// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]8078// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8079// CHECK15: omp.inner.for.body:8080// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]8081// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 18082// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8083// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]8084// CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]8085// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8086// CHECK15: omp.body.continue:8087// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8088// CHECK15: omp.inner.for.inc:8089// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]8090// CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 18091// CHECK15-NEXT: store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]8092// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]8093// CHECK15: omp.inner.for.end:8094// CHECK15-NEXT: store i32 100, ptr [[I]], align 48095// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB3]], align 48096// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB4]], align 48097// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 48098// CHECK15-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 48099// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]8100// CHECK15: omp.inner.for.cond7:8101// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 48102// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 48103// CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8104// CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]8105// CHECK15: omp.inner.for.body9:8106// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 48107// CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 18108// CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]8109// CHECK15-NEXT: store i32 [[ADD11]], ptr [[I6]], align 48110// CHECK15-NEXT: call void @_Z3fn2v()8111// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]8112// CHECK15: omp.body.continue12:8113// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]8114// CHECK15: omp.inner.for.inc13:8115// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 48116// CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 18117// CHECK15-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 48118// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]8119// CHECK15: omp.inner.for.end15:8120// CHECK15-NEXT: store i32 100, ptr [[I6]], align 48121// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB17]], align 48122// CHECK15-NEXT: store i32 99, ptr [[DOTOMP_UB18]], align 48123// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 48124// CHECK15-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 48125// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]8126// CHECK15: omp.inner.for.cond21:8127// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]8128// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]8129// CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]8130// CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]8131// CHECK15: omp.inner.for.body23:8132// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]8133// CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 18134// CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]8135// CHECK15-NEXT: store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]8136// CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]8137// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]8138// CHECK15: omp.body.continue26:8139// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]8140// CHECK15: omp.inner.for.inc27:8141// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]8142// CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 18143// CHECK15-NEXT: store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]8144// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]8145// CHECK15: omp.inner.for.end29:8146// CHECK15-NEXT: store i32 100, ptr [[I20]], align 48147// CHECK15-NEXT: ret i32 08148//8149