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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target50  #pragma omp teams51#pragma omp distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var)52  for (int i = 0; i < 2; ++i) {53    vec[i] = t_var;54    s_arr[i] = var;55  }56  return T();57}58 59int main() {60  static int svar;61  volatile double g;62  volatile double &g1 = g;63 64  #ifdef LAMBDA65  [&]() {66    static float sfvar;67 68    #pragma omp target69    #pragma omp teams70#pragma omp distribute parallel for simd lastprivate(g, g1, svar, sfvar)71    for (int i = 0; i < 2; ++i) {72      // loop variables73 74      // init addr alloca's75 76      // init private variables77 78 79      // linear counter80 81      // lastprivate82 83 84 85      g = 1;86      g1 = 1;87      svar = 3;88      sfvar = 4.0;89      // outlined function for 'parallel for'90 91      // addr alloca's92 93      // loop variables94 95      // private alloca's96 97            // init addr alloca's98 99      // init private variables100 101 102 103      // loop body104 105 106      // lastprivate107 108      [&]() {109	g = 2;110	g1 = 2;111	svar = 4;112	sfvar = 8.0;113 114      }();115    }116  }();117  return 0;118  #else119  S<float> test;120  int t_var = 0;121  int vec[] = {1, 2};122  S<float> s_arr[] = {1, 2};123  S<float> &var = test;124 125  #pragma omp target126  #pragma omp teams127#pragma omp distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)128  for (int i = 0; i < 2; ++i) {129    vec[i] = t_var;130    s_arr[i] = var;131  }132  int i;133 134  return tmain<int>();135  #endif136}137 138 139// skip loop variables140 141// copy from parameters to local address variables142 143// load content of local address variables144 145// call constructor for s_arr146 147// the distribute loop148 149 150// lastprivates151 152 153// outlined function for 'parallel for'154 155// skip loop variables156 157// copy from parameters to local address variables158 159// load content of local address variables160 161// call constructor for s_arr162 163 164// loop body165// assignment: vec[i] = t_var;166 167// assignment: s_arr[i] = var;168 169 170// lastprivates171 172 173// template tmain174 175 176// skip alloca of global_tid and bound_tid177// skip loop variables178 179// skip init of bound and global tid180// copy from parameters to local address variables181 182// load content of local address variables183 184 185 186// lastprivates187 188 189// outlined function for 'parallel for'190 191// skip loop variables192 193// copy from parameters to local address variables194 195// load content of local address variables196 197// call constructor for s_arr198 199 200// assignment: vec[i] = t_var;201 202// assignment: s_arr[i] = var;203 204 205// lastprivates206 207 208#endif209 210// CHECK1-LABEL: define {{[^@]+}}@main211// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {212// CHECK1-NEXT:  entry:213// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4214// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8215// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8216// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8217// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4218// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8219// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0220// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8221// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1222// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]223// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8224// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])225// CHECK1-NEXT:    ret i32 0226//227//228// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68229// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {230// CHECK1-NEXT:  entry:231// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8232// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8233// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8234// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8235// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8236// CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8237// CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8238// CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8239// CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8240// CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8241// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]242// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])243// CHECK1-NEXT:    ret void244//245//246// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined247// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {248// CHECK1-NEXT:  entry:249// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8250// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8251// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8252// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8253// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8254// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8255// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8256// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8257// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4258// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4259// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4260// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4261// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4262// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4263// CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8264// CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8265// CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8266// CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4267// CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4268// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4269// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8270// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8271// CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8272// CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8273// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8274// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8275// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]276// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]277// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7:![0-9]+]]278// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7]]279// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8280// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]281// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8282// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4283// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4284// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4285// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4286// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META5]], !align [[META6]]287// CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8288// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8289// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4290// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)291// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4292// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1293// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]294// CHECK1:       cond.true:295// CHECK1-NEXT:    br label [[COND_END:%.*]]296// CHECK1:       cond.false:297// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4298// CHECK1-NEXT:    br label [[COND_END]]299// CHECK1:       cond.end:300// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]301// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4302// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4303// CHECK1-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4304// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]305// CHECK1:       omp.inner.for.cond:306// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]307// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]308// CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]309// CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]310// CHECK1:       omp.inner.for.body:311// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP8]]312// CHECK1-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i64313// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]314// CHECK1-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64315// CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP8]]316// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP14]], i64 [[TMP16]], ptr [[G3]], ptr [[TMP17]], ptr [[SVAR6]], ptr [[SFVAR7]]), !llvm.access.group [[ACC_GRP8]]317// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]318// CHECK1:       omp.inner.for.inc:319// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]320// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP8]]321// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]322// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]323// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]324// CHECK1:       omp.inner.for.end:325// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]326// CHECK1:       omp.loop.exit:327// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])328// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4329// CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0330// CHECK1-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]331// CHECK1:       .omp.final.then:332// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4333// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]334// CHECK1:       .omp.final.done:335// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4336// CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0337// CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]338// CHECK1:       .omp.lastprivate.then:339// CHECK1-NEXT:    [[TMP24:%.*]] = load double, ptr [[G3]], align 8340// CHECK1-NEXT:    store volatile double [[TMP24]], ptr [[TMP0]], align 8341// CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 8342// CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8343// CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP5]], align 8344// CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[SVAR6]], align 4345// CHECK1-NEXT:    store i32 [[TMP27]], ptr [[TMP2]], align 4346// CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[SFVAR7]], align 4347// CHECK1-NEXT:    store float [[TMP28]], ptr [[TMP3]], align 4348// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]349// CHECK1:       .omp.lastprivate.done:350// CHECK1-NEXT:    ret void351//352//353// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined354// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {355// CHECK1-NEXT:  entry:356// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8357// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8358// CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8359// CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8360// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8361// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8362// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8363// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8364// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8365// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4366// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4367// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4368// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4369// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4370// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4371// CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8372// CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8373// CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8374// CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4375// CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4376// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4377// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8378// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8379// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8380// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8381// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8382// CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8383// CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8384// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8385// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8386// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]387// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]388// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7]]389// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7]]390// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8391// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4392// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4393// CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8394// CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i32395// CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8396// CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32397// CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4398// CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4399// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4400// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4401// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]402// CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8403// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8404// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4405// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)406// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4407// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1408// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]409// CHECK1:       cond.true:410// CHECK1-NEXT:    br label [[COND_END:%.*]]411// CHECK1:       cond.false:412// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4413// CHECK1-NEXT:    br label [[COND_END]]414// CHECK1:       cond.end:415// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]416// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4417// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4418// CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4419// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]420// CHECK1:       omp.inner.for.cond:421// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]422// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]423// CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]424// CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]425// CHECK1:       omp.inner.for.body:426// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]427// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1428// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]429// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]430// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP12]]431// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP12]]432// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP12]]433// CHECK1-NEXT:    store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP12]]434// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP12]]435// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0436// CHECK1-NEXT:    store ptr [[G3]], ptr [[TMP16]], align 8, !llvm.access.group [[ACC_GRP12]]437// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1438// CHECK1-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP12]]439// CHECK1-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP12]]440// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2441// CHECK1-NEXT:    store ptr [[SVAR6]], ptr [[TMP19]], align 8, !llvm.access.group [[ACC_GRP12]]442// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3443// CHECK1-NEXT:    store ptr [[SFVAR7]], ptr [[TMP20]], align 8, !llvm.access.group [[ACC_GRP12]]444// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP12]]445// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]446// CHECK1:       omp.body.continue:447// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]448// CHECK1:       omp.inner.for.inc:449// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]450// CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1451// CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]452// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]453// CHECK1:       omp.inner.for.end:454// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]455// CHECK1:       omp.loop.exit:456// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP8]])457// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4458// CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0459// CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]460// CHECK1:       .omp.final.then:461// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4462// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]463// CHECK1:       .omp.final.done:464// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4465// CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0466// CHECK1-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]467// CHECK1:       .omp.lastprivate.then:468// CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[G3]], align 8469// CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8470// CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP5]], align 8471// CHECK1-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 8472// CHECK1-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 8473// CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR6]], align 4474// CHECK1-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4475// CHECK1-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR7]], align 4476// CHECK1-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4477// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]478// CHECK1:       .omp.lastprivate.done:479// CHECK1-NEXT:    ret void480//481//482// CHECK3-LABEL: define {{[^@]+}}@main483// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {484// CHECK3-NEXT:  entry:485// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4486// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8487// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4488// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4489// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4490// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4491// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0492// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4493// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1494// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META6:![0-9]+]], !align [[META7:![0-9]+]]495// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4496// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])497// CHECK3-NEXT:    ret i32 0498//499//500// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68501// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {502// CHECK3-NEXT:  entry:503// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4504// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4505// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4506// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4507// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4508// CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8509// CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8510// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4511// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4512// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4513// CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4514// CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4515// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]516// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]517// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4518// CHECK3-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8519// CHECK3-NEXT:    store double [[TMP2]], ptr [[G2]], align 8520// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]521// CHECK3-NEXT:    [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4522// CHECK3-NEXT:    store double [[TMP4]], ptr [[G13]], align 8523// CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4524// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]]525// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])526// CHECK3-NEXT:    ret void527//528//529// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined530// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {531// CHECK3-NEXT:  entry:532// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4533// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4534// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4535// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4536// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4537// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4538// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4539// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4540// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4541// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4542// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4543// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4544// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4545// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4546// CHECK3-NEXT:    [[G3:%.*]] = alloca double, align 8547// CHECK3-NEXT:    [[G14:%.*]] = alloca double, align 8548// CHECK3-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 4549// CHECK3-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4550// CHECK3-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4551// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4552// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4553// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4554// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4555// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4556// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4557// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4558// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]559// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]560// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]561// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]562// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4563// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]564// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 4565// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4566// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4567// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4568// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4569// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META6]], !align [[META7]]570// CHECK3-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 4571// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4572// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4573// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)574// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4575// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1576// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]577// CHECK3:       cond.true:578// CHECK3-NEXT:    br label [[COND_END:%.*]]579// CHECK3:       cond.false:580// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4581// CHECK3-NEXT:    br label [[COND_END]]582// CHECK3:       cond.end:583// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]584// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4585// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4586// CHECK3-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4587// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]588// CHECK3:       omp.inner.for.cond:589// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]590// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]591// CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]592// CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]593// CHECK3:       omp.inner.for.body:594// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP8]]595// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]596// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP5]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]597// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP13]], i32 [[TMP14]], ptr [[G3]], ptr [[TMP15]], ptr [[SVAR6]], ptr [[SFVAR7]]), !llvm.access.group [[ACC_GRP8]]598// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]599// CHECK3:       omp.inner.for.inc:600// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]601// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP8]]602// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]603// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]604// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]605// CHECK3:       omp.inner.for.end:606// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]607// CHECK3:       omp.loop.exit:608// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])609// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4610// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0611// CHECK3-NEXT:    br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]612// CHECK3:       .omp.final.then:613// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4614// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]615// CHECK3:       .omp.final.done:616// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4617// CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0618// CHECK3-NEXT:    br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]619// CHECK3:       .omp.lastprivate.then:620// CHECK3-NEXT:    [[TMP22:%.*]] = load double, ptr [[G3]], align 8621// CHECK3-NEXT:    store volatile double [[TMP22]], ptr [[TMP0]], align 8622// CHECK3-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP5]], align 4623// CHECK3-NEXT:    [[TMP24:%.*]] = load double, ptr [[TMP23]], align 4624// CHECK3-NEXT:    store volatile double [[TMP24]], ptr [[TMP5]], align 4625// CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SVAR6]], align 4626// CHECK3-NEXT:    store i32 [[TMP25]], ptr [[TMP2]], align 4627// CHECK3-NEXT:    [[TMP26:%.*]] = load float, ptr [[SFVAR7]], align 4628// CHECK3-NEXT:    store float [[TMP26]], ptr [[TMP3]], align 4629// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]630// CHECK3:       .omp.lastprivate.done:631// CHECK3-NEXT:    ret void632//633//634// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined635// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {636// CHECK3-NEXT:  entry:637// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4638// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4639// CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4640// CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4641// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4642// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4643// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4644// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4645// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4646// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4647// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4648// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4649// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4650// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4651// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4652// CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8653// CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8654// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4655// CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4656// CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4657// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4658// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4659// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4660// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4661// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4662// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4663// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4664// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4665// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4666// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4667// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]668// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]669// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]670// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]671// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4672// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4673// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4674// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4675// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4676// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 4677// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4678// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4679// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4680// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]681// CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4682// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4683// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4684// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)685// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4686// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1687// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]688// CHECK3:       cond.true:689// CHECK3-NEXT:    br label [[COND_END:%.*]]690// CHECK3:       cond.false:691// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4692// CHECK3-NEXT:    br label [[COND_END]]693// CHECK3:       cond.end:694// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]695// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4696// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4697// CHECK3-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4698// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]699// CHECK3:       omp.inner.for.cond:700// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]701// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]702// CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]703// CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]704// CHECK3:       omp.inner.for.body:705// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]706// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1707// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]708// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]709// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP12]]710// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP12]]711// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP12]]712// CHECK3-NEXT:    store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP12]]713// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP12]]714// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0715// CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP12]]716// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1717// CHECK3-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP12]]718// CHECK3-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP12]]719// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2720// CHECK3-NEXT:    store ptr [[SVAR5]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP12]]721// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3722// CHECK3-NEXT:    store ptr [[SFVAR6]], ptr [[TMP20]], align 4, !llvm.access.group [[ACC_GRP12]]723// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP12]]724// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]725// CHECK3:       omp.body.continue:726// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]727// CHECK3:       omp.inner.for.inc:728// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]729// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1730// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]731// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]732// CHECK3:       omp.inner.for.end:733// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]734// CHECK3:       omp.loop.exit:735// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP8]])736// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4737// CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0738// CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]739// CHECK3:       .omp.final.then:740// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4741// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]742// CHECK3:       .omp.final.done:743// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4744// CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0745// CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]746// CHECK3:       .omp.lastprivate.then:747// CHECK3-NEXT:    [[TMP26:%.*]] = load double, ptr [[G2]], align 8748// CHECK3-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8749// CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP4]], align 4750// CHECK3-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 4751// CHECK3-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 4752// CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR5]], align 4753// CHECK3-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4754// CHECK3-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR6]], align 4755// CHECK3-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4756// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]757// CHECK3:       .omp.lastprivate.done:758// CHECK3-NEXT:    ret void759//760//761// CHECK5-LABEL: define {{[^@]+}}@main762// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {763// CHECK5-NEXT:  entry:764// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4765// CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8766// CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8767// CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8768// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4769// CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8770// CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0771// CHECK5-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8772// CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1773// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]774// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8775// CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])776// CHECK5-NEXT:    ret i32 0777//778//779// CHECK7-LABEL: define {{[^@]+}}@main780// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {781// CHECK7-NEXT:  entry:782// CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4783// CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8784// CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4785// CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4786// CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4787// CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4788// CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0789// CHECK7-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4790// CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1791// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]792// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4793// CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])794// CHECK7-NEXT:    ret i32 0795//796//797// CHECK9-LABEL: define {{[^@]+}}@main798// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {799// CHECK9-NEXT:  entry:800// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4801// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8802// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8803// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4804// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4805// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4806// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4807// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8808// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8809// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8810// CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8811// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8812// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8813// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8814// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4815// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8816// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4817// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4818// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8819// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])820// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4821// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)822// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)823// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1824// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)825// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8826// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7:![0-9]+]], !align [[META8:![0-9]+]]827// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8828// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4829// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4830// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8831// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]832// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4833// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4834// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8835// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]836// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]837// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0838// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8839// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0840// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8841// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0842// CHECK9-NEXT:    store ptr null, ptr [[TMP10]], align 8843// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1844// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 8845// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1846// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 8847// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1848// CHECK9-NEXT:    store ptr null, ptr [[TMP13]], align 8849// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2850// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 8851// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2852// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 8853// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2854// CHECK9-NEXT:    store ptr null, ptr [[TMP16]], align 8855// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3856// CHECK9-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 8857// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3858// CHECK9-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 8859// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3860// CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8861// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4862// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP20]], align 8863// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4864// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP21]], align 8865// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4866// CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8867// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0868// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0869// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0870// CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 4871// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1872// CHECK9-NEXT:    store i32 5, ptr [[TMP26]], align 4873// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2874// CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8875// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3876// CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8877// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4878// CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8879// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5880// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8881// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6882// CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8883// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7884// CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8885// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8886// CHECK9-NEXT:    store i64 2, ptr [[TMP33]], align 8887// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9888// CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8889// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10890// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4891// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11892// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4893// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12894// CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4895// CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.region_id, ptr [[KERNEL_ARGS]])896// CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0897// CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]898// CHECK9:       omp_offload.failed:899// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]900// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]901// CHECK9:       omp_offload.cont:902// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()903// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4904// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0905// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2906// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]907// CHECK9:       arraydestroy.body:908// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]909// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1910// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]911// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]912// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]913// CHECK9:       arraydestroy.done2:914// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]915// CHECK9-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4916// CHECK9-NEXT:    ret i32 [[TMP41]]917//918//919// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev920// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {921// CHECK9-NEXT:  entry:922// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8923// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8924// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8925// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])926// CHECK9-NEXT:    ret void927//928//929// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef930// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {931// CHECK9-NEXT:  entry:932// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8933// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4934// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8935// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4936// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8937// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4938// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])939// CHECK9-NEXT:    ret void940//941//942// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125943// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {944// CHECK9-NEXT:  entry:945// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8946// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8947// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8948// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8949// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8950// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8951// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8952// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8953// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8954// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8955// CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8956// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]957// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]958// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]959// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8960// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]961// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])962// CHECK9-NEXT:    ret void963//964//965// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined966// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {967// CHECK9-NEXT:  entry:968// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8969// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8970// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8971// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8972// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8973// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8974// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8975// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8976// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8977// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4978// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4979// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4980// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4981// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4982// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4983// CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4984// CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4985// CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4986// CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4987// CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8988// CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4989// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4990// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8991// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8992// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8993// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8994// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8995// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8996// CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8997// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]998// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]999// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1000// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1001// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1002// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81003// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1004// CHECK9-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 81005// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41006// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41007// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41008// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41009// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01010// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21011// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1012// CHECK9:       arrayctor.loop:1013// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1014// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1015// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11016// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1017// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1018// CHECK9:       arrayctor.cont:1019// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META7]], !align [[META8]]1020// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1021// CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81022// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81023// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41024// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1025// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41026// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 11027// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1028// CHECK9:       cond.true:1029// CHECK9-NEXT:    br label [[COND_END:%.*]]1030// CHECK9:       cond.false:1031// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41032// CHECK9-NEXT:    br label [[COND_END]]1033// CHECK9:       cond.end:1034// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1035// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41036// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41037// CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41038// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1039// CHECK9:       omp.inner.for.cond:1040// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1041// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]1042// CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]1043// CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1044// CHECK9:       omp.inner.for.cond.cleanup:1045// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1046// CHECK9:       omp.inner.for.body:1047// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]1048// CHECK9-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i641049// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]1050// CHECK9-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i641051// CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP9]]1052// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP18]], ptr [[SVAR8]]), !llvm.access.group [[ACC_GRP9]]1053// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1054// CHECK9:       omp.inner.for.inc:1055// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1056// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]1057// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]1058// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1059// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]1060// CHECK9:       omp.inner.for.end:1061// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1062// CHECK9:       omp.loop.exit:1063// CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81064// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 41065// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])1066// CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41067// CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01068// CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1069// CHECK9:       .omp.final.then:1070// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41071// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1072// CHECK9:       .omp.final.done:1073// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41074// CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 01075// CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1076// CHECK9:       .omp.lastprivate.then:1077// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR3]], align 41078// CHECK9-NEXT:    store i32 [[TMP27]], ptr [[TMP0]], align 41079// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)1080// CHECK9-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 01081// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 21082// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP28]]1083// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1084// CHECK9:       omp.arraycpy.body:1085// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1086// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1087// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1088// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11089// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11090// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]1091// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]1092// CHECK9:       omp.arraycpy.done11:1093// CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP7]], align 81094// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP29]], i64 4, i1 false)1095// CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR8]], align 41096// CHECK9-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 41097// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1098// CHECK9:       .omp.lastprivate.done:1099// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1100// CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01101// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 21102// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1103// CHECK9:       arraydestroy.body:1104// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1105// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11106// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1107// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]1108// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]1109// CHECK9:       arraydestroy.done13:1110// CHECK9-NEXT:    ret void1111//1112//1113// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined1114// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1115// CHECK9-NEXT:  entry:1116// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81117// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81118// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81119// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81120// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81121// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81122// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81123// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81124// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 81125// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81126// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41127// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41128// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41129// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41130// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41131// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41132// CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 41133// CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 41134// CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 41135// CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 41136// CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 81137// CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 41138// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41139// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81140// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81141// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81142// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81143// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81144// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81145// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81146// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81147// CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 81148// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1149// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1150// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1151// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1152// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1153// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81154// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41155// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41156// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81157// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i321158// CHECK9-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81159// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i321160// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41161// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41162// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41163// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41164// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01165// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21166// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1167// CHECK9:       arrayctor.loop:1168// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1169// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1170// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11171// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1172// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1173// CHECK9:       arrayctor.cont:1174// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1175// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1176// CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81177// CHECK9-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81178// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41179// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1180// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41181// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 11182// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1183// CHECK9:       cond.true:1184// CHECK9-NEXT:    br label [[COND_END:%.*]]1185// CHECK9:       cond.false:1186// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41187// CHECK9-NEXT:    br label [[COND_END]]1188// CHECK9:       cond.end:1189// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1190// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41191// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41192// CHECK9-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41193// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1194// CHECK9:       omp.inner.for.cond:1195// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]1196// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]1197// CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1198// CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1199// CHECK9:       omp.inner.for.cond.cleanup:1200// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1201// CHECK9:       omp.inner.for.body:1202// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1203// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11204// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1205// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]1206// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP13]]1207// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]1208// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i641209// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1210// CHECK9-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]1211// CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP13]]1212// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]1213// CHECK9-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i641214// CHECK9-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]1215// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP18]], i64 4, i1 false), !llvm.access.group [[ACC_GRP13]]1216// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1217// CHECK9:       omp.body.continue:1218// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1219// CHECK9:       omp.inner.for.inc:1220// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1221// CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP20]], 11222// CHECK9-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]1223// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]1224// CHECK9:       omp.inner.for.end:1225// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1226// CHECK9:       omp.loop.exit:1227// CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81228// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 41229// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])1230// CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41231// CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01232// CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1233// CHECK9:       .omp.final.then:1234// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41235// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1236// CHECK9:       .omp.final.done:1237// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41238// CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 01239// CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1240// CHECK9:       .omp.lastprivate.then:1241// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR3]], align 41242// CHECK9-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 41243// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)1244// CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 01245// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 21246// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP28]]1247// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1248// CHECK9:       omp.arraycpy.body:1249// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1250// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1251// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1252// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11253// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11254// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]1255// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]1256// CHECK9:       omp.arraycpy.done14:1257// CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP7]], align 81258// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i64 4, i1 false)1259// CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR8]], align 41260// CHECK9-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 41261// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1262// CHECK9:       .omp.lastprivate.done:1263// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1264// CHECK9-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01265// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 21266// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1267// CHECK9:       arraydestroy.body:1268// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1269// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11270// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1271// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]1272// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]1273// CHECK9:       arraydestroy.done16:1274// CHECK9-NEXT:    ret void1275//1276//1277// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1278// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1279// CHECK9-NEXT:  entry:1280// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81281// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81282// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81283// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1284// CHECK9-NEXT:    ret void1285//1286//1287// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1288// CHECK9-SAME: () #[[ATTR1]] comdat {1289// CHECK9-NEXT:  entry:1290// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41291// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41292// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41293// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41294// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41295// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 81296// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81297// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 81298// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 81299// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 81300// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 81301// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41302// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81303// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1304// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 41305// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)1306// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)1307// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 11308// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)1309// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 81310// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7]], !align [[META8]]1311// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 81312// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41313// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41314// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 81315// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1316// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1317// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1318// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01319// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP6]], align 81320// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01321// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 81322// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01323// CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 81324// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11325// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 81326// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11327// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 81328// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 11329// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 81330// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21331// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 81332// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21333// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 81334// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 21335// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 81336// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31337// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 81338// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31339// CHECK9-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 81340// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 31341// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 81342// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01343// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01344// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01345// CHECK9-NEXT:    store i32 3, ptr [[TMP20]], align 41346// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11347// CHECK9-NEXT:    store i32 4, ptr [[TMP21]], align 41348// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21349// CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 81350// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31351// CHECK9-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 81352// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41353// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 81354// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51355// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 81356// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61357// CHECK9-NEXT:    store ptr null, ptr [[TMP26]], align 81358// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71359// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 81360// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81361// CHECK9-NEXT:    store i64 2, ptr [[TMP28]], align 81362// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91363// CHECK9-NEXT:    store i64 0, ptr [[TMP29]], align 81364// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101365// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 41366// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111367// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 41368// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121369// CHECK9-NEXT:    store i32 0, ptr [[TMP32]], align 41370// CHECK9-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1371// CHECK9-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 01372// CHECK9-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1373// CHECK9:       omp_offload.failed:1374// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1375// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]1376// CHECK9:       omp_offload.cont:1377// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 41378// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01379// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21380// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1381// CHECK9:       arraydestroy.body:1382// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1383// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11384// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1385// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1386// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1387// CHECK9:       arraydestroy.done2:1388// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1389// CHECK9-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 41390// CHECK9-NEXT:    ret i32 [[TMP36]]1391//1392//1393// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1394// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1395// CHECK9-NEXT:  entry:1396// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81397// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81398// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81399// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01400// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 41401// CHECK9-NEXT:    ret void1402//1403//1404// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1405// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1406// CHECK9-NEXT:  entry:1407// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81408// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41409// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81410// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41411// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81412// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01413// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41414// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 41415// CHECK9-NEXT:    ret void1416//1417//1418// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1419// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1420// CHECK9-NEXT:  entry:1421// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81422// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81423// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81424// CHECK9-NEXT:    ret void1425//1426//1427// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1428// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1429// CHECK9-NEXT:  entry:1430// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81431// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81432// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81433// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1434// CHECK9-NEXT:    ret void1435//1436//1437// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1438// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1439// CHECK9-NEXT:  entry:1440// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81441// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41442// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81443// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41444// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81445// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41446// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])1447// CHECK9-NEXT:    ret void1448//1449//1450// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491451// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1452// CHECK9-NEXT:  entry:1453// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 81454// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81455// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81456// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81457// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81458// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 81459// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81460// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81461// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81462// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1463// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1464// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1465// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 81466// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1467// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])1468// CHECK9-NEXT:    ret void1469//1470//1471// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1472// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1473// CHECK9-NEXT:  entry:1474// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81475// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81476// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81477// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81478// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81479// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81480// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81481// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81482// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41483// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41484// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41485// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41486// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41487// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41488// CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 41489// CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 41490// CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41491// CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41492// CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 81493// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41494// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81495// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81496// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81497// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81498// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81499// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81500// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1501// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1502// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1503// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1504// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81505// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1506// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 81507// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41508// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41509// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41510// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41511// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01512// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21513// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1514// CHECK9:       arrayctor.loop:1515// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1516// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1517// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11518// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1519// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1520// CHECK9:       arrayctor.cont:1521// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META7]], !align [[META8]]1522// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1523// CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81524// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81525// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41526// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1527// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41528// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11529// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1530// CHECK9:       cond.true:1531// CHECK9-NEXT:    br label [[COND_END:%.*]]1532// CHECK9:       cond.false:1533// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41534// CHECK9-NEXT:    br label [[COND_END]]1535// CHECK9:       cond.end:1536// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1537// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41538// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41539// CHECK9-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41540// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1541// CHECK9:       omp.inner.for.cond:1542// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1543// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1544// CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1545// CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1546// CHECK9:       omp.inner.for.cond.cleanup:1547// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1548// CHECK9:       omp.inner.for.body:1549// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]1550// CHECK9-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i641551// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1552// CHECK9-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i641553// CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP18]]1554// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP14]], i64 [[TMP16]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP17]]), !llvm.access.group [[ACC_GRP18]]1555// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1556// CHECK9:       omp.inner.for.inc:1557// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1558// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]1559// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1560// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1561// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1562// CHECK9:       omp.inner.for.end:1563// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1564// CHECK9:       omp.loop.exit:1565// CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81566// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41567// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])1568// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41569// CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01570// CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1571// CHECK9:       .omp.final.then:1572// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41573// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1574// CHECK9:       .omp.final.done:1575// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41576// CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01577// CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1578// CHECK9:       .omp.lastprivate.then:1579// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 41580// CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP0]], align 41581// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)1582// CHECK9-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01583// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i64 21584// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP27]]1585// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1586// CHECK9:       omp.arraycpy.body:1587// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1588// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1589// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1590// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11591// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11592// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]1593// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]1594// CHECK9:       omp.arraycpy.done10:1595// CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 81596// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP28]], i64 4, i1 false)1597// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1598// CHECK9:       .omp.lastprivate.done:1599// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1600// CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01601// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 21602// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1603// CHECK9:       arraydestroy.body:1604// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1605// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11606// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1607// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]1608// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]1609// CHECK9:       arraydestroy.done12:1610// CHECK9-NEXT:    ret void1611//1612//1613// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined1614// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1615// CHECK9-NEXT:  entry:1616// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81617// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81618// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81619// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81620// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81621// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81622// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81623// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81624// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 81625// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41626// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41627// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41628// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41629// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41630// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41631// CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 41632// CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 41633// CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41634// CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41635// CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 81636// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41637// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81638// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81639// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81640// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81641// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81642// CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81643// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81644// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81645// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1646// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1647// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1648// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1649// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81650// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41651// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41652// CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81653// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i321654// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81655// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i321656// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41657// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41658// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41659// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41660// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01661// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21662// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1663// CHECK9:       arrayctor.loop:1664// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1665// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1666// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11667// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1668// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1669// CHECK9:       arrayctor.cont:1670// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1671// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1672// CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81673// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81674// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41675// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1676// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41677// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 11678// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1679// CHECK9:       cond.true:1680// CHECK9-NEXT:    br label [[COND_END:%.*]]1681// CHECK9:       cond.false:1682// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41683// CHECK9-NEXT:    br label [[COND_END]]1684// CHECK9:       cond.end:1685// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1686// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41687// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41688// CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41689// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1690// CHECK9:       omp.inner.for.cond:1691// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]1692// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]1693// CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]1694// CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1695// CHECK9:       omp.inner.for.cond.cleanup:1696// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1697// CHECK9:       omp.inner.for.body:1698// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1699// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 11700// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1701// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1702// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP21]]1703// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1704// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i641705// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1706// CHECK9-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]1707// CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP21]]1708// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1709// CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i641710// CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]1711// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group [[ACC_GRP21]]1712// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1713// CHECK9:       omp.body.continue:1714// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1715// CHECK9:       omp.inner.for.inc:1716// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1717// CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP19]], 11718// CHECK9-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1719// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]1720// CHECK9:       omp.inner.for.end:1721// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1722// CHECK9:       omp.loop.exit:1723// CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81724// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41725// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])1726// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41727// CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01728// CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1729// CHECK9:       .omp.final.then:1730// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41731// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1732// CHECK9:       .omp.final.done:1733// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41734// CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01735// CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1736// CHECK9:       .omp.lastprivate.then:1737// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 41738// CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 41739// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)1740// CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01741// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 21742// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP27]]1743// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1744// CHECK9:       omp.arraycpy.body:1745// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1746// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1747// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1748// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11749// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11750// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]1751// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]1752// CHECK9:       omp.arraycpy.done13:1753// CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 81754// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)1755// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1756// CHECK9:       .omp.lastprivate.done:1757// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1758// CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01759// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 21760// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1761// CHECK9:       arraydestroy.body:1762// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1763// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11764// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1765// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]1766// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]1767// CHECK9:       arraydestroy.done15:1768// CHECK9-NEXT:    ret void1769//1770//1771// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1772// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1773// CHECK9-NEXT:  entry:1774// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81775// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81776// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81777// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1778// CHECK9-NEXT:    ret void1779//1780//1781// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1782// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1783// CHECK9-NEXT:  entry:1784// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81785// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81786// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81787// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01788// CHECK9-NEXT:    store i32 0, ptr [[F]], align 41789// CHECK9-NEXT:    ret void1790//1791//1792// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1793// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1794// CHECK9-NEXT:  entry:1795// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81796// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41797// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81798// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41799// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81800// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01801// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41802// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41803// CHECK9-NEXT:    ret void1804//1805//1806// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1807// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1808// CHECK9-NEXT:  entry:1809// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81810// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81811// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81812// CHECK9-NEXT:    ret void1813//1814//1815// CHECK11-LABEL: define {{[^@]+}}@main1816// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1817// CHECK11-NEXT:  entry:1818// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41819// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 81820// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 41821// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41822// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41823// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41824// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41825// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41826// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41827// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41828// CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 41829// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41830// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41831// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41832// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41833// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81834// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41835// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41836// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 41837// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1838// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41839// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1840// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1841// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11842// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1843// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41844// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]1845// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 41846// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41847// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41848// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41849// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1850// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41851// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41852// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41853// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1854// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1855// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01856// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 41857// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01858// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 41859// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01860// CHECK11-NEXT:    store ptr null, ptr [[TMP10]], align 41861// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11862// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 41863// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11864// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 41865// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11866// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 41867// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21868// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 41869// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21870// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 41871// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21872// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 41873// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31874// CHECK11-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 41875// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31876// CHECK11-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 41877// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31878// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 41879// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41880// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP20]], align 41881// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41882// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 41883// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41884// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 41885// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01886// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01887// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01888// CHECK11-NEXT:    store i32 3, ptr [[TMP25]], align 41889// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11890// CHECK11-NEXT:    store i32 5, ptr [[TMP26]], align 41891// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21892// CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 41893// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31894// CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 41895// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41896// CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 41897// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51898// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 41899// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61900// CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 41901// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71902// CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 41903// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81904// CHECK11-NEXT:    store i64 2, ptr [[TMP33]], align 81905// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91906// CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 81907// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101908// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41909// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111910// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 41911// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121912// CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 41913// CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.region_id, ptr [[KERNEL_ARGS]])1914// CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01915// CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1916// CHECK11:       omp_offload.failed:1917// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1918// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1919// CHECK11:       omp_offload.cont:1920// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1921// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41922// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01923// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21924// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1925// CHECK11:       arraydestroy.body:1926// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1927// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11928// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1929// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1930// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1931// CHECK11:       arraydestroy.done2:1932// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1933// CHECK11-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 41934// CHECK11-NEXT:    ret i32 [[TMP41]]1935//1936//1937// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1938// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1939// CHECK11-NEXT:  entry:1940// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41941// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41942// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41943// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1944// CHECK11-NEXT:    ret void1945//1946//1947// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1948// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1949// CHECK11-NEXT:  entry:1950// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41951// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41952// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41953// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41954// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41955// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41956// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1957// CHECK11-NEXT:    ret void1958//1959//1960// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1251961// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1962// CHECK11-NEXT:  entry:1963// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41964// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41965// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41966// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41967// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 41968// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41969// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41970// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41971// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41972// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41973// CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41974// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1975// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1976// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1977// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41978// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1979// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])1980// CHECK11-NEXT:    ret void1981//1982//1983// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined1984// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1985// CHECK11-NEXT:  entry:1986// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41987// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41988// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 41989// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41990// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41991// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41992// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 41993// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41994// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41995// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41996// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41997// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41998// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41999// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42000// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42001// CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 42002// CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 42003// CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 42004// CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 42005// CHECK11-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 42006// CHECK11-NEXT:    [[SVAR8:%.*]] = alloca i32, align 42007// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42008// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42009// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42010// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 42011// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 42012// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 42013// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 42014// CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 42015// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2016// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2017// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2018// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2019// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2020// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 42021// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2022// CHECK11-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 42023// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 42024// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 42025// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42026// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42027// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 02028// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22029// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2030// CHECK11:       arrayctor.loop:2031// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2032// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2033// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12034// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2035// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2036// CHECK11:       arrayctor.cont:2037// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META8]], !align [[META9]]2038// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])2039// CHECK11-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 42040// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42041// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42042// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2043// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42044// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 12045// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2046// CHECK11:       cond.true:2047// CHECK11-NEXT:    br label [[COND_END:%.*]]2048// CHECK11:       cond.false:2049// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42050// CHECK11-NEXT:    br label [[COND_END]]2051// CHECK11:       cond.end:2052// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]2053// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42054// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42055// CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 42056// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2057// CHECK11:       omp.inner.for.cond:2058// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]2059// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]]2060// CHECK11-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]2061// CHECK11-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2062// CHECK11:       omp.inner.for.cond.cleanup:2063// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2064// CHECK11:       omp.inner.for.body:2065// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP10]]2066// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP10]]2067// CHECK11-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP10]]2068// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP16]], ptr [[SVAR8]]), !llvm.access.group [[ACC_GRP10]]2069// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2070// CHECK11:       omp.inner.for.inc:2071// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2072// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP10]]2073// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]2074// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2075// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]2076// CHECK11:       omp.inner.for.end:2077// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2078// CHECK11:       omp.loop.exit:2079// CHECK11-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42080// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42081// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])2082// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42083// CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 02084// CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2085// CHECK11:       .omp.final.then:2086// CHECK11-NEXT:    store i32 2, ptr [[I]], align 42087// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2088// CHECK11:       .omp.final.done:2089// CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42090// CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02091// CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2092// CHECK11:       .omp.lastprivate.then:2093// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 42094// CHECK11-NEXT:    store i32 [[TMP25]], ptr [[TMP0]], align 42095// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)2096// CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 02097// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 22098// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP26]]2099// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2100// CHECK11:       omp.arraycpy.body:2101// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2102// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2103// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2104// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12105// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12106// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]2107// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2108// CHECK11:       omp.arraycpy.done11:2109// CHECK11-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 42110// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP27]], i32 4, i1 false)2111// CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[SVAR8]], align 42112// CHECK11-NEXT:    store i32 [[TMP28]], ptr [[TMP4]], align 42113// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2114// CHECK11:       .omp.lastprivate.done:2115// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]2116// CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 02117// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 22118// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2119// CHECK11:       arraydestroy.body:2120// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2121// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12122// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2123// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2124// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2125// CHECK11:       arraydestroy.done13:2126// CHECK11-NEXT:    ret void2127//2128//2129// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined2130// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {2131// CHECK11-NEXT:  entry:2132// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42133// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42134// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42135// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42136// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 42137// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 42138// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 42139// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 42140// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 42141// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 42142// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42143// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 42144// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42145// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42146// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42147// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42148// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42149// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42150// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 42151// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 42152// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42153// CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 42154// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42155// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42156// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42157// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42158// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42159// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 42160// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 42161// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 42162// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 42163// CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 42164// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2165// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2166// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2167// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2168// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2169// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 42170// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42171// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42172// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42173// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42174// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 42175// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42176// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42177// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42178// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02179// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22180// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2181// CHECK11:       arrayctor.loop:2182// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2183// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2184// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12185// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2186// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2187// CHECK11:       arrayctor.cont:2188// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2189// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2190// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42191// CHECK11-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42192// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 42193// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2194// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42195// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 12196// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2197// CHECK11:       cond.true:2198// CHECK11-NEXT:    br label [[COND_END:%.*]]2199// CHECK11:       cond.false:2200// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42201// CHECK11-NEXT:    br label [[COND_END]]2202// CHECK11:       cond.end:2203// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]2204// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42205// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42206// CHECK11-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 42207// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2208// CHECK11:       omp.inner.for.cond:2209// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]2210// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]2211// CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]2212// CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2213// CHECK11:       omp.inner.for.cond.cleanup:2214// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2215// CHECK11:       omp.inner.for.body:2216// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2217// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 12218// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2219// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]2220// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP14]]2221// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]2222// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP17]]2223// CHECK11-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]2224// CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP14]]2225// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]2226// CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP19]]2227// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP18]], i32 4, i1 false), !llvm.access.group [[ACC_GRP14]]2228// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2229// CHECK11:       omp.body.continue:2230// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2231// CHECK11:       omp.inner.for.inc:2232// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2233// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 12234// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]2235// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]2236// CHECK11:       omp.inner.for.end:2237// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2238// CHECK11:       omp.loop.exit:2239// CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42240// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 42241// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])2242// CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42243// CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02244// CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2245// CHECK11:       .omp.final.then:2246// CHECK11-NEXT:    store i32 2, ptr [[I]], align 42247// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2248// CHECK11:       .omp.final.done:2249// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42250// CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 02251// CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2252// CHECK11:       .omp.lastprivate.then:2253// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR2]], align 42254// CHECK11-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 42255// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)2256// CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 02257// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 22258// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP28]]2259// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2260// CHECK11:       omp.arraycpy.body:2261// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2262// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2263// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2264// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12265// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12266// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]2267// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]2268// CHECK11:       omp.arraycpy.done12:2269// CHECK11-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP6]], align 42270// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i32 4, i1 false)2271// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR7]], align 42272// CHECK11-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 42273// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2274// CHECK11:       .omp.lastprivate.done:2275// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]2276// CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02277// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 22278// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2279// CHECK11:       arraydestroy.body:2280// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2281// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12282// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2283// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]2284// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]2285// CHECK11:       arraydestroy.done14:2286// CHECK11-NEXT:    ret void2287//2288//2289// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2290// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2291// CHECK11-NEXT:  entry:2292// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42293// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42294// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42295// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]2296// CHECK11-NEXT:    ret void2297//2298//2299// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2300// CHECK11-SAME: () #[[ATTR1]] comdat {2301// CHECK11-NEXT:  entry:2302// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42303// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42304// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42305// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42306// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42307// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 42308// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 42309// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 42310// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 42311// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 42312// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 42313// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 42314// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82315// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2316// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 42317// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2318// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2319// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12320// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2321// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42322// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8]], !align [[META9]]2323// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 42324// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 42325// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 42326// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 42327// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2328// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2329// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2330// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02331// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 42332// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02333// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 42334// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 02335// CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 42336// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12337// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 42338// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12339// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 42340// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 12341// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 42342// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22343// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 42344// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22345// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 42346// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 22347// CHECK11-NEXT:    store ptr null, ptr [[TMP14]], align 42348// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 32349// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 42350// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 32351// CHECK11-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 42352// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 32353// CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 42354// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02355// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02356// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02357// CHECK11-NEXT:    store i32 3, ptr [[TMP20]], align 42358// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12359// CHECK11-NEXT:    store i32 4, ptr [[TMP21]], align 42360// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22361// CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 42362// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32363// CHECK11-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 42364// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42365// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 42366// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52367// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 42368// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62369// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 42370// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72371// CHECK11-NEXT:    store ptr null, ptr [[TMP27]], align 42372// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82373// CHECK11-NEXT:    store i64 2, ptr [[TMP28]], align 82374// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92375// CHECK11-NEXT:    store i64 0, ptr [[TMP29]], align 82376// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102377// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 42378// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112379// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 42380// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122381// CHECK11-NEXT:    store i32 0, ptr [[TMP32]], align 42382// CHECK11-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])2383// CHECK11-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 02384// CHECK11-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2385// CHECK11:       omp_offload.failed:2386// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]2387// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]2388// CHECK11:       omp_offload.cont:2389// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 42390// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02391// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22392// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2393// CHECK11:       arraydestroy.body:2394// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2395// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12396// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2397// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]2398// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]2399// CHECK11:       arraydestroy.done2:2400// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]2401// CHECK11-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 42402// CHECK11-NEXT:    ret i32 [[TMP36]]2403//2404//2405// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2406// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2407// CHECK11-NEXT:  entry:2408// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42409// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42410// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42411// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02412// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 42413// CHECK11-NEXT:    ret void2414//2415//2416// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2417// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2418// CHECK11-NEXT:  entry:2419// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42420// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42421// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42422// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42423// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42424// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02425// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42426// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 42427// CHECK11-NEXT:    ret void2428//2429//2430// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2431// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2432// CHECK11-NEXT:  entry:2433// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42434// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42435// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42436// CHECK11-NEXT:    ret void2437//2438//2439// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2440// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2441// CHECK11-NEXT:  entry:2442// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42443// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42444// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42445// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2446// CHECK11-NEXT:    ret void2447//2448//2449// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2450// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2451// CHECK11-NEXT:  entry:2452// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42453// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42454// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42455// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42456// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42457// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42458// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2459// CHECK11-NEXT:    ret void2460//2461//2462// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l492463// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {2464// CHECK11-NEXT:  entry:2465// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 42466// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 42467// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 42468// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 42469// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 42470// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 42471// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 42472// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 42473// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 42474// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2475// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2476// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2477// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 42478// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2479// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])2480// CHECK11-NEXT:    ret void2481//2482//2483// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined2484// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {2485// CHECK11-NEXT:  entry:2486// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42487// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42488// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 42489// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 42490// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 42491// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 42492// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 42493// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42494// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42495// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 42496// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42497// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42498// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42499// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42500// CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 42501// CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 42502// CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 42503// CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42504// CHECK11-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 42505// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42506// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42507// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42508// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 42509// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 42510// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 42511// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 42512// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2513// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2514// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2515// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2516// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 42517// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2518// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 42519// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 42520// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 42521// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42522// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42523// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02524// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22525// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2526// CHECK11:       arrayctor.loop:2527// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2528// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2529// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12530// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2531// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2532// CHECK11:       arrayctor.cont:2533// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META8]], !align [[META9]]2534// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])2535// CHECK11-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 42536// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42537// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42538// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2539// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42540// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 12541// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2542// CHECK11:       cond.true:2543// CHECK11-NEXT:    br label [[COND_END:%.*]]2544// CHECK11:       cond.false:2545// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42546// CHECK11-NEXT:    br label [[COND_END]]2547// CHECK11:       cond.end:2548// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]2549// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42550// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42551// CHECK11-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 42552// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2553// CHECK11:       omp.inner.for.cond:2554// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]2555// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]2556// CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]2557// CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2558// CHECK11:       omp.inner.for.cond.cleanup:2559// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2560// CHECK11:       omp.inner.for.body:2561// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]]2562// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]2563// CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP19]]2564// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP13]], i32 [[TMP14]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP15]]), !llvm.access.group [[ACC_GRP19]]2565// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2566// CHECK11:       omp.inner.for.inc:2567// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2568// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]]2569// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]2570// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2571// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]2572// CHECK11:       omp.inner.for.end:2573// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2574// CHECK11:       omp.loop.exit:2575// CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42576// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 42577// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])2578// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42579// CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 02580// CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2581// CHECK11:       .omp.final.then:2582// CHECK11-NEXT:    store i32 2, ptr [[I]], align 42583// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2584// CHECK11:       .omp.final.done:2585// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42586// CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 02587// CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2588// CHECK11:       .omp.lastprivate.then:2589// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR3]], align 42590// CHECK11-NEXT:    store i32 [[TMP24]], ptr [[TMP0]], align 42591// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)2592// CHECK11-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 02593// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 22594// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP25]]2595// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2596// CHECK11:       omp.arraycpy.body:2597// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2598// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2599// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2600// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12601// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12602// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]2603// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]2604// CHECK11:       omp.arraycpy.done10:2605// CHECK11-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP7]], align 42606// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP26]], i32 4, i1 false)2607// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2608// CHECK11:       .omp.lastprivate.done:2609// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]2610// CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 02611// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 22612// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2613// CHECK11:       arraydestroy.body:2614// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2615// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12616// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2617// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]2618// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]2619// CHECK11:       arraydestroy.done12:2620// CHECK11-NEXT:    ret void2621//2622//2623// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined2624// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {2625// CHECK11-NEXT:  entry:2626// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42627// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42628// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42629// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42630// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 42631// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 42632// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 42633// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 42634// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 42635// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42636// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 42637// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42638// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42639// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42640// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42641// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42642// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42643// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42644// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42645// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42646// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42647// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42648// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42649// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42650// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42651// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 42652// CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 42653// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 42654// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 42655// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2656// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2657// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2658// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]2659// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 42660// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42661// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42662// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42663// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42664// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 42665// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 42666// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42667// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42668// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02669// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22670// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2671// CHECK11:       arrayctor.loop:2672// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2673// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2674// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12675// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2676// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2677// CHECK11:       arrayctor.cont:2678// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]2679// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2680// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42681// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42682// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42683// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2684// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42685// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 12686// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2687// CHECK11:       cond.true:2688// CHECK11-NEXT:    br label [[COND_END:%.*]]2689// CHECK11:       cond.false:2690// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42691// CHECK11-NEXT:    br label [[COND_END]]2692// CHECK11:       cond.end:2693// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]2694// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42695// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42696// CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 42697// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2698// CHECK11:       omp.inner.for.cond:2699// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]2700// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]2701// CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]2702// CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2703// CHECK11:       omp.inner.for.cond.cleanup:2704// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2705// CHECK11:       omp.inner.for.body:2706// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]2707// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 12708// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2709// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]2710// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP22]]2711// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]2712// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP16]]2713// CHECK11-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]2714// CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP22]]2715// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]2716// CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP18]]2717// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group [[ACC_GRP22]]2718// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2719// CHECK11:       omp.body.continue:2720// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2721// CHECK11:       omp.inner.for.inc:2722// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]2723// CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 12724// CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]2725// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]2726// CHECK11:       omp.inner.for.end:2727// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2728// CHECK11:       omp.loop.exit:2729// CHECK11-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42730// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 42731// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])2732// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42733// CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 02734// CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2735// CHECK11:       .omp.final.then:2736// CHECK11-NEXT:    store i32 2, ptr [[I]], align 42737// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2738// CHECK11:       .omp.final.done:2739// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42740// CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 02741// CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2742// CHECK11:       .omp.lastprivate.then:2743// CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR2]], align 42744// CHECK11-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 42745// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)2746// CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 02747// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 22748// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP27]]2749// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2750// CHECK11:       omp.arraycpy.body:2751// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2752// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2753// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2754// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12755// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12756// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]2757// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2758// CHECK11:       omp.arraycpy.done11:2759// CHECK11-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP6]], align 42760// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)2761// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2762// CHECK11:       .omp.lastprivate.done:2763// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]2764// CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02765// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 22766// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2767// CHECK11:       arraydestroy.body:2768// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2769// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12770// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2771// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2772// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2773// CHECK11:       arraydestroy.done13:2774// CHECK11-NEXT:    ret void2775//2776//2777// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2778// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2779// CHECK11-NEXT:  entry:2780// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42781// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42782// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42783// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]2784// CHECK11-NEXT:    ret void2785//2786//2787// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2788// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2789// CHECK11-NEXT:  entry:2790// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42791// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42792// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42793// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02794// CHECK11-NEXT:    store i32 0, ptr [[F]], align 42795// CHECK11-NEXT:    ret void2796//2797//2798// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2799// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2800// CHECK11-NEXT:  entry:2801// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42802// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42803// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42804// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42805// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42806// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02807// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42808// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42809// CHECK11-NEXT:    ret void2810//2811//2812// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2813// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2814// CHECK11-NEXT:  entry:2815// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42816// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42817// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42818// CHECK11-NEXT:    ret void2819//2820//2821// CHECK13-LABEL: define {{[^@]+}}@main2822// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {2823// CHECK13-NEXT:  entry:2824// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42825// CHECK13-NEXT:    [[G:%.*]] = alloca double, align 82826// CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 82827// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42828// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42829// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42830// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42831// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 82832// CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 82833// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82834// CHECK13-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 82835// CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 42836// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42837// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42838// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42839// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 42840// CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 42841// CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 42842// CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 42843// CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 42844// CHECK13-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 82845// CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 42846// CHECK13-NEXT:    [[I16:%.*]] = alloca i32, align 42847// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 42848// CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 82849// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2850// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 42851// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)2852// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2853// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 12854// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2855// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 82856// CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]2857// CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 82858// CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2859// CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]2860// CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 82861// CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]2862// CHECK13-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 82863// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42864// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42865// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42866// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42867// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 02868// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 22869// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2870// CHECK13:       arrayctor.loop:2871// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2872// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2873// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 12874// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2875// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2876// CHECK13:       arrayctor.cont:2877// CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]2878// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])2879// CHECK13-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 82880// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2881// CHECK13:       omp.inner.for.cond:2882// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]2883// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]2884// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2885// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2886// CHECK13:       omp.inner.for.cond.cleanup:2887// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2888// CHECK13:       omp.inner.for.body:2889// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2890// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12891// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2892// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2893// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP4]]2894// CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2895// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i642896// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]2897// CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP4]]2898// CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP4]]2899// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2900// CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i642901// CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]2902// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP4]]2903// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2904// CHECK13:       omp.body.continue:2905// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2906// CHECK13:       omp.inner.for.inc:2907// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2908// CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP13]], 12909// CHECK13-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2910// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]2911// CHECK13:       omp.inner.for.end:2912// CHECK13-NEXT:    store i32 2, ptr [[I]], align 42913// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 42914// CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 42915// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)2916// CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02917// CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 22918// CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]2919// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2920// CHECK13:       omp.arraycpy.body:2921// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2922// CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2923// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2924// CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12925// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12926// CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]2927// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]2928// CHECK13:       omp.arraycpy.done13:2929// CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 82930// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)2931// CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 42932// CHECK13-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 42933// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3:[0-9]+]]2934// CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 02935// CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 22936// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2937// CHECK13:       arraydestroy.body:2938// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2939// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12940// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2941// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]2942// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]2943// CHECK13:       arraydestroy.done15:2944// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()2945// CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42946// CHECK13-NEXT:    [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02947// CHECK13-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN17]], i64 22948// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY18:%.*]]2949// CHECK13:       arraydestroy.body18:2950// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]2951// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST19]], i64 -12952// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR3]]2953// CHECK13-NEXT:    [[ARRAYDESTROY_DONE21:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]2954// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]2955// CHECK13:       arraydestroy.done22:2956// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2957// CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 42958// CHECK13-NEXT:    ret i32 [[TMP20]]2959//2960//2961// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2962// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {2963// CHECK13-NEXT:  entry:2964// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82965// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82966// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82967// CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2968// CHECK13-NEXT:    ret void2969//2970//2971// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2972// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2973// CHECK13-NEXT:  entry:2974// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82975// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42976// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82977// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42978// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82979// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42980// CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2981// CHECK13-NEXT:    ret void2982//2983//2984// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2985// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2986// CHECK13-NEXT:  entry:2987// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82988// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82989// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82990// CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2991// CHECK13-NEXT:    ret void2992//2993//2994// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2995// CHECK13-SAME: () #[[ATTR1]] comdat {2996// CHECK13-NEXT:  entry:2997// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42998// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42999// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 43000// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 43001// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 43002// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 83003// CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 83004// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 83005// CHECK13-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 83006// CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 43007// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43008// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43009// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43010// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 43011// CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 43012// CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 43013// CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 43014// CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 43015// CHECK13-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 83016// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])3017// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 43018// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)3019// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)3020// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 13021// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)3022// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 83023// CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]3024// CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 83025// CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]3026// CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]3027// CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 83028// CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]3029// CHECK13-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 83030// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43031// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43032// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43033// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43034// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 03035// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 23036// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]3037// CHECK13:       arrayctor.loop:3038// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]3039// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])3040// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 13041// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]3042// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]3043// CHECK13:       arrayctor.cont:3044// CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]3045// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])3046// CHECK13-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 83047// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3048// CHECK13:       omp.inner.for.cond:3049// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]3050// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]3051// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3052// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3053// CHECK13:       omp.inner.for.cond.cleanup:3054// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3055// CHECK13:       omp.inner.for.body:3056// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]3057// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13058// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3059// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]3060// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP8]]3061// CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]3062// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i643063// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]3064// CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]3065// CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP8]]3066// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]3067// CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i643068// CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]3069// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP8]]3070// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3071// CHECK13:       omp.body.continue:3072// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3073// CHECK13:       omp.inner.for.inc:3074// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]3075// CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP13]], 13076// CHECK13-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]3077// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]3078// CHECK13:       omp.inner.for.end:3079// CHECK13-NEXT:    store i32 2, ptr [[I]], align 43080// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 43081// CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 43082// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)3083// CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 03084// CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 23085// CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]3086// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]3087// CHECK13:       omp.arraycpy.body:3088// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3089// CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3090// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)3091// CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 13092// CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 13093// CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]3094// CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]3095// CHECK13:       omp.arraycpy.done13:3096// CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 83097// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)3098// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3]]3099// CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 03100// CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 23101// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]3102// CHECK13:       arraydestroy.body:3103// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]3104// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -13105// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]3106// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]3107// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]3108// CHECK13:       arraydestroy.done15:3109// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 43110// CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 03111// CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 23112// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]3113// CHECK13:       arraydestroy.body17:3114// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]3115// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -13116// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]3117// CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]3118// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]3119// CHECK13:       arraydestroy.done21:3120// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]3121// CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 43122// CHECK13-NEXT:    ret i32 [[TMP19]]3123//3124//3125// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev3126// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3127// CHECK13-NEXT:  entry:3128// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83129// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83130// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83131// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03132// CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 43133// CHECK13-NEXT:    ret void3134//3135//3136// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev3137// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3138// CHECK13-NEXT:  entry:3139// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83140// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83141// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83142// CHECK13-NEXT:    ret void3143//3144//3145// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef3146// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {3147// CHECK13-NEXT:  entry:3148// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83149// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 43150// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83151// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 43152// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83153// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03154// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 43155// CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 43156// CHECK13-NEXT:    ret void3157//3158//3159// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev3160// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3161// CHECK13-NEXT:  entry:3162// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83163// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83164// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83165// CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])3166// CHECK13-NEXT:    ret void3167//3168//3169// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei3170// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {3171// CHECK13-NEXT:  entry:3172// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83173// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43174// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83175// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43176// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83177// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43178// CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])3179// CHECK13-NEXT:    ret void3180//3181//3182// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev3183// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3184// CHECK13-NEXT:  entry:3185// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83186// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83187// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83188// CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]3189// CHECK13-NEXT:    ret void3190//3191//3192// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev3193// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3194// CHECK13-NEXT:  entry:3195// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83196// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83197// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83198// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03199// CHECK13-NEXT:    store i32 0, ptr [[F]], align 43200// CHECK13-NEXT:    ret void3201//3202//3203// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei3204// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {3205// CHECK13-NEXT:  entry:3206// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83207// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43208// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83209// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43210// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83211// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03212// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43213// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 43214// CHECK13-NEXT:    ret void3215//3216//3217// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev3218// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {3219// CHECK13-NEXT:  entry:3220// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83221// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83222// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83223// CHECK13-NEXT:    ret void3224//3225//3226// CHECK15-LABEL: define {{[^@]+}}@main3227// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {3228// CHECK15-NEXT:  entry:3229// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 43230// CHECK15-NEXT:    [[G:%.*]] = alloca double, align 83231// CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 43232// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 43233// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 43234// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 43235// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 43236// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 43237// CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 43238// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 43239// CHECK15-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 43240// CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 43241// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43242// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43243// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43244// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 43245// CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 43246// CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 43247// CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 43248// CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 43249// CHECK15-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 43250// CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 43251// CHECK15-NEXT:    [[I15:%.*]] = alloca i32, align 43252// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 43253// CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 43254// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])3255// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 43256// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)3257// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)3258// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 13259// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)3260// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 43261// CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]3262// CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 43263// CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]3264// CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]3265// CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 43266// CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]3267// CHECK15-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 43268// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43269// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43270// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43271// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43272// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 03273// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 23274// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]3275// CHECK15:       arrayctor.loop:3276// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]3277// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])3278// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 13279// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]3280// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]3281// CHECK15:       arrayctor.cont:3282// CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META3]], !align [[META4]]3283// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])3284// CHECK15-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 43285// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3286// CHECK15:       omp.inner.for.cond:3287// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]3288// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]3289// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3290// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3291// CHECK15:       omp.inner.for.cond.cleanup:3292// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3293// CHECK15:       omp.inner.for.body:3294// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]3295// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13296// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3297// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]3298// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP5]]3299// CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]3300// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]3301// CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]3302// CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP5]]3303// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]3304// CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]3305// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP5]]3306// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3307// CHECK15:       omp.body.continue:3308// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3309// CHECK15:       omp.inner.for.inc:3310// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]3311// CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 13312// CHECK15-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]3313// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]3314// CHECK15:       omp.inner.for.end:3315// CHECK15-NEXT:    store i32 2, ptr [[I]], align 43316// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 43317// CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 43318// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)3319// CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 03320// CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 23321// CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]3322// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]3323// CHECK15:       omp.arraycpy.body:3324// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3325// CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3326// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)3327// CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 13328// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 13329// CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]3330// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]3331// CHECK15:       omp.arraycpy.done12:3332// CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 43333// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)3334// CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 43335// CHECK15-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 43336// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3:[0-9]+]]3337// CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 03338// CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 23339// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]3340// CHECK15:       arraydestroy.body:3341// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]3342// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -13343// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]3344// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]3345// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]3346// CHECK15:       arraydestroy.done14:3347// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()3348// CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 43349// CHECK15-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 03350// CHECK15-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i32 23351// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]3352// CHECK15:       arraydestroy.body17:3353// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]3354// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i32 -13355// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]3356// CHECK15-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]3357// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]3358// CHECK15:       arraydestroy.done21:3359// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]3360// CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 43361// CHECK15-NEXT:    ret i32 [[TMP20]]3362//3363//3364// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev3365// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {3366// CHECK15-NEXT:  entry:3367// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43368// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43369// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43370// CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])3371// CHECK15-NEXT:    ret void3372//3373//3374// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef3375// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3376// CHECK15-NEXT:  entry:3377// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43378// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 43379// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43380// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 43381// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43382// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 43383// CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])3384// CHECK15-NEXT:    ret void3385//3386//3387// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev3388// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3389// CHECK15-NEXT:  entry:3390// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43391// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43392// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43393// CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]3394// CHECK15-NEXT:    ret void3395//3396//3397// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v3398// CHECK15-SAME: () #[[ATTR1]] comdat {3399// CHECK15-NEXT:  entry:3400// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 43401// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 43402// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 43403// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 43404// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 43405// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 43406// CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 43407// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 43408// CHECK15-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 43409// CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 43410// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43411// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43412// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43413// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 43414// CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 43415// CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 43416// CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 43417// CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 43418// CHECK15-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 43419// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])3420// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 43421// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)3422// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)3423// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 13424// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)3425// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 43426// CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]3427// CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 43428// CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]3429// CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]3430// CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 43431// CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]3432// CHECK15-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 43433// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43434// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43435// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43436// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43437// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 03438// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 23439// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]3440// CHECK15:       arrayctor.loop:3441// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]3442// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])3443// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 13444// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]3445// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]3446// CHECK15:       arrayctor.cont:3447// CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META3]], !align [[META4]]3448// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])3449// CHECK15-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 43450// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3451// CHECK15:       omp.inner.for.cond:3452// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3453// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]3454// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3455// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3456// CHECK15:       omp.inner.for.cond.cleanup:3457// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3458// CHECK15:       omp.inner.for.body:3459// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3460// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13461// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3462// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3463// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP9]]3464// CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3465// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]3466// CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]3467// CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP9]]3468// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3469// CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]3470// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP9]]3471// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3472// CHECK15:       omp.body.continue:3473// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3474// CHECK15:       omp.inner.for.inc:3475// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3476// CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 13477// CHECK15-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3478// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]3479// CHECK15:       omp.inner.for.end:3480// CHECK15-NEXT:    store i32 2, ptr [[I]], align 43481// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 43482// CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 43483// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)3484// CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 03485// CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 23486// CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]3487// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]3488// CHECK15:       omp.arraycpy.body:3489// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3490// CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3491// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)3492// CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 13493// CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 13494// CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]3495// CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]3496// CHECK15:       omp.arraycpy.done12:3497// CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 43498// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)3499// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3]]3500// CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 03501// CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 23502// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]3503// CHECK15:       arraydestroy.body:3504// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]3505// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -13506// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]3507// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]3508// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]3509// CHECK15:       arraydestroy.done14:3510// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 43511// CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 03512// CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i32 23513// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]3514// CHECK15:       arraydestroy.body16:3515// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]3516// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -13517// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]3518// CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]3519// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]3520// CHECK15:       arraydestroy.done20:3521// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]3522// CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 43523// CHECK15-NEXT:    ret i32 [[TMP19]]3524//3525//3526// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev3527// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3528// CHECK15-NEXT:  entry:3529// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43530// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43531// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43532// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03533// CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 43534// CHECK15-NEXT:    ret void3535//3536//3537// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev3538// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3539// CHECK15-NEXT:  entry:3540// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43541// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43542// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43543// CHECK15-NEXT:    ret void3544//3545//3546// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef3547// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3548// CHECK15-NEXT:  entry:3549// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43550// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 43551// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43552// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 43553// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43554// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03555// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 43556// CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 43557// CHECK15-NEXT:    ret void3558//3559//3560// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev3561// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3562// CHECK15-NEXT:  entry:3563// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43564// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43565// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43566// CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])3567// CHECK15-NEXT:    ret void3568//3569//3570// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei3571// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3572// CHECK15-NEXT:  entry:3573// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43574// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43575// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43576// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43577// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43578// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43579// CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])3580// CHECK15-NEXT:    ret void3581//3582//3583// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev3584// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3585// CHECK15-NEXT:  entry:3586// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43587// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43588// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43589// CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]3590// CHECK15-NEXT:    ret void3591//3592//3593// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev3594// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3595// CHECK15-NEXT:  entry:3596// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43597// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43598// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43599// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03600// CHECK15-NEXT:    store i32 0, ptr [[F]], align 43601// CHECK15-NEXT:    ret void3602//3603//3604// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei3605// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3606// CHECK15-NEXT:  entry:3607// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43608// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43609// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43610// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43611// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43612// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03613// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43614// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 43615// CHECK15-NEXT:    ret void3616//3617//3618// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev3619// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {3620// CHECK15-NEXT:  entry:3621// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 43622// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 43623// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 43624// CHECK15-NEXT:    ret void3625//3626