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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target50  #pragma omp teams51  #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var)52  for (int i = 0; i < 2; ++i) {53    vec[i] = t_var;54    s_arr[i] = var;55  }56  return T();57}58 59int main() {60  static int svar;61  volatile double g;62  volatile double &g1 = g;63 64  #ifdef LAMBDA65  [&]() {66    static float sfvar;67 68    #pragma omp target69    #pragma omp teams70    #pragma omp distribute parallel for simd private(g, g1, svar, sfvar)71    for (int i = 0; i < 2; ++i) {72 73 74      g = 1;75      g1 = 1;76      svar = 3;77      sfvar = 4.0;78      [&]() {79	g = 2;80	g1 = 2;81	svar = 4;82	sfvar = 8.0;83 84      }();85    }86  }();87  return 0;88  #else89  S<float> test;90  int t_var = 0;91  int vec[] = {1, 2};92  S<float> s_arr[] = {1, 2};93  S<float> &var = test;94 95  #pragma omp target96  #pragma omp teams97  #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var, svar)98  for (int i = 0; i < 2; ++i) {99    vec[i] = t_var;100    s_arr[i] = var;101  }102  return tmain<int>();103  #endif104}105 106 107 108// this is the ctor loop109 110// call destructors: var..111 112// ..and s_arr113 114 115// By OpenMP specifications, private applies to both distribute and parallel for.116// However, the support for 'private' of 'parallel' is only used when 'parallel'117// is found alone. Therefore we only have one 'private' support for 'parallel for'118// in combination119// this is the ctor loop120 121// call destructors: var..122 123// ..and s_arr124 125 126// template tmain with S_INT_TY127 128 129 130// this is the ctor loop131 132// call destructors: var..133 134// ..and s_arr135 136 137#endif138// CHECK1-LABEL: define {{[^@]+}}@main139// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {140// CHECK1-NEXT:  entry:141// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4142// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8143// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8144// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1145// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4146// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8147// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])148// CHECK1-NEXT:    ret i32 0149//150//151// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68152// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {153// CHECK1-NEXT:  entry:154// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)155// CHECK1-NEXT:    ret void156//157//158// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined159// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {160// CHECK1-NEXT:  entry:161// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8162// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8163// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4164// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4165// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8166// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4167// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4168// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4169// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4170// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8171// CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8172// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8173// CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4174// CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4175// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4176// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8177// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8178// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8179// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4180// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4181// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4182// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4183// CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 8184// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8185// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4186// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)187// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4188// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1189// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]190// CHECK1:       cond.true:191// CHECK1-NEXT:    br label [[COND_END:%.*]]192// CHECK1:       cond.false:193// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4194// CHECK1-NEXT:    br label [[COND_END]]195// CHECK1:       cond.end:196// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]197// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4198// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4199// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4200// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]201// CHECK1:       omp.inner.for.cond:202// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]203// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]204// CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]205// CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]206// CHECK1:       omp.inner.for.body:207// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]208// CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64209// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]210// CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64211// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP5]]212// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]213// CHECK1:       omp.inner.for.inc:214// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]215// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]216// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]217// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]218// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]219// CHECK1:       omp.inner.for.end:220// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]221// CHECK1:       omp.loop.exit:222// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])223// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4224// CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0225// CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]226// CHECK1:       .omp.final.then:227// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4228// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]229// CHECK1:       .omp.final.done:230// CHECK1-NEXT:    ret void231//232//233// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined234// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {235// CHECK1-NEXT:  entry:236// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8238// CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8239// CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8240// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4241// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4242// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8243// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4244// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4245// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4246// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4247// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8248// CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8249// CHECK1-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8250// CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4251// CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4252// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4253// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8254// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8255// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8256// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8257// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8258// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8259// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4260// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4261// CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8262// CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32263// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8264// CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32265// CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4266// CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4267// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4268// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4269// CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP3]], align 8270// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8271// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4272// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)273// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4274// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1275// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]276// CHECK1:       cond.true:277// CHECK1-NEXT:    br label [[COND_END:%.*]]278// CHECK1:       cond.false:279// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4280// CHECK1-NEXT:    br label [[COND_END]]281// CHECK1:       cond.end:282// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]283// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4284// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4285// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4286// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]287// CHECK1:       omp.inner.for.cond:288// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]289// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]290// CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]291// CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]292// CHECK1:       omp.inner.for.body:293// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]294// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1295// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]296// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]297// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP9]]298// CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META10:![0-9]+]], !align [[META11:![0-9]+]], !llvm.access.group [[ACC_GRP9]]299// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP9]]300// CHECK1-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP9]]301// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP9]]302// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0303// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP9]]304// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1305// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META10]], !align [[META11]], !llvm.access.group [[ACC_GRP9]]306// CHECK1-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP9]]307// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2308// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP9]]309// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3310// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP9]]311// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP9]]312// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]313// CHECK1:       omp.body.continue:314// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]315// CHECK1:       omp.inner.for.inc:316// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]317// CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1318// CHECK1-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]319// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]320// CHECK1:       omp.inner.for.end:321// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]322// CHECK1:       omp.loop.exit:323// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])324// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4325// CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0326// CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]327// CHECK1:       .omp.final.then:328// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4329// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]330// CHECK1:       .omp.final.done:331// CHECK1-NEXT:    ret void332//333//334// CHECK3-LABEL: define {{[^@]+}}@main335// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {336// CHECK3-NEXT:  entry:337// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4338// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8339// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4340// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1341// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4342// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4343// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])344// CHECK3-NEXT:    ret i32 0345//346//347// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68348// CHECK3-SAME: () #[[ATTR2:[0-9]+]] {349// CHECK3-NEXT:  entry:350// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)351// CHECK3-NEXT:    ret void352//353//354// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined355// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {356// CHECK3-NEXT:  entry:357// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4358// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4359// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4360// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4361// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4362// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4363// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4364// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4365// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4366// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8367// CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8368// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4369// CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4370// CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4371// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4372// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4373// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4374// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4375// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4376// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4377// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4378// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4379// CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4380// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4381// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4382// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)383// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4384// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1385// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]386// CHECK3:       cond.true:387// CHECK3-NEXT:    br label [[COND_END:%.*]]388// CHECK3:       cond.false:389// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4390// CHECK3-NEXT:    br label [[COND_END]]391// CHECK3:       cond.end:392// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]393// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4394// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4395// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4396// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]397// CHECK3:       omp.inner.for.cond:398// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]399// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]400// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]401// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]402// CHECK3:       omp.inner.for.body:403// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]]404// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]405// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP6]]406// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]407// CHECK3:       omp.inner.for.inc:408// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]409// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]]410// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]411// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]412// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]413// CHECK3:       omp.inner.for.end:414// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]415// CHECK3:       omp.loop.exit:416// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])417// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4418// CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0419// CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]420// CHECK3:       .omp.final.then:421// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4422// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]423// CHECK3:       .omp.final.done:424// CHECK3-NEXT:    ret void425//426//427// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined428// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {429// CHECK3-NEXT:  entry:430// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4431// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4432// CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4433// CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4434// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4435// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4436// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4437// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4438// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4439// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4440// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4441// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8442// CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8443// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4444// CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4445// CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4446// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4447// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4448// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4449// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4450// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4451// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4452// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4453// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4454// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4455// CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4456// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4457// CHECK3-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4458// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4459// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4460// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4461// CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4462// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4463// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4464// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)465// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4466// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1467// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]468// CHECK3:       cond.true:469// CHECK3-NEXT:    br label [[COND_END:%.*]]470// CHECK3:       cond.false:471// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4472// CHECK3-NEXT:    br label [[COND_END]]473// CHECK3:       cond.end:474// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]475// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4476// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4477// CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4478// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]479// CHECK3:       omp.inner.for.cond:480// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]481// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]482// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]483// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]484// CHECK3:       omp.inner.for.body:485// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]486// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1487// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]488// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]489// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP10]]490// CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META11:![0-9]+]], !align [[META12:![0-9]+]], !llvm.access.group [[ACC_GRP10]]491// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP10]]492// CHECK3-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP10]]493// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP10]]494// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0495// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP10]]496// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1497// CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META11]], !align [[META12]], !llvm.access.group [[ACC_GRP10]]498// CHECK3-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP10]]499// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2500// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP10]]501// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3502// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP10]]503// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP10]]504// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]505// CHECK3:       omp.body.continue:506// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]507// CHECK3:       omp.inner.for.inc:508// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]509// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1510// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]511// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]512// CHECK3:       omp.inner.for.end:513// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]514// CHECK3:       omp.loop.exit:515// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])516// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4517// CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0518// CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]519// CHECK3:       .omp.final.then:520// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4521// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]522// CHECK3:       .omp.final.done:523// CHECK3-NEXT:    ret void524//525//526// CHECK5-LABEL: define {{[^@]+}}@main527// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {528// CHECK5-NEXT:  entry:529// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4530// CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8531// CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8532// CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1533// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4534// CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8535// CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])536// CHECK5-NEXT:    ret i32 0537//538//539// CHECK7-LABEL: define {{[^@]+}}@main540// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {541// CHECK7-NEXT:  entry:542// CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4543// CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8544// CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4545// CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1546// CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4547// CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4548// CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])549// CHECK7-NEXT:    ret i32 0550//551//552// CHECK9-LABEL: define {{[^@]+}}@main553// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {554// CHECK9-NEXT:  entry:555// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4556// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8557// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8558// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4559// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4560// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4561// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4562// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8563// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4564// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8565// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8566// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4567// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8568// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])569// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4570// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)571// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)572// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1573// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)574// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8575// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8576// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0577// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4578// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1579// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4580// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2581// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8582// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3583// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8584// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4585// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8586// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5587// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8588// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6589// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8590// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7591// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8592// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8593// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8594// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9595// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8596// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10597// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4598// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11599// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4600// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12601// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4602// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]])603// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0604// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]605// CHECK9:       omp_offload.failed:606// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]607// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]608// CHECK9:       omp_offload.cont:609// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()610// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4611// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0612// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2613// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]614// CHECK9:       arraydestroy.body:615// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]616// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1617// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]618// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]619// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]620// CHECK9:       arraydestroy.done2:621// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]622// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4623// CHECK9-NEXT:    ret i32 [[TMP16]]624//625//626// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev627// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {628// CHECK9-NEXT:  entry:629// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8630// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8631// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8632// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])633// CHECK9-NEXT:    ret void634//635//636// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef637// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {638// CHECK9-NEXT:  entry:639// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8640// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4641// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8642// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4643// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8644// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4645// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])646// CHECK9-NEXT:    ret void647//648//649// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95650// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {651// CHECK9-NEXT:  entry:652// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined)653// CHECK9-NEXT:    ret void654//655//656// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined657// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {658// CHECK9-NEXT:  entry:659// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8660// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8661// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4662// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4663// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8664// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4665// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4666// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4667// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4668// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4669// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4670// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4671// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4672// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8673// CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4674// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4675// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8676// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8677// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8678// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4679// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4680// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4681// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4682// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0683// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2684// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]685// CHECK9:       arrayctor.loop:686// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]687// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])688// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1689// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]690// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]691// CHECK9:       arrayctor.cont:692// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])693// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8694// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8695// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4696// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)697// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4698// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1699// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]700// CHECK9:       cond.true:701// CHECK9-NEXT:    br label [[COND_END:%.*]]702// CHECK9:       cond.false:703// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4704// CHECK9-NEXT:    br label [[COND_END]]705// CHECK9:       cond.end:706// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]707// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4708// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4709// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4710// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]711// CHECK9:       omp.inner.for.cond:712// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]713// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP7]]714// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]715// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]716// CHECK9:       omp.inner.for.cond.cleanup:717// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]718// CHECK9:       omp.inner.for.body:719// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP7]]720// CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64721// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP7]]722// CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64723// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP7]]724// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]725// CHECK9:       omp.inner.for.inc:726// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]727// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP7]]728// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]729// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]730// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]731// CHECK9:       omp.inner.for.end:732// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]733// CHECK9:       omp.loop.exit:734// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8735// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4736// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])737// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4738// CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0739// CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]740// CHECK9:       .omp.final.then:741// CHECK9-NEXT:    store i32 2, ptr [[I]], align 4742// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]743// CHECK9:       .omp.final.done:744// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]745// CHECK9-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0746// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i64 2747// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]748// CHECK9:       arraydestroy.body:749// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]750// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1751// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]752// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]753// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]754// CHECK9:       arraydestroy.done5:755// CHECK9-NEXT:    ret void756//757//758// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined759// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {760// CHECK9-NEXT:  entry:761// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8762// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8763// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8764// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8765// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4766// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4767// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8768// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4769// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4770// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4771// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4772// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4773// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4774// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4775// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4776// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8777// CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4778// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4779// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8780// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8781// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8782// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8783// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8784// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4785// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4786// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8787// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32788// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8789// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32790// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4791// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4792// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4793// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4794// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0795// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2796// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]797// CHECK9:       arrayctor.loop:798// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]799// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])800// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1801// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]802// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]803// CHECK9:       arrayctor.cont:804// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])805// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP3]], align 8806// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8807// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4808// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)809// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4810// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1811// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]812// CHECK9:       cond.true:813// CHECK9-NEXT:    br label [[COND_END:%.*]]814// CHECK9:       cond.false:815// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4816// CHECK9-NEXT:    br label [[COND_END]]817// CHECK9:       cond.end:818// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]819// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4820// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4821// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4822// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]823// CHECK9:       omp.inner.for.cond:824// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]825// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]826// CHECK9-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]827// CHECK9-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]828// CHECK9:       omp.inner.for.cond.cleanup:829// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]830// CHECK9:       omp.inner.for.body:831// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]832// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1833// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]834// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]835// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP11]]836// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]837// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64838// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]839// CHECK9-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]840// CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META12:![0-9]+]], !align [[META13:![0-9]+]], !llvm.access.group [[ACC_GRP11]]841// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]842// CHECK9-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64843// CHECK9-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]]844// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP11]]845// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]846// CHECK9:       omp.body.continue:847// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]848// CHECK9:       omp.inner.for.inc:849// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]850// CHECK9-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1851// CHECK9-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]852// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]853// CHECK9:       omp.inner.for.end:854// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]855// CHECK9:       omp.loop.exit:856// CHECK9-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8857// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4858// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])859// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4860// CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0861// CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]862// CHECK9:       .omp.final.then:863// CHECK9-NEXT:    store i32 2, ptr [[I]], align 4864// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]865// CHECK9:       .omp.final.done:866// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]867// CHECK9-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0868// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN8]], i64 2869// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]870// CHECK9:       arraydestroy.body:871// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]872// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1873// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]874// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]875// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]876// CHECK9:       arraydestroy.done9:877// CHECK9-NEXT:    ret void878//879//880// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev881// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {882// CHECK9-NEXT:  entry:883// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8884// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8885// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8886// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]887// CHECK9-NEXT:    ret void888//889//890// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v891// CHECK9-SAME: () #[[ATTR1]] comdat {892// CHECK9-NEXT:  entry:893// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4894// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4895// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4896// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4897// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4898// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8899// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4900// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8901// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8902// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])903// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4904// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)905// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)906// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1907// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)908// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8909// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8910// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0911// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4912// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1913// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4914// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2915// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8916// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3917// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8918// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4919// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8920// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5921// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8922// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6923// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8924// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7925// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8926// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8927// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8928// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9929// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8930// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10931// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4932// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11933// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4934// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12935// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4936// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])937// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0938// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]939// CHECK9:       omp_offload.failed:940// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]941// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]942// CHECK9:       omp_offload.cont:943// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4944// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0945// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2946// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]947// CHECK9:       arraydestroy.body:948// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]949// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1950// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]951// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]952// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]953// CHECK9:       arraydestroy.done2:954// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]955// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4956// CHECK9-NEXT:    ret i32 [[TMP16]]957//958//959// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev960// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {961// CHECK9-NEXT:  entry:962// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8963// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8964// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8965// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0966// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4967// CHECK9-NEXT:    ret void968//969//970// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef971// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {972// CHECK9-NEXT:  entry:973// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8974// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4975// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8976// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4977// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8978// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0979// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4980// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4981// CHECK9-NEXT:    ret void982//983//984// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev985// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {986// CHECK9-NEXT:  entry:987// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8988// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8989// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8990// CHECK9-NEXT:    ret void991//992//993// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev994// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {995// CHECK9-NEXT:  entry:996// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8997// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8998// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8999// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1000// CHECK9-NEXT:    ret void1001//1002//1003// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1004// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1005// CHECK9-NEXT:  entry:1006// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81007// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41008// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81009// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41010// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81011// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41012// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])1013// CHECK9-NEXT:    ret void1014//1015//1016// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491017// CHECK9-SAME: () #[[ATTR3]] {1018// CHECK9-NEXT:  entry:1019// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)1020// CHECK9-NEXT:    ret void1021//1022//1023// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1024// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1025// CHECK9-NEXT:  entry:1026// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81027// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81028// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41029// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41030// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81031// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41032// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41033// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41034// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41035// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41036// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41037// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41038// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41039// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81040// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41041// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81042// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81043// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 81044// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41045// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41046// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41047// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41048// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01049// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21050// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1051// CHECK9:       arrayctor.loop:1052// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1053// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1054// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11055// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1056// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1057// CHECK9:       arrayctor.cont:1058// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1059// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 81060// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81061// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41062// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1063// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41064// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11065// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1066// CHECK9:       cond.true:1067// CHECK9-NEXT:    br label [[COND_END:%.*]]1068// CHECK9:       cond.false:1069// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41070// CHECK9-NEXT:    br label [[COND_END]]1071// CHECK9:       cond.end:1072// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1073// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41074// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41075// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41076// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1077// CHECK9:       omp.inner.for.cond:1078// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1079// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1080// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1081// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1082// CHECK9:       omp.inner.for.cond.cleanup:1083// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1084// CHECK9:       omp.inner.for.body:1085// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]1086// CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i641087// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1088// CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i641089// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP18]]1090// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1091// CHECK9:       omp.inner.for.inc:1092// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1093// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]1094// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]1095// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1096// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1097// CHECK9:       omp.inner.for.end:1098// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1099// CHECK9:       omp.loop.exit:1100// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81101// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41102// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1103// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41104// CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 01105// CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1106// CHECK9:       .omp.final.then:1107// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41108// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1109// CHECK9:       .omp.final.done:1110// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1111// CHECK9-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01112// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 21113// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1114// CHECK9:       arraydestroy.body:1115// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1116// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11117// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1118// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]1119// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]1120// CHECK9:       arraydestroy.done5:1121// CHECK9-NEXT:    ret void1122//1123//1124// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined1125// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {1126// CHECK9-NEXT:  entry:1127// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81128// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81129// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81130// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81131// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41132// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41133// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81134// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41135// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41136// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41137// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41138// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41139// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41140// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41141// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41142// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 81143// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41144// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81145// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81146// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81147// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81148// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 81149// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41150// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41151// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81152// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i321153// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81154// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i321155// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41156// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41157// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41158// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41159// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01160// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21161// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1162// CHECK9:       arrayctor.loop:1163// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1164// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1165// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11166// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1167// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1168// CHECK9:       arrayctor.cont:1169// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1170// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP3]], align 81171// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81172// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41173// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1174// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41175// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11176// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1177// CHECK9:       cond.true:1178// CHECK9-NEXT:    br label [[COND_END:%.*]]1179// CHECK9:       cond.false:1180// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41181// CHECK9-NEXT:    br label [[COND_END]]1182// CHECK9:       cond.end:1183// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1184// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41185// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41186// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41187// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1188// CHECK9:       omp.inner.for.cond:1189// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]1190// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]1191// CHECK9-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1192// CHECK9-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1193// CHECK9:       omp.inner.for.cond.cleanup:1194// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1195// CHECK9:       omp.inner.for.body:1196// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1197// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11198// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1199// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1200// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP21]]1201// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1202// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i641203// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]1204// CHECK9-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]1205// CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !nonnull [[META12]], !align [[META13]], !llvm.access.group [[ACC_GRP21]]1206// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1207// CHECK9-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i641208// CHECK9-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]]1209// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP21]]1210// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1211// CHECK9:       omp.body.continue:1212// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1213// CHECK9:       omp.inner.for.inc:1214// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1215// CHECK9-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP14]], 11216// CHECK9-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1217// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]1218// CHECK9:       omp.inner.for.end:1219// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1220// CHECK9:       omp.loop.exit:1221// CHECK9-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81222// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 41223// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])1224// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41225// CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 01226// CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1227// CHECK9:       .omp.final.then:1228// CHECK9-NEXT:    store i32 2, ptr [[I]], align 41229// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1230// CHECK9:       .omp.final.done:1231// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1232// CHECK9-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01233// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 21234// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1235// CHECK9:       arraydestroy.body:1236// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1237// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11238// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1239// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]1240// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]1241// CHECK9:       arraydestroy.done9:1242// CHECK9-NEXT:    ret void1243//1244//1245// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1246// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1247// CHECK9-NEXT:  entry:1248// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81249// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81250// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81251// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1252// CHECK9-NEXT:    ret void1253//1254//1255// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1256// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1257// CHECK9-NEXT:  entry:1258// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81259// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81260// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81261// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01262// CHECK9-NEXT:    store i32 0, ptr [[F]], align 41263// CHECK9-NEXT:    ret void1264//1265//1266// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1267// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1268// CHECK9-NEXT:  entry:1269// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81270// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41271// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81272// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41273// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81274// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01275// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41276// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41277// CHECK9-NEXT:    ret void1278//1279//1280// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1281// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1282// CHECK9-NEXT:  entry:1283// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81284// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81285// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81286// CHECK9-NEXT:    ret void1287//1288//1289// CHECK11-LABEL: define {{[^@]+}}@main1290// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1291// CHECK11-NEXT:  entry:1292// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41293// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 81294// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 41295// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41296// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41297// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41298// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41299// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41300// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41301// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41302// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81303// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41304// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 41305// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1306// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41307// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1308// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1309// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11310// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1311// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41312// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41313// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01314// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 41315// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11316// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 41317// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21318// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41319// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31320// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 41321// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41322// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 41323// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51324// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 41325// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61326// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41327// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71328// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 41329// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81330// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 81331// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91332// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 81333// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101334// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41335// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111336// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41337// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121338// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 41339// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]])1340// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01341// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1342// CHECK11:       omp_offload.failed:1343// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]1344// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1345// CHECK11:       omp_offload.cont:1346// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1347// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41348// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01349// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21350// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1351// CHECK11:       arraydestroy.body:1352// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1353// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11354// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1355// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1356// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1357// CHECK11:       arraydestroy.done2:1358// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1359// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41360// CHECK11-NEXT:    ret i32 [[TMP16]]1361//1362//1363// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1364// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1365// CHECK11-NEXT:  entry:1366// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41367// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41368// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41369// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1370// CHECK11-NEXT:    ret void1371//1372//1373// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1374// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1375// CHECK11-NEXT:  entry:1376// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41377// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41378// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41379// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41380// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41381// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41382// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1383// CHECK11-NEXT:    ret void1384//1385//1386// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l951387// CHECK11-SAME: () #[[ATTR3:[0-9]+]] {1388// CHECK11-NEXT:  entry:1389// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined)1390// CHECK11-NEXT:    ret void1391//1392//1393// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined1394// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1395// CHECK11-NEXT:  entry:1396// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41397// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41398// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41399// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41400// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41401// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41402// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41403// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41404// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41405// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41406// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41407// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41408// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41409// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41410// CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 41411// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41412// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41413// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41414// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41415// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41416// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41417// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41418// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41419// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01420// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21421// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1422// CHECK11:       arrayctor.loop:1423// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1424// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1425// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11426// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1427// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1428// CHECK11:       arrayctor.cont:1429// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1430// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41431// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41432// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41433// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1434// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41435// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11436// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1437// CHECK11:       cond.true:1438// CHECK11-NEXT:    br label [[COND_END:%.*]]1439// CHECK11:       cond.false:1440// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41441// CHECK11-NEXT:    br label [[COND_END]]1442// CHECK11:       cond.end:1443// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1444// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41445// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41446// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41447// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1448// CHECK11:       omp.inner.for.cond:1449// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]1450// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]1451// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1452// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1453// CHECK11:       omp.inner.for.cond.cleanup:1454// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1455// CHECK11:       omp.inner.for.body:1456// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP8]]1457// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP8]]1458// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP8]]1459// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1460// CHECK11:       omp.inner.for.inc:1461// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]1462// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP8]]1463// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]1464// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]1465// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]1466// CHECK11:       omp.inner.for.end:1467// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1468// CHECK11:       omp.loop.exit:1469// CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41470// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41471// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])1472// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41473// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01474// CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1475// CHECK11:       .omp.final.then:1476// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41477// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1478// CHECK11:       .omp.final.done:1479// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1480// CHECK11-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01481// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i32 21482// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1483// CHECK11:       arraydestroy.body:1484// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1485// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11486// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1487// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]1488// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]1489// CHECK11:       arraydestroy.done5:1490// CHECK11-NEXT:    ret void1491//1492//1493// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined1494// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {1495// CHECK11-NEXT:  entry:1496// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41497// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41498// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41499// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41500// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41501// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41502// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41503// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41504// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41505// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41506// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41507// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41508// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41509// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41510// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41511// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41512// CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 41513// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41514// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41515// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41516// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41517// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41518// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41519// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41520// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41521// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41522// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41523// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 41524// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 41525// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41526// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41527// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01528// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21529// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1530// CHECK11:       arrayctor.loop:1531// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1532// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1533// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11534// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1535// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1536// CHECK11:       arrayctor.cont:1537// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1538// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41539// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41540// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41541// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1542// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41543// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11544// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1545// CHECK11:       cond.true:1546// CHECK11-NEXT:    br label [[COND_END:%.*]]1547// CHECK11:       cond.false:1548// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41549// CHECK11-NEXT:    br label [[COND_END]]1550// CHECK11:       cond.end:1551// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1552// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41553// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41554// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41555// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1556// CHECK11:       omp.inner.for.cond:1557// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]1558// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]1559// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1560// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1561// CHECK11:       omp.inner.for.cond.cleanup:1562// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1563// CHECK11:       omp.inner.for.body:1564// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]1565// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11566// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1567// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]1568// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP12]]1569// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]1570// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]1571// CHECK11-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]1572// CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META13:![0-9]+]], !align [[META14:![0-9]+]], !llvm.access.group [[ACC_GRP12]]1573// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]1574// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP13]]1575// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP12]]1576// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1577// CHECK11:       omp.body.continue:1578// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1579// CHECK11:       omp.inner.for.inc:1580// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]1581// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 11582// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]1583// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]1584// CHECK11:       omp.inner.for.end:1585// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1586// CHECK11:       omp.loop.exit:1587// CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41588// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 41589// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])1590// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41591// CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 01592// CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1593// CHECK11:       .omp.final.then:1594// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41595// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1596// CHECK11:       .omp.final.done:1597// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1598// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01599// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 21600// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1601// CHECK11:       arraydestroy.body:1602// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1603// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11604// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1605// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1606// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1607// CHECK11:       arraydestroy.done7:1608// CHECK11-NEXT:    ret void1609//1610//1611// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1612// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1613// CHECK11-NEXT:  entry:1614// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41615// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41616// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41617// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1618// CHECK11-NEXT:    ret void1619//1620//1621// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1622// CHECK11-SAME: () #[[ATTR1]] comdat {1623// CHECK11-NEXT:  entry:1624// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41625// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41626// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41627// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41628// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41629// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41630// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41631// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41632// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81633// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1634// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41635// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1636// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1637// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11638// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1639// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41640// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41641// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01642// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 41643// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11644// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 41645// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21646// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41647// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31648// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 41649// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41650// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 41651// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51652// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 41653// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61654// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41655// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71656// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 41657// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81658// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 81659// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91660// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 81661// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101662// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41663// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111664// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41665// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121666// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 41667// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1668// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01669// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1670// CHECK11:       omp_offload.failed:1671// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]1672// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1673// CHECK11:       omp_offload.cont:1674// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41675// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01676// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21677// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1678// CHECK11:       arraydestroy.body:1679// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1680// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11681// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1682// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1683// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1684// CHECK11:       arraydestroy.done2:1685// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1686// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41687// CHECK11-NEXT:    ret i32 [[TMP16]]1688//1689//1690// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1691// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1692// CHECK11-NEXT:  entry:1693// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41694// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41695// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41696// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01697// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 41698// CHECK11-NEXT:    ret void1699//1700//1701// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1702// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1703// CHECK11-NEXT:  entry:1704// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41705// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41706// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41707// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41708// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41709// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01710// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41711// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 41712// CHECK11-NEXT:    ret void1713//1714//1715// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1716// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1717// CHECK11-NEXT:  entry:1718// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41719// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41720// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41721// CHECK11-NEXT:    ret void1722//1723//1724// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1725// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1726// CHECK11-NEXT:  entry:1727// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41728// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41729// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41730// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1731// CHECK11-NEXT:    ret void1732//1733//1734// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1735// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1736// CHECK11-NEXT:  entry:1737// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41738// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41739// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41740// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41741// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41742// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41743// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1744// CHECK11-NEXT:    ret void1745//1746//1747// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491748// CHECK11-SAME: () #[[ATTR3]] {1749// CHECK11-NEXT:  entry:1750// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)1751// CHECK11-NEXT:    ret void1752//1753//1754// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1755// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1756// CHECK11-NEXT:  entry:1757// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41758// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41759// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41760// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41761// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41762// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41763// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41764// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41765// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41766// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41767// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41768// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41769// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41770// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41771// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41772// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41773// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41774// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41775// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41776// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 41777// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41778// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41779// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01780// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21781// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1782// CHECK11:       arrayctor.loop:1783// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1784// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1785// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11786// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1787// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1788// CHECK11:       arrayctor.cont:1789// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1790// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41791// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41792// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41793// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1794// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41795// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11796// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1797// CHECK11:       cond.true:1798// CHECK11-NEXT:    br label [[COND_END:%.*]]1799// CHECK11:       cond.false:1800// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41801// CHECK11-NEXT:    br label [[COND_END]]1802// CHECK11:       cond.end:1803// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1804// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41805// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41806// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41807// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1808// CHECK11:       omp.inner.for.cond:1809// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]1810// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]1811// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1812// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1813// CHECK11:       omp.inner.for.cond.cleanup:1814// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1815// CHECK11:       omp.inner.for.body:1816// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]]1817// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]1818// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP19]]1819// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1820// CHECK11:       omp.inner.for.inc:1821// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]1822// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]]1823// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]1824// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]1825// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]1826// CHECK11:       omp.inner.for.end:1827// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1828// CHECK11:       omp.loop.exit:1829// CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41830// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41831// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])1832// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41833// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01834// CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1835// CHECK11:       .omp.final.then:1836// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41837// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1838// CHECK11:       .omp.final.done:1839// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1840// CHECK11-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01841// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 21842// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1843// CHECK11:       arraydestroy.body:1844// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1845// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11846// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1847// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]1848// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]1849// CHECK11:       arraydestroy.done5:1850// CHECK11-NEXT:    ret void1851//1852//1853// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined1854// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {1855// CHECK11-NEXT:  entry:1856// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41857// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41858// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41859// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41860// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41861// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41862// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41863// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41864// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41865// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41866// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41867// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41868// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41869// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41870// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41871// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41872// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41873// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41874// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41875// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41876// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41877// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41878// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41879// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41880// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41881// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41882// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 41883// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 41884// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41885// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41886// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01887// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21888// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1889// CHECK11:       arrayctor.loop:1890// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1891// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1892// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11893// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1894// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1895// CHECK11:       arrayctor.cont:1896// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1897// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41898// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41899// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41900// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1901// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41902// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 11903// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1904// CHECK11:       cond.true:1905// CHECK11-NEXT:    br label [[COND_END:%.*]]1906// CHECK11:       cond.false:1907// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41908// CHECK11-NEXT:    br label [[COND_END]]1909// CHECK11:       cond.end:1910// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1911// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41912// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41913// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41914// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1915// CHECK11:       omp.inner.for.cond:1916// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]1917// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]1918// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1919// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1920// CHECK11:       omp.inner.for.cond.cleanup:1921// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1922// CHECK11:       omp.inner.for.body:1923// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]1924// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 11925// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1926// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]1927// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP22]]1928// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]1929// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]1930// CHECK11-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]1931// CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META13]], !align [[META14]], !llvm.access.group [[ACC_GRP22]]1932// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]1933// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]]1934// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP22]]1935// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1936// CHECK11:       omp.body.continue:1937// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1938// CHECK11:       omp.inner.for.inc:1939// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]1940// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 11941// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]1942// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]1943// CHECK11:       omp.inner.for.end:1944// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1945// CHECK11:       omp.loop.exit:1946// CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41947// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 41948// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP16]])1949// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41950// CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 01951// CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1952// CHECK11:       .omp.final.then:1953// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41954// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1955// CHECK11:       .omp.final.done:1956// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1957// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01958// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 21959// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1960// CHECK11:       arraydestroy.body:1961// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1962// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11963// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1964// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1965// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1966// CHECK11:       arraydestroy.done7:1967// CHECK11-NEXT:    ret void1968//1969//1970// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1971// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1972// CHECK11-NEXT:  entry:1973// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41974// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41975// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41976// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1977// CHECK11-NEXT:    ret void1978//1979//1980// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1981// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1982// CHECK11-NEXT:  entry:1983// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41984// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41985// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41986// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01987// CHECK11-NEXT:    store i32 0, ptr [[F]], align 41988// CHECK11-NEXT:    ret void1989//1990//1991// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1992// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1993// CHECK11-NEXT:  entry:1994// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41995// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41996// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41997// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41998// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41999// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02000// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42001// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42002// CHECK11-NEXT:    ret void2003//2004//2005// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2006// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2007// CHECK11-NEXT:  entry:2008// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42009// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42010// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42011// CHECK11-NEXT:    ret void2012//2013//2014// CHECK13-LABEL: define {{[^@]+}}@main2015// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {2016// CHECK13-NEXT:  entry:2017// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42018// CHECK13-NEXT:    [[G:%.*]] = alloca double, align 82019// CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 82020// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42021// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42022// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42023// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42024// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 82025// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 42026// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82027// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42028// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42029// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42030// CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42031// CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42032// CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 42033// CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 42034// CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82035// CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 42036// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 42037// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 42038// CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 82039// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2040// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 42041// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)2042// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2043// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 12044// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2045// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 82046// CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 82047// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42048// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42049// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42050// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42051// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02052// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 22053// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2054// CHECK13:       arrayctor.loop:2055// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2056// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2057// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 12058// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2059// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2060// CHECK13:       arrayctor.cont:2061// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2062// CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 82063// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2064// CHECK13:       omp.inner.for.cond:2065// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]2066// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]2067// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2068// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2069// CHECK13:       omp.inner.for.cond.cleanup:2070// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2071// CHECK13:       omp.inner.for.body:2072// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]2073// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12074// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2075// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]2076// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]]2077// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]2078// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i642079// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]2080// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]2081// CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]], !llvm.access.group [[ACC_GRP2]]2082// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]2083// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i642084// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]2085// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]2086// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2087// CHECK13:       omp.body.continue:2088// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2089// CHECK13:       omp.inner.for.inc:2090// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]2091// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 12092// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]2093// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]2094// CHECK13:       omp.inner.for.end:2095// CHECK13-NEXT:    store i32 2, ptr [[I]], align 42096// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]2097// CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02098// CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 22099// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2100// CHECK13:       arraydestroy.body:2101// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2102// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12103// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2104// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]2105// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]2106// CHECK13:       arraydestroy.done11:2107// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()2108// CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42109// CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02110// CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 22111// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]2112// CHECK13:       arraydestroy.body13:2113// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]2114// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -12115// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]]2116// CHECK13-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]2117// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]2118// CHECK13:       arraydestroy.done17:2119// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2120// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 42121// CHECK13-NEXT:    ret i32 [[TMP11]]2122//2123//2124// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2125// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {2126// CHECK13-NEXT:  entry:2127// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82128// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82129// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82130// CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2131// CHECK13-NEXT:    ret void2132//2133//2134// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2135// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2136// CHECK13-NEXT:  entry:2137// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82138// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42139// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82140// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42141// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82142// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42143// CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2144// CHECK13-NEXT:    ret void2145//2146//2147// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2148// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2149// CHECK13-NEXT:  entry:2150// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82151// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82152// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82153// CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2154// CHECK13-NEXT:    ret void2155//2156//2157// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2158// CHECK13-SAME: () #[[ATTR1]] comdat {2159// CHECK13-NEXT:  entry:2160// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42161// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42162// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42163// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42164// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42165// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 82166// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 42167// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82168// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42169// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42170// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42171// CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42172// CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42173// CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42174// CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 42175// CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82176// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 42177// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2178// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 42179// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)2180// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)2181// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 12182// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)2183// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 82184// CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 82185// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42186// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42187// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42188// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42189// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02190// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 22191// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2192// CHECK13:       arrayctor.loop:2193// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2194// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2195// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 12196// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2197// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2198// CHECK13:       arrayctor.cont:2199// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2200// CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 82201// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2202// CHECK13:       omp.inner.for.cond:2203// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]2204// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]2205// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2206// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2207// CHECK13:       omp.inner.for.cond.cleanup:2208// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2209// CHECK13:       omp.inner.for.body:2210// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2211// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12212// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2213// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2214// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP8]]2215// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2216// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i642217// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]2218// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]2219// CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP8]]2220// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2221// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i642222// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]2223// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP8]]2224// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2225// CHECK13:       omp.body.continue:2226// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2227// CHECK13:       omp.inner.for.inc:2228// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2229// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 12230// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2231// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]2232// CHECK13:       omp.inner.for.end:2233// CHECK13-NEXT:    store i32 2, ptr [[I]], align 42234// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]2235// CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02236// CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 22237// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2238// CHECK13:       arraydestroy.body:2239// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2240// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12241// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2242// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]2243// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]2244// CHECK13:       arraydestroy.done11:2245// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 42246// CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02247// CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 22248// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]2249// CHECK13:       arraydestroy.body13:2250// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]2251// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -12252// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]]2253// CHECK13-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]2254// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]2255// CHECK13:       arraydestroy.done17:2256// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2257// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 42258// CHECK13-NEXT:    ret i32 [[TMP11]]2259//2260//2261// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2262// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2263// CHECK13-NEXT:  entry:2264// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82265// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82266// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82267// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02268// CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 42269// CHECK13-NEXT:    ret void2270//2271//2272// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2273// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2274// CHECK13-NEXT:  entry:2275// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82276// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82277// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82278// CHECK13-NEXT:    ret void2279//2280//2281// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2282// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2283// CHECK13-NEXT:  entry:2284// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82285// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42286// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82287// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42288// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82289// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02290// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42291// CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 42292// CHECK13-NEXT:    ret void2293//2294//2295// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2296// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2297// CHECK13-NEXT:  entry:2298// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82299// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82300// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82301// CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2302// CHECK13-NEXT:    ret void2303//2304//2305// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2306// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2307// CHECK13-NEXT:  entry:2308// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82309// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42310// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82311// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42312// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82313// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42314// CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])2315// CHECK13-NEXT:    ret void2316//2317//2318// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2319// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2320// CHECK13-NEXT:  entry:2321// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82322// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82323// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82324// CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2325// CHECK13-NEXT:    ret void2326//2327//2328// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2329// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2330// CHECK13-NEXT:  entry:2331// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82332// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82333// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82334// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02335// CHECK13-NEXT:    store i32 0, ptr [[F]], align 42336// CHECK13-NEXT:    ret void2337//2338//2339// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2340// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2341// CHECK13-NEXT:  entry:2342// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82343// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42344// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82345// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42346// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82347// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02348// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42349// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42350// CHECK13-NEXT:    ret void2351//2352//2353// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2354// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2355// CHECK13-NEXT:  entry:2356// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82357// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82358// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82359// CHECK13-NEXT:    ret void2360//2361//2362// CHECK15-LABEL: define {{[^@]+}}@main2363// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2364// CHECK15-NEXT:  entry:2365// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42366// CHECK15-NEXT:    [[G:%.*]] = alloca double, align 82367// CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 42368// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42369// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42370// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42371// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42372// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42373// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 42374// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42375// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42376// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42377// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42378// CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42379// CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42380// CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 42381// CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 42382// CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42383// CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 42384// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42385// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42386// CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 42387// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2388// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42389// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)2390// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2391// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 12392// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2393// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42394// CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 42395// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42396// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42397// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42398// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42399// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02400// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22401// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2402// CHECK15:       arrayctor.loop:2403// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2404// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2405// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12406// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2407// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2408// CHECK15:       arrayctor.cont:2409// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2410// CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42411// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2412// CHECK15:       omp.inner.for.cond:2413// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]2414// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]2415// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2416// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2417// CHECK15:       omp.inner.for.cond.cleanup:2418// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2419// CHECK15:       omp.inner.for.body:2420// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2421// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12422// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2423// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2424// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]]2425// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2426// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]2427// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]2428// CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]], !llvm.access.group [[ACC_GRP3]]2429// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2430// CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]2431// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]2432// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2433// CHECK15:       omp.body.continue:2434// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2435// CHECK15:       omp.inner.for.inc:2436// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2437// CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 12438// CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2439// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]2440// CHECK15:       omp.inner.for.end:2441// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42442// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]2443// CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02444// CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 22445// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2446// CHECK15:       arraydestroy.body:2447// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2448// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12449// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2450// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]2451// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]2452// CHECK15:       arraydestroy.done10:2453// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2454// CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42455// CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02456// CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 22457// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]2458// CHECK15:       arraydestroy.body12:2459// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]2460// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -12461// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]]2462// CHECK15-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]2463// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]2464// CHECK15:       arraydestroy.done16:2465// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2466// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 42467// CHECK15-NEXT:    ret i32 [[TMP11]]2468//2469//2470// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2471// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {2472// CHECK15-NEXT:  entry:2473// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42474// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42475// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42476// CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2477// CHECK15-NEXT:    ret void2478//2479//2480// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2481// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2482// CHECK15-NEXT:  entry:2483// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42484// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42485// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42486// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42487// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42488// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42489// CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2490// CHECK15-NEXT:    ret void2491//2492//2493// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2494// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2495// CHECK15-NEXT:  entry:2496// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42497// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42498// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42499// CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2500// CHECK15-NEXT:    ret void2501//2502//2503// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2504// CHECK15-SAME: () #[[ATTR1]] comdat {2505// CHECK15-NEXT:  entry:2506// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42507// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42508// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42509// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42510// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42511// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42512// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 42513// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42514// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42515// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42516// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42517// CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42518// CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42519// CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42520// CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 42521// CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42522// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42523// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2524// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42525// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2526// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2527// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12528// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2529// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42530// CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 42531// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42532// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42533// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42534// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42535// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02536// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22537// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2538// CHECK15:       arrayctor.loop:2539// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2540// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2541// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12542// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2543// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2544// CHECK15:       arrayctor.cont:2545// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2546// CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42547// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2548// CHECK15:       omp.inner.for.cond:2549// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]2550// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]2551// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2552// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2553// CHECK15:       omp.inner.for.cond.cleanup:2554// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2555// CHECK15:       omp.inner.for.body:2556// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2557// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12558// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2559// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2560// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP9]]2561// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2562// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]2563// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]2564// CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META4]], !align [[META5]], !llvm.access.group [[ACC_GRP9]]2565// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2566// CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]2567// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP9]]2568// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2569// CHECK15:       omp.body.continue:2570// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2571// CHECK15:       omp.inner.for.inc:2572// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2573// CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 12574// CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2575// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]2576// CHECK15:       omp.inner.for.end:2577// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42578// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]2579// CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02580// CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 22581// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2582// CHECK15:       arraydestroy.body:2583// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2584// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12585// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2586// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]2587// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]2588// CHECK15:       arraydestroy.done10:2589// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42590// CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02591// CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 22592// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]2593// CHECK15:       arraydestroy.body12:2594// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]2595// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -12596// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]]2597// CHECK15-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]2598// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]2599// CHECK15:       arraydestroy.done16:2600// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2601// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 42602// CHECK15-NEXT:    ret i32 [[TMP11]]2603//2604//2605// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2606// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2607// CHECK15-NEXT:  entry:2608// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42609// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42610// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42611// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02612// CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 42613// CHECK15-NEXT:    ret void2614//2615//2616// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2617// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2618// CHECK15-NEXT:  entry:2619// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42620// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42621// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42622// CHECK15-NEXT:    ret void2623//2624//2625// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2626// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2627// CHECK15-NEXT:  entry:2628// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42629// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42630// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42631// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42632// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42633// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02634// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42635// CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 42636// CHECK15-NEXT:    ret void2637//2638//2639// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2640// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2641// CHECK15-NEXT:  entry:2642// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42643// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42644// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42645// CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2646// CHECK15-NEXT:    ret void2647//2648//2649// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2650// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2651// CHECK15-NEXT:  entry:2652// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42653// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42654// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42655// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42656// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42657// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42658// CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2659// CHECK15-NEXT:    ret void2660//2661//2662// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2663// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2664// CHECK15-NEXT:  entry:2665// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42666// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42667// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42668// CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2669// CHECK15-NEXT:    ret void2670//2671//2672// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2673// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2674// CHECK15-NEXT:  entry:2675// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42676// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42677// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42678// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02679// CHECK15-NEXT:    store i32 0, ptr [[F]], align 42680// CHECK15-NEXT:    ret void2681//2682//2683// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2684// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2685// CHECK15-NEXT:  entry:2686// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42687// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42688// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42689// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42690// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42691// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02692// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42693// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42694// CHECK15-NEXT:    ret void2695//2696//2697// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2698// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2699// CHECK15-NEXT:  entry:2700// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42701// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42702// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42703// CHECK15-NEXT:    ret void2704//2705