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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"24// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"26// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"27// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"29// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target50  #pragma omp teams51#pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var)52  for (int i = 0; i < 2; ++i) {53    vec[i] = t_var;54    s_arr[i] = var;55  }56  return T();57}58 59int main() {60  static int svar;61  volatile double g;62  volatile double &g1 = g;63 64  #ifdef LAMBDA65  [&]() {66    static float sfvar;67 68    #pragma omp target69    #pragma omp teams70#pragma omp distribute private(g, g1, svar, sfvar)71    for (int i = 0; i < 2; ++i) {72      g = 1;73      g1 = 1;74      svar = 3;75      sfvar = 4.0;76      [&]() {77	g = 2;78	g1 = 2;79	svar = 4;80	sfvar = 8.0;81 82      }();83    }84  }();85  return 0;86  #else87  S<float> test;88  int t_var = 0;89  int vec[] = {1, 2};90  S<float> s_arr[] = {1, 2};91  S<float> &var = test;92 93  #pragma omp target94  #pragma omp teams95#pragma omp distribute private(t_var, vec, s_arr, s_arr, var, var, svar)96  for (int i = 0; i < 2; ++i) {97    vec[i] = t_var;98    s_arr[i] = var;99  }100  int i;101 102  #pragma omp target103  #pragma omp teams104#pragma omp distribute private(i)105  for (i = 0; i < 2; ++i) {106    ;107  }108  return tmain<int>();109  #endif110}111 112 113 114 115 116#endif117// CHECK1-LABEL: define {{[^@]+}}@main118// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {119// CHECK1-NEXT:  entry:120// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4121// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8122// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8123// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1124// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4125// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8126// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])127// CHECK1-NEXT:    ret i32 0128//129//130// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68131// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {132// CHECK1-NEXT:  entry:133// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)134// CHECK1-NEXT:    ret void135//136//137// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined138// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {139// CHECK1-NEXT:  entry:140// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8141// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8142// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4143// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4144// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8145// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4146// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4147// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4148// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4149// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8150// CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8151// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8152// CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4153// CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4154// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4155// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8156// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8157// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8158// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8159// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4160// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4161// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4162// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4163// CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 8164// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8165// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4166// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)167// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4168// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1169// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]170// CHECK1:       cond.true:171// CHECK1-NEXT:    br label [[COND_END:%.*]]172// CHECK1:       cond.false:173// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4174// CHECK1-NEXT:    br label [[COND_END]]175// CHECK1:       cond.end:176// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]177// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4178// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4179// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4180// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]181// CHECK1:       omp.inner.for.cond:182// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4183// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4184// CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]185// CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]186// CHECK1:       omp.inner.for.body:187// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4188// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1189// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]190// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4191// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G]], align 8192// CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 8193// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP8]], align 8194// CHECK1-NEXT:    store i32 3, ptr [[SVAR]], align 4195// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4196// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0197// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP9]], align 8198// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1199// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 8200// CHECK1-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 8201// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2202// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[TMP12]], align 8203// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3204// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[TMP13]], align 8205// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])206// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]207// CHECK1:       omp.body.continue:208// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]209// CHECK1:       omp.inner.for.inc:210// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4211// CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1212// CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4213// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]214// CHECK1:       omp.inner.for.end:215// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]216// CHECK1:       omp.loop.exit:217// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])218// CHECK1-NEXT:    ret void219//220//221// CHECK3-LABEL: define {{[^@]+}}@main222// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {223// CHECK3-NEXT:  entry:224// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4225// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8226// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4227// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1228// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4229// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4230// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])231// CHECK3-NEXT:    ret i32 0232//233//234// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68235// CHECK3-SAME: () #[[ATTR2:[0-9]+]] {236// CHECK3-NEXT:  entry:237// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)238// CHECK3-NEXT:    ret void239//240//241// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined242// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {243// CHECK3-NEXT:  entry:244// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4245// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4246// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4247// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4248// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4249// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4250// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4251// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4252// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4253// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8254// CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8255// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4256// CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4257// CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4258// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4259// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4260// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4261// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4262// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4263// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4264// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4265// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4266// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4267// CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4268// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4269// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4270// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)271// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4272// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1273// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]274// CHECK3:       cond.true:275// CHECK3-NEXT:    br label [[COND_END:%.*]]276// CHECK3:       cond.false:277// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4278// CHECK3-NEXT:    br label [[COND_END]]279// CHECK3:       cond.end:280// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]281// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4282// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4283// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4284// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]285// CHECK3:       omp.inner.for.cond:286// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4287// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4288// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]289// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]290// CHECK3:       omp.inner.for.body:291// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4292// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1293// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]294// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4295// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G]], align 8296// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 4297// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP8]], align 4298// CHECK3-NEXT:    store i32 3, ptr [[SVAR]], align 4299// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4300// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0301// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP9]], align 4302// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1303// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 4304// CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 4305// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2306// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[TMP12]], align 4307// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3308// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[TMP13]], align 4309// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])310// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]311// CHECK3:       omp.body.continue:312// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]313// CHECK3:       omp.inner.for.inc:314// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4315// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1316// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4317// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]318// CHECK3:       omp.inner.for.end:319// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]320// CHECK3:       omp.loop.exit:321// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])322// CHECK3-NEXT:    ret void323//324//325// CHECK9-LABEL: define {{[^@]+}}@main326// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {327// CHECK9-NEXT:  entry:328// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4329// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8330// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8331// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4332// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4333// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4334// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4335// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8336// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4337// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8338// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8339// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4340// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4341// CHECK9-NEXT:    [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8342// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4343// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8344// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])345// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4346// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)347// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)348// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1349// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)350// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8351// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8352// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0353// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4354// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1355// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4356// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2357// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8358// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3359// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8360// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4361// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8362// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5363// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8364// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6365// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8366// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7367// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8368// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8369// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8370// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9371// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8372// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10373// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4374// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11375// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4376// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12377// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4378// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]])379// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0380// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]381// CHECK9:       omp_offload.failed:382// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]]383// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]384// CHECK9:       omp_offload.cont:385// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 0386// CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4387// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 1388// CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4389// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 2390// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8391// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 3392// CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8393// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 4394// CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8395// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 5396// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8397// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 6398// CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8399// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 7400// CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8401// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 8402// CHECK9-NEXT:    store i64 2, ptr [[TMP23]], align 8403// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 9404// CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8405// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 10406// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4407// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 11408// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4409// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 12410// CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4411// CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]])412// CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0413// CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]]414// CHECK9:       omp_offload.failed4:415// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]]416// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT5]]417// CHECK9:       omp_offload.cont5:418// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()419// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4420// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0421// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2422// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]423// CHECK9:       arraydestroy.body:424// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]425// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1426// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]427// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]428// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]429// CHECK9:       arraydestroy.done6:430// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]431// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[RETVAL]], align 4432// CHECK9-NEXT:    ret i32 [[TMP31]]433//434//435// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev436// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {437// CHECK9-NEXT:  entry:438// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8439// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8440// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8441// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])442// CHECK9-NEXT:    ret void443//444//445// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef446// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {447// CHECK9-NEXT:  entry:448// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8449// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4450// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8451// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4452// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8453// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4454// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])455// CHECK9-NEXT:    ret void456//457//458// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93459// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {460// CHECK9-NEXT:  entry:461// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined)462// CHECK9-NEXT:    ret void463//464//465// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined466// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {467// CHECK9-NEXT:  entry:468// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8469// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8470// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4471// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4472// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8473// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4474// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4475// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4476// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4477// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4478// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4479// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4480// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4481// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8482// CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4483// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4484// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8485// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8486// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8487// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4488// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4489// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4490// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4491// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0492// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2493// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]494// CHECK9:       arrayctor.loop:495// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]496// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])497// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1498// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]499// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]500// CHECK9:       arrayctor.cont:501// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])502// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8503// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8504// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4505// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)506// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4507// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1508// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]509// CHECK9:       cond.true:510// CHECK9-NEXT:    br label [[COND_END:%.*]]511// CHECK9:       cond.false:512// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4513// CHECK9-NEXT:    br label [[COND_END]]514// CHECK9:       cond.end:515// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]516// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4517// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4518// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4519// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]520// CHECK9:       omp.inner.for.cond:521// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4522// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4523// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]524// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]525// CHECK9:       omp.inner.for.cond.cleanup:526// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]527// CHECK9:       omp.inner.for.body:528// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4529// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1530// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]531// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4532// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4533// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4534// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64535// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]536// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4537// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8538// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4539// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64540// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]]541// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false)542// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]543// CHECK9:       omp.body.continue:544// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]545// CHECK9:       omp.inner.for.inc:546// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4547// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1548// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4549// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]550// CHECK9:       omp.inner.for.end:551// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]552// CHECK9:       omp.loop.exit:553// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8554// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4555// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])556// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]557// CHECK9-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0558// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2559// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]560// CHECK9:       arraydestroy.body:561// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]562// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1563// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]564// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]565// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]566// CHECK9:       arraydestroy.done8:567// CHECK9-NEXT:    ret void568//569//570// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev571// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {572// CHECK9-NEXT:  entry:573// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8574// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8575// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8576// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]577// CHECK9-NEXT:    ret void578//579//580// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102581// CHECK9-SAME: () #[[ATTR3]] {582// CHECK9-NEXT:  entry:583// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined)584// CHECK9-NEXT:    ret void585//586//587// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined588// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {589// CHECK9-NEXT:  entry:590// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8591// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8592// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4593// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4594// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4595// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4596// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4597// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4598// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4599// CHECK9-NEXT:    [[I1:%.*]] = alloca i32, align 4600// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8601// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8602// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4603// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4604// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4605// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4606// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8607// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4608// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)609// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4610// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1611// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]612// CHECK9:       cond.true:613// CHECK9-NEXT:    br label [[COND_END:%.*]]614// CHECK9:       cond.false:615// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4616// CHECK9-NEXT:    br label [[COND_END]]617// CHECK9:       cond.end:618// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]619// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4620// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4621// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4622// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]623// CHECK9:       omp.inner.for.cond:624// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4625// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4626// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]627// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]628// CHECK9:       omp.inner.for.body:629// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4630// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1631// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]632// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4633// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]634// CHECK9:       omp.body.continue:635// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]636// CHECK9:       omp.inner.for.inc:637// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4638// CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1639// CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4640// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]641// CHECK9:       omp.inner.for.end:642// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]643// CHECK9:       omp.loop.exit:644// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])645// CHECK9-NEXT:    ret void646//647//648// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v649// CHECK9-SAME: () #[[ATTR1]] comdat {650// CHECK9-NEXT:  entry:651// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4652// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4653// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4654// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4655// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4656// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8657// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4658// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8659// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8660// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])661// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4662// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)663// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)664// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1665// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)666// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8667// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8668// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0669// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4670// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1671// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4672// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2673// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8674// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3675// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8676// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4677// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8678// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5679// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8680// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6681// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8682// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7683// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8684// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8685// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8686// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9687// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8688// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10689// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4690// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11691// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4692// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12693// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4694// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])695// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0696// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]697// CHECK9:       omp_offload.failed:698// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]699// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]700// CHECK9:       omp_offload.cont:701// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4702// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0703// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2704// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]705// CHECK9:       arraydestroy.body:706// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]707// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1708// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]709// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]710// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]711// CHECK9:       arraydestroy.done2:712// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]713// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4714// CHECK9-NEXT:    ret i32 [[TMP16]]715//716//717// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev718// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {719// CHECK9-NEXT:  entry:720// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8721// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8722// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8723// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0724// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4725// CHECK9-NEXT:    ret void726//727//728// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef729// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {730// CHECK9-NEXT:  entry:731// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8732// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4733// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8734// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4735// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8736// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0737// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4738// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4739// CHECK9-NEXT:    ret void740//741//742// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev743// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {744// CHECK9-NEXT:  entry:745// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8746// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8747// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8748// CHECK9-NEXT:    ret void749//750//751// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev752// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {753// CHECK9-NEXT:  entry:754// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8755// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8756// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8757// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])758// CHECK9-NEXT:    ret void759//760//761// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei762// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {763// CHECK9-NEXT:  entry:764// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8765// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4766// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8767// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4768// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8769// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4770// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])771// CHECK9-NEXT:    ret void772//773//774// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49775// CHECK9-SAME: () #[[ATTR3]] {776// CHECK9-NEXT:  entry:777// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)778// CHECK9-NEXT:    ret void779//780//781// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined782// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {783// CHECK9-NEXT:  entry:784// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8785// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8786// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4787// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4788// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8789// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4790// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4791// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4792// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4793// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4794// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4795// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4796// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4797// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8798// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4799// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8800// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8801// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8802// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4803// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4804// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4805// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4806// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0807// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2808// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]809// CHECK9:       arrayctor.loop:810// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]811// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])812// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1813// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]814// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]815// CHECK9:       arrayctor.cont:816// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])817// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8818// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8819// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4820// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)821// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4822// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1823// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]824// CHECK9:       cond.true:825// CHECK9-NEXT:    br label [[COND_END:%.*]]826// CHECK9:       cond.false:827// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4828// CHECK9-NEXT:    br label [[COND_END]]829// CHECK9:       cond.end:830// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]831// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4832// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4833// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4834// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]835// CHECK9:       omp.inner.for.cond:836// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4837// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4838// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]839// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]840// CHECK9:       omp.inner.for.cond.cleanup:841// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]842// CHECK9:       omp.inner.for.body:843// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4844// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1845// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]846// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4847// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4848// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4849// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64850// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]851// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4852// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8853// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4854// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64855// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]]856// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false)857// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]858// CHECK9:       omp.body.continue:859// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]860// CHECK9:       omp.inner.for.inc:861// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4862// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1863// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4864// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]865// CHECK9:       omp.inner.for.end:866// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]867// CHECK9:       omp.loop.exit:868// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8869// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4870// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])871// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]872// CHECK9-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0873// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN7]], i64 2874// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]875// CHECK9:       arraydestroy.body:876// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]877// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1878// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]879// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]880// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]881// CHECK9:       arraydestroy.done8:882// CHECK9-NEXT:    ret void883//884//885// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev886// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {887// CHECK9-NEXT:  entry:888// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8889// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8890// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8891// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]892// CHECK9-NEXT:    ret void893//894//895// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev896// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {897// CHECK9-NEXT:  entry:898// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8899// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8900// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8901// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0902// CHECK9-NEXT:    store i32 0, ptr [[F]], align 4903// CHECK9-NEXT:    ret void904//905//906// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei907// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {908// CHECK9-NEXT:  entry:909// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8910// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4911// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8912// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4913// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8914// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0915// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4916// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4917// CHECK9-NEXT:    ret void918//919//920// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev921// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {922// CHECK9-NEXT:  entry:923// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8924// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8925// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8926// CHECK9-NEXT:    ret void927//928//929// CHECK11-LABEL: define {{[^@]+}}@main930// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {931// CHECK11-NEXT:  entry:932// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4933// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8934// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 4935// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4936// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4937// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4938// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4939// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4940// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4941// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4942// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8943// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4944// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4945// CHECK11-NEXT:    [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8946// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4947// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 4948// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])949// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4950// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)951// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)952// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1953// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)954// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4955// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4956// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0957// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4958// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1959// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4960// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2961// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 4962// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3963// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 4964// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4965// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 4966// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5967// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 4968// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6969// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 4970// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7971// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 4972// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8973// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 8974// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9975// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8976// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10977// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4978// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11979// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4980// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12981// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4982// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]])983// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0984// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]985// CHECK11:       omp_offload.failed:986// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]]987// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]988// CHECK11:       omp_offload.cont:989// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 0990// CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4991// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 1992// CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4993// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 2994// CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 4995// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 3996// CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 4997// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 4998// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4999// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 51000// CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 41001// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 61002// CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 41003// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 71004// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 41005// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 81006// CHECK11-NEXT:    store i64 2, ptr [[TMP23]], align 81007// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 91008// CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 81009// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 101010// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 41011// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 111012// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 41013// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 121014// CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 41015// CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]])1016// CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 01017// CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]]1018// CHECK11:       omp_offload.failed4:1019// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102() #[[ATTR4]]1020// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT5]]1021// CHECK11:       omp_offload.cont5:1022// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1023// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41024// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01025// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21026// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1027// CHECK11:       arraydestroy.body:1028// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1029// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11030// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1031// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1032// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]1033// CHECK11:       arraydestroy.done6:1034// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1035// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[RETVAL]], align 41036// CHECK11-NEXT:    ret i32 [[TMP31]]1037//1038//1039// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1040// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1041// CHECK11-NEXT:  entry:1042// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41043// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41044// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41045// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1046// CHECK11-NEXT:    ret void1047//1048//1049// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1050// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1051// CHECK11-NEXT:  entry:1052// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41053// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41054// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41055// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41056// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41057// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41058// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1059// CHECK11-NEXT:    ret void1060//1061//1062// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l931063// CHECK11-SAME: () #[[ATTR3:[0-9]+]] {1064// CHECK11-NEXT:  entry:1065// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined)1066// CHECK11-NEXT:    ret void1067//1068//1069// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined1070// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1071// CHECK11-NEXT:  entry:1072// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41073// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41074// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41075// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41076// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41077// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41078// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41079// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41080// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41081// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41082// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41083// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41084// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41085// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41086// CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 41087// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41088// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41089// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41090// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41091// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41092// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41093// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41094// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41095// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01096// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21097// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1098// CHECK11:       arrayctor.loop:1099// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1100// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1101// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11102// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1103// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1104// CHECK11:       arrayctor.cont:1105// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1106// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41107// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41108// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41109// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1110// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41111// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11112// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1113// CHECK11:       cond.true:1114// CHECK11-NEXT:    br label [[COND_END:%.*]]1115// CHECK11:       cond.false:1116// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41117// CHECK11-NEXT:    br label [[COND_END]]1118// CHECK11:       cond.end:1119// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1120// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41121// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41122// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41123// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1124// CHECK11:       omp.inner.for.cond:1125// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41126// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41127// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1128// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1129// CHECK11:       omp.inner.for.cond.cleanup:1130// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1131// CHECK11:       omp.inner.for.body:1132// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41133// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11134// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1135// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41136// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 41137// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 41138// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]1139// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 41140// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 41141// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41142// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP11]]1143// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false)1144// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1145// CHECK11:       omp.body.continue:1146// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1147// CHECK11:       omp.inner.for.inc:1148// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41149// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 11150// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 41151// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1152// CHECK11:       omp.inner.for.end:1153// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1154// CHECK11:       omp.loop.exit:1155// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41156// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41157// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1158// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1159// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01160// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 21161// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1162// CHECK11:       arraydestroy.body:1163// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1164// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11165// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1166// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1167// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1168// CHECK11:       arraydestroy.done7:1169// CHECK11-NEXT:    ret void1170//1171//1172// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1173// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1174// CHECK11-NEXT:  entry:1175// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41176// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41177// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41178// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1179// CHECK11-NEXT:    ret void1180//1181//1182// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1021183// CHECK11-SAME: () #[[ATTR3]] {1184// CHECK11-NEXT:  entry:1185// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined)1186// CHECK11-NEXT:    ret void1187//1188//1189// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined1190// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1191// CHECK11-NEXT:  entry:1192// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41193// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41194// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41195// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41196// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41197// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41198// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41199// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41200// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41201// CHECK11-NEXT:    [[I1:%.*]] = alloca i32, align 41202// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41203// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41204// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41205// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41206// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41207// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41208// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41209// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41210// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1211// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41212// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11213// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1214// CHECK11:       cond.true:1215// CHECK11-NEXT:    br label [[COND_END:%.*]]1216// CHECK11:       cond.false:1217// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41218// CHECK11-NEXT:    br label [[COND_END]]1219// CHECK11:       cond.end:1220// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1221// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41222// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41223// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41224// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1225// CHECK11:       omp.inner.for.cond:1226// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41227// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41228// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1229// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1230// CHECK11:       omp.inner.for.body:1231// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41232// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11233// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1234// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41235// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1236// CHECK11:       omp.body.continue:1237// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1238// CHECK11:       omp.inner.for.inc:1239// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41240// CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP8]], 11241// CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 41242// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1243// CHECK11:       omp.inner.for.end:1244// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1245// CHECK11:       omp.loop.exit:1246// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1247// CHECK11-NEXT:    ret void1248//1249//1250// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1251// CHECK11-SAME: () #[[ATTR1]] comdat {1252// CHECK11-NEXT:  entry:1253// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41254// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41255// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41256// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41257// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41258// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41259// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41260// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41261// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81262// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1263// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41264// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1265// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1266// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11267// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1268// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41269// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41270// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01271// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 41272// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11273// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 41274// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21275// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41276// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31277// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 41278// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41279// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 41280// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51281// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 41282// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61283// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41284// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71285// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 41286// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81287// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 81288// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91289// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 81290// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101291// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41292// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111293// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 41294// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121295// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 41296// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1297// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01298// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1299// CHECK11:       omp_offload.failed:1300// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]1301// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1302// CHECK11:       omp_offload.cont:1303// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41304// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01305// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21306// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1307// CHECK11:       arraydestroy.body:1308// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1309// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11310// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1311// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1312// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1313// CHECK11:       arraydestroy.done2:1314// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1315// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41316// CHECK11-NEXT:    ret i32 [[TMP16]]1317//1318//1319// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1320// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1321// CHECK11-NEXT:  entry:1322// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41323// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41324// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41325// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01326// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 41327// CHECK11-NEXT:    ret void1328//1329//1330// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1331// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1332// CHECK11-NEXT:  entry:1333// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41334// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41335// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41336// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41337// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41338// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01339// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41340// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 41341// CHECK11-NEXT:    ret void1342//1343//1344// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1345// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1346// CHECK11-NEXT:  entry:1347// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41348// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41349// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41350// CHECK11-NEXT:    ret void1351//1352//1353// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1354// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1355// CHECK11-NEXT:  entry:1356// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41357// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41358// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41359// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1360// CHECK11-NEXT:    ret void1361//1362//1363// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1364// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1365// CHECK11-NEXT:  entry:1366// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41367// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41368// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41369// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41370// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41371// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41372// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1373// CHECK11-NEXT:    ret void1374//1375//1376// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491377// CHECK11-SAME: () #[[ATTR3]] {1378// CHECK11-NEXT:  entry:1379// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)1380// CHECK11-NEXT:    ret void1381//1382//1383// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1384// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1385// CHECK11-NEXT:  entry:1386// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41387// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41388// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41389// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41390// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41391// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41392// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41393// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41394// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41395// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41396// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41397// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41398// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41399// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41400// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41401// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41402// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41403// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41404// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41405// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41406// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41407// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41408// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01409// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21410// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1411// CHECK11:       arrayctor.loop:1412// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1413// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1414// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11415// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1416// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1417// CHECK11:       arrayctor.cont:1418// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1419// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41420// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41421// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41422// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1423// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41424// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11425// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1426// CHECK11:       cond.true:1427// CHECK11-NEXT:    br label [[COND_END:%.*]]1428// CHECK11:       cond.false:1429// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41430// CHECK11-NEXT:    br label [[COND_END]]1431// CHECK11:       cond.end:1432// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1433// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41434// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41435// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41436// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1437// CHECK11:       omp.inner.for.cond:1438// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41439// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41440// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1441// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1442// CHECK11:       omp.inner.for.cond.cleanup:1443// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1444// CHECK11:       omp.inner.for.body:1445// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41446// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11447// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1448// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41449// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 41450// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 41451// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]1452// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 41453// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 41454// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41455// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP11]]1456// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false)1457// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1458// CHECK11:       omp.body.continue:1459// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1460// CHECK11:       omp.inner.for.inc:1461// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41462// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 11463// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 41464// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1465// CHECK11:       omp.inner.for.end:1466// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1467// CHECK11:       omp.loop.exit:1468// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41469// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41470// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1471// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1472// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01473// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 21474// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1475// CHECK11:       arraydestroy.body:1476// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1477// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11478// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1479// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1480// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1481// CHECK11:       arraydestroy.done7:1482// CHECK11-NEXT:    ret void1483//1484//1485// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1486// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1487// CHECK11-NEXT:  entry:1488// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41489// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41490// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41491// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1492// CHECK11-NEXT:    ret void1493//1494//1495// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1496// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1497// CHECK11-NEXT:  entry:1498// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41499// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41500// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41501// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01502// CHECK11-NEXT:    store i32 0, ptr [[F]], align 41503// CHECK11-NEXT:    ret void1504//1505//1506// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1507// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1508// CHECK11-NEXT:  entry:1509// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41510// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41511// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41512// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41513// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41514// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01515// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41516// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41517// CHECK11-NEXT:    ret void1518//1519//1520// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1521// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1522// CHECK11-NEXT:  entry:1523// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41524// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41525// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41526// CHECK11-NEXT:    ret void1527//1528