brintos / llvm-project-archived public Read only

1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// Test host codegen.3// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK14// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s5// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK37// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK39// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -DOMP5 | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -DOMP511// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -DOMP5| FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -DOMP514// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1323// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -DOMP524// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1325// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1526// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -DOMP527// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1528 29// Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)30// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc31// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1732// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s33// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1734// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc35// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK1936// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s37// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1938// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc -DOMP539// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -DOMP5 | FileCheck %s --check-prefix=CHECK2140// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s -DOMP541// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK2142// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc -DOMP543// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -DOMP5 | FileCheck %s --check-prefix=CHECK2344// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s -DOMP545// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK2346 47// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc48// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK949// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s50// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK951// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc52// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK1153// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s54// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1155// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc -DOMP556// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1357// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s -DOMP558// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1359// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc -DOMP560// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1561// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s -DOMP562// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - -DOMP5 | FileCheck %s --check-prefix=CHECK1563 64// expected-no-diagnostics65#ifndef HEADER66#define HEADER67 68 69void without_schedule_clause(float *a, float *b, float *c, float *d) {70  #pragma omp target71  #pragma omp teams72#ifdef OMP573  #pragma omp distribute simd simdlen(8) aligned(a) if(true)74#else75  #pragma omp distribute simd simdlen(8) aligned(a)76#endif // OMP577  for (int i = 33; i < 32000000; i += 7) {78    a[i] = b[i] * c[i] * d[i];79  }80}81 82// ... loop body ...83 84 85void static_not_chunked(float *a, float *b, float *c, float *d) {86  #pragma omp target87  #pragma omp teams88#ifdef OMP589  #pragma omp distribute simd dist_schedule(static) safelen(32) if(simd: true) nontemporal(a, b)90#else91  #pragma omp distribute simd dist_schedule(static) safelen(32)92#endif // OMP593  for (int i = 32000000; i > 33; i += -7) {94        a[i] = b[i] * c[i] * d[i];95  }96}97 98// ... loop body ...99 100 101 102void static_chunked(float *a, float *b, float *c, float *d) {103  #pragma omp target104  #pragma omp teams105#pragma omp distribute simd dist_schedule(static, 5)106  for (unsigned i = 131071; i <= 2147483647; i += 127) {107    a[i] = b[i] * c[i] * d[i];108  }109}110 111// ... loop body ...112 113void test_precond() {114  char a = 0; char i;115  #pragma omp target116  #pragma omp teams117#ifdef OMP5118  #pragma omp distribute simd linear(i) if(a) nontemporal(i)119#else120  #pragma omp distribute simd linear(i)121#endif // OMP5122  for(i = a; i < 10; ++i);123}124 125// a is passed as a parameter to the outlined functions126// ..many loads of %0..127 128// no templates for now, as these require special handling in target regions and/or declare target129 130 131template <typename T>132T ftemplate() {133  short aa = 0;134 135#pragma omp target136#pragma omp teams137#pragma omp distribute simd dist_schedule(static, aa)138  for (int i = 0; i < 100; i++) {139  }140  return T();141}142 143int fint(void) { return ftemplate<int>(); }144 145#endif146 147// CHECK1-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_148// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {149// CHECK1-NEXT:  entry:150// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8151// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8152// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8153// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8154// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8155// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8156// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8157// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4158// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8159// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8160// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8161// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8162// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8163// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8164// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8165// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8166// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8167// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0168// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 8169// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0170// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 8171// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0172// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8173// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1174// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 8175// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1176// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 8177// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1178// CHECK1-NEXT:    store ptr null, ptr [[TMP9]], align 8179// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2180// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 8181// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2182// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 8183// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2184// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8185// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3186// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 8187// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3188// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 8189// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3190// CHECK1-NEXT:    store ptr null, ptr [[TMP15]], align 8191// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0192// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0193// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0194// CHECK1-NEXT:    store i32 3, ptr [[TMP18]], align 4195// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1196// CHECK1-NEXT:    store i32 4, ptr [[TMP19]], align 4197// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2198// CHECK1-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 8199// CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3200// CHECK1-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 8201// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4202// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP22]], align 8203// CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5204// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP23]], align 8205// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6206// CHECK1-NEXT:    store ptr null, ptr [[TMP24]], align 8207// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7208// CHECK1-NEXT:    store ptr null, ptr [[TMP25]], align 8209// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8210// CHECK1-NEXT:    store i64 4571424, ptr [[TMP26]], align 8211// CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9212// CHECK1-NEXT:    store i64 0, ptr [[TMP27]], align 8213// CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10214// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4215// CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11216// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4217// CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12218// CHECK1-NEXT:    store i32 0, ptr [[TMP30]], align 4219// CHECK1-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.region_id, ptr [[KERNEL_ARGS]])220// CHECK1-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0221// CHECK1-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]222// CHECK1:       omp_offload.failed:223// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3:[0-9]+]]224// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]225// CHECK1:       omp_offload.cont:226// CHECK1-NEXT:    ret void227//228//229// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70230// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {231// CHECK1-NEXT:  entry:232// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8233// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8234// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8235// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8236// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8237// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8238// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8239// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8240// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])241// CHECK1-NEXT:    ret void242//243//244// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined245// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {246// CHECK1-NEXT:  entry:247// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8248// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8249// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8250// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8251// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8252// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8253// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4254// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4255// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4256// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4257// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4258// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4259// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4260// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8261// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8262// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8263// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8264// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8265// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8266// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8267// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8268// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8269// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8270// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 8271// CHECK1-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i64 16) ]272// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4273// CHECK1-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 4274// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4275// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4276// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8277// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4278// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)279// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4280// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 4571423281// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]282// CHECK1:       cond.true:283// CHECK1-NEXT:    br label [[COND_END:%.*]]284// CHECK1:       cond.false:285// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4286// CHECK1-NEXT:    br label [[COND_END]]287// CHECK1:       cond.end:288// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]289// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4290// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4291// CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4292// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]293// CHECK1:       omp.inner.for.cond:294// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]295// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]296// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]297// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]298// CHECK1:       omp.inner.for.body:299// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]300// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 7301// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]302// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]303// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP8]]304// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]305// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64306// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM]]307// CHECK1-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]308// CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP8]]309// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]310// CHECK1-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP17]] to i64311// CHECK1-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[IDXPROM2]]312// CHECK1-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP8]]313// CHECK1-NEXT:    [[MUL4:%.*]] = fmul float [[TMP15]], [[TMP18]]314// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP8]]315// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]316// CHECK1-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP20]] to i64317// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i64 [[IDXPROM5]]318// CHECK1-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP8]]319// CHECK1-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP21]]320// CHECK1-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP8]]321// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]322// CHECK1-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP23]] to i64323// CHECK1-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i64 [[IDXPROM8]]324// CHECK1-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 4, !llvm.access.group [[ACC_GRP8]]325// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]326// CHECK1:       omp.body.continue:327// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]328// CHECK1:       omp.inner.for.inc:329// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]330// CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], 1331// CHECK1-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]332// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]333// CHECK1:       omp.inner.for.end:334// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]335// CHECK1:       omp.loop.exit:336// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])337// CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4338// CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0339// CHECK1-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]340// CHECK1:       .omp.final.then:341// CHECK1-NEXT:    store i32 32000001, ptr [[I]], align 4342// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]343// CHECK1:       .omp.final.done:344// CHECK1-NEXT:    ret void345//346//347// CHECK1-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_348// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {349// CHECK1-NEXT:  entry:350// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8351// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8352// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8353// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8354// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8355// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8356// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8357// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4358// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8359// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8360// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8361// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8362// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8363// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8364// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8365// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8366// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8367// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0368// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 8369// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0370// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 8371// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0372// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8373// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1374// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 8375// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1376// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 8377// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1378// CHECK1-NEXT:    store ptr null, ptr [[TMP9]], align 8379// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2380// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 8381// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2382// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 8383// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2384// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8385// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3386// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 8387// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3388// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 8389// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3390// CHECK1-NEXT:    store ptr null, ptr [[TMP15]], align 8391// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0392// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0393// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0394// CHECK1-NEXT:    store i32 3, ptr [[TMP18]], align 4395// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1396// CHECK1-NEXT:    store i32 4, ptr [[TMP19]], align 4397// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2398// CHECK1-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 8399// CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3400// CHECK1-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 8401// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4402// CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 8403// CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5404// CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8405// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6406// CHECK1-NEXT:    store ptr null, ptr [[TMP24]], align 8407// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7408// CHECK1-NEXT:    store ptr null, ptr [[TMP25]], align 8409// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8410// CHECK1-NEXT:    store i64 4571424, ptr [[TMP26]], align 8411// CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9412// CHECK1-NEXT:    store i64 0, ptr [[TMP27]], align 8413// CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10414// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4415// CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11416// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4417// CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12418// CHECK1-NEXT:    store i32 0, ptr [[TMP30]], align 4419// CHECK1-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.region_id, ptr [[KERNEL_ARGS]])420// CHECK1-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0421// CHECK1-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]422// CHECK1:       omp_offload.failed:423// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]424// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]425// CHECK1:       omp_offload.cont:426// CHECK1-NEXT:    ret void427//428//429// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86430// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {431// CHECK1-NEXT:  entry:432// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8433// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8434// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8435// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8436// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8437// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8438// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8439// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8440// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])441// CHECK1-NEXT:    ret void442//443//444// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined445// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {446// CHECK1-NEXT:  entry:447// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8448// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8449// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8450// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8451// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8452// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8453// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4454// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4455// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4456// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4457// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4458// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4459// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4460// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8461// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8462// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8463// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8464// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8465// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8466// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8467// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8468// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8469// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8470// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4471// CHECK1-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 4472// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4473// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4474// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8475// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4476// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)477// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4478// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423479// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]480// CHECK1:       cond.true:481// CHECK1-NEXT:    br label [[COND_END:%.*]]482// CHECK1:       cond.false:483// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4484// CHECK1-NEXT:    br label [[COND_END]]485// CHECK1:       cond.end:486// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]487// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4488// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4489// CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4490// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]491// CHECK1:       omp.inner.for.cond:492// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4493// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4494// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]495// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]496// CHECK1:       omp.inner.for.body:497// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4498// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7499// CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]500// CHECK1-NEXT:    store i32 [[SUB]], ptr [[I]], align 4501// CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8502// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4503// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64504// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]505// CHECK1-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4506// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 8507// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4508// CHECK1-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i64509// CHECK1-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]510// CHECK1-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 4511// CHECK1-NEXT:    [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]512// CHECK1-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8513// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4514// CHECK1-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64515// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]516// CHECK1-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 4517// CHECK1-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]518// CHECK1-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8519// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 4520// CHECK1-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i64521// CHECK1-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]522// CHECK1-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 4523// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]524// CHECK1:       omp.body.continue:525// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]526// CHECK1:       omp.inner.for.inc:527// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4528// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 1529// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4530// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]531// CHECK1:       omp.inner.for.end:532// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]533// CHECK1:       omp.loop.exit:534// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])535// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4536// CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0537// CHECK1-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]538// CHECK1:       .omp.final.then:539// CHECK1-NEXT:    store i32 32, ptr [[I]], align 4540// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]541// CHECK1:       .omp.final.done:542// CHECK1-NEXT:    ret void543//544//545// CHECK1-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_546// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {547// CHECK1-NEXT:  entry:548// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8549// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8550// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8551// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8552// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8553// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8554// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8555// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4556// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8557// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8558// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8559// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8560// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8561// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8562// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8563// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8564// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8565// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0566// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 8567// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0568// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 8569// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0570// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8571// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1572// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 8573// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1574// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 8575// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1576// CHECK1-NEXT:    store ptr null, ptr [[TMP9]], align 8577// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2578// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 8579// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2580// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 8581// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2582// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8583// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3584// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 8585// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3586// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 8587// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3588// CHECK1-NEXT:    store ptr null, ptr [[TMP15]], align 8589// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0590// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0591// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0592// CHECK1-NEXT:    store i32 3, ptr [[TMP18]], align 4593// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1594// CHECK1-NEXT:    store i32 4, ptr [[TMP19]], align 4595// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2596// CHECK1-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 8597// CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3598// CHECK1-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 8599// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4600// CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP22]], align 8601// CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5602// CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP23]], align 8603// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6604// CHECK1-NEXT:    store ptr null, ptr [[TMP24]], align 8605// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7606// CHECK1-NEXT:    store ptr null, ptr [[TMP25]], align 8607// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8608// CHECK1-NEXT:    store i64 16908289, ptr [[TMP26]], align 8609// CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9610// CHECK1-NEXT:    store i64 0, ptr [[TMP27]], align 8611// CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10612// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4613// CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11614// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4615// CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12616// CHECK1-NEXT:    store i32 0, ptr [[TMP30]], align 4617// CHECK1-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.region_id, ptr [[KERNEL_ARGS]])618// CHECK1-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0619// CHECK1-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]620// CHECK1:       omp_offload.failed:621// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]622// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]623// CHECK1:       omp_offload.cont:624// CHECK1-NEXT:    ret void625//626//627// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103628// CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {629// CHECK1-NEXT:  entry:630// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8631// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8632// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8633// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8634// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8635// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8636// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8637// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8638// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])639// CHECK1-NEXT:    ret void640//641//642// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined643// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {644// CHECK1-NEXT:  entry:645// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8646// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8647// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8648// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8649// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8650// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8651// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4652// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4653// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4654// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4655// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4656// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4657// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4658// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8659// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8660// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8661// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8662// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8663// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8664// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8665// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8666// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8667// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8668// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4669// CHECK1-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 4670// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4671// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4672// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8673// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4674// CHECK1-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)675// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]676// CHECK1:       omp.dispatch.cond:677// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4678// CHECK1-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 16908288679// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]680// CHECK1:       cond.true:681// CHECK1-NEXT:    br label [[COND_END:%.*]]682// CHECK1:       cond.false:683// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4684// CHECK1-NEXT:    br label [[COND_END]]685// CHECK1:       cond.end:686// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]687// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4688// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4689// CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4690// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4691// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4692// CHECK1-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]693// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]694// CHECK1:       omp.dispatch.body:695// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]696// CHECK1:       omp.inner.for.cond:697// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]698// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]699// CHECK1-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]700// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]701// CHECK1:       omp.inner.for.body:702// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]703// CHECK1-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 127704// CHECK1-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]705// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]706// CHECK1-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP17]]707// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]708// CHECK1-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i64709// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i64 [[IDXPROM]]710// CHECK1-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]711// CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP17]]712// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]713// CHECK1-NEXT:    [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i64714// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i64 [[IDXPROM3]]715// CHECK1-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP17]]716// CHECK1-NEXT:    [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]717// CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP17]]718// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]719// CHECK1-NEXT:    [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i64720// CHECK1-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i64 [[IDXPROM6]]721// CHECK1-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP17]]722// CHECK1-NEXT:    [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]723// CHECK1-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP17]]724// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]725// CHECK1-NEXT:    [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i64726// CHECK1-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i64 [[IDXPROM9]]727// CHECK1-NEXT:    store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP17]]728// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]729// CHECK1:       omp.body.continue:730// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]731// CHECK1:       omp.inner.for.inc:732// CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]733// CHECK1-NEXT:    [[ADD11:%.*]] = add i32 [[TMP25]], 1734// CHECK1-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]735// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]736// CHECK1:       omp.inner.for.end:737// CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]738// CHECK1:       omp.dispatch.inc:739// CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4740// CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4741// CHECK1-NEXT:    [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]742// CHECK1-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4743// CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4744// CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4745// CHECK1-NEXT:    [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]746// CHECK1-NEXT:    store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4747// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]748// CHECK1:       omp.dispatch.end:749// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])750// CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4751// CHECK1-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0752// CHECK1-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]753// CHECK1:       .omp.final.then:754// CHECK1-NEXT:    store i32 -2147483522, ptr [[I]], align 4755// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]756// CHECK1:       .omp.final.done:757// CHECK1-NEXT:    ret void758//759//760// CHECK1-LABEL: define {{[^@]+}}@_Z12test_precondv761// CHECK1-SAME: () #[[ATTR0]] {762// CHECK1-NEXT:  entry:763// CHECK1-NEXT:    [[A:%.*]] = alloca i8, align 1764// CHECK1-NEXT:    [[I:%.*]] = alloca i8, align 1765// CHECK1-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8766// CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8767// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 8768// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 8769// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 8770// CHECK1-NEXT:    [[TMP:%.*]] = alloca i8, align 1771// CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1772// CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4773// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8774// CHECK1-NEXT:    store i8 0, ptr [[A]], align 1775// CHECK1-NEXT:    [[TMP0:%.*]] = load i8, ptr [[I]], align 1776// CHECK1-NEXT:    store i8 [[TMP0]], ptr [[I_CASTED]], align 1777// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[I_CASTED]], align 8778// CHECK1-NEXT:    [[TMP2:%.*]] = load i8, ptr [[A]], align 1779// CHECK1-NEXT:    store i8 [[TMP2]], ptr [[A_CASTED]], align 1780// CHECK1-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8781// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0782// CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP4]], align 8783// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0784// CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP5]], align 8785// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0786// CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8787// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1788// CHECK1-NEXT:    store i64 [[TMP3]], ptr [[TMP7]], align 8789// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1790// CHECK1-NEXT:    store i64 [[TMP3]], ptr [[TMP8]], align 8791// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1792// CHECK1-NEXT:    store ptr null, ptr [[TMP9]], align 8793// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0794// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0795// CHECK1-NEXT:    [[TMP12:%.*]] = load i8, ptr [[A]], align 1796// CHECK1-NEXT:    store i8 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 1797// CHECK1-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1798// CHECK1-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i32799// CHECK1-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]800// CHECK1-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 1801// CHECK1-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 1802// CHECK1-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 1803// CHECK1-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1804// CHECK1-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4805// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4806// CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1807// CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[ADD4]] to i64808// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0809// CHECK1-NEXT:    store i32 3, ptr [[TMP16]], align 4810// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1811// CHECK1-NEXT:    store i32 2, ptr [[TMP17]], align 4812// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2813// CHECK1-NEXT:    store ptr [[TMP10]], ptr [[TMP18]], align 8814// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3815// CHECK1-NEXT:    store ptr [[TMP11]], ptr [[TMP19]], align 8816// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4817// CHECK1-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP20]], align 8818// CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5819// CHECK1-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP21]], align 8820// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6821// CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8822// CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7823// CHECK1-NEXT:    store ptr null, ptr [[TMP23]], align 8824// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8825// CHECK1-NEXT:    store i64 [[TMP15]], ptr [[TMP24]], align 8826// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9827// CHECK1-NEXT:    store i64 0, ptr [[TMP25]], align 8828// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10829// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4830// CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11831// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP27]], align 4832// CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12833// CHECK1-NEXT:    store i32 0, ptr [[TMP28]], align 4834// CHECK1-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.region_id, ptr [[KERNEL_ARGS]])835// CHECK1-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0836// CHECK1-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]837// CHECK1:       omp_offload.failed:838// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115(i64 [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]839// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]840// CHECK1:       omp_offload.cont:841// CHECK1-NEXT:    ret void842//843//844// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115845// CHECK1-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {846// CHECK1-NEXT:  entry:847// CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8848// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8849// CHECK1-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8850// CHECK1-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8851// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])852// CHECK1-NEXT:    ret void853//854//855// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined856// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {857// CHECK1-NEXT:  entry:858// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8859// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8860// CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 8861// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8862// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4863// CHECK1-NEXT:    [[TMP:%.*]] = alloca i8, align 1864// CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1865// CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4866// CHECK1-NEXT:    [[I4:%.*]] = alloca i8, align 1867// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4868// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4869// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4870// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4871// CHECK1-NEXT:    [[I6:%.*]] = alloca i8, align 1872// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8873// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8874// CHECK1-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 8875// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8876// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8877// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8878// CHECK1-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 1879// CHECK1-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 1880// CHECK1-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1881// CHECK1-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i32882// CHECK1-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]883// CHECK1-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 1884// CHECK1-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 1885// CHECK1-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 1886// CHECK1-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1887// CHECK1-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4888// CHECK1-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1889// CHECK1-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 1890// CHECK1-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1891// CHECK1-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i32892// CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 10893// CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]894// CHECK1:       omp.precond.then:895// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4896// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4897// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4898// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4899// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4900// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8901// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4902// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)903// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4904// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4905// CHECK1-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]906// CHECK1-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]907// CHECK1:       cond.true:908// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4909// CHECK1-NEXT:    br label [[COND_END:%.*]]910// CHECK1:       cond.false:911// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4912// CHECK1-NEXT:    br label [[COND_END]]913// CHECK1:       cond.end:914// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]915// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4916// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4917// CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4918// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]919// CHECK1:       omp.inner.for.cond:920// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]921// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP20]]922// CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]923// CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]924// CHECK1:       omp.inner.for.body:925// CHECK1-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP20]]926// CHECK1-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP16]] to i32927// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]928// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1929// CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]930// CHECK1-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i8931// CHECK1-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP20]]932// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]933// CHECK1:       omp.body.continue:934// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]935// CHECK1:       omp.inner.for.inc:936// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]937// CHECK1-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP18]], 1938// CHECK1-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]939// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]940// CHECK1:       omp.inner.for.end:941// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]942// CHECK1:       omp.loop.exit:943// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8944// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4945// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])946// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4947// CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0948// CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]949// CHECK1:       .omp.final.then:950// CHECK1-NEXT:    [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1951// CHECK1-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP23]] to i32952// CHECK1-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1953// CHECK1-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP24]] to i32954// CHECK1-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]955// CHECK1-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 1956// CHECK1-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 1957// CHECK1-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 1958// CHECK1-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 1959// CHECK1-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]960// CHECK1-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i8961// CHECK1-NEXT:    store i8 [[CONV21]], ptr [[TMP0]], align 1962// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]963// CHECK1:       .omp.final.done:964// CHECK1-NEXT:    br label [[OMP_PRECOND_END]]965// CHECK1:       omp.precond.end:966// CHECK1-NEXT:    ret void967//968//969// CHECK1-LABEL: define {{[^@]+}}@_Z4fintv970// CHECK1-SAME: () #[[ATTR0]] {971// CHECK1-NEXT:  entry:972// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v()973// CHECK1-NEXT:    ret i32 [[CALL]]974//975//976// CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v977// CHECK1-SAME: () #[[ATTR0]] comdat {978// CHECK1-NEXT:  entry:979// CHECK1-NEXT:    [[AA:%.*]] = alloca i16, align 2980// CHECK1-NEXT:    [[AA_CASTED:%.*]] = alloca i64, align 8981// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8982// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8983// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8984// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4985// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8986// CHECK1-NEXT:    store i16 0, ptr [[AA]], align 2987// CHECK1-NEXT:    [[TMP0:%.*]] = load i16, ptr [[AA]], align 2988// CHECK1-NEXT:    store i16 [[TMP0]], ptr [[AA_CASTED]], align 2989// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[AA_CASTED]], align 8990// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0991// CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP2]], align 8992// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0993// CHECK1-NEXT:    store i64 [[TMP1]], ptr [[TMP3]], align 8994// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0995// CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8996// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0997// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0998// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0999// CHECK1-NEXT:    store i32 3, ptr [[TMP7]], align 41000// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11001// CHECK1-NEXT:    store i32 1, ptr [[TMP8]], align 41002// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21003// CHECK1-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 81004// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31005// CHECK1-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 81006// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41007// CHECK1-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP11]], align 81008// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51009// CHECK1-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP12]], align 81010// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61011// CHECK1-NEXT:    store ptr null, ptr [[TMP13]], align 81012// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71013// CHECK1-NEXT:    store ptr null, ptr [[TMP14]], align 81014// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81015// CHECK1-NEXT:    store i64 100, ptr [[TMP15]], align 81016// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91017// CHECK1-NEXT:    store i64 0, ptr [[TMP16]], align 81018// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101019// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 41020// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111021// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 41022// CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121023// CHECK1-NEXT:    store i32 0, ptr [[TMP19]], align 41024// CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.region_id, ptr [[KERNEL_ARGS]])1025// CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01026// CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1027// CHECK1:       omp_offload.failed:1028// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135(i64 [[TMP1]]) #[[ATTR3]]1029// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]1030// CHECK1:       omp_offload.cont:1031// CHECK1-NEXT:    ret i32 01032//1033//1034// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1351035// CHECK1-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] {1036// CHECK1-NEXT:  entry:1037// CHECK1-NEXT:    [[AA_ADDR:%.*]] = alloca i64, align 81038// CHECK1-NEXT:    store i64 [[AA]], ptr [[AA_ADDR]], align 81039// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])1040// CHECK1-NEXT:    ret void1041//1042//1043// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined1044// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {1045// CHECK1-NEXT:  entry:1046// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81047// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81048// CHECK1-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 81049// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41050// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 41051// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41052// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41053// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41054// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41055// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 41056// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81057// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81058// CHECK1-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 81059// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 81060// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41061// CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 41062// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41063// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41064// CHECK1-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 21065// CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i321066// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81067// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 41068// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])1069// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]1070// CHECK1:       omp.dispatch.cond:1071// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41072// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 991073// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1074// CHECK1:       cond.true:1075// CHECK1-NEXT:    br label [[COND_END:%.*]]1076// CHECK1:       cond.false:1077// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41078// CHECK1-NEXT:    br label [[COND_END]]1079// CHECK1:       cond.end:1080// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]1081// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41082// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41083// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 41084// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41085// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41086// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1087// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1088// CHECK1:       omp.dispatch.body:1089// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1090// CHECK1:       omp.inner.for.cond:1091// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]1092// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]1093// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1094// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1095// CHECK1:       omp.inner.for.body:1096// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]1097// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11098// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1099// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]1100// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1101// CHECK1:       omp.body.continue:1102// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1103// CHECK1:       omp.inner.for.inc:1104// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]1105// CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 11106// CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]1107// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]1108// CHECK1:       omp.inner.for.end:1109// CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]1110// CHECK1:       omp.dispatch.inc:1111// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41112// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41113// CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]1114// CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 41115// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41116// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41117// CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]1118// CHECK1-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 41119// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]1120// CHECK1:       omp.dispatch.end:1121// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])1122// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41123// CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 01124// CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1125// CHECK1:       .omp.final.then:1126// CHECK1-NEXT:    store i32 100, ptr [[I]], align 41127// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]1128// CHECK1:       .omp.final.done:1129// CHECK1-NEXT:    ret void1130//1131//1132// CHECK3-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_1133// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {1134// CHECK3-NEXT:  entry:1135// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41136// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41137// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41138// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41139// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41140// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41141// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41142// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41143// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81144// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41145// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41146// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41147// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41148// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41149// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41150// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41151// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41152// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01153// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 41154// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01155// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 41156// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01157// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41158// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11159// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 41160// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11161// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 41162// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11163// CHECK3-NEXT:    store ptr null, ptr [[TMP9]], align 41164// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21165// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 41166// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21167// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 41168// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21169// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 41170// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31171// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 41172// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31173// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 41174// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31175// CHECK3-NEXT:    store ptr null, ptr [[TMP15]], align 41176// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01177// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01178// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01179// CHECK3-NEXT:    store i32 3, ptr [[TMP18]], align 41180// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11181// CHECK3-NEXT:    store i32 4, ptr [[TMP19]], align 41182// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21183// CHECK3-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 41184// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31185// CHECK3-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 41186// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41187// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP22]], align 41188// CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51189// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP23]], align 41190// CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61191// CHECK3-NEXT:    store ptr null, ptr [[TMP24]], align 41192// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71193// CHECK3-NEXT:    store ptr null, ptr [[TMP25]], align 41194// CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81195// CHECK3-NEXT:    store i64 4571424, ptr [[TMP26]], align 81196// CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91197// CHECK3-NEXT:    store i64 0, ptr [[TMP27]], align 81198// CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101199// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 41200// CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111201// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 41202// CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121203// CHECK3-NEXT:    store i32 0, ptr [[TMP30]], align 41204// CHECK3-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.region_id, ptr [[KERNEL_ARGS]])1205// CHECK3-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01206// CHECK3-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1207// CHECK3:       omp_offload.failed:1208// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3:[0-9]+]]1209// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1210// CHECK3:       omp_offload.cont:1211// CHECK3-NEXT:    ret void1212//1213//1214// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l701215// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {1216// CHECK3-NEXT:  entry:1217// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41218// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41219// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41220// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41221// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41222// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41223// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41224// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41225// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])1226// CHECK3-NEXT:    ret void1227//1228//1229// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined1230// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {1231// CHECK3-NEXT:  entry:1232// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41233// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41234// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41235// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41236// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41237// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41238// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41239// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41240// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41241// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41242// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41243// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41244// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41245// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41246// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41247// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41248// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41249// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41250// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41251// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41252// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41253// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41254// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41255// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 41256// CHECK3-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i32 16) ]1257// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41258// CHECK3-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 41259// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41260// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41261// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41262// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41263// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1264// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41265// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714231266// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1267// CHECK3:       cond.true:1268// CHECK3-NEXT:    br label [[COND_END:%.*]]1269// CHECK3:       cond.false:1270// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41271// CHECK3-NEXT:    br label [[COND_END]]1272// CHECK3:       cond.end:1273// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]1274// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41275// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41276// CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41277// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1278// CHECK3:       omp.inner.for.cond:1279// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1280// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]1281// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]1282// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1283// CHECK3:       omp.inner.for.body:1284// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1285// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 71286// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]1287// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]1288// CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP9]]1289// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]1290// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]1291// CHECK3-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]1292// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP9]]1293// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]1294// CHECK3-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i32 [[TMP17]]1295// CHECK3-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP9]]1296// CHECK3-NEXT:    [[MUL3:%.*]] = fmul float [[TMP15]], [[TMP18]]1297// CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP9]]1298// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]1299// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i32 [[TMP20]]1300// CHECK3-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP9]]1301// CHECK3-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP21]]1302// CHECK3-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP9]]1303// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]1304// CHECK3-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i32 [[TMP23]]1305// CHECK3-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP9]]1306// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1307// CHECK3:       omp.body.continue:1308// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1309// CHECK3:       omp.inner.for.inc:1310// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1311// CHECK3-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], 11312// CHECK3-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1313// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]1314// CHECK3:       omp.inner.for.end:1315// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1316// CHECK3:       omp.loop.exit:1317// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])1318// CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41319// CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 01320// CHECK3-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1321// CHECK3:       .omp.final.then:1322// CHECK3-NEXT:    store i32 32000001, ptr [[I]], align 41323// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]1324// CHECK3:       .omp.final.done:1325// CHECK3-NEXT:    ret void1326//1327//1328// CHECK3-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_1329// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {1330// CHECK3-NEXT:  entry:1331// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41332// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41333// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41334// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41335// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41336// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41337// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41338// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41339// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81340// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41341// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41342// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41343// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41344// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41345// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41346// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41347// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41348// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01349// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 41350// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01351// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 41352// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01353// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41354// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11355// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 41356// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11357// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 41358// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11359// CHECK3-NEXT:    store ptr null, ptr [[TMP9]], align 41360// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21361// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 41362// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21363// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 41364// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21365// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 41366// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31367// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 41368// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31369// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 41370// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31371// CHECK3-NEXT:    store ptr null, ptr [[TMP15]], align 41372// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01373// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01374// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01375// CHECK3-NEXT:    store i32 3, ptr [[TMP18]], align 41376// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11377// CHECK3-NEXT:    store i32 4, ptr [[TMP19]], align 41378// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21379// CHECK3-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 41380// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31381// CHECK3-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 41382// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41383// CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 41384// CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51385// CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 41386// CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61387// CHECK3-NEXT:    store ptr null, ptr [[TMP24]], align 41388// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71389// CHECK3-NEXT:    store ptr null, ptr [[TMP25]], align 41390// CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81391// CHECK3-NEXT:    store i64 4571424, ptr [[TMP26]], align 81392// CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91393// CHECK3-NEXT:    store i64 0, ptr [[TMP27]], align 81394// CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101395// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 41396// CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111397// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 41398// CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121399// CHECK3-NEXT:    store i32 0, ptr [[TMP30]], align 41400// CHECK3-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.region_id, ptr [[KERNEL_ARGS]])1401// CHECK3-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01402// CHECK3-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1403// CHECK3:       omp_offload.failed:1404// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]1405// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1406// CHECK3:       omp_offload.cont:1407// CHECK3-NEXT:    ret void1408//1409//1410// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l861411// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {1412// CHECK3-NEXT:  entry:1413// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41414// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41415// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41416// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41417// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41418// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41419// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41420// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41421// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])1422// CHECK3-NEXT:    ret void1423//1424//1425// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined1426// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {1427// CHECK3-NEXT:  entry:1428// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41429// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41430// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41431// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41432// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41433// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41434// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41435// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41436// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41437// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41438// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41439// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41440// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41441// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41442// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41443// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41444// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41445// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41446// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41447// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41448// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41449// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41450// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41451// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41452// CHECK3-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 41453// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41454// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41455// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41456// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41457// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1458// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41459// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714231460// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1461// CHECK3:       cond.true:1462// CHECK3-NEXT:    br label [[COND_END:%.*]]1463// CHECK3:       cond.false:1464// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41465// CHECK3-NEXT:    br label [[COND_END]]1466// CHECK3:       cond.end:1467// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1468// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41469// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41470// CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41471// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1472// CHECK3:       omp.inner.for.cond:1473// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41474// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41475// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1476// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1477// CHECK3:       omp.inner.for.body:1478// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41479// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 71480// CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]1481// CHECK3-NEXT:    store i32 [[SUB]], ptr [[I]], align 41482// CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 41483// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41484// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]1485// CHECK3-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 41486// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 41487// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 41488// CHECK3-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]1489// CHECK3-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 41490// CHECK3-NEXT:    [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]1491// CHECK3-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 41492// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 41493// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]1494// CHECK3-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 41495// CHECK3-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]1496// CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 41497// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 41498// CHECK3-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]1499// CHECK3-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 41500// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1501// CHECK3:       omp.body.continue:1502// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1503// CHECK3:       omp.inner.for.inc:1504// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41505// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 11506// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41507// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1508// CHECK3:       omp.inner.for.end:1509// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1510// CHECK3:       omp.loop.exit:1511// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])1512// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41513// CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01514// CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1515// CHECK3:       .omp.final.then:1516// CHECK3-NEXT:    store i32 32, ptr [[I]], align 41517// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]1518// CHECK3:       .omp.final.done:1519// CHECK3-NEXT:    ret void1520//1521//1522// CHECK3-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_1523// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {1524// CHECK3-NEXT:  entry:1525// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41526// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41527// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41528// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41529// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41530// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41531// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41532// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41533// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81534// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41535// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41536// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41537// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41538// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41539// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41540// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41541// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41542// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01543// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 41544// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01545// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 41546// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01547// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41548// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11549// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 41550// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11551// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 41552// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11553// CHECK3-NEXT:    store ptr null, ptr [[TMP9]], align 41554// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21555// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 41556// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21557// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 41558// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21559// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 41560// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31561// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 41562// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31563// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 41564// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31565// CHECK3-NEXT:    store ptr null, ptr [[TMP15]], align 41566// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01567// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01568// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01569// CHECK3-NEXT:    store i32 3, ptr [[TMP18]], align 41570// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11571// CHECK3-NEXT:    store i32 4, ptr [[TMP19]], align 41572// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21573// CHECK3-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 41574// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31575// CHECK3-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 41576// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41577// CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP22]], align 41578// CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51579// CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP23]], align 41580// CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61581// CHECK3-NEXT:    store ptr null, ptr [[TMP24]], align 41582// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71583// CHECK3-NEXT:    store ptr null, ptr [[TMP25]], align 41584// CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81585// CHECK3-NEXT:    store i64 16908289, ptr [[TMP26]], align 81586// CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91587// CHECK3-NEXT:    store i64 0, ptr [[TMP27]], align 81588// CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101589// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 41590// CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111591// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 41592// CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121593// CHECK3-NEXT:    store i32 0, ptr [[TMP30]], align 41594// CHECK3-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.region_id, ptr [[KERNEL_ARGS]])1595// CHECK3-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01596// CHECK3-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1597// CHECK3:       omp_offload.failed:1598// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]1599// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1600// CHECK3:       omp_offload.cont:1601// CHECK3-NEXT:    ret void1602//1603//1604// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1031605// CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {1606// CHECK3-NEXT:  entry:1607// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41608// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41609// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41610// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41611// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41612// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41613// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41614// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41615// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])1616// CHECK3-NEXT:    ret void1617//1618//1619// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined1620// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {1621// CHECK3-NEXT:  entry:1622// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41623// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41624// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41625// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 41626// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 41627// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 41628// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41629// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41630// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41631// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41632// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41633// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41634// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41635// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41636// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41637// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41638// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 41639// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 41640// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 41641// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41642// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 41643// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 41644// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 41645// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41646// CHECK3-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 41647// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41648// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41649// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41650// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41651// CHECK3-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)1652// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]1653// CHECK3:       omp.dispatch.cond:1654// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41655// CHECK3-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082881656// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1657// CHECK3:       cond.true:1658// CHECK3-NEXT:    br label [[COND_END:%.*]]1659// CHECK3:       cond.false:1660// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41661// CHECK3-NEXT:    br label [[COND_END]]1662// CHECK3:       cond.end:1663// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1664// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41665// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41666// CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41667// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41668// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41669// CHECK3-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]1670// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1671// CHECK3:       omp.dispatch.body:1672// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1673// CHECK3:       omp.inner.for.cond:1674// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1675// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1676// CHECK3-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]1677// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1678// CHECK3:       omp.inner.for.body:1679// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1680// CHECK3-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1271681// CHECK3-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]1682// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]1683// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP18]]1684// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]1685// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i32 [[TMP15]]1686// CHECK3-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]1687// CHECK3-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP18]]1688// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]1689// CHECK3-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i32 [[TMP18]]1690// CHECK3-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP18]]1691// CHECK3-NEXT:    [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]1692// CHECK3-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP18]]1693// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]1694// CHECK3-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i32 [[TMP21]]1695// CHECK3-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP18]]1696// CHECK3-NEXT:    [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]1697// CHECK3-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP18]]1698// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]1699// CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i32 [[TMP24]]1700// CHECK3-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP18]]1701// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1702// CHECK3:       omp.body.continue:1703// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1704// CHECK3:       omp.inner.for.inc:1705// CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1706// CHECK3-NEXT:    [[ADD8:%.*]] = add i32 [[TMP25]], 11707// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1708// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1709// CHECK3:       omp.inner.for.end:1710// CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]1711// CHECK3:       omp.dispatch.inc:1712// CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41713// CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41714// CHECK3-NEXT:    [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]1715// CHECK3-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 41716// CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41717// CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41718// CHECK3-NEXT:    [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]1719// CHECK3-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 41720// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]1721// CHECK3:       omp.dispatch.end:1722// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])1723// CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41724// CHECK3-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 01725// CHECK3-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1726// CHECK3:       .omp.final.then:1727// CHECK3-NEXT:    store i32 -2147483522, ptr [[I]], align 41728// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]1729// CHECK3:       .omp.final.done:1730// CHECK3-NEXT:    ret void1731//1732//1733// CHECK3-LABEL: define {{[^@]+}}@_Z12test_precondv1734// CHECK3-SAME: () #[[ATTR0]] {1735// CHECK3-NEXT:  entry:1736// CHECK3-NEXT:    [[A:%.*]] = alloca i8, align 11737// CHECK3-NEXT:    [[I:%.*]] = alloca i8, align 11738// CHECK3-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 41739// CHECK3-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 41740// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 41741// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 41742// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 41743// CHECK3-NEXT:    [[TMP:%.*]] = alloca i8, align 11744// CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 11745// CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41746// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81747// CHECK3-NEXT:    store i8 0, ptr [[A]], align 11748// CHECK3-NEXT:    [[TMP0:%.*]] = load i8, ptr [[I]], align 11749// CHECK3-NEXT:    store i8 [[TMP0]], ptr [[I_CASTED]], align 11750// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[I_CASTED]], align 41751// CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[A]], align 11752// CHECK3-NEXT:    store i8 [[TMP2]], ptr [[A_CASTED]], align 11753// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 41754// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01755// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP4]], align 41756// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01757// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP5]], align 41758// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01759// CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 41760// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11761// CHECK3-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 41762// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11763// CHECK3-NEXT:    store i32 [[TMP3]], ptr [[TMP8]], align 41764// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11765// CHECK3-NEXT:    store ptr null, ptr [[TMP9]], align 41766// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01767// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01768// CHECK3-NEXT:    [[TMP12:%.*]] = load i8, ptr [[A]], align 11769// CHECK3-NEXT:    store i8 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 11770// CHECK3-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11771// CHECK3-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i321772// CHECK3-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]1773// CHECK3-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 11774// CHECK3-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 11775// CHECK3-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 11776// CHECK3-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 11777// CHECK3-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 41778// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41779// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 11780// CHECK3-NEXT:    [[TMP15:%.*]] = zext i32 [[ADD4]] to i641781// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01782// CHECK3-NEXT:    store i32 3, ptr [[TMP16]], align 41783// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11784// CHECK3-NEXT:    store i32 2, ptr [[TMP17]], align 41785// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21786// CHECK3-NEXT:    store ptr [[TMP10]], ptr [[TMP18]], align 41787// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31788// CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP19]], align 41789// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41790// CHECK3-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP20]], align 41791// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51792// CHECK3-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP21]], align 41793// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61794// CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 41795// CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71796// CHECK3-NEXT:    store ptr null, ptr [[TMP23]], align 41797// CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81798// CHECK3-NEXT:    store i64 [[TMP15]], ptr [[TMP24]], align 81799// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91800// CHECK3-NEXT:    store i64 0, ptr [[TMP25]], align 81801// CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101802// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 41803// CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111804// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP27]], align 41805// CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121806// CHECK3-NEXT:    store i32 0, ptr [[TMP28]], align 41807// CHECK3-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.region_id, ptr [[KERNEL_ARGS]])1808// CHECK3-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 01809// CHECK3-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1810// CHECK3:       omp_offload.failed:1811// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115(i32 [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]1812// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]1813// CHECK3:       omp_offload.cont:1814// CHECK3-NEXT:    ret void1815//1816//1817// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1151818// CHECK3-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {1819// CHECK3-NEXT:  entry:1820// CHECK3-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 41821// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41822// CHECK3-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 41823// CHECK3-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41824// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])1825// CHECK3-NEXT:    ret void1826//1827//1828// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined1829// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {1830// CHECK3-NEXT:  entry:1831// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41832// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41833// CHECK3-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 41834// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41835// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41836// CHECK3-NEXT:    [[TMP:%.*]] = alloca i8, align 11837// CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 11838// CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41839// CHECK3-NEXT:    [[I4:%.*]] = alloca i8, align 11840// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41841// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41842// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41843// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41844// CHECK3-NEXT:    [[I6:%.*]] = alloca i8, align 11845// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41846// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41847// CHECK3-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 41848// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41849// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 41850// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 41851// CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 11852// CHECK3-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 11853// CHECK3-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11854// CHECK3-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i321855// CHECK3-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]1856// CHECK3-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 11857// CHECK3-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 11858// CHECK3-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 11859// CHECK3-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 11860// CHECK3-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 41861// CHECK3-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11862// CHECK3-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 11863// CHECK3-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11864// CHECK3-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i321865// CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 101866// CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1867// CHECK3:       omp.precond.then:1868// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41869// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41870// CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 41871// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41872// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41873// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41874// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41875// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1876// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41877// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41878// CHECK3-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]1879// CHECK3-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1880// CHECK3:       cond.true:1881// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41882// CHECK3-NEXT:    br label [[COND_END:%.*]]1883// CHECK3:       cond.false:1884// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41885// CHECK3-NEXT:    br label [[COND_END]]1886// CHECK3:       cond.end:1887// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1888// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41889// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41890// CHECK3-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41891// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1892// CHECK3:       omp.inner.for.cond:1893// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]1894// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]1895// CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1896// CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1897// CHECK3:       omp.inner.for.body:1898// CHECK3-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP21]]1899// CHECK3-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP16]] to i321900// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1901// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 11902// CHECK3-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]1903// CHECK3-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i81904// CHECK3-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP21]]1905// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1906// CHECK3:       omp.body.continue:1907// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1908// CHECK3:       omp.inner.for.inc:1909// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1910// CHECK3-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP18]], 11911// CHECK3-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1912// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]1913// CHECK3:       omp.inner.for.end:1914// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1915// CHECK3:       omp.loop.exit:1916// CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41917// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41918// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1919// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41920// CHECK3-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01921// CHECK3-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1922// CHECK3:       .omp.final.then:1923// CHECK3-NEXT:    [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11924// CHECK3-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP23]] to i321925// CHECK3-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 11926// CHECK3-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP24]] to i321927// CHECK3-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]1928// CHECK3-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 11929// CHECK3-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 11930// CHECK3-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 11931// CHECK3-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 11932// CHECK3-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]1933// CHECK3-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i81934// CHECK3-NEXT:    store i8 [[CONV21]], ptr [[TMP0]], align 11935// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]1936// CHECK3:       .omp.final.done:1937// CHECK3-NEXT:    br label [[OMP_PRECOND_END]]1938// CHECK3:       omp.precond.end:1939// CHECK3-NEXT:    ret void1940//1941//1942// CHECK3-LABEL: define {{[^@]+}}@_Z4fintv1943// CHECK3-SAME: () #[[ATTR0]] {1944// CHECK3-NEXT:  entry:1945// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v()1946// CHECK3-NEXT:    ret i32 [[CALL]]1947//1948//1949// CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v1950// CHECK3-SAME: () #[[ATTR0]] comdat {1951// CHECK3-NEXT:  entry:1952// CHECK3-NEXT:    [[AA:%.*]] = alloca i16, align 21953// CHECK3-NEXT:    [[AA_CASTED:%.*]] = alloca i32, align 41954// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41955// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41956// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41957// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41958// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81959// CHECK3-NEXT:    store i16 0, ptr [[AA]], align 21960// CHECK3-NEXT:    [[TMP0:%.*]] = load i16, ptr [[AA]], align 21961// CHECK3-NEXT:    store i16 [[TMP0]], ptr [[AA_CASTED]], align 21962// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[AA_CASTED]], align 41963// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01964// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 41965// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01966// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 41967// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01968// CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 41969// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01970// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01971// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01972// CHECK3-NEXT:    store i32 3, ptr [[TMP7]], align 41973// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11974// CHECK3-NEXT:    store i32 1, ptr [[TMP8]], align 41975// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21976// CHECK3-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 41977// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31978// CHECK3-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 41979// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41980// CHECK3-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP11]], align 41981// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51982// CHECK3-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP12]], align 41983// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61984// CHECK3-NEXT:    store ptr null, ptr [[TMP13]], align 41985// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71986// CHECK3-NEXT:    store ptr null, ptr [[TMP14]], align 41987// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81988// CHECK3-NEXT:    store i64 100, ptr [[TMP15]], align 81989// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91990// CHECK3-NEXT:    store i64 0, ptr [[TMP16]], align 81991// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101992// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 41993// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111994// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 41995// CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121996// CHECK3-NEXT:    store i32 0, ptr [[TMP19]], align 41997// CHECK3-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.region_id, ptr [[KERNEL_ARGS]])1998// CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01999// CHECK3-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2000// CHECK3:       omp_offload.failed:2001// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135(i32 [[TMP1]]) #[[ATTR3]]2002// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]2003// CHECK3:       omp_offload.cont:2004// CHECK3-NEXT:    ret i32 02005//2006//2007// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1352008// CHECK3-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] {2009// CHECK3-NEXT:  entry:2010// CHECK3-NEXT:    [[AA_ADDR:%.*]] = alloca i32, align 42011// CHECK3-NEXT:    store i32 [[AA]], ptr [[AA_ADDR]], align 42012// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])2013// CHECK3-NEXT:    ret void2014//2015//2016// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined2017// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {2018// CHECK3-NEXT:  entry:2019// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42020// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42021// CHECK3-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 42022// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42023// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 42024// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42025// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42026// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42027// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42028// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 42029// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42030// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42031// CHECK3-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 42032// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 42033// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42034// CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 42035// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42036// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42037// CHECK3-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 22038// CHECK3-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i322039// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42040// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42041// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])2042// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]2043// CHECK3:       omp.dispatch.cond:2044// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42045// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 992046// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2047// CHECK3:       cond.true:2048// CHECK3-NEXT:    br label [[COND_END:%.*]]2049// CHECK3:       cond.false:2050// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42051// CHECK3-NEXT:    br label [[COND_END]]2052// CHECK3:       cond.end:2053// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2054// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42055// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42056// CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42057// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42058// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42059// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2060// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2061// CHECK3:       omp.dispatch.body:2062// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2063// CHECK3:       omp.inner.for.cond:2064// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]2065// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]2066// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2067// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2068// CHECK3:       omp.inner.for.body:2069// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2070// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 12071// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2072// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]2073// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2074// CHECK3:       omp.body.continue:2075// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2076// CHECK3:       omp.inner.for.inc:2077// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2078// CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 12079// CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2080// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]2081// CHECK3:       omp.inner.for.end:2082// CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]2083// CHECK3:       omp.dispatch.inc:2084// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42085// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42086// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]2087// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 42088// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42089// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42090// CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]2091// CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 42092// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]2093// CHECK3:       omp.dispatch.end:2094// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])2095// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42096// CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 02097// CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2098// CHECK3:       .omp.final.then:2099// CHECK3-NEXT:    store i32 100, ptr [[I]], align 42100// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]2101// CHECK3:       .omp.final.done:2102// CHECK3-NEXT:    ret void2103//2104//2105// CHECK5-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_2106// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {2107// CHECK5-NEXT:  entry:2108// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82109// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82110// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82111// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82112// CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 82113// CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 82114// CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 82115// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42116// CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82117// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82118// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82119// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82120// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82121// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82122// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82123// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82124// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82125// CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02126// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 82127// CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02128// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 82129// CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02130// CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 82131// CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12132// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 82133// CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12134// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 82135// CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 12136// CHECK5-NEXT:    store ptr null, ptr [[TMP9]], align 82137// CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22138// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 82139// CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22140// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 82141// CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 22142// CHECK5-NEXT:    store ptr null, ptr [[TMP12]], align 82143// CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 32144// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 82145// CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 32146// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 82147// CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 32148// CHECK5-NEXT:    store ptr null, ptr [[TMP15]], align 82149// CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02150// CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02151// CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02152// CHECK5-NEXT:    store i32 3, ptr [[TMP18]], align 42153// CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12154// CHECK5-NEXT:    store i32 4, ptr [[TMP19]], align 42155// CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22156// CHECK5-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 82157// CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32158// CHECK5-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 82159// CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42160// CHECK5-NEXT:    store ptr @.offload_sizes, ptr [[TMP22]], align 82161// CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52162// CHECK5-NEXT:    store ptr @.offload_maptypes, ptr [[TMP23]], align 82163// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62164// CHECK5-NEXT:    store ptr null, ptr [[TMP24]], align 82165// CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72166// CHECK5-NEXT:    store ptr null, ptr [[TMP25]], align 82167// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82168// CHECK5-NEXT:    store i64 4571424, ptr [[TMP26]], align 82169// CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92170// CHECK5-NEXT:    store i64 0, ptr [[TMP27]], align 82171// CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102172// CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 42173// CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112174// CHECK5-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 42175// CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122176// CHECK5-NEXT:    store i32 0, ptr [[TMP30]], align 42177// CHECK5-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.region_id, ptr [[KERNEL_ARGS]])2178// CHECK5-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 02179// CHECK5-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2180// CHECK5:       omp_offload.failed:2181// CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3:[0-9]+]]2182// CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]2183// CHECK5:       omp_offload.cont:2184// CHECK5-NEXT:    ret void2185//2186//2187// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l702188// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {2189// CHECK5-NEXT:  entry:2190// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82191// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82192// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82193// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82194// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82195// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82196// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82197// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82198// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])2199// CHECK5-NEXT:    ret void2200//2201//2202// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined2203// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {2204// CHECK5-NEXT:  entry:2205// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82206// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82207// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82208// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82209// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82210// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82211// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42212// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42213// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42214// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42215// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42216// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42217// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 42218// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82219// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82220// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82221// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82222// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82223// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82224// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82225// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82226// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82227// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82228// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 82229// CHECK5-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i64 16) ]2230// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42231// CHECK5-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 42232// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42233// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42234// CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82235// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42236// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2237// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42238// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714232239// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2240// CHECK5:       cond.true:2241// CHECK5-NEXT:    br label [[COND_END:%.*]]2242// CHECK5:       cond.false:2243// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42244// CHECK5-NEXT:    br label [[COND_END]]2245// CHECK5:       cond.end:2246// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]2247// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42248// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42249// CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42250// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2251// CHECK5:       omp.inner.for.cond:2252// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]2253// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]2254// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]2255// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2256// CHECK5:       omp.inner.for.body:2257// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2258// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 72259// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]2260// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2261// CHECK5-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP8]]2262// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2263// CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i642264// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM]]2265// CHECK5-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]2266// CHECK5-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP8]]2267// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2268// CHECK5-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP17]] to i642269// CHECK5-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[IDXPROM2]]2270// CHECK5-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP8]]2271// CHECK5-NEXT:    [[MUL4:%.*]] = fmul float [[TMP15]], [[TMP18]]2272// CHECK5-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP8]]2273// CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2274// CHECK5-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP20]] to i642275// CHECK5-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i64 [[IDXPROM5]]2276// CHECK5-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP8]]2277// CHECK5-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP21]]2278// CHECK5-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP8]]2279// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2280// CHECK5-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP23]] to i642281// CHECK5-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i64 [[IDXPROM8]]2282// CHECK5-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 4, !llvm.access.group [[ACC_GRP8]]2283// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2284// CHECK5:       omp.body.continue:2285// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2286// CHECK5:       omp.inner.for.inc:2287// CHECK5-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2288// CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], 12289// CHECK5-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2290// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]2291// CHECK5:       omp.inner.for.end:2292// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2293// CHECK5:       omp.loop.exit:2294// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])2295// CHECK5-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42296// CHECK5-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 02297// CHECK5-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2298// CHECK5:       .omp.final.then:2299// CHECK5-NEXT:    store i32 32000001, ptr [[I]], align 42300// CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]2301// CHECK5:       .omp.final.done:2302// CHECK5-NEXT:    ret void2303//2304//2305// CHECK5-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_2306// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {2307// CHECK5-NEXT:  entry:2308// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82309// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82310// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82311// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82312// CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 82313// CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 82314// CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 82315// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42316// CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82317// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82318// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82319// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82320// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82321// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82322// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82323// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82324// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82325// CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02326// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 82327// CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02328// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 82329// CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02330// CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 82331// CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12332// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 82333// CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12334// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 82335// CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 12336// CHECK5-NEXT:    store ptr null, ptr [[TMP9]], align 82337// CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22338// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 82339// CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22340// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 82341// CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 22342// CHECK5-NEXT:    store ptr null, ptr [[TMP12]], align 82343// CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 32344// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 82345// CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 32346// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 82347// CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 32348// CHECK5-NEXT:    store ptr null, ptr [[TMP15]], align 82349// CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02350// CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02351// CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02352// CHECK5-NEXT:    store i32 3, ptr [[TMP18]], align 42353// CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12354// CHECK5-NEXT:    store i32 4, ptr [[TMP19]], align 42355// CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22356// CHECK5-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 82357// CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32358// CHECK5-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 82359// CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42360// CHECK5-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 82361// CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52362// CHECK5-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 82363// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62364// CHECK5-NEXT:    store ptr null, ptr [[TMP24]], align 82365// CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72366// CHECK5-NEXT:    store ptr null, ptr [[TMP25]], align 82367// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82368// CHECK5-NEXT:    store i64 4571424, ptr [[TMP26]], align 82369// CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92370// CHECK5-NEXT:    store i64 0, ptr [[TMP27]], align 82371// CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102372// CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 42373// CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112374// CHECK5-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 42375// CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122376// CHECK5-NEXT:    store i32 0, ptr [[TMP30]], align 42377// CHECK5-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.region_id, ptr [[KERNEL_ARGS]])2378// CHECK5-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 02379// CHECK5-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2380// CHECK5:       omp_offload.failed:2381// CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]2382// CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]2383// CHECK5:       omp_offload.cont:2384// CHECK5-NEXT:    ret void2385//2386//2387// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l862388// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {2389// CHECK5-NEXT:  entry:2390// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82391// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82392// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82393// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82394// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82395// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82396// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82397// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82398// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])2399// CHECK5-NEXT:    ret void2400//2401//2402// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined2403// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {2404// CHECK5-NEXT:  entry:2405// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82406// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82407// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82408// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82409// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82410// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82411// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42412// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42413// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42414// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42415// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42416// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42417// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 42418// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82419// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82420// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82421// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82422// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82423// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82424// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82425// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82426// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82427// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82428// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42429// CHECK5-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 42430// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42431// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42432// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82433// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 42434// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2435// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42436// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714232437// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2438// CHECK5:       cond.true:2439// CHECK5-NEXT:    br label [[COND_END:%.*]]2440// CHECK5:       cond.false:2441// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42442// CHECK5-NEXT:    br label [[COND_END]]2443// CHECK5:       cond.end:2444// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]2445// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42446// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42447// CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 42448// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2449// CHECK5:       omp.inner.for.cond:2450// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42451// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42452// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2453// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2454// CHECK5:       omp.inner.for.body:2455// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42456// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 72457// CHECK5-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]2458// CHECK5-NEXT:    store i32 [[SUB]], ptr [[I]], align 42459// CHECK5-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8, !nontemporal [[META15:![0-9]+]]2460// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 42461// CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i642462// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]2463// CHECK5-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 42464// CHECK5-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 82465// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 42466// CHECK5-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i642467// CHECK5-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]2468// CHECK5-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 42469// CHECK5-NEXT:    [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]2470// CHECK5-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 82471// CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 42472// CHECK5-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i642473// CHECK5-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]2474// CHECK5-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 42475// CHECK5-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]2476// CHECK5-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8, !nontemporal [[META15]]2477// CHECK5-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 42478// CHECK5-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i642479// CHECK5-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]2480// CHECK5-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 42481// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2482// CHECK5:       omp.body.continue:2483// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2484// CHECK5:       omp.inner.for.inc:2485// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42486// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 12487// CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42488// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]2489// CHECK5:       omp.inner.for.end:2490// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2491// CHECK5:       omp.loop.exit:2492// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])2493// CHECK5-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42494// CHECK5-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 02495// CHECK5-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2496// CHECK5:       .omp.final.then:2497// CHECK5-NEXT:    store i32 32, ptr [[I]], align 42498// CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]2499// CHECK5:       .omp.final.done:2500// CHECK5-NEXT:    ret void2501//2502//2503// CHECK5-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_2504// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {2505// CHECK5-NEXT:  entry:2506// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82507// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82508// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82509// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82510// CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 82511// CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 82512// CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 82513// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42514// CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82515// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82516// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82517// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82518// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82519// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82520// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82521// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82522// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82523// CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02524// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 82525// CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02526// CHECK5-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 82527// CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02528// CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 82529// CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12530// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 82531// CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12532// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 82533// CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 12534// CHECK5-NEXT:    store ptr null, ptr [[TMP9]], align 82535// CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22536// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 82537// CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22538// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 82539// CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 22540// CHECK5-NEXT:    store ptr null, ptr [[TMP12]], align 82541// CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 32542// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 82543// CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 32544// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 82545// CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 32546// CHECK5-NEXT:    store ptr null, ptr [[TMP15]], align 82547// CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02548// CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02549// CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02550// CHECK5-NEXT:    store i32 3, ptr [[TMP18]], align 42551// CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12552// CHECK5-NEXT:    store i32 4, ptr [[TMP19]], align 42553// CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22554// CHECK5-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 82555// CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32556// CHECK5-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 82557// CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42558// CHECK5-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP22]], align 82559// CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52560// CHECK5-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP23]], align 82561// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62562// CHECK5-NEXT:    store ptr null, ptr [[TMP24]], align 82563// CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72564// CHECK5-NEXT:    store ptr null, ptr [[TMP25]], align 82565// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82566// CHECK5-NEXT:    store i64 16908289, ptr [[TMP26]], align 82567// CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92568// CHECK5-NEXT:    store i64 0, ptr [[TMP27]], align 82569// CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102570// CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 42571// CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112572// CHECK5-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 42573// CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122574// CHECK5-NEXT:    store i32 0, ptr [[TMP30]], align 42575// CHECK5-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.region_id, ptr [[KERNEL_ARGS]])2576// CHECK5-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 02577// CHECK5-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2578// CHECK5:       omp_offload.failed:2579// CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]2580// CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]2581// CHECK5:       omp_offload.cont:2582// CHECK5-NEXT:    ret void2583//2584//2585// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1032586// CHECK5-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {2587// CHECK5-NEXT:  entry:2588// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82589// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82590// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82591// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82592// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82593// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82594// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82595// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82596// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])2597// CHECK5-NEXT:    ret void2598//2599//2600// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined2601// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {2602// CHECK5-NEXT:  entry:2603// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82604// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82605// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82606// CHECK5-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82607// CHECK5-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82608// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82609// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42610// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42611// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42612// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42613// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42614// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42615// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 42616// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82617// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82618// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82619// CHECK5-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82620// CHECK5-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82621// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82622// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82623// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 82624// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 82625// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 82626// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42627// CHECK5-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 42628// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42629// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42630// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82631// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 42632// CHECK5-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)2633// CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]2634// CHECK5:       omp.dispatch.cond:2635// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42636// CHECK5-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082882637// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2638// CHECK5:       cond.true:2639// CHECK5-NEXT:    br label [[COND_END:%.*]]2640// CHECK5:       cond.false:2641// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42642// CHECK5-NEXT:    br label [[COND_END]]2643// CHECK5:       cond.end:2644// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]2645// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42646// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42647// CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 42648// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42649// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42650// CHECK5-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]2651// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2652// CHECK5:       omp.dispatch.body:2653// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2654// CHECK5:       omp.inner.for.cond:2655// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]2656// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]2657// CHECK5-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]2658// CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2659// CHECK5:       omp.inner.for.body:2660// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]2661// CHECK5-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1272662// CHECK5-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]2663// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]2664// CHECK5-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP18]]2665// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]2666// CHECK5-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i642667// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i64 [[IDXPROM]]2668// CHECK5-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]2669// CHECK5-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP18]]2670// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]2671// CHECK5-NEXT:    [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i642672// CHECK5-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i64 [[IDXPROM3]]2673// CHECK5-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP18]]2674// CHECK5-NEXT:    [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]2675// CHECK5-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP18]]2676// CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]2677// CHECK5-NEXT:    [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i642678// CHECK5-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i64 [[IDXPROM6]]2679// CHECK5-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP18]]2680// CHECK5-NEXT:    [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]2681// CHECK5-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP18]]2682// CHECK5-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]2683// CHECK5-NEXT:    [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i642684// CHECK5-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i64 [[IDXPROM9]]2685// CHECK5-NEXT:    store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP18]]2686// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2687// CHECK5:       omp.body.continue:2688// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2689// CHECK5:       omp.inner.for.inc:2690// CHECK5-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]2691// CHECK5-NEXT:    [[ADD11:%.*]] = add i32 [[TMP25]], 12692// CHECK5-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]2693// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]2694// CHECK5:       omp.inner.for.end:2695// CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]2696// CHECK5:       omp.dispatch.inc:2697// CHECK5-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42698// CHECK5-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42699// CHECK5-NEXT:    [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]2700// CHECK5-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 42701// CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42702// CHECK5-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42703// CHECK5-NEXT:    [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]2704// CHECK5-NEXT:    store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 42705// CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]2706// CHECK5:       omp.dispatch.end:2707// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])2708// CHECK5-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42709// CHECK5-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 02710// CHECK5-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2711// CHECK5:       .omp.final.then:2712// CHECK5-NEXT:    store i32 -2147483522, ptr [[I]], align 42713// CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]2714// CHECK5:       .omp.final.done:2715// CHECK5-NEXT:    ret void2716//2717//2718// CHECK5-LABEL: define {{[^@]+}}@_Z12test_precondv2719// CHECK5-SAME: () #[[ATTR0]] {2720// CHECK5-NEXT:  entry:2721// CHECK5-NEXT:    [[A:%.*]] = alloca i8, align 12722// CHECK5-NEXT:    [[I:%.*]] = alloca i8, align 12723// CHECK5-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 82724// CHECK5-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 82725// CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 82726// CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 82727// CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 82728// CHECK5-NEXT:    [[TMP:%.*]] = alloca i8, align 12729// CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 12730// CHECK5-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42731// CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82732// CHECK5-NEXT:    store i8 0, ptr [[A]], align 12733// CHECK5-NEXT:    [[TMP0:%.*]] = load i8, ptr [[I]], align 12734// CHECK5-NEXT:    store i8 [[TMP0]], ptr [[I_CASTED]], align 12735// CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[I_CASTED]], align 82736// CHECK5-NEXT:    [[TMP2:%.*]] = load i8, ptr [[A]], align 12737// CHECK5-NEXT:    store i8 [[TMP2]], ptr [[A_CASTED]], align 12738// CHECK5-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 82739// CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02740// CHECK5-NEXT:    store i64 [[TMP1]], ptr [[TMP4]], align 82741// CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02742// CHECK5-NEXT:    store i64 [[TMP1]], ptr [[TMP5]], align 82743// CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02744// CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 82745// CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12746// CHECK5-NEXT:    store i64 [[TMP3]], ptr [[TMP7]], align 82747// CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12748// CHECK5-NEXT:    store i64 [[TMP3]], ptr [[TMP8]], align 82749// CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 12750// CHECK5-NEXT:    store ptr null, ptr [[TMP9]], align 82751// CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02752// CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02753// CHECK5-NEXT:    [[TMP12:%.*]] = load i8, ptr [[A]], align 12754// CHECK5-NEXT:    store i8 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 12755// CHECK5-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12756// CHECK5-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i322757// CHECK5-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]2758// CHECK5-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 12759// CHECK5-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 12760// CHECK5-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 12761// CHECK5-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 12762// CHECK5-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 42763// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42764// CHECK5-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 12765// CHECK5-NEXT:    [[TMP15:%.*]] = zext i32 [[ADD4]] to i642766// CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02767// CHECK5-NEXT:    store i32 3, ptr [[TMP16]], align 42768// CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12769// CHECK5-NEXT:    store i32 2, ptr [[TMP17]], align 42770// CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22771// CHECK5-NEXT:    store ptr [[TMP10]], ptr [[TMP18]], align 82772// CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32773// CHECK5-NEXT:    store ptr [[TMP11]], ptr [[TMP19]], align 82774// CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42775// CHECK5-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP20]], align 82776// CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52777// CHECK5-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP21]], align 82778// CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62779// CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 82780// CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72781// CHECK5-NEXT:    store ptr null, ptr [[TMP23]], align 82782// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82783// CHECK5-NEXT:    store i64 [[TMP15]], ptr [[TMP24]], align 82784// CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92785// CHECK5-NEXT:    store i64 0, ptr [[TMP25]], align 82786// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102787// CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 42788// CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112789// CHECK5-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP27]], align 42790// CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122791// CHECK5-NEXT:    store i32 0, ptr [[TMP28]], align 42792// CHECK5-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.region_id, ptr [[KERNEL_ARGS]])2793// CHECK5-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 02794// CHECK5-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2795// CHECK5:       omp_offload.failed:2796// CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115(i64 [[TMP1]], i64 [[TMP3]]) #[[ATTR3]]2797// CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]2798// CHECK5:       omp_offload.cont:2799// CHECK5-NEXT:    ret void2800//2801//2802// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1152803// CHECK5-SAME: (i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {2804// CHECK5-NEXT:  entry:2805// CHECK5-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 82806// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 82807// CHECK5-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 82808// CHECK5-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 82809// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])2810// CHECK5-NEXT:    ret void2811//2812//2813// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined2814// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {2815// CHECK5-NEXT:  entry:2816// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82817// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82818// CHECK5-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 82819// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82820// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42821// CHECK5-NEXT:    [[TMP:%.*]] = alloca i8, align 12822// CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 12823// CHECK5-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42824// CHECK5-NEXT:    [[I4:%.*]] = alloca i8, align 12825// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42826// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42827// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42828// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42829// CHECK5-NEXT:    [[I6:%.*]] = alloca i8, align 12830// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82831// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82832// CHECK5-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 82833// CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82834// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 82835// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82836// CHECK5-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 12837// CHECK5-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 12838// CHECK5-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12839// CHECK5-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i322840// CHECK5-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]2841// CHECK5-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 12842// CHECK5-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 12843// CHECK5-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 12844// CHECK5-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 12845// CHECK5-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 42846// CHECK5-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12847// CHECK5-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 12848// CHECK5-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12849// CHECK5-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i322850// CHECK5-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 102851// CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2852// CHECK5:       omp.precond.then:2853// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42854// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42855// CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42856// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42857// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42858// CHECK5-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82859// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42860// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2861// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42862// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42863// CHECK5-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]2864// CHECK5-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2865// CHECK5:       cond.true:2866// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42867// CHECK5-NEXT:    br label [[COND_END:%.*]]2868// CHECK5:       cond.false:2869// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42870// CHECK5-NEXT:    br label [[COND_END]]2871// CHECK5:       cond.end:2872// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]2873// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42874// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42875// CHECK5-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 42876// CHECK5-NEXT:    [[TMP14:%.*]] = load i8, ptr [[TMP1]], align 12877// CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP14]], 02878// CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]2879// CHECK5:       omp_if.then:2880// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2881// CHECK5:       omp.inner.for.cond:2882// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]2883// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]2884// CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]2885// CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2886// CHECK5:       omp.inner.for.body:2887// CHECK5-NEXT:    [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP21]]2888// CHECK5-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP17]] to i322889// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2890// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 12891// CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]2892// CHECK5-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i82893// CHECK5-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META15]], !llvm.access.group [[ACC_GRP21]]2894// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2895// CHECK5:       omp.body.continue:2896// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2897// CHECK5:       omp.inner.for.inc:2898// CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2899// CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP19]], 12900// CHECK5-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2901// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]2902// CHECK5:       omp.inner.for.end:2903// CHECK5-NEXT:    br label [[OMP_IF_END:%.*]]2904// CHECK5:       omp_if.else:2905// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]2906// CHECK5:       omp.inner.for.cond13:2907// CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42908// CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42909// CHECK5-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]2910// CHECK5-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]2911// CHECK5:       omp.inner.for.body15:2912// CHECK5-NEXT:    [[TMP22:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12913// CHECK5-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP22]] to i322914// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42915// CHECK5-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP23]], 12916// CHECK5-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]2917// CHECK5-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i82918// CHECK5-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 12919// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]2920// CHECK5:       omp.body.continue20:2921// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]2922// CHECK5:       omp.inner.for.inc21:2923// CHECK5-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42924// CHECK5-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP24]], 12925// CHECK5-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 42926// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP24:![0-9]+]]2927// CHECK5:       omp.inner.for.end23:2928// CHECK5-NEXT:    br label [[OMP_IF_END]]2929// CHECK5:       omp_if.end:2930// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2931// CHECK5:       omp.loop.exit:2932// CHECK5-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82933// CHECK5-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42934// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])2935// CHECK5-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42936// CHECK5-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 02937// CHECK5-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2938// CHECK5:       .omp.final.then:2939// CHECK5-NEXT:    [[TMP29:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12940// CHECK5-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP29]] to i322941// CHECK5-NEXT:    [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 12942// CHECK5-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP30]] to i322943// CHECK5-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]2944// CHECK5-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 12945// CHECK5-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 12946// CHECK5-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 12947// CHECK5-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 12948// CHECK5-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]2949// CHECK5-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i82950// CHECK5-NEXT:    store i8 [[CONV32]], ptr [[TMP0]], align 12951// CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]2952// CHECK5:       .omp.final.done:2953// CHECK5-NEXT:    br label [[OMP_PRECOND_END]]2954// CHECK5:       omp.precond.end:2955// CHECK5-NEXT:    ret void2956//2957//2958// CHECK5-LABEL: define {{[^@]+}}@_Z4fintv2959// CHECK5-SAME: () #[[ATTR0]] {2960// CHECK5-NEXT:  entry:2961// CHECK5-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v()2962// CHECK5-NEXT:    ret i32 [[CALL]]2963//2964//2965// CHECK5-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v2966// CHECK5-SAME: () #[[ATTR0]] comdat {2967// CHECK5-NEXT:  entry:2968// CHECK5-NEXT:    [[AA:%.*]] = alloca i16, align 22969// CHECK5-NEXT:    [[AA_CASTED:%.*]] = alloca i64, align 82970// CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 82971// CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 82972// CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 82973// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42974// CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82975// CHECK5-NEXT:    store i16 0, ptr [[AA]], align 22976// CHECK5-NEXT:    [[TMP0:%.*]] = load i16, ptr [[AA]], align 22977// CHECK5-NEXT:    store i16 [[TMP0]], ptr [[AA_CASTED]], align 22978// CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[AA_CASTED]], align 82979// CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02980// CHECK5-NEXT:    store i64 [[TMP1]], ptr [[TMP2]], align 82981// CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02982// CHECK5-NEXT:    store i64 [[TMP1]], ptr [[TMP3]], align 82983// CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02984// CHECK5-NEXT:    store ptr null, ptr [[TMP4]], align 82985// CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02986// CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02987// CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02988// CHECK5-NEXT:    store i32 3, ptr [[TMP7]], align 42989// CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12990// CHECK5-NEXT:    store i32 1, ptr [[TMP8]], align 42991// CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22992// CHECK5-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 82993// CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32994// CHECK5-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 82995// CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42996// CHECK5-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP11]], align 82997// CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52998// CHECK5-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP12]], align 82999// CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63000// CHECK5-NEXT:    store ptr null, ptr [[TMP13]], align 83001// CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73002// CHECK5-NEXT:    store ptr null, ptr [[TMP14]], align 83003// CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83004// CHECK5-NEXT:    store i64 100, ptr [[TMP15]], align 83005// CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93006// CHECK5-NEXT:    store i64 0, ptr [[TMP16]], align 83007// CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103008// CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 43009// CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113010// CHECK5-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 43011// CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123012// CHECK5-NEXT:    store i32 0, ptr [[TMP19]], align 43013// CHECK5-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.region_id, ptr [[KERNEL_ARGS]])3014// CHECK5-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 03015// CHECK5-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3016// CHECK5:       omp_offload.failed:3017// CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135(i64 [[TMP1]]) #[[ATTR3]]3018// CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]3019// CHECK5:       omp_offload.cont:3020// CHECK5-NEXT:    ret i32 03021//3022//3023// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1353024// CHECK5-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] {3025// CHECK5-NEXT:  entry:3026// CHECK5-NEXT:    [[AA_ADDR:%.*]] = alloca i64, align 83027// CHECK5-NEXT:    store i64 [[AA]], ptr [[AA_ADDR]], align 83028// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])3029// CHECK5-NEXT:    ret void3030//3031//3032// CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined3033// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {3034// CHECK5-NEXT:  entry:3035// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83036// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83037// CHECK5-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 83038// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43039// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 43040// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43041// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43042// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43043// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43044// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43045// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83046// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83047// CHECK5-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 83048// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 83049// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43050// CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 43051// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43052// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43053// CHECK5-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 23054// CHECK5-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i323055// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83056// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43057// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])3058// CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]3059// CHECK5:       omp.dispatch.cond:3060// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43061// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 993062// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3063// CHECK5:       cond.true:3064// CHECK5-NEXT:    br label [[COND_END:%.*]]3065// CHECK5:       cond.false:3066// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43067// CHECK5-NEXT:    br label [[COND_END]]3068// CHECK5:       cond.end:3069// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3070// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43071// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43072// CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43073// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43074// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43075// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3076// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3077// CHECK5:       omp.dispatch.body:3078// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3079// CHECK5:       omp.inner.for.cond:3080// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]3081// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP26]]3082// CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]3083// CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3084// CHECK5:       omp.inner.for.body:3085// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]3086// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 13087// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3088// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP26]]3089// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3090// CHECK5:       omp.body.continue:3091// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3092// CHECK5:       omp.inner.for.inc:3093// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]3094// CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 13095// CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]3096// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]3097// CHECK5:       omp.inner.for.end:3098// CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]3099// CHECK5:       omp.dispatch.inc:3100// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43101// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43102// CHECK5-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]3103// CHECK5-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 43104// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43105// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43106// CHECK5-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]3107// CHECK5-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 43108// CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]3109// CHECK5:       omp.dispatch.end:3110// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3111// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43112// CHECK5-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 03113// CHECK5-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3114// CHECK5:       .omp.final.then:3115// CHECK5-NEXT:    store i32 100, ptr [[I]], align 43116// CHECK5-NEXT:    br label [[DOTOMP_FINAL_DONE]]3117// CHECK5:       .omp.final.done:3118// CHECK5-NEXT:    ret void3119//3120//3121// CHECK7-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_3122// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {3123// CHECK7-NEXT:  entry:3124// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43125// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43126// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43127// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43128// CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 43129// CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 43130// CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 43131// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43132// CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83133// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43134// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43135// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43136// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43137// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43138// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43139// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43140// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43141// CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03142// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 43143// CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03144// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 43145// CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03146// CHECK7-NEXT:    store ptr null, ptr [[TMP6]], align 43147// CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13148// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 43149// CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13150// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 43151// CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 13152// CHECK7-NEXT:    store ptr null, ptr [[TMP9]], align 43153// CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 23154// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 43155// CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 23156// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 43157// CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 23158// CHECK7-NEXT:    store ptr null, ptr [[TMP12]], align 43159// CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 33160// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 43161// CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 33162// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 43163// CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 33164// CHECK7-NEXT:    store ptr null, ptr [[TMP15]], align 43165// CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03166// CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03167// CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03168// CHECK7-NEXT:    store i32 3, ptr [[TMP18]], align 43169// CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13170// CHECK7-NEXT:    store i32 4, ptr [[TMP19]], align 43171// CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23172// CHECK7-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 43173// CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33174// CHECK7-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 43175// CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43176// CHECK7-NEXT:    store ptr @.offload_sizes, ptr [[TMP22]], align 43177// CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53178// CHECK7-NEXT:    store ptr @.offload_maptypes, ptr [[TMP23]], align 43179// CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63180// CHECK7-NEXT:    store ptr null, ptr [[TMP24]], align 43181// CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73182// CHECK7-NEXT:    store ptr null, ptr [[TMP25]], align 43183// CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83184// CHECK7-NEXT:    store i64 4571424, ptr [[TMP26]], align 83185// CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93186// CHECK7-NEXT:    store i64 0, ptr [[TMP27]], align 83187// CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103188// CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 43189// CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113190// CHECK7-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 43191// CHECK7-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123192// CHECK7-NEXT:    store i32 0, ptr [[TMP30]], align 43193// CHECK7-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.region_id, ptr [[KERNEL_ARGS]])3194// CHECK7-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 03195// CHECK7-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3196// CHECK7:       omp_offload.failed:3197// CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3:[0-9]+]]3198// CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]3199// CHECK7:       omp_offload.cont:3200// CHECK7-NEXT:    ret void3201//3202//3203// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l703204// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {3205// CHECK7-NEXT:  entry:3206// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43207// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43208// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43209// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43210// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43211// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43212// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43213// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43214// CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])3215// CHECK7-NEXT:    ret void3216//3217//3218// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined3219// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {3220// CHECK7-NEXT:  entry:3221// CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43222// CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43223// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43224// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43225// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43226// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43227// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43228// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43229// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43230// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43231// CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43232// CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43233// CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 43234// CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43235// CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43236// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43237// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43238// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43239// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43240// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43241// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43242// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43243// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43244// CHECK7-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 43245// CHECK7-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i32 16) ]3246// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43247// CHECK7-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 43248// CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43249// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43250// CHECK7-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43251// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 43252// CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3253// CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43254// CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714233255// CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3256// CHECK7:       cond.true:3257// CHECK7-NEXT:    br label [[COND_END:%.*]]3258// CHECK7:       cond.false:3259// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43260// CHECK7-NEXT:    br label [[COND_END]]3261// CHECK7:       cond.end:3262// CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]3263// CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43264// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43265// CHECK7-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 43266// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3267// CHECK7:       omp.inner.for.cond:3268// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3269// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]3270// CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]3271// CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3272// CHECK7:       omp.inner.for.body:3273// CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3274// CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 73275// CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]3276// CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3277// CHECK7-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP9]]3278// CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3279// CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]3280// CHECK7-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]3281// CHECK7-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP9]]3282// CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3283// CHECK7-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i32 [[TMP17]]3284// CHECK7-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP9]]3285// CHECK7-NEXT:    [[MUL3:%.*]] = fmul float [[TMP15]], [[TMP18]]3286// CHECK7-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP9]]3287// CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3288// CHECK7-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i32 [[TMP20]]3289// CHECK7-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP9]]3290// CHECK7-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP21]]3291// CHECK7-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP9]]3292// CHECK7-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]3293// CHECK7-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i32 [[TMP23]]3294// CHECK7-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP9]]3295// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3296// CHECK7:       omp.body.continue:3297// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3298// CHECK7:       omp.inner.for.inc:3299// CHECK7-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3300// CHECK7-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], 13301// CHECK7-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]3302// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]3303// CHECK7:       omp.inner.for.end:3304// CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3305// CHECK7:       omp.loop.exit:3306// CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])3307// CHECK7-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43308// CHECK7-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 03309// CHECK7-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3310// CHECK7:       .omp.final.then:3311// CHECK7-NEXT:    store i32 32000001, ptr [[I]], align 43312// CHECK7-NEXT:    br label [[DOTOMP_FINAL_DONE]]3313// CHECK7:       .omp.final.done:3314// CHECK7-NEXT:    ret void3315//3316//3317// CHECK7-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_3318// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {3319// CHECK7-NEXT:  entry:3320// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43321// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43322// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43323// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43324// CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 43325// CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 43326// CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 43327// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43328// CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83329// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43330// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43331// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43332// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43333// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43334// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43335// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43336// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43337// CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03338// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 43339// CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03340// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 43341// CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03342// CHECK7-NEXT:    store ptr null, ptr [[TMP6]], align 43343// CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13344// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 43345// CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13346// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 43347// CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 13348// CHECK7-NEXT:    store ptr null, ptr [[TMP9]], align 43349// CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 23350// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 43351// CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 23352// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 43353// CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 23354// CHECK7-NEXT:    store ptr null, ptr [[TMP12]], align 43355// CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 33356// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 43357// CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 33358// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 43359// CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 33360// CHECK7-NEXT:    store ptr null, ptr [[TMP15]], align 43361// CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03362// CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03363// CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03364// CHECK7-NEXT:    store i32 3, ptr [[TMP18]], align 43365// CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13366// CHECK7-NEXT:    store i32 4, ptr [[TMP19]], align 43367// CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23368// CHECK7-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 43369// CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33370// CHECK7-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 43371// CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43372// CHECK7-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 43373// CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53374// CHECK7-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 43375// CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63376// CHECK7-NEXT:    store ptr null, ptr [[TMP24]], align 43377// CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73378// CHECK7-NEXT:    store ptr null, ptr [[TMP25]], align 43379// CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83380// CHECK7-NEXT:    store i64 4571424, ptr [[TMP26]], align 83381// CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93382// CHECK7-NEXT:    store i64 0, ptr [[TMP27]], align 83383// CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103384// CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 43385// CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113386// CHECK7-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 43387// CHECK7-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123388// CHECK7-NEXT:    store i32 0, ptr [[TMP30]], align 43389// CHECK7-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.region_id, ptr [[KERNEL_ARGS]])3390// CHECK7-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 03391// CHECK7-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3392// CHECK7:       omp_offload.failed:3393// CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]3394// CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]3395// CHECK7:       omp_offload.cont:3396// CHECK7-NEXT:    ret void3397//3398//3399// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l863400// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {3401// CHECK7-NEXT:  entry:3402// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43403// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43404// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43405// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43406// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43407// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43408// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43409// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43410// CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])3411// CHECK7-NEXT:    ret void3412//3413//3414// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined3415// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {3416// CHECK7-NEXT:  entry:3417// CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43418// CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43419// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43420// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43421// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43422// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43423// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43424// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43425// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43426// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43427// CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43428// CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43429// CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 43430// CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43431// CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43432// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43433// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43434// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43435// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43436// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43437// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43438// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43439// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43440// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43441// CHECK7-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 43442// CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43443// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43444// CHECK7-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43445// CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 43446// CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3447// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43448// CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714233449// CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3450// CHECK7:       cond.true:3451// CHECK7-NEXT:    br label [[COND_END:%.*]]3452// CHECK7:       cond.false:3453// CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43454// CHECK7-NEXT:    br label [[COND_END]]3455// CHECK7:       cond.end:3456// CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]3457// CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43458// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43459// CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 43460// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3461// CHECK7:       omp.inner.for.cond:3462// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43463// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43464// CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]3465// CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3466// CHECK7:       omp.inner.for.body:3467// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43468// CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 73469// CHECK7-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]3470// CHECK7-NEXT:    store i32 [[SUB]], ptr [[I]], align 43471// CHECK7-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4, !nontemporal [[META16:![0-9]+]]3472// CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 43473// CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]3474// CHECK7-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 43475// CHECK7-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 43476// CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 43477// CHECK7-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]3478// CHECK7-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 43479// CHECK7-NEXT:    [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]3480// CHECK7-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 43481// CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 43482// CHECK7-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]3483// CHECK7-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 43484// CHECK7-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]3485// CHECK7-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4, !nontemporal [[META16]]3486// CHECK7-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 43487// CHECK7-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]3488// CHECK7-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 43489// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3490// CHECK7:       omp.body.continue:3491// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3492// CHECK7:       omp.inner.for.inc:3493// CHECK7-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43494// CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 13495// CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43496// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]3497// CHECK7:       omp.inner.for.end:3498// CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3499// CHECK7:       omp.loop.exit:3500// CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])3501// CHECK7-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43502// CHECK7-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 03503// CHECK7-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3504// CHECK7:       .omp.final.then:3505// CHECK7-NEXT:    store i32 32, ptr [[I]], align 43506// CHECK7-NEXT:    br label [[DOTOMP_FINAL_DONE]]3507// CHECK7:       .omp.final.done:3508// CHECK7-NEXT:    ret void3509//3510//3511// CHECK7-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_3512// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {3513// CHECK7-NEXT:  entry:3514// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43515// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43516// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43517// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43518// CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 43519// CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 43520// CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 43521// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43522// CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83523// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43524// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43525// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43526// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43527// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43528// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43529// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43530// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43531// CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03532// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP4]], align 43533// CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03534// CHECK7-NEXT:    store ptr [[TMP0]], ptr [[TMP5]], align 43535// CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03536// CHECK7-NEXT:    store ptr null, ptr [[TMP6]], align 43537// CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13538// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP7]], align 43539// CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13540// CHECK7-NEXT:    store ptr [[TMP1]], ptr [[TMP8]], align 43541// CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 13542// CHECK7-NEXT:    store ptr null, ptr [[TMP9]], align 43543// CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 23544// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP10]], align 43545// CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 23546// CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP11]], align 43547// CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 23548// CHECK7-NEXT:    store ptr null, ptr [[TMP12]], align 43549// CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 33550// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 43551// CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 33552// CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 43553// CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 33554// CHECK7-NEXT:    store ptr null, ptr [[TMP15]], align 43555// CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03556// CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03557// CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03558// CHECK7-NEXT:    store i32 3, ptr [[TMP18]], align 43559// CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13560// CHECK7-NEXT:    store i32 4, ptr [[TMP19]], align 43561// CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23562// CHECK7-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 43563// CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33564// CHECK7-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 43565// CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43566// CHECK7-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP22]], align 43567// CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53568// CHECK7-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP23]], align 43569// CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63570// CHECK7-NEXT:    store ptr null, ptr [[TMP24]], align 43571// CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73572// CHECK7-NEXT:    store ptr null, ptr [[TMP25]], align 43573// CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83574// CHECK7-NEXT:    store i64 16908289, ptr [[TMP26]], align 83575// CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93576// CHECK7-NEXT:    store i64 0, ptr [[TMP27]], align 83577// CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103578// CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 43579// CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113580// CHECK7-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 43581// CHECK7-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123582// CHECK7-NEXT:    store i32 0, ptr [[TMP30]], align 43583// CHECK7-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.region_id, ptr [[KERNEL_ARGS]])3584// CHECK7-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 03585// CHECK7-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3586// CHECK7:       omp_offload.failed:3587// CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR3]]3588// CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]3589// CHECK7:       omp_offload.cont:3590// CHECK7-NEXT:    ret void3591//3592//3593// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1033594// CHECK7-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {3595// CHECK7-NEXT:  entry:3596// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43597// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43598// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43599// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43600// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43601// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43602// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43603// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43604// CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])3605// CHECK7-NEXT:    ret void3606//3607//3608// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined3609// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {3610// CHECK7-NEXT:  entry:3611// CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43612// CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43613// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43614// CHECK7-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 43615// CHECK7-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 43616// CHECK7-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 43617// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43618// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43619// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43620// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43621// CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43622// CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43623// CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 43624// CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43625// CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43626// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43627// CHECK7-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 43628// CHECK7-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 43629// CHECK7-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 43630// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43631// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 43632// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 43633// CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 43634// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43635// CHECK7-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 43636// CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43637// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43638// CHECK7-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43639// CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 43640// CHECK7-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)3641// CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]3642// CHECK7:       omp.dispatch.cond:3643// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43644// CHECK7-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082883645// CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3646// CHECK7:       cond.true:3647// CHECK7-NEXT:    br label [[COND_END:%.*]]3648// CHECK7:       cond.false:3649// CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43650// CHECK7-NEXT:    br label [[COND_END]]3651// CHECK7:       cond.end:3652// CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]3653// CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43654// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43655// CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 43656// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43657// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43658// CHECK7-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]3659// CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3660// CHECK7:       omp.dispatch.body:3661// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3662// CHECK7:       omp.inner.for.cond:3663// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]3664// CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]3665// CHECK7-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]3666// CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3667// CHECK7:       omp.inner.for.body:3668// CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]3669// CHECK7-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1273670// CHECK7-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]3671// CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]3672// CHECK7-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP19]]3673// CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]3674// CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i32 [[TMP15]]3675// CHECK7-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]3676// CHECK7-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP19]]3677// CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]3678// CHECK7-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i32 [[TMP18]]3679// CHECK7-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP19]]3680// CHECK7-NEXT:    [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]3681// CHECK7-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP19]]3682// CHECK7-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]3683// CHECK7-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i32 [[TMP21]]3684// CHECK7-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP19]]3685// CHECK7-NEXT:    [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]3686// CHECK7-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP19]]3687// CHECK7-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]3688// CHECK7-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i32 [[TMP24]]3689// CHECK7-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP19]]3690// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3691// CHECK7:       omp.body.continue:3692// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3693// CHECK7:       omp.inner.for.inc:3694// CHECK7-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]3695// CHECK7-NEXT:    [[ADD8:%.*]] = add i32 [[TMP25]], 13696// CHECK7-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]3697// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]3698// CHECK7:       omp.inner.for.end:3699// CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]3700// CHECK7:       omp.dispatch.inc:3701// CHECK7-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43702// CHECK7-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43703// CHECK7-NEXT:    [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]3704// CHECK7-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 43705// CHECK7-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43706// CHECK7-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43707// CHECK7-NEXT:    [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]3708// CHECK7-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 43709// CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]3710// CHECK7:       omp.dispatch.end:3711// CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])3712// CHECK7-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43713// CHECK7-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 03714// CHECK7-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3715// CHECK7:       .omp.final.then:3716// CHECK7-NEXT:    store i32 -2147483522, ptr [[I]], align 43717// CHECK7-NEXT:    br label [[DOTOMP_FINAL_DONE]]3718// CHECK7:       .omp.final.done:3719// CHECK7-NEXT:    ret void3720//3721//3722// CHECK7-LABEL: define {{[^@]+}}@_Z12test_precondv3723// CHECK7-SAME: () #[[ATTR0]] {3724// CHECK7-NEXT:  entry:3725// CHECK7-NEXT:    [[A:%.*]] = alloca i8, align 13726// CHECK7-NEXT:    [[I:%.*]] = alloca i8, align 13727// CHECK7-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 43728// CHECK7-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 43729// CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 43730// CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 43731// CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 43732// CHECK7-NEXT:    [[TMP:%.*]] = alloca i8, align 13733// CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 13734// CHECK7-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43735// CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83736// CHECK7-NEXT:    store i8 0, ptr [[A]], align 13737// CHECK7-NEXT:    [[TMP0:%.*]] = load i8, ptr [[I]], align 13738// CHECK7-NEXT:    store i8 [[TMP0]], ptr [[I_CASTED]], align 13739// CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[I_CASTED]], align 43740// CHECK7-NEXT:    [[TMP2:%.*]] = load i8, ptr [[A]], align 13741// CHECK7-NEXT:    store i8 [[TMP2]], ptr [[A_CASTED]], align 13742// CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 43743// CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03744// CHECK7-NEXT:    store i32 [[TMP1]], ptr [[TMP4]], align 43745// CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03746// CHECK7-NEXT:    store i32 [[TMP1]], ptr [[TMP5]], align 43747// CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03748// CHECK7-NEXT:    store ptr null, ptr [[TMP6]], align 43749// CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 13750// CHECK7-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 43751// CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 13752// CHECK7-NEXT:    store i32 [[TMP3]], ptr [[TMP8]], align 43753// CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 13754// CHECK7-NEXT:    store ptr null, ptr [[TMP9]], align 43755// CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03756// CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03757// CHECK7-NEXT:    [[TMP12:%.*]] = load i8, ptr [[A]], align 13758// CHECK7-NEXT:    store i8 [[TMP12]], ptr [[DOTCAPTURE_EXPR_]], align 13759// CHECK7-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13760// CHECK7-NEXT:    [[CONV:%.*]] = sext i8 [[TMP13]] to i323761// CHECK7-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]3762// CHECK7-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 13763// CHECK7-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 13764// CHECK7-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 13765// CHECK7-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 13766// CHECK7-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 43767// CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43768// CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 13769// CHECK7-NEXT:    [[TMP15:%.*]] = zext i32 [[ADD4]] to i643770// CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03771// CHECK7-NEXT:    store i32 3, ptr [[TMP16]], align 43772// CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13773// CHECK7-NEXT:    store i32 2, ptr [[TMP17]], align 43774// CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23775// CHECK7-NEXT:    store ptr [[TMP10]], ptr [[TMP18]], align 43776// CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33777// CHECK7-NEXT:    store ptr [[TMP11]], ptr [[TMP19]], align 43778// CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43779// CHECK7-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP20]], align 43780// CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53781// CHECK7-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP21]], align 43782// CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63783// CHECK7-NEXT:    store ptr null, ptr [[TMP22]], align 43784// CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73785// CHECK7-NEXT:    store ptr null, ptr [[TMP23]], align 43786// CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83787// CHECK7-NEXT:    store i64 [[TMP15]], ptr [[TMP24]], align 83788// CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93789// CHECK7-NEXT:    store i64 0, ptr [[TMP25]], align 83790// CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103791// CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 43792// CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113793// CHECK7-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP27]], align 43794// CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123795// CHECK7-NEXT:    store i32 0, ptr [[TMP28]], align 43796// CHECK7-NEXT:    [[TMP29:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.region_id, ptr [[KERNEL_ARGS]])3797// CHECK7-NEXT:    [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 03798// CHECK7-NEXT:    br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3799// CHECK7:       omp_offload.failed:3800// CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115(i32 [[TMP1]], i32 [[TMP3]]) #[[ATTR3]]3801// CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]3802// CHECK7:       omp_offload.cont:3803// CHECK7-NEXT:    ret void3804//3805//3806// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1153807// CHECK7-SAME: (i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {3808// CHECK7-NEXT:  entry:3809// CHECK7-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 43810// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43811// CHECK7-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 43812// CHECK7-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43813// CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])3814// CHECK7-NEXT:    ret void3815//3816//3817// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined3818// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {3819// CHECK7-NEXT:  entry:3820// CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43821// CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43822// CHECK7-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 43823// CHECK7-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43824// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43825// CHECK7-NEXT:    [[TMP:%.*]] = alloca i8, align 13826// CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 13827// CHECK7-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43828// CHECK7-NEXT:    [[I4:%.*]] = alloca i8, align 13829// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43830// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43831// CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43832// CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43833// CHECK7-NEXT:    [[I6:%.*]] = alloca i8, align 13834// CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43835// CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43836// CHECK7-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 43837// CHECK7-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43838// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 43839// CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 43840// CHECK7-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 13841// CHECK7-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 13842// CHECK7-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13843// CHECK7-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i323844// CHECK7-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]3845// CHECK7-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 13846// CHECK7-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 13847// CHECK7-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 13848// CHECK7-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 13849// CHECK7-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 43850// CHECK7-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13851// CHECK7-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 13852// CHECK7-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13853// CHECK7-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i323854// CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 103855// CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]3856// CHECK7:       omp.precond.then:3857// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43858// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43859// CHECK7-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 43860// CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43861// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43862// CHECK7-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43863// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43864// CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3865// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43866// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43867// CHECK7-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]3868// CHECK7-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3869// CHECK7:       cond.true:3870// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43871// CHECK7-NEXT:    br label [[COND_END:%.*]]3872// CHECK7:       cond.false:3873// CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43874// CHECK7-NEXT:    br label [[COND_END]]3875// CHECK7:       cond.end:3876// CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]3877// CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43878// CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43879// CHECK7-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 43880// CHECK7-NEXT:    [[TMP14:%.*]] = load i8, ptr [[TMP1]], align 13881// CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP14]], 03882// CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]3883// CHECK7:       omp_if.then:3884// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3885// CHECK7:       omp.inner.for.cond:3886// CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]3887// CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]3888// CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]3889// CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3890// CHECK7:       omp.inner.for.body:3891// CHECK7-NEXT:    [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP22]]3892// CHECK7-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP17]] to i323893// CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3894// CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 13895// CHECK7-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]3896// CHECK7-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i83897// CHECK7-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META16]], !llvm.access.group [[ACC_GRP22]]3898// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3899// CHECK7:       omp.body.continue:3900// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3901// CHECK7:       omp.inner.for.inc:3902// CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3903// CHECK7-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP19]], 13904// CHECK7-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3905// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]3906// CHECK7:       omp.inner.for.end:3907// CHECK7-NEXT:    br label [[OMP_IF_END:%.*]]3908// CHECK7:       omp_if.else:3909// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]3910// CHECK7:       omp.inner.for.cond13:3911// CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43912// CHECK7-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43913// CHECK7-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]3914// CHECK7-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]3915// CHECK7:       omp.inner.for.body15:3916// CHECK7-NEXT:    [[TMP22:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13917// CHECK7-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP22]] to i323918// CHECK7-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43919// CHECK7-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP23]], 13920// CHECK7-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]3921// CHECK7-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i83922// CHECK7-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 13923// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]3924// CHECK7:       omp.body.continue20:3925// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]3926// CHECK7:       omp.inner.for.inc21:3927// CHECK7-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43928// CHECK7-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP24]], 13929// CHECK7-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 43930// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP25:![0-9]+]]3931// CHECK7:       omp.inner.for.end23:3932// CHECK7-NEXT:    br label [[OMP_IF_END]]3933// CHECK7:       omp_if.end:3934// CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3935// CHECK7:       omp.loop.exit:3936// CHECK7-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43937// CHECK7-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 43938// CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])3939// CHECK7-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43940// CHECK7-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 03941// CHECK7-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3942// CHECK7:       .omp.final.then:3943// CHECK7-NEXT:    [[TMP29:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13944// CHECK7-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP29]] to i323945// CHECK7-NEXT:    [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 13946// CHECK7-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP30]] to i323947// CHECK7-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]3948// CHECK7-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 13949// CHECK7-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 13950// CHECK7-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 13951// CHECK7-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 13952// CHECK7-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]3953// CHECK7-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i83954// CHECK7-NEXT:    store i8 [[CONV32]], ptr [[TMP0]], align 13955// CHECK7-NEXT:    br label [[DOTOMP_FINAL_DONE]]3956// CHECK7:       .omp.final.done:3957// CHECK7-NEXT:    br label [[OMP_PRECOND_END]]3958// CHECK7:       omp.precond.end:3959// CHECK7-NEXT:    ret void3960//3961//3962// CHECK7-LABEL: define {{[^@]+}}@_Z4fintv3963// CHECK7-SAME: () #[[ATTR0]] {3964// CHECK7-NEXT:  entry:3965// CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v()3966// CHECK7-NEXT:    ret i32 [[CALL]]3967//3968//3969// CHECK7-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v3970// CHECK7-SAME: () #[[ATTR0]] comdat {3971// CHECK7-NEXT:  entry:3972// CHECK7-NEXT:    [[AA:%.*]] = alloca i16, align 23973// CHECK7-NEXT:    [[AA_CASTED:%.*]] = alloca i32, align 43974// CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 43975// CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 43976// CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 43977// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 43978// CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83979// CHECK7-NEXT:    store i16 0, ptr [[AA]], align 23980// CHECK7-NEXT:    [[TMP0:%.*]] = load i16, ptr [[AA]], align 23981// CHECK7-NEXT:    store i16 [[TMP0]], ptr [[AA_CASTED]], align 23982// CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[AA_CASTED]], align 43983// CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03984// CHECK7-NEXT:    store i32 [[TMP1]], ptr [[TMP2]], align 43985// CHECK7-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03986// CHECK7-NEXT:    store i32 [[TMP1]], ptr [[TMP3]], align 43987// CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03988// CHECK7-NEXT:    store ptr null, ptr [[TMP4]], align 43989// CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03990// CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03991// CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03992// CHECK7-NEXT:    store i32 3, ptr [[TMP7]], align 43993// CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13994// CHECK7-NEXT:    store i32 1, ptr [[TMP8]], align 43995// CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23996// CHECK7-NEXT:    store ptr [[TMP5]], ptr [[TMP9]], align 43997// CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33998// CHECK7-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 43999// CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44000// CHECK7-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP11]], align 44001// CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54002// CHECK7-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP12]], align 44003// CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64004// CHECK7-NEXT:    store ptr null, ptr [[TMP13]], align 44005// CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74006// CHECK7-NEXT:    store ptr null, ptr [[TMP14]], align 44007// CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84008// CHECK7-NEXT:    store i64 100, ptr [[TMP15]], align 84009// CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94010// CHECK7-NEXT:    store i64 0, ptr [[TMP16]], align 84011// CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104012// CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP17]], align 44013// CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114014// CHECK7-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 44015// CHECK7-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124016// CHECK7-NEXT:    store i32 0, ptr [[TMP19]], align 44017// CHECK7-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.region_id, ptr [[KERNEL_ARGS]])4018// CHECK7-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 04019// CHECK7-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4020// CHECK7:       omp_offload.failed:4021// CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135(i32 [[TMP1]]) #[[ATTR3]]4022// CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]4023// CHECK7:       omp_offload.cont:4024// CHECK7-NEXT:    ret i32 04025//4026//4027// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1354028// CHECK7-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] {4029// CHECK7-NEXT:  entry:4030// CHECK7-NEXT:    [[AA_ADDR:%.*]] = alloca i32, align 44031// CHECK7-NEXT:    store i32 [[AA]], ptr [[AA_ADDR]], align 44032// CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])4033// CHECK7-NEXT:    ret void4034//4035//4036// CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined4037// CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {4038// CHECK7-NEXT:  entry:4039// CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44040// CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44041// CHECK7-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 44042// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44043// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 44044// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44045// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44046// CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44047// CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44048// CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 44049// CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44050// CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44051// CHECK7-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 44052// CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 44053// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44054// CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 44055// CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 44056// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 44057// CHECK7-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 24058// CHECK7-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i324059// CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44060// CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 44061// CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])4062// CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]4063// CHECK7:       omp.dispatch.cond:4064// CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44065// CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 994066// CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4067// CHECK7:       cond.true:4068// CHECK7-NEXT:    br label [[COND_END:%.*]]4069// CHECK7:       cond.false:4070// CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44071// CHECK7-NEXT:    br label [[COND_END]]4072// CHECK7:       cond.end:4073// CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]4074// CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 44075// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44076// CHECK7-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 44077// CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44078// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44079// CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4080// CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]4081// CHECK7:       omp.dispatch.body:4082// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4083// CHECK7:       omp.inner.for.cond:4084// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]4085// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]4086// CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]4087// CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4088// CHECK7:       omp.inner.for.body:4089// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]4090// CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 14091// CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]4092// CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]4093// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4094// CHECK7:       omp.body.continue:4095// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4096// CHECK7:       omp.inner.for.inc:4097// CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]4098// CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 14099// CHECK7-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]4100// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]4101// CHECK7:       omp.inner.for.end:4102// CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]4103// CHECK7:       omp.dispatch.inc:4104// CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44105// CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44106// CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]4107// CHECK7-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 44108// CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44109// CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 44110// CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]4111// CHECK7-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 44112// CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]4113// CHECK7:       omp.dispatch.end:4114// CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])4115// CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 44116// CHECK7-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 04117// CHECK7-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]4118// CHECK7:       .omp.final.then:4119// CHECK7-NEXT:    store i32 100, ptr [[I]], align 44120// CHECK7-NEXT:    br label [[DOTOMP_FINAL_DONE]]4121// CHECK7:       .omp.final.done:4122// CHECK7-NEXT:    ret void4123//4124//4125// CHECK9-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_4126// CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {4127// CHECK9-NEXT:  entry:4128// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84129// CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84130// CHECK9-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84131// CHECK9-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84132// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 44133// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44134// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44135// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44136// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 44137// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84138// CHECK9-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84139// CHECK9-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84140// CHECK9-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84141// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44142// CHECK9-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44143// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44144// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44145// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 84146// CHECK9-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i64 16) ]4147// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4148// CHECK9:       omp.inner.for.cond:4149// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]4150// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]4151// CHECK9-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]4152// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4153// CHECK9:       omp.inner.for.body:4154// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4155// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 74156// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]4157// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4158// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4159// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4160// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i644161// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 [[IDXPROM]]4162// CHECK9-NEXT:    [[TMP7:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]4163// CHECK9-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4164// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4165// CHECK9-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP9]] to i644166// CHECK9-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i64 [[IDXPROM1]]4167// CHECK9-NEXT:    [[TMP10:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP2]]4168// CHECK9-NEXT:    [[MUL3:%.*]] = fmul float [[TMP7]], [[TMP10]]4169// CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4170// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4171// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i644172// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[IDXPROM4]]4173// CHECK9-NEXT:    [[TMP13:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP2]]4174// CHECK9-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP13]]4175// CHECK9-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4176// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4177// CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i644178// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i64 [[IDXPROM7]]4179// CHECK9-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP2]]4180// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4181// CHECK9:       omp.body.continue:4182// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4183// CHECK9:       omp.inner.for.inc:4184// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4185// CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP16]], 14186// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4187// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]4188// CHECK9:       omp.inner.for.end:4189// CHECK9-NEXT:    store i32 32000001, ptr [[I]], align 44190// CHECK9-NEXT:    ret void4191//4192//4193// CHECK9-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_4194// CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4195// CHECK9-NEXT:  entry:4196// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84197// CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84198// CHECK9-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84199// CHECK9-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84200// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 44201// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44202// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44203// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44204// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 44205// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84206// CHECK9-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84207// CHECK9-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84208// CHECK9-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84209// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44210// CHECK9-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44211// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44212// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44213// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4214// CHECK9:       omp.inner.for.cond:4215// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44216// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44217// CHECK9-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4218// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4219// CHECK9:       omp.inner.for.body:4220// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44221// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 74222// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]4223// CHECK9-NEXT:    store i32 [[SUB]], ptr [[I]], align 44224// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 84225// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 44226// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i644227// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i64 [[IDXPROM]]4228// CHECK9-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 44229// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 84230// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 44231// CHECK9-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP8]] to i644232// CHECK9-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP7]], i64 [[IDXPROM1]]4233// CHECK9-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX2]], align 44234// CHECK9-NEXT:    [[MUL3:%.*]] = fmul float [[TMP6]], [[TMP9]]4235// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 84236// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 44237// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i644238// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP10]], i64 [[IDXPROM4]]4239// CHECK9-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX5]], align 44240// CHECK9-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP12]]4241// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 84242// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 44243// CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP14]] to i644244// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM7]]4245// CHECK9-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 44246// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4247// CHECK9:       omp.body.continue:4248// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4249// CHECK9:       omp.inner.for.inc:4250// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44251// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 14252// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44253// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]4254// CHECK9:       omp.inner.for.end:4255// CHECK9-NEXT:    store i32 32, ptr [[I]], align 44256// CHECK9-NEXT:    ret void4257//4258//4259// CHECK9-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_4260// CHECK9-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4261// CHECK9-NEXT:  entry:4262// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84263// CHECK9-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84264// CHECK9-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84265// CHECK9-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84266// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 44267// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44268// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44269// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44270// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 44271// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84272// CHECK9-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84273// CHECK9-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84274// CHECK9-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84275// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44276// CHECK9-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 44277// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44278// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44279// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4280// CHECK9:       omp.inner.for.cond:4281// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]4282// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]4283// CHECK9-NEXT:    [[CMP:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]4284// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4285// CHECK9:       omp.inner.for.body:4286// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]4287// CHECK9-NEXT:    [[MUL:%.*]] = mul i32 [[TMP3]], 1274288// CHECK9-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]4289// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]4290// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP9]]4291// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]4292// CHECK9-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP5]] to i644293// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i64 [[IDXPROM]]4294// CHECK9-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]4295// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP9]]4296// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]4297// CHECK9-NEXT:    [[IDXPROM1:%.*]] = zext i32 [[TMP8]] to i644298// CHECK9-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i64 [[IDXPROM1]]4299// CHECK9-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP9]]4300// CHECK9-NEXT:    [[MUL3:%.*]] = fmul float [[TMP6]], [[TMP9]]4301// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !llvm.access.group [[ACC_GRP9]]4302// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]4303// CHECK9-NEXT:    [[IDXPROM4:%.*]] = zext i32 [[TMP11]] to i644304// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP10]], i64 [[IDXPROM4]]4305// CHECK9-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP9]]4306// CHECK9-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP12]]4307// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP9]]4308// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]4309// CHECK9-NEXT:    [[IDXPROM7:%.*]] = zext i32 [[TMP14]] to i644310// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[IDXPROM7]]4311// CHECK9-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP9]]4312// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4313// CHECK9:       omp.body.continue:4314// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4315// CHECK9:       omp.inner.for.inc:4316// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]4317// CHECK9-NEXT:    [[ADD9:%.*]] = add i32 [[TMP15]], 14318// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]4319// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]4320// CHECK9:       omp.inner.for.end:4321// CHECK9-NEXT:    store i32 -2147483522, ptr [[I]], align 44322// CHECK9-NEXT:    ret void4323//4324//4325// CHECK9-LABEL: define {{[^@]+}}@_Z12test_precondv4326// CHECK9-SAME: () #[[ATTR0]] {4327// CHECK9-NEXT:  entry:4328// CHECK9-NEXT:    [[A:%.*]] = alloca i8, align 14329// CHECK9-NEXT:    [[I:%.*]] = alloca i8, align 14330// CHECK9-NEXT:    [[TMP:%.*]] = alloca i8, align 14331// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 14332// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44333// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44334// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44335// CHECK9-NEXT:    [[I4:%.*]] = alloca i8, align 14336// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44337// CHECK9-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i8, align 14338// CHECK9-NEXT:    [[I6:%.*]] = alloca i8, align 14339// CHECK9-NEXT:    [[I7:%.*]] = alloca i8, align 14340// CHECK9-NEXT:    store i8 0, ptr [[A]], align 14341// CHECK9-NEXT:    [[TMP0:%.*]] = load i8, ptr [[A]], align 14342// CHECK9-NEXT:    store i8 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 14343// CHECK9-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14344// CHECK9-NEXT:    [[CONV:%.*]] = sext i8 [[TMP1]] to i324345// CHECK9-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]4346// CHECK9-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 14347// CHECK9-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 14348// CHECK9-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 14349// CHECK9-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 14350// CHECK9-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 44351// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44352// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44353// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44354// CHECK9-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14355// CHECK9-NEXT:    store i8 [[TMP3]], ptr [[I4]], align 14356// CHECK9-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14357// CHECK9-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP4]] to i324358// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 104359// CHECK9-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]4360// CHECK9:       simd.if.then:4361// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44362// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44363// CHECK9-NEXT:    [[TMP6:%.*]] = load i8, ptr [[I]], align 14364// CHECK9-NEXT:    store i8 [[TMP6]], ptr [[DOTLINEAR_START]], align 14365// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4366// CHECK9:       omp.inner.for.cond:4367// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]4368// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]4369// CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4370// CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4371// CHECK9:       omp.inner.for.body:4372// CHECK9-NEXT:    [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP12]]4373// CHECK9-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP9]] to i324374// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]4375// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 14376// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]4377// CHECK9-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i84378// CHECK9-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP12]]4379// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4380// CHECK9:       omp.body.continue:4381// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4382// CHECK9:       omp.inner.for.inc:4383// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]4384// CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP11]], 14385// CHECK9-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]4386// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]4387// CHECK9:       omp.inner.for.end:4388// CHECK9-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14389// CHECK9-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP12]] to i324390// CHECK9-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14391// CHECK9-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP13]] to i324392// CHECK9-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]4393// CHECK9-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 14394// CHECK9-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 14395// CHECK9-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 14396// CHECK9-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 14397// CHECK9-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]4398// CHECK9-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i84399// CHECK9-NEXT:    store i8 [[CONV21]], ptr [[I]], align 14400// CHECK9-NEXT:    br label [[SIMD_IF_END]]4401// CHECK9:       simd.if.end:4402// CHECK9-NEXT:    ret void4403//4404//4405// CHECK9-LABEL: define {{[^@]+}}@_Z4fintv4406// CHECK9-SAME: () #[[ATTR0]] {4407// CHECK9-NEXT:  entry:4408// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v()4409// CHECK9-NEXT:    ret i32 [[CALL]]4410//4411//4412// CHECK9-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v4413// CHECK9-SAME: () #[[ATTR0]] comdat {4414// CHECK9-NEXT:  entry:4415// CHECK9-NEXT:    [[AA:%.*]] = alloca i16, align 24416// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 44417// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44418// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44419// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44420// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 44421// CHECK9-NEXT:    store i16 0, ptr [[AA]], align 24422// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44423// CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 44424// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44425// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44426// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4427// CHECK9:       omp.inner.for.cond:4428// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]4429// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]4430// CHECK9-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4431// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4432// CHECK9:       omp.inner.for.body:4433// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4434// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 14435// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]4436// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]4437// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4438// CHECK9:       omp.body.continue:4439// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4440// CHECK9:       omp.inner.for.inc:4441// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4442// CHECK9-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 14443// CHECK9-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]4444// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]4445// CHECK9:       omp.inner.for.end:4446// CHECK9-NEXT:    store i32 100, ptr [[I]], align 44447// CHECK9-NEXT:    ret i32 04448//4449//4450// CHECK11-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_4451// CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {4452// CHECK11-NEXT:  entry:4453// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 44454// CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 44455// CHECK11-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 44456// CHECK11-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 44457// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 44458// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44459// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44460// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44461// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 44462// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 44463// CHECK11-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 44464// CHECK11-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 44465// CHECK11-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 44466// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44467// CHECK11-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44468// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44469// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44470// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 44471// CHECK11-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i32 16) ]4472// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4473// CHECK11:       omp.inner.for.cond:4474// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]4475// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]4476// CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]4477// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4478// CHECK11:       omp.inner.for.body:4479// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]4480// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 74481// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]4482// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]4483// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]4484// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]4485// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i32 [[TMP6]]4486// CHECK11-NEXT:    [[TMP7:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]4487// CHECK11-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[C_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]4488// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]4489// CHECK11-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i32 [[TMP9]]4490// CHECK11-NEXT:    [[TMP10:%.*]] = load float, ptr [[ARRAYIDX1]], align 4, !llvm.access.group [[ACC_GRP3]]4491// CHECK11-NEXT:    [[MUL2:%.*]] = fmul float [[TMP7]], [[TMP10]]4492// CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[D_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]4493// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]4494// CHECK11-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i32 [[TMP12]]4495// CHECK11-NEXT:    [[TMP13:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP3]]4496// CHECK11-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP13]]4497// CHECK11-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]4498// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]4499// CHECK11-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i32 [[TMP15]]4500// CHECK11-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP3]]4501// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4502// CHECK11:       omp.body.continue:4503// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4504// CHECK11:       omp.inner.for.inc:4505// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]4506// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 14507// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]4508// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]4509// CHECK11:       omp.inner.for.end:4510// CHECK11-NEXT:    store i32 32000001, ptr [[I]], align 44511// CHECK11-NEXT:    ret void4512//4513//4514// CHECK11-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_4515// CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4516// CHECK11-NEXT:  entry:4517// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 44518// CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 44519// CHECK11-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 44520// CHECK11-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 44521// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 44522// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44523// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44524// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44525// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 44526// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 44527// CHECK11-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 44528// CHECK11-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 44529// CHECK11-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 44530// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44531// CHECK11-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44532// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44533// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44534// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4535// CHECK11:       omp.inner.for.cond:4536// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44537// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44538// CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4539// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4540// CHECK11:       omp.inner.for.body:4541// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44542// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 74543// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]4544// CHECK11-NEXT:    store i32 [[SUB]], ptr [[I]], align 44545// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 44546// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 44547// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i32 [[TMP5]]4548// CHECK11-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 44549// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 44550// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 44551// CHECK11-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP7]], i32 [[TMP8]]4552// CHECK11-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX1]], align 44553// CHECK11-NEXT:    [[MUL2:%.*]] = fmul float [[TMP6]], [[TMP9]]4554// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 44555// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 44556// CHECK11-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP10]], i32 [[TMP11]]4557// CHECK11-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX3]], align 44558// CHECK11-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP12]]4559// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 44560// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 44561// CHECK11-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]4562// CHECK11-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 44563// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4564// CHECK11:       omp.body.continue:4565// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4566// CHECK11:       omp.inner.for.inc:4567// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44568// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 14569// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44570// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]4571// CHECK11:       omp.inner.for.end:4572// CHECK11-NEXT:    store i32 32, ptr [[I]], align 44573// CHECK11-NEXT:    ret void4574//4575//4576// CHECK11-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_4577// CHECK11-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4578// CHECK11-NEXT:  entry:4579// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 44580// CHECK11-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 44581// CHECK11-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 44582// CHECK11-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 44583// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 44584// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44585// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44586// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44587// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 44588// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 44589// CHECK11-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 44590// CHECK11-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 44591// CHECK11-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 44592// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44593// CHECK11-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 44594// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44595// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44596// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4597// CHECK11:       omp.inner.for.cond:4598// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]4599// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]4600// CHECK11-NEXT:    [[CMP:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]4601// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4602// CHECK11:       omp.inner.for.body:4603// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4604// CHECK11-NEXT:    [[MUL:%.*]] = mul i32 [[TMP3]], 1274605// CHECK11-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]4606// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4607// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 4, !llvm.access.group [[ACC_GRP10]]4608// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4609// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i32 [[TMP5]]4610// CHECK11-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]4611// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 4, !llvm.access.group [[ACC_GRP10]]4612// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4613// CHECK11-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i32 [[TMP8]]4614// CHECK11-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX1]], align 4, !llvm.access.group [[ACC_GRP10]]4615// CHECK11-NEXT:    [[MUL2:%.*]] = fmul float [[TMP6]], [[TMP9]]4616// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 4, !llvm.access.group [[ACC_GRP10]]4617// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4618// CHECK11-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP10]], i32 [[TMP11]]4619// CHECK11-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP10]]4620// CHECK11-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP12]]4621// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP10]]4622// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4623// CHECK11-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i32 [[TMP14]]4624// CHECK11-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP10]]4625// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4626// CHECK11:       omp.body.continue:4627// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4628// CHECK11:       omp.inner.for.inc:4629// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4630// CHECK11-NEXT:    [[ADD6:%.*]] = add i32 [[TMP15]], 14631// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4632// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]4633// CHECK11:       omp.inner.for.end:4634// CHECK11-NEXT:    store i32 -2147483522, ptr [[I]], align 44635// CHECK11-NEXT:    ret void4636//4637//4638// CHECK11-LABEL: define {{[^@]+}}@_Z12test_precondv4639// CHECK11-SAME: () #[[ATTR0]] {4640// CHECK11-NEXT:  entry:4641// CHECK11-NEXT:    [[A:%.*]] = alloca i8, align 14642// CHECK11-NEXT:    [[I:%.*]] = alloca i8, align 14643// CHECK11-NEXT:    [[TMP:%.*]] = alloca i8, align 14644// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 14645// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44646// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44647// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44648// CHECK11-NEXT:    [[I4:%.*]] = alloca i8, align 14649// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44650// CHECK11-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i8, align 14651// CHECK11-NEXT:    [[I6:%.*]] = alloca i8, align 14652// CHECK11-NEXT:    [[I7:%.*]] = alloca i8, align 14653// CHECK11-NEXT:    store i8 0, ptr [[A]], align 14654// CHECK11-NEXT:    [[TMP0:%.*]] = load i8, ptr [[A]], align 14655// CHECK11-NEXT:    store i8 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 14656// CHECK11-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14657// CHECK11-NEXT:    [[CONV:%.*]] = sext i8 [[TMP1]] to i324658// CHECK11-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]4659// CHECK11-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 14660// CHECK11-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 14661// CHECK11-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 14662// CHECK11-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 14663// CHECK11-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 44664// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44665// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44666// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44667// CHECK11-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14668// CHECK11-NEXT:    store i8 [[TMP3]], ptr [[I4]], align 14669// CHECK11-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14670// CHECK11-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP4]] to i324671// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 104672// CHECK11-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]4673// CHECK11:       simd.if.then:4674// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44675// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44676// CHECK11-NEXT:    [[TMP6:%.*]] = load i8, ptr [[I]], align 14677// CHECK11-NEXT:    store i8 [[TMP6]], ptr [[DOTLINEAR_START]], align 14678// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4679// CHECK11:       omp.inner.for.cond:4680// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]4681// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]4682// CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4683// CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4684// CHECK11:       omp.inner.for.body:4685// CHECK11-NEXT:    [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP13]]4686// CHECK11-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP9]] to i324687// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]4688// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 14689// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]4690// CHECK11-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i84691// CHECK11-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP13]]4692// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4693// CHECK11:       omp.body.continue:4694// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4695// CHECK11:       omp.inner.for.inc:4696// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]4697// CHECK11-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP11]], 14698// CHECK11-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]4699// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]4700// CHECK11:       omp.inner.for.end:4701// CHECK11-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14702// CHECK11-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP12]] to i324703// CHECK11-NEXT:    [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14704// CHECK11-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP13]] to i324705// CHECK11-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]4706// CHECK11-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 14707// CHECK11-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 14708// CHECK11-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 14709// CHECK11-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 14710// CHECK11-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]4711// CHECK11-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i84712// CHECK11-NEXT:    store i8 [[CONV21]], ptr [[I]], align 14713// CHECK11-NEXT:    br label [[SIMD_IF_END]]4714// CHECK11:       simd.if.end:4715// CHECK11-NEXT:    ret void4716//4717//4718// CHECK11-LABEL: define {{[^@]+}}@_Z4fintv4719// CHECK11-SAME: () #[[ATTR0]] {4720// CHECK11-NEXT:  entry:4721// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v()4722// CHECK11-NEXT:    ret i32 [[CALL]]4723//4724//4725// CHECK11-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v4726// CHECK11-SAME: () #[[ATTR0]] comdat {4727// CHECK11-NEXT:  entry:4728// CHECK11-NEXT:    [[AA:%.*]] = alloca i16, align 24729// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 44730// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44731// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44732// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44733// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 44734// CHECK11-NEXT:    store i16 0, ptr [[AA]], align 24735// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44736// CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 44737// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44738// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44739// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4740// CHECK11:       omp.inner.for.cond:4741// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]4742// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]4743// CHECK11-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4744// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4745// CHECK11:       omp.inner.for.body:4746// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4747// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 14748// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]4749// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]4750// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4751// CHECK11:       omp.body.continue:4752// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4753// CHECK11:       omp.inner.for.inc:4754// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4755// CHECK11-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 14756// CHECK11-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]4757// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]4758// CHECK11:       omp.inner.for.end:4759// CHECK11-NEXT:    store i32 100, ptr [[I]], align 44760// CHECK11-NEXT:    ret i32 04761//4762//4763// CHECK13-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_4764// CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {4765// CHECK13-NEXT:  entry:4766// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84767// CHECK13-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84768// CHECK13-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84769// CHECK13-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84770// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 44771// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44772// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44773// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44774// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 44775// CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84776// CHECK13-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84777// CHECK13-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84778// CHECK13-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84779// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44780// CHECK13-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44781// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44782// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44783// CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 84784// CHECK13-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i64 16) ]4785// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4786// CHECK13:       omp.inner.for.cond:4787// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]4788// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]4789// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]4790// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4791// CHECK13:       omp.inner.for.body:4792// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4793// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 74794// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]4795// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4796// CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4797// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4798// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i644799// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 [[IDXPROM]]4800// CHECK13-NEXT:    [[TMP7:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]4801// CHECK13-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4802// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4803// CHECK13-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP9]] to i644804// CHECK13-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i64 [[IDXPROM1]]4805// CHECK13-NEXT:    [[TMP10:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP2]]4806// CHECK13-NEXT:    [[MUL3:%.*]] = fmul float [[TMP7]], [[TMP10]]4807// CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4808// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4809// CHECK13-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP12]] to i644810// CHECK13-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[IDXPROM4]]4811// CHECK13-NEXT:    [[TMP13:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP2]]4812// CHECK13-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP13]]4813// CHECK13-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP2]]4814// CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]4815// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i644816// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i64 [[IDXPROM7]]4817// CHECK13-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP2]]4818// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4819// CHECK13:       omp.body.continue:4820// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4821// CHECK13:       omp.inner.for.inc:4822// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4823// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP16]], 14824// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]4825// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]4826// CHECK13:       omp.inner.for.end:4827// CHECK13-NEXT:    store i32 32000001, ptr [[I]], align 44828// CHECK13-NEXT:    ret void4829//4830//4831// CHECK13-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_4832// CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4833// CHECK13-NEXT:  entry:4834// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84835// CHECK13-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84836// CHECK13-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84837// CHECK13-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84838// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 44839// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44840// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44841// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44842// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 44843// CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84844// CHECK13-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84845// CHECK13-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84846// CHECK13-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84847// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44848// CHECK13-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 44849// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44850// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44851// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4852// CHECK13:       omp.inner.for.cond:4853// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44854// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44855// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]4856// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4857// CHECK13:       omp.inner.for.body:4858// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44859// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 74860// CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]4861// CHECK13-NEXT:    store i32 [[SUB]], ptr [[I]], align 44862// CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !nontemporal [[META7:![0-9]+]]4863// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 44864// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i644865// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i64 [[IDXPROM]]4866// CHECK13-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 44867// CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 84868// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 44869// CHECK13-NEXT:    [[IDXPROM1:%.*]] = sext i32 [[TMP8]] to i644870// CHECK13-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP7]], i64 [[IDXPROM1]]4871// CHECK13-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX2]], align 44872// CHECK13-NEXT:    [[MUL3:%.*]] = fmul float [[TMP6]], [[TMP9]]4873// CHECK13-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 84874// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 44875// CHECK13-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i644876// CHECK13-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP10]], i64 [[IDXPROM4]]4877// CHECK13-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX5]], align 44878// CHECK13-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP12]]4879// CHECK13-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !nontemporal [[META7]]4880// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 44881// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP14]] to i644882// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM7]]4883// CHECK13-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 44884// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4885// CHECK13:       omp.body.continue:4886// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4887// CHECK13:       omp.inner.for.inc:4888// CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44889// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 14890// CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 44891// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]4892// CHECK13:       omp.inner.for.end:4893// CHECK13-NEXT:    store i32 32, ptr [[I]], align 44894// CHECK13-NEXT:    ret void4895//4896//4897// CHECK13-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_4898// CHECK13-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {4899// CHECK13-NEXT:  entry:4900// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 84901// CHECK13-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 84902// CHECK13-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 84903// CHECK13-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 84904// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 44905// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44906// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44907// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44908// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 44909// CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 84910// CHECK13-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 84911// CHECK13-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 84912// CHECK13-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 84913// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44914// CHECK13-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 44915// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44916// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 44917// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]4918// CHECK13:       omp.inner.for.cond:4919// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]4920// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]4921// CHECK13-NEXT:    [[CMP:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]4922// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4923// CHECK13:       omp.inner.for.body:4924// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4925// CHECK13-NEXT:    [[MUL:%.*]] = mul i32 [[TMP3]], 1274926// CHECK13-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]4927// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4928// CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 8, !llvm.access.group [[ACC_GRP10]]4929// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4930// CHECK13-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP5]] to i644931// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i64 [[IDXPROM]]4932// CHECK13-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]4933// CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP10]]4934// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4935// CHECK13-NEXT:    [[IDXPROM1:%.*]] = zext i32 [[TMP8]] to i644936// CHECK13-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i64 [[IDXPROM1]]4937// CHECK13-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP10]]4938// CHECK13-NEXT:    [[MUL3:%.*]] = fmul float [[TMP6]], [[TMP9]]4939// CHECK13-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 8, !llvm.access.group [[ACC_GRP10]]4940// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4941// CHECK13-NEXT:    [[IDXPROM4:%.*]] = zext i32 [[TMP11]] to i644942// CHECK13-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP10]], i64 [[IDXPROM4]]4943// CHECK13-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP10]]4944// CHECK13-NEXT:    [[MUL6:%.*]] = fmul float [[MUL3]], [[TMP12]]4945// CHECK13-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 8, !llvm.access.group [[ACC_GRP10]]4946// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]4947// CHECK13-NEXT:    [[IDXPROM7:%.*]] = zext i32 [[TMP14]] to i644948// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i64 [[IDXPROM7]]4949// CHECK13-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX8]], align 4, !llvm.access.group [[ACC_GRP10]]4950// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]4951// CHECK13:       omp.body.continue:4952// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]4953// CHECK13:       omp.inner.for.inc:4954// CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4955// CHECK13-NEXT:    [[ADD9:%.*]] = add i32 [[TMP15]], 14956// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]4957// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]4958// CHECK13:       omp.inner.for.end:4959// CHECK13-NEXT:    store i32 -2147483522, ptr [[I]], align 44960// CHECK13-NEXT:    ret void4961//4962//4963// CHECK13-LABEL: define {{[^@]+}}@_Z12test_precondv4964// CHECK13-SAME: () #[[ATTR0]] {4965// CHECK13-NEXT:  entry:4966// CHECK13-NEXT:    [[A:%.*]] = alloca i8, align 14967// CHECK13-NEXT:    [[I:%.*]] = alloca i8, align 14968// CHECK13-NEXT:    [[TMP:%.*]] = alloca i8, align 14969// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 14970// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 44971// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 44972// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 44973// CHECK13-NEXT:    [[I4:%.*]] = alloca i8, align 14974// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 44975// CHECK13-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i8, align 14976// CHECK13-NEXT:    [[I6:%.*]] = alloca i8, align 14977// CHECK13-NEXT:    [[I7:%.*]] = alloca i8, align 14978// CHECK13-NEXT:    store i8 0, ptr [[A]], align 14979// CHECK13-NEXT:    [[TMP0:%.*]] = load i8, ptr [[A]], align 14980// CHECK13-NEXT:    store i8 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 14981// CHECK13-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14982// CHECK13-NEXT:    [[CONV:%.*]] = sext i8 [[TMP1]] to i324983// CHECK13-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]4984// CHECK13-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 14985// CHECK13-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 14986// CHECK13-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 14987// CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 14988// CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 44989// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 44990// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 44991// CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 44992// CHECK13-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14993// CHECK13-NEXT:    store i8 [[TMP3]], ptr [[I4]], align 14994// CHECK13-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 14995// CHECK13-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP4]] to i324996// CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 104997// CHECK13-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]4998// CHECK13:       simd.if.then:4999// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45000// CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45001// CHECK13-NEXT:    [[TMP6:%.*]] = load i8, ptr [[I]], align 15002// CHECK13-NEXT:    store i8 [[TMP6]], ptr [[DOTLINEAR_START]], align 15003// CHECK13-NEXT:    [[TMP7:%.*]] = load i8, ptr [[A]], align 15004// CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP7]], 05005// CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]5006// CHECK13:       omp_if.then:5007// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5008// CHECK13:       omp.inner.for.cond:5009// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]5010// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]5011// CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]5012// CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5013// CHECK13:       omp.inner.for.body:5014// CHECK13-NEXT:    [[TMP10:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP13]]5015// CHECK13-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP10]] to i325016// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]5017// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 15018// CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]5019// CHECK13-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i85020// CHECK13-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META7]], !llvm.access.group [[ACC_GRP13]]5021// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5022// CHECK13:       omp.body.continue:5023// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5024// CHECK13:       omp.inner.for.inc:5025// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]5026// CHECK13-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP12]], 15027// CHECK13-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]5028// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]5029// CHECK13:       omp.inner.for.end:5030// CHECK13-NEXT:    br label [[OMP_IF_END:%.*]]5031// CHECK13:       omp_if.else:5032// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]5033// CHECK13:       omp.inner.for.cond13:5034// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45035// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45036// CHECK13-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]5037// CHECK13-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]5038// CHECK13:       omp.inner.for.body15:5039// CHECK13-NEXT:    [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15040// CHECK13-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP15]] to i325041// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45042// CHECK13-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP16]], 15043// CHECK13-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]5044// CHECK13-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i85045// CHECK13-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 15046// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]5047// CHECK13:       omp.body.continue20:5048// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]5049// CHECK13:       omp.inner.for.inc21:5050// CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45051// CHECK13-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP17]], 15052// CHECK13-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 45053// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP16:![0-9]+]]5054// CHECK13:       omp.inner.for.end23:5055// CHECK13-NEXT:    br label [[OMP_IF_END]]5056// CHECK13:       omp_if.end:5057// CHECK13-NEXT:    [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15058// CHECK13-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP18]] to i325059// CHECK13-NEXT:    [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15060// CHECK13-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP19]] to i325061// CHECK13-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]5062// CHECK13-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 15063// CHECK13-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 15064// CHECK13-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 15065// CHECK13-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 15066// CHECK13-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]5067// CHECK13-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i85068// CHECK13-NEXT:    store i8 [[CONV32]], ptr [[I]], align 15069// CHECK13-NEXT:    br label [[SIMD_IF_END]]5070// CHECK13:       simd.if.end:5071// CHECK13-NEXT:    ret void5072//5073//5074// CHECK13-LABEL: define {{[^@]+}}@_Z4fintv5075// CHECK13-SAME: () #[[ATTR0]] {5076// CHECK13-NEXT:  entry:5077// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v()5078// CHECK13-NEXT:    ret i32 [[CALL]]5079//5080//5081// CHECK13-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v5082// CHECK13-SAME: () #[[ATTR0]] comdat {5083// CHECK13-NEXT:  entry:5084// CHECK13-NEXT:    [[AA:%.*]] = alloca i16, align 25085// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 45086// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45087// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45088// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45089// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 45090// CHECK13-NEXT:    store i16 0, ptr [[AA]], align 25091// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45092// CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 45093// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45094// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 45095// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5096// CHECK13:       omp.inner.for.cond:5097// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]5098// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]5099// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]5100// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5101// CHECK13:       omp.inner.for.body:5102// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5103// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 15104// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]5105// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5106// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5107// CHECK13:       omp.body.continue:5108// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5109// CHECK13:       omp.inner.for.inc:5110// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5111// CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 15112// CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5113// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]5114// CHECK13:       omp.inner.for.end:5115// CHECK13-NEXT:    store i32 100, ptr [[I]], align 45116// CHECK13-NEXT:    ret i32 05117//5118//5119// CHECK15-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_5120// CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {5121// CHECK15-NEXT:  entry:5122// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 45123// CHECK15-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 45124// CHECK15-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 45125// CHECK15-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 45126// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 45127// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45128// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45129// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45130// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 45131// CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 45132// CHECK15-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 45133// CHECK15-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 45134// CHECK15-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 45135// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45136// CHECK15-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 45137// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45138// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 45139// CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 45140// CHECK15-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i32 16) ]5141// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5142// CHECK15:       omp.inner.for.cond:5143// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]5144// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]5145// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]5146// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5147// CHECK15:       omp.inner.for.body:5148// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]5149// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP4]], 75150// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]5151// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]5152// CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[B_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]5153// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]5154// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i32 [[TMP6]]5155// CHECK15-NEXT:    [[TMP7:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]5156// CHECK15-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[C_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]5157// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]5158// CHECK15-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i32 [[TMP9]]5159// CHECK15-NEXT:    [[TMP10:%.*]] = load float, ptr [[ARRAYIDX1]], align 4, !llvm.access.group [[ACC_GRP3]]5160// CHECK15-NEXT:    [[MUL2:%.*]] = fmul float [[TMP7]], [[TMP10]]5161// CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[D_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]5162// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]5163// CHECK15-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i32 [[TMP12]]5164// CHECK15-NEXT:    [[TMP13:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP3]]5165// CHECK15-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP13]]5166// CHECK15-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP3]]5167// CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]5168// CHECK15-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i32 [[TMP15]]5169// CHECK15-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP3]]5170// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5171// CHECK15:       omp.body.continue:5172// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5173// CHECK15:       omp.inner.for.inc:5174// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]5175// CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 15176// CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]5177// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]5178// CHECK15:       omp.inner.for.end:5179// CHECK15-NEXT:    store i32 32000001, ptr [[I]], align 45180// CHECK15-NEXT:    ret void5181//5182//5183// CHECK15-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_5184// CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {5185// CHECK15-NEXT:  entry:5186// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 45187// CHECK15-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 45188// CHECK15-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 45189// CHECK15-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 45190// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 45191// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45192// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45193// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45194// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 45195// CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 45196// CHECK15-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 45197// CHECK15-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 45198// CHECK15-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 45199// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45200// CHECK15-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 45201// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45202// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 45203// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5204// CHECK15:       omp.inner.for.cond:5205// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45206// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45207// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]5208// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5209// CHECK15:       omp.inner.for.body:5210// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45211// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 75212// CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]5213// CHECK15-NEXT:    store i32 [[SUB]], ptr [[I]], align 45214// CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 4, !nontemporal [[META8:![0-9]+]]5215// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 45216// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i32 [[TMP5]]5217// CHECK15-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 45218// CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 45219// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 45220// CHECK15-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[TMP7]], i32 [[TMP8]]5221// CHECK15-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX1]], align 45222// CHECK15-NEXT:    [[MUL2:%.*]] = fmul float [[TMP6]], [[TMP9]]5223// CHECK15-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 45224// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 45225// CHECK15-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP10]], i32 [[TMP11]]5226// CHECK15-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX3]], align 45227// CHECK15-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP12]]5228// CHECK15-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nontemporal [[META8]]5229// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 45230// CHECK15-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]5231// CHECK15-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 45232// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5233// CHECK15:       omp.body.continue:5234// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5235// CHECK15:       omp.inner.for.inc:5236// CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45237// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 15238// CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 45239// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]5240// CHECK15:       omp.inner.for.end:5241// CHECK15-NEXT:    store i32 32, ptr [[I]], align 45242// CHECK15-NEXT:    ret void5243//5244//5245// CHECK15-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_5246// CHECK15-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {5247// CHECK15-NEXT:  entry:5248// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 45249// CHECK15-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 45250// CHECK15-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 45251// CHECK15-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 45252// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 45253// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45254// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45255// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45256// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 45257// CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 45258// CHECK15-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 45259// CHECK15-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 45260// CHECK15-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 45261// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45262// CHECK15-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 45263// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45264// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 45265// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5266// CHECK15:       omp.inner.for.cond:5267// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]5268// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]5269// CHECK15-NEXT:    [[CMP:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]5270// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5271// CHECK15:       omp.inner.for.body:5272// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]5273// CHECK15-NEXT:    [[MUL:%.*]] = mul i32 [[TMP3]], 1275274// CHECK15-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]5275// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]5276// CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[B_ADDR]], align 4, !llvm.access.group [[ACC_GRP11]]5277// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]5278// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP4]], i32 [[TMP5]]5279// CHECK15-NEXT:    [[TMP6:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]5280// CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[C_ADDR]], align 4, !llvm.access.group [[ACC_GRP11]]5281// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]5282// CHECK15-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw float, ptr [[TMP7]], i32 [[TMP8]]5283// CHECK15-NEXT:    [[TMP9:%.*]] = load float, ptr [[ARRAYIDX1]], align 4, !llvm.access.group [[ACC_GRP11]]5284// CHECK15-NEXT:    [[MUL2:%.*]] = fmul float [[TMP6]], [[TMP9]]5285// CHECK15-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[D_ADDR]], align 4, !llvm.access.group [[ACC_GRP11]]5286// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]5287// CHECK15-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP10]], i32 [[TMP11]]5288// CHECK15-NEXT:    [[TMP12:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP11]]5289// CHECK15-NEXT:    [[MUL4:%.*]] = fmul float [[MUL2]], [[TMP12]]5290// CHECK15-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !llvm.access.group [[ACC_GRP11]]5291// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]5292// CHECK15-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP13]], i32 [[TMP14]]5293// CHECK15-NEXT:    store float [[MUL4]], ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP11]]5294// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5295// CHECK15:       omp.body.continue:5296// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5297// CHECK15:       omp.inner.for.inc:5298// CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]5299// CHECK15-NEXT:    [[ADD6:%.*]] = add i32 [[TMP15]], 15300// CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]5301// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]5302// CHECK15:       omp.inner.for.end:5303// CHECK15-NEXT:    store i32 -2147483522, ptr [[I]], align 45304// CHECK15-NEXT:    ret void5305//5306//5307// CHECK15-LABEL: define {{[^@]+}}@_Z12test_precondv5308// CHECK15-SAME: () #[[ATTR0]] {5309// CHECK15-NEXT:  entry:5310// CHECK15-NEXT:    [[A:%.*]] = alloca i8, align 15311// CHECK15-NEXT:    [[I:%.*]] = alloca i8, align 15312// CHECK15-NEXT:    [[TMP:%.*]] = alloca i8, align 15313// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 15314// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45315// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45316// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45317// CHECK15-NEXT:    [[I4:%.*]] = alloca i8, align 15318// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45319// CHECK15-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i8, align 15320// CHECK15-NEXT:    [[I6:%.*]] = alloca i8, align 15321// CHECK15-NEXT:    [[I7:%.*]] = alloca i8, align 15322// CHECK15-NEXT:    store i8 0, ptr [[A]], align 15323// CHECK15-NEXT:    [[TMP0:%.*]] = load i8, ptr [[A]], align 15324// CHECK15-NEXT:    store i8 [[TMP0]], ptr [[DOTCAPTURE_EXPR_]], align 15325// CHECK15-NEXT:    [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15326// CHECK15-NEXT:    [[CONV:%.*]] = sext i8 [[TMP1]] to i325327// CHECK15-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]5328// CHECK15-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 15329// CHECK15-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 15330// CHECK15-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 15331// CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15332// CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 45333// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45334// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45335// CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 45336// CHECK15-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15337// CHECK15-NEXT:    store i8 [[TMP3]], ptr [[I4]], align 15338// CHECK15-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15339// CHECK15-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP4]] to i325340// CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 105341// CHECK15-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]5342// CHECK15:       simd.if.then:5343// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45344// CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45345// CHECK15-NEXT:    [[TMP6:%.*]] = load i8, ptr [[I]], align 15346// CHECK15-NEXT:    store i8 [[TMP6]], ptr [[DOTLINEAR_START]], align 15347// CHECK15-NEXT:    [[TMP7:%.*]] = load i8, ptr [[A]], align 15348// CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP7]], 05349// CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]5350// CHECK15:       omp_if.then:5351// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5352// CHECK15:       omp.inner.for.cond:5353// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]5354// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]5355// CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]5356// CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5357// CHECK15:       omp.inner.for.body:5358// CHECK15-NEXT:    [[TMP10:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP14]]5359// CHECK15-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP10]] to i325360// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]5361// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 15362// CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]5363// CHECK15-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i85364// CHECK15-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META8]], !llvm.access.group [[ACC_GRP14]]5365// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5366// CHECK15:       omp.body.continue:5367// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5368// CHECK15:       omp.inner.for.inc:5369// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]5370// CHECK15-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP12]], 15371// CHECK15-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]5372// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]5373// CHECK15:       omp.inner.for.end:5374// CHECK15-NEXT:    br label [[OMP_IF_END:%.*]]5375// CHECK15:       omp_if.else:5376// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]5377// CHECK15:       omp.inner.for.cond13:5378// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45379// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45380// CHECK15-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]5381// CHECK15-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]5382// CHECK15:       omp.inner.for.body15:5383// CHECK15-NEXT:    [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15384// CHECK15-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP15]] to i325385// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45386// CHECK15-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP16]], 15387// CHECK15-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]5388// CHECK15-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i85389// CHECK15-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 15390// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]5391// CHECK15:       omp.body.continue20:5392// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]5393// CHECK15:       omp.inner.for.inc21:5394// CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45395// CHECK15-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP17]], 15396// CHECK15-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 45397// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP17:![0-9]+]]5398// CHECK15:       omp.inner.for.end23:5399// CHECK15-NEXT:    br label [[OMP_IF_END]]5400// CHECK15:       omp_if.end:5401// CHECK15-NEXT:    [[TMP18:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15402// CHECK15-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP18]] to i325403// CHECK15-NEXT:    [[TMP19:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15404// CHECK15-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP19]] to i325405// CHECK15-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]5406// CHECK15-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 15407// CHECK15-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 15408// CHECK15-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 15409// CHECK15-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 15410// CHECK15-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]5411// CHECK15-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i85412// CHECK15-NEXT:    store i8 [[CONV32]], ptr [[I]], align 15413// CHECK15-NEXT:    br label [[SIMD_IF_END]]5414// CHECK15:       simd.if.end:5415// CHECK15-NEXT:    ret void5416//5417//5418// CHECK15-LABEL: define {{[^@]+}}@_Z4fintv5419// CHECK15-SAME: () #[[ATTR0]] {5420// CHECK15-NEXT:  entry:5421// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v()5422// CHECK15-NEXT:    ret i32 [[CALL]]5423//5424//5425// CHECK15-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v5426// CHECK15-SAME: () #[[ATTR0]] comdat {5427// CHECK15-NEXT:  entry:5428// CHECK15-NEXT:    [[AA:%.*]] = alloca i16, align 25429// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 45430// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45431// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45432// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45433// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 45434// CHECK15-NEXT:    store i16 0, ptr [[AA]], align 25435// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45436// CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 45437// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45438// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 45439// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5440// CHECK15:       omp.inner.for.cond:5441// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]5442// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]5443// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]5444// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5445// CHECK15:       omp.inner.for.body:5446// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]5447// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 15448// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]5449// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]5450// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5451// CHECK15:       omp.body.continue:5452// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5453// CHECK15:       omp.inner.for.inc:5454// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]5455// CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 15456// CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]5457// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]5458// CHECK15:       omp.inner.for.end:5459// CHECK15-NEXT:    store i32 100, ptr [[I]], align 45460// CHECK15-NEXT:    ret i32 05461//5462//5463// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l705464// CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {5465// CHECK17-NEXT:  entry:5466// CHECK17-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 85467// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85468// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85469// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85470// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85471// CHECK17-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 85472// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85473// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85474// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85475// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85476// CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])5477// CHECK17-NEXT:    ret void5478//5479//5480// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined5481// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {5482// CHECK17-NEXT:  entry:5483// CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85484// CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85485// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85486// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85487// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85488// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85489// CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45490// CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 45491// CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45492// CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45493// CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45494// CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45495// CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 45496// CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85497// CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85498// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85499// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85500// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85501// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85502// CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 85503// CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 85504// CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 85505// CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 85506// CHECK17-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 85507// CHECK17-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i64 16) ]5508// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45509// CHECK17-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 45510// CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 45511// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 45512// CHECK17-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85513// CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 45514// CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5515// CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45516// CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714235517// CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5518// CHECK17:       cond.true:5519// CHECK17-NEXT:    br label [[COND_END:%.*]]5520// CHECK17:       cond.false:5521// CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45522// CHECK17-NEXT:    br label [[COND_END]]5523// CHECK17:       cond.end:5524// CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]5525// CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 45526// CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45527// CHECK17-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 45528// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5529// CHECK17:       omp.inner.for.cond:5530// CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]5531// CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]5532// CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]5533// CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5534// CHECK17:       omp.inner.for.body:5535// CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]5536// CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 75537// CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]5538// CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]5539// CHECK17-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP9]]5540// CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]5541// CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i645542// CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM]]5543// CHECK17-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]5544// CHECK17-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP9]]5545// CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]5546// CHECK17-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP17]] to i645547// CHECK17-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[IDXPROM2]]5548// CHECK17-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP9]]5549// CHECK17-NEXT:    [[MUL4:%.*]] = fmul float [[TMP15]], [[TMP18]]5550// CHECK17-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP9]]5551// CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]5552// CHECK17-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP20]] to i645553// CHECK17-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i64 [[IDXPROM5]]5554// CHECK17-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP9]]5555// CHECK17-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP21]]5556// CHECK17-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP9]]5557// CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]5558// CHECK17-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP23]] to i645559// CHECK17-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i64 [[IDXPROM8]]5560// CHECK17-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 4, !llvm.access.group [[ACC_GRP9]]5561// CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5562// CHECK17:       omp.body.continue:5563// CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5564// CHECK17:       omp.inner.for.inc:5565// CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]5566// CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], 15567// CHECK17-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]5568// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]5569// CHECK17:       omp.inner.for.end:5570// CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]5571// CHECK17:       omp.loop.exit:5572// CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])5573// CHECK17-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45574// CHECK17-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 05575// CHECK17-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5576// CHECK17:       .omp.final.then:5577// CHECK17-NEXT:    store i32 32000001, ptr [[I]], align 45578// CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]5579// CHECK17:       .omp.final.done:5580// CHECK17-NEXT:    ret void5581//5582//5583// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l865584// CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {5585// CHECK17-NEXT:  entry:5586// CHECK17-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 85587// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85588// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85589// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85590// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85591// CHECK17-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 85592// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85593// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85594// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85595// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85596// CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])5597// CHECK17-NEXT:    ret void5598//5599//5600// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined5601// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {5602// CHECK17-NEXT:  entry:5603// CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85604// CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85605// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85606// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85607// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85608// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85609// CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45610// CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 45611// CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45612// CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45613// CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45614// CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45615// CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 45616// CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85617// CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85618// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85619// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85620// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85621// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85622// CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 85623// CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 85624// CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 85625// CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 85626// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45627// CHECK17-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 45628// CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 45629// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 45630// CHECK17-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85631// CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 45632// CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5633// CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45634// CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714235635// CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5636// CHECK17:       cond.true:5637// CHECK17-NEXT:    br label [[COND_END:%.*]]5638// CHECK17:       cond.false:5639// CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45640// CHECK17-NEXT:    br label [[COND_END]]5641// CHECK17:       cond.end:5642// CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]5643// CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 45644// CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45645// CHECK17-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 45646// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5647// CHECK17:       omp.inner.for.cond:5648// CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45649// CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45650// CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]5651// CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5652// CHECK17:       omp.inner.for.body:5653// CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45654// CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 75655// CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]5656// CHECK17-NEXT:    store i32 [[SUB]], ptr [[I]], align 45657// CHECK17-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 85658// CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 45659// CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i645660// CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]5661// CHECK17-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 45662// CHECK17-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 85663// CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 45664// CHECK17-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i645665// CHECK17-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]5666// CHECK17-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 45667// CHECK17-NEXT:    [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]5668// CHECK17-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 85669// CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 45670// CHECK17-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i645671// CHECK17-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]5672// CHECK17-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 45673// CHECK17-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]5674// CHECK17-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 85675// CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 45676// CHECK17-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i645677// CHECK17-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]5678// CHECK17-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 45679// CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5680// CHECK17:       omp.body.continue:5681// CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5682// CHECK17:       omp.inner.for.inc:5683// CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45684// CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 15685// CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 45686// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]5687// CHECK17:       omp.inner.for.end:5688// CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]5689// CHECK17:       omp.loop.exit:5690// CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])5691// CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45692// CHECK17-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 05693// CHECK17-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5694// CHECK17:       .omp.final.then:5695// CHECK17-NEXT:    store i32 32, ptr [[I]], align 45696// CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]5697// CHECK17:       .omp.final.done:5698// CHECK17-NEXT:    ret void5699//5700//5701// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1035702// CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {5703// CHECK17-NEXT:  entry:5704// CHECK17-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 85705// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85706// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85707// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85708// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85709// CHECK17-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 85710// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85711// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85712// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85713// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85714// CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])5715// CHECK17-NEXT:    ret void5716//5717//5718// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined5719// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {5720// CHECK17-NEXT:  entry:5721// CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85722// CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85723// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85724// CHECK17-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 85725// CHECK17-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 85726// CHECK17-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 85727// CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45728// CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 45729// CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45730// CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45731// CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45732// CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45733// CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 45734// CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85735// CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85736// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85737// CHECK17-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 85738// CHECK17-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 85739// CHECK17-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 85740// CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 85741// CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 85742// CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 85743// CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 85744// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45745// CHECK17-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 45746// CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 45747// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 45748// CHECK17-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85749// CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 45750// CHECK17-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)5751// CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]5752// CHECK17:       omp.dispatch.cond:5753// CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45754// CHECK17-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082885755// CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5756// CHECK17:       cond.true:5757// CHECK17-NEXT:    br label [[COND_END:%.*]]5758// CHECK17:       cond.false:5759// CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45760// CHECK17-NEXT:    br label [[COND_END]]5761// CHECK17:       cond.end:5762// CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]5763// CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 45764// CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45765// CHECK17-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 45766// CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45767// CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45768// CHECK17-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]5769// CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]5770// CHECK17:       omp.dispatch.body:5771// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5772// CHECK17:       omp.inner.for.cond:5773// CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]5774// CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]5775// CHECK17-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]5776// CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5777// CHECK17:       omp.inner.for.body:5778// CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5779// CHECK17-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1275780// CHECK17-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]5781// CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5782// CHECK17-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP18]]5783// CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5784// CHECK17-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i645785// CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i64 [[IDXPROM]]5786// CHECK17-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]5787// CHECK17-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP18]]5788// CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5789// CHECK17-NEXT:    [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i645790// CHECK17-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i64 [[IDXPROM3]]5791// CHECK17-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP18]]5792// CHECK17-NEXT:    [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]5793// CHECK17-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP18]]5794// CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5795// CHECK17-NEXT:    [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i645796// CHECK17-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i64 [[IDXPROM6]]5797// CHECK17-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP18]]5798// CHECK17-NEXT:    [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]5799// CHECK17-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP18]]5800// CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]5801// CHECK17-NEXT:    [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i645802// CHECK17-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i64 [[IDXPROM9]]5803// CHECK17-NEXT:    store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP18]]5804// CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5805// CHECK17:       omp.body.continue:5806// CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5807// CHECK17:       omp.inner.for.inc:5808// CHECK17-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5809// CHECK17-NEXT:    [[ADD11:%.*]] = add i32 [[TMP25]], 15810// CHECK17-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]5811// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]5812// CHECK17:       omp.inner.for.end:5813// CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]5814// CHECK17:       omp.dispatch.inc:5815// CHECK17-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45816// CHECK17-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45817// CHECK17-NEXT:    [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]5818// CHECK17-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 45819// CHECK17-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45820// CHECK17-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 45821// CHECK17-NEXT:    [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]5822// CHECK17-NEXT:    store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 45823// CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]5824// CHECK17:       omp.dispatch.end:5825// CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])5826// CHECK17-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45827// CHECK17-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 05828// CHECK17-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5829// CHECK17:       .omp.final.then:5830// CHECK17-NEXT:    store i32 -2147483522, ptr [[I]], align 45831// CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]5832// CHECK17:       .omp.final.done:5833// CHECK17-NEXT:    ret void5834//5835//5836// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1155837// CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {5838// CHECK17-NEXT:  entry:5839// CHECK17-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 85840// CHECK17-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 85841// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 85842// CHECK17-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 85843// CHECK17-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 85844// CHECK17-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 85845// CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])5846// CHECK17-NEXT:    ret void5847//5848//5849// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined5850// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {5851// CHECK17-NEXT:  entry:5852// CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85853// CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85854// CHECK17-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 85855// CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 85856// CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45857// CHECK17-NEXT:    [[TMP:%.*]] = alloca i8, align 15858// CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 15859// CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 45860// CHECK17-NEXT:    [[I4:%.*]] = alloca i8, align 15861// CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45862// CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45863// CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45864// CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45865// CHECK17-NEXT:    [[I6:%.*]] = alloca i8, align 15866// CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85867// CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85868// CHECK17-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 85869// CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 85870// CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 85871// CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 85872// CHECK17-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 15873// CHECK17-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 15874// CHECK17-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15875// CHECK17-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i325876// CHECK17-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]5877// CHECK17-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 15878// CHECK17-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 15879// CHECK17-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 15880// CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 15881// CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 45882// CHECK17-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15883// CHECK17-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 15884// CHECK17-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15885// CHECK17-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i325886// CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 105887// CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]5888// CHECK17:       omp.precond.then:5889// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45890// CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45891// CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 45892// CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 45893// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 45894// CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85895// CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45896// CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5897// CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45898// CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45899// CHECK17-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]5900// CHECK17-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5901// CHECK17:       cond.true:5902// CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 45903// CHECK17-NEXT:    br label [[COND_END:%.*]]5904// CHECK17:       cond.false:5905// CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45906// CHECK17-NEXT:    br label [[COND_END]]5907// CHECK17:       cond.end:5908// CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]5909// CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 45910// CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45911// CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 45912// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]5913// CHECK17:       omp.inner.for.cond:5914// CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]5915// CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]5916// CHECK17-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]5917// CHECK17-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5918// CHECK17:       omp.inner.for.body:5919// CHECK17-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP21]]5920// CHECK17-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP16]] to i325921// CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]5922// CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 15923// CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]5924// CHECK17-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i85925// CHECK17-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP21]]5926// CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]5927// CHECK17:       omp.body.continue:5928// CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]5929// CHECK17:       omp.inner.for.inc:5930// CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]5931// CHECK17-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP18]], 15932// CHECK17-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]5933// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]5934// CHECK17:       omp.inner.for.end:5935// CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]5936// CHECK17:       omp.loop.exit:5937// CHECK17-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85938// CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 45939// CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])5940// CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 45941// CHECK17-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 05942// CHECK17-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]5943// CHECK17:       .omp.final.then:5944// CHECK17-NEXT:    [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15945// CHECK17-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP23]] to i325946// CHECK17-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 15947// CHECK17-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP24]] to i325948// CHECK17-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]5949// CHECK17-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 15950// CHECK17-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 15951// CHECK17-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 15952// CHECK17-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 15953// CHECK17-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]5954// CHECK17-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i85955// CHECK17-NEXT:    store i8 [[CONV21]], ptr [[TMP0]], align 15956// CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]5957// CHECK17:       .omp.final.done:5958// CHECK17-NEXT:    br label [[OMP_PRECOND_END]]5959// CHECK17:       omp.precond.end:5960// CHECK17-NEXT:    ret void5961//5962//5963// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1355964// CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] {5965// CHECK17-NEXT:  entry:5966// CHECK17-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 85967// CHECK17-NEXT:    [[AA_ADDR:%.*]] = alloca i64, align 85968// CHECK17-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 85969// CHECK17-NEXT:    store i64 [[AA]], ptr [[AA_ADDR]], align 85970// CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])5971// CHECK17-NEXT:    ret void5972//5973//5974// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined5975// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {5976// CHECK17-NEXT:  entry:5977// CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 85978// CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 85979// CHECK17-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 85980// CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 45981// CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 45982// CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 45983// CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 45984// CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45985// CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45986// CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 45987// CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 85988// CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 85989// CHECK17-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 85990// CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 85991// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 45992// CHECK17-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 45993// CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 45994// CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 45995// CHECK17-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 25996// CHECK17-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i325997// CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 85998// CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 45999// CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])6000// CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]6001// CHECK17:       omp.dispatch.cond:6002// CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46003// CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996004// CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6005// CHECK17:       cond.true:6006// CHECK17-NEXT:    br label [[COND_END:%.*]]6007// CHECK17:       cond.false:6008// CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46009// CHECK17-NEXT:    br label [[COND_END]]6010// CHECK17:       cond.end:6011// CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6012// CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46013// CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46014// CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46015// CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46016// CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46017// CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6018// CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6019// CHECK17:       omp.dispatch.body:6020// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6021// CHECK17:       omp.inner.for.cond:6022// CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]6023// CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]6024// CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]6025// CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6026// CHECK17:       omp.inner.for.body:6027// CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6028// CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 16029// CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]6030// CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]6031// CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6032// CHECK17:       omp.body.continue:6033// CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6034// CHECK17:       omp.inner.for.inc:6035// CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6036// CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 16037// CHECK17-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]6038// CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]6039// CHECK17:       omp.inner.for.end:6040// CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]6041// CHECK17:       omp.dispatch.inc:6042// CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46043// CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46044// CHECK17-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]6045// CHECK17-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 46046// CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46047// CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46048// CHECK17-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]6049// CHECK17-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 46050// CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]6051// CHECK17:       omp.dispatch.end:6052// CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6053// CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46054// CHECK17-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 06055// CHECK17-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6056// CHECK17:       .omp.final.then:6057// CHECK17-NEXT:    store i32 100, ptr [[I]], align 46058// CHECK17-NEXT:    br label [[DOTOMP_FINAL_DONE]]6059// CHECK17:       .omp.final.done:6060// CHECK17-NEXT:    ret void6061//6062//6063// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l706064// CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {6065// CHECK19-NEXT:  entry:6066// CHECK19-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 46067// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46068// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46069// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46070// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46071// CHECK19-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 46072// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46073// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46074// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46075// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46076// CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6077// CHECK19-NEXT:    ret void6078//6079//6080// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined6081// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {6082// CHECK19-NEXT:  entry:6083// CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46084// CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46085// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46086// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46087// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46088// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46089// CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46090// CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 46091// CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46092// CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46093// CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46094// CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46095// CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 46096// CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46097// CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46098// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46099// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46100// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46101// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46102// CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 46103// CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 46104// CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 46105// CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 46106// CHECK19-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 46107// CHECK19-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i32 16) ]6108// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46109// CHECK19-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 46110// CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46111// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46112// CHECK19-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46113// CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 46114// CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6115// CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46116// CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714236117// CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6118// CHECK19:       cond.true:6119// CHECK19-NEXT:    br label [[COND_END:%.*]]6120// CHECK19:       cond.false:6121// CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46122// CHECK19-NEXT:    br label [[COND_END]]6123// CHECK19:       cond.end:6124// CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]6125// CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46126// CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46127// CHECK19-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 46128// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6129// CHECK19:       omp.inner.for.cond:6130// CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]6131// CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]6132// CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]6133// CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6134// CHECK19:       omp.inner.for.body:6135// CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]6136// CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 76137// CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]6138// CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]6139// CHECK19-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP10]]6140// CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]6141// CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]6142// CHECK19-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]6143// CHECK19-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP10]]6144// CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]6145// CHECK19-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i32 [[TMP17]]6146// CHECK19-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP10]]6147// CHECK19-NEXT:    [[MUL3:%.*]] = fmul float [[TMP15]], [[TMP18]]6148// CHECK19-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP10]]6149// CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]6150// CHECK19-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i32 [[TMP20]]6151// CHECK19-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP10]]6152// CHECK19-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP21]]6153// CHECK19-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP10]]6154// CHECK19-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]6155// CHECK19-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i32 [[TMP23]]6156// CHECK19-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP10]]6157// CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6158// CHECK19:       omp.body.continue:6159// CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6160// CHECK19:       omp.inner.for.inc:6161// CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]6162// CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], 16163// CHECK19-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]6164// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]6165// CHECK19:       omp.inner.for.end:6166// CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]6167// CHECK19:       omp.loop.exit:6168// CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])6169// CHECK19-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46170// CHECK19-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 06171// CHECK19-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6172// CHECK19:       .omp.final.then:6173// CHECK19-NEXT:    store i32 32000001, ptr [[I]], align 46174// CHECK19-NEXT:    br label [[DOTOMP_FINAL_DONE]]6175// CHECK19:       .omp.final.done:6176// CHECK19-NEXT:    ret void6177//6178//6179// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l866180// CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {6181// CHECK19-NEXT:  entry:6182// CHECK19-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 46183// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46184// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46185// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46186// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46187// CHECK19-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 46188// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46189// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46190// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46191// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46192// CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6193// CHECK19-NEXT:    ret void6194//6195//6196// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined6197// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {6198// CHECK19-NEXT:  entry:6199// CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46200// CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46201// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46202// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46203// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46204// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46205// CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46206// CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 46207// CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46208// CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46209// CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46210// CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46211// CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 46212// CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46213// CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46214// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46215// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46216// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46217// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46218// CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 46219// CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 46220// CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 46221// CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 46222// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46223// CHECK19-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 46224// CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46225// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46226// CHECK19-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46227// CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 46228// CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6229// CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46230// CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714236231// CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6232// CHECK19:       cond.true:6233// CHECK19-NEXT:    br label [[COND_END:%.*]]6234// CHECK19:       cond.false:6235// CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46236// CHECK19-NEXT:    br label [[COND_END]]6237// CHECK19:       cond.end:6238// CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]6239// CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46240// CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46241// CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 46242// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6243// CHECK19:       omp.inner.for.cond:6244// CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46245// CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46246// CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]6247// CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6248// CHECK19:       omp.inner.for.body:6249// CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46250// CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 76251// CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]6252// CHECK19-NEXT:    store i32 [[SUB]], ptr [[I]], align 46253// CHECK19-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 46254// CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 46255// CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]6256// CHECK19-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 46257// CHECK19-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 46258// CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 46259// CHECK19-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]6260// CHECK19-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 46261// CHECK19-NEXT:    [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]6262// CHECK19-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 46263// CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 46264// CHECK19-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]6265// CHECK19-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 46266// CHECK19-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]6267// CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 46268// CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 46269// CHECK19-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]6270// CHECK19-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 46271// CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6272// CHECK19:       omp.body.continue:6273// CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6274// CHECK19:       omp.inner.for.inc:6275// CHECK19-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46276// CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 16277// CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46278// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]6279// CHECK19:       omp.inner.for.end:6280// CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]6281// CHECK19:       omp.loop.exit:6282// CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])6283// CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46284// CHECK19-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 06285// CHECK19-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6286// CHECK19:       .omp.final.then:6287// CHECK19-NEXT:    store i32 32, ptr [[I]], align 46288// CHECK19-NEXT:    br label [[DOTOMP_FINAL_DONE]]6289// CHECK19:       .omp.final.done:6290// CHECK19-NEXT:    ret void6291//6292//6293// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1036294// CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {6295// CHECK19-NEXT:  entry:6296// CHECK19-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 46297// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46298// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46299// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46300// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46301// CHECK19-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 46302// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46303// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46304// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46305// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46306// CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6307// CHECK19-NEXT:    ret void6308//6309//6310// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined6311// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {6312// CHECK19-NEXT:  entry:6313// CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46314// CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46315// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46316// CHECK19-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 46317// CHECK19-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 46318// CHECK19-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 46319// CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46320// CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 46321// CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46322// CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46323// CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46324// CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46325// CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 46326// CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46327// CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46328// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46329// CHECK19-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 46330// CHECK19-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 46331// CHECK19-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 46332// CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 46333// CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 46334// CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 46335// CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 46336// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46337// CHECK19-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 46338// CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46339// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46340// CHECK19-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46341// CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 46342// CHECK19-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)6343// CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]6344// CHECK19:       omp.dispatch.cond:6345// CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46346// CHECK19-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082886347// CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6348// CHECK19:       cond.true:6349// CHECK19-NEXT:    br label [[COND_END:%.*]]6350// CHECK19:       cond.false:6351// CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46352// CHECK19-NEXT:    br label [[COND_END]]6353// CHECK19:       cond.end:6354// CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]6355// CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46356// CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46357// CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 46358// CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46359// CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46360// CHECK19-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]6361// CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6362// CHECK19:       omp.dispatch.body:6363// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6364// CHECK19:       omp.inner.for.cond:6365// CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]6366// CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]6367// CHECK19-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]6368// CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6369// CHECK19:       omp.inner.for.body:6370// CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6371// CHECK19-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1276372// CHECK19-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]6373// CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6374// CHECK19-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP19]]6375// CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6376// CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i32 [[TMP15]]6377// CHECK19-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]6378// CHECK19-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP19]]6379// CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6380// CHECK19-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i32 [[TMP18]]6381// CHECK19-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP19]]6382// CHECK19-NEXT:    [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]6383// CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP19]]6384// CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6385// CHECK19-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i32 [[TMP21]]6386// CHECK19-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP19]]6387// CHECK19-NEXT:    [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]6388// CHECK19-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP19]]6389// CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6390// CHECK19-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i32 [[TMP24]]6391// CHECK19-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP19]]6392// CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6393// CHECK19:       omp.body.continue:6394// CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6395// CHECK19:       omp.inner.for.inc:6396// CHECK19-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6397// CHECK19-NEXT:    [[ADD8:%.*]] = add i32 [[TMP25]], 16398// CHECK19-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6399// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]6400// CHECK19:       omp.inner.for.end:6401// CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]6402// CHECK19:       omp.dispatch.inc:6403// CHECK19-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46404// CHECK19-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46405// CHECK19-NEXT:    [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]6406// CHECK19-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 46407// CHECK19-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46408// CHECK19-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46409// CHECK19-NEXT:    [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]6410// CHECK19-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 46411// CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]6412// CHECK19:       omp.dispatch.end:6413// CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])6414// CHECK19-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46415// CHECK19-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 06416// CHECK19-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6417// CHECK19:       .omp.final.then:6418// CHECK19-NEXT:    store i32 -2147483522, ptr [[I]], align 46419// CHECK19-NEXT:    br label [[DOTOMP_FINAL_DONE]]6420// CHECK19:       .omp.final.done:6421// CHECK19-NEXT:    ret void6422//6423//6424// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1156425// CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {6426// CHECK19-NEXT:  entry:6427// CHECK19-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 46428// CHECK19-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 46429// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 46430// CHECK19-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 46431// CHECK19-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 46432// CHECK19-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 46433// CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])6434// CHECK19-NEXT:    ret void6435//6436//6437// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined6438// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {6439// CHECK19-NEXT:  entry:6440// CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46441// CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46442// CHECK19-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 46443// CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 46444// CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46445// CHECK19-NEXT:    [[TMP:%.*]] = alloca i8, align 16446// CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 16447// CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 46448// CHECK19-NEXT:    [[I4:%.*]] = alloca i8, align 16449// CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46450// CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46451// CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46452// CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46453// CHECK19-NEXT:    [[I6:%.*]] = alloca i8, align 16454// CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46455// CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46456// CHECK19-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 46457// CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 46458// CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 46459// CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 46460// CHECK19-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 16461// CHECK19-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 16462// CHECK19-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16463// CHECK19-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i326464// CHECK19-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]6465// CHECK19-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 16466// CHECK19-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 16467// CHECK19-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 16468// CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 16469// CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 46470// CHECK19-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16471// CHECK19-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 16472// CHECK19-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16473// CHECK19-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i326474// CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 106475// CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]6476// CHECK19:       omp.precond.then:6477// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46478// CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 46479// CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 46480// CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46481// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46482// CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46483// CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 46484// CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6485// CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46486// CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 46487// CHECK19-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]6488// CHECK19-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6489// CHECK19:       cond.true:6490// CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 46491// CHECK19-NEXT:    br label [[COND_END:%.*]]6492// CHECK19:       cond.false:6493// CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46494// CHECK19-NEXT:    br label [[COND_END]]6495// CHECK19:       cond.end:6496// CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]6497// CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46498// CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46499// CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 46500// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6501// CHECK19:       omp.inner.for.cond:6502// CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]6503// CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]6504// CHECK19-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]6505// CHECK19-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6506// CHECK19:       omp.inner.for.body:6507// CHECK19-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP22]]6508// CHECK19-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP16]] to i326509// CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]6510// CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 16511// CHECK19-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]6512// CHECK19-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i86513// CHECK19-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !llvm.access.group [[ACC_GRP22]]6514// CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6515// CHECK19:       omp.body.continue:6516// CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6517// CHECK19:       omp.inner.for.inc:6518// CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]6519// CHECK19-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP18]], 16520// CHECK19-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]6521// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]6522// CHECK19:       omp.inner.for.end:6523// CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]6524// CHECK19:       omp.loop.exit:6525// CHECK19-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46526// CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 46527// CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])6528// CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46529// CHECK19-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 06530// CHECK19-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6531// CHECK19:       .omp.final.then:6532// CHECK19-NEXT:    [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16533// CHECK19-NEXT:    [[CONV13:%.*]] = sext i8 [[TMP23]] to i326534// CHECK19-NEXT:    [[TMP24:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 16535// CHECK19-NEXT:    [[CONV14:%.*]] = sext i8 [[TMP24]] to i326536// CHECK19-NEXT:    [[SUB15:%.*]] = sub i32 10, [[CONV14]]6537// CHECK19-NEXT:    [[SUB16:%.*]] = sub i32 [[SUB15]], 16538// CHECK19-NEXT:    [[ADD17:%.*]] = add i32 [[SUB16]], 16539// CHECK19-NEXT:    [[DIV18:%.*]] = udiv i32 [[ADD17]], 16540// CHECK19-NEXT:    [[MUL19:%.*]] = mul nsw i32 [[DIV18]], 16541// CHECK19-NEXT:    [[ADD20:%.*]] = add nsw i32 [[CONV13]], [[MUL19]]6542// CHECK19-NEXT:    [[CONV21:%.*]] = trunc i32 [[ADD20]] to i86543// CHECK19-NEXT:    store i8 [[CONV21]], ptr [[TMP0]], align 16544// CHECK19-NEXT:    br label [[DOTOMP_FINAL_DONE]]6545// CHECK19:       .omp.final.done:6546// CHECK19-NEXT:    br label [[OMP_PRECOND_END]]6547// CHECK19:       omp.precond.end:6548// CHECK19-NEXT:    ret void6549//6550//6551// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1356552// CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] {6553// CHECK19-NEXT:  entry:6554// CHECK19-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 46555// CHECK19-NEXT:    [[AA_ADDR:%.*]] = alloca i32, align 46556// CHECK19-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 46557// CHECK19-NEXT:    store i32 [[AA]], ptr [[AA_ADDR]], align 46558// CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])6559// CHECK19-NEXT:    ret void6560//6561//6562// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined6563// CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {6564// CHECK19-NEXT:  entry:6565// CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46566// CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46567// CHECK19-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 46568// CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46569// CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 46570// CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46571// CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46572// CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46573// CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46574// CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 46575// CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46576// CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46577// CHECK19-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 46578// CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 46579// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46580// CHECK19-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 46581// CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46582// CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46583// CHECK19-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 26584// CHECK19-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i326585// CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46586// CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46587// CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])6588// CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]6589// CHECK19:       omp.dispatch.cond:6590// CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46591// CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 996592// CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6593// CHECK19:       cond.true:6594// CHECK19-NEXT:    br label [[COND_END:%.*]]6595// CHECK19:       cond.false:6596// CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46597// CHECK19-NEXT:    br label [[COND_END]]6598// CHECK19:       cond.end:6599// CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6600// CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46601// CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46602// CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46603// CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46604// CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46605// CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6606// CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6607// CHECK19:       omp.dispatch.body:6608// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6609// CHECK19:       omp.inner.for.cond:6610// CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]6611// CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]6612// CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]6613// CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6614// CHECK19:       omp.inner.for.body:6615// CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]6616// CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 16617// CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]6618// CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]6619// CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6620// CHECK19:       omp.body.continue:6621// CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6622// CHECK19:       omp.inner.for.inc:6623// CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]6624// CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 16625// CHECK19-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]6626// CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]6627// CHECK19:       omp.inner.for.end:6628// CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]6629// CHECK19:       omp.dispatch.inc:6630// CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46631// CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46632// CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]6633// CHECK19-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 46634// CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46635// CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 46636// CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]6637// CHECK19-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 46638// CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]6639// CHECK19:       omp.dispatch.end:6640// CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6641// CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46642// CHECK19-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 06643// CHECK19-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6644// CHECK19:       .omp.final.then:6645// CHECK19-NEXT:    store i32 100, ptr [[I]], align 46646// CHECK19-NEXT:    br label [[DOTOMP_FINAL_DONE]]6647// CHECK19:       .omp.final.done:6648// CHECK19-NEXT:    ret void6649//6650//6651// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l706652// CHECK21-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {6653// CHECK21-NEXT:  entry:6654// CHECK21-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 86655// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86656// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86657// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86658// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86659// CHECK21-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 86660// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86661// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86662// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86663// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86664// CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6665// CHECK21-NEXT:    ret void6666//6667//6668// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined6669// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {6670// CHECK21-NEXT:  entry:6671// CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86672// CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86673// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86674// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86675// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86676// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86677// CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46678// CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 46679// CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46680// CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46681// CHECK21-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46682// CHECK21-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46683// CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 46684// CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86685// CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86686// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86687// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86688// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86689// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86690// CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86691// CHECK21-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 86692// CHECK21-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 86693// CHECK21-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 86694// CHECK21-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 86695// CHECK21-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i64 16) ]6696// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46697// CHECK21-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 46698// CHECK21-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46699// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46700// CHECK21-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86701// CHECK21-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 46702// CHECK21-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6703// CHECK21-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46704// CHECK21-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714236705// CHECK21-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6706// CHECK21:       cond.true:6707// CHECK21-NEXT:    br label [[COND_END:%.*]]6708// CHECK21:       cond.false:6709// CHECK21-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46710// CHECK21-NEXT:    br label [[COND_END]]6711// CHECK21:       cond.end:6712// CHECK21-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]6713// CHECK21-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46714// CHECK21-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46715// CHECK21-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 46716// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6717// CHECK21:       omp.inner.for.cond:6718// CHECK21-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]6719// CHECK21-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]6720// CHECK21-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]6721// CHECK21-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6722// CHECK21:       omp.inner.for.body:6723// CHECK21-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]6724// CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 76725// CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]6726// CHECK21-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]6727// CHECK21-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP9]]6728// CHECK21-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]6729// CHECK21-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i646730// CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i64 [[IDXPROM]]6731// CHECK21-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]6732// CHECK21-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP9]]6733// CHECK21-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]6734// CHECK21-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP17]] to i646735// CHECK21-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 [[IDXPROM2]]6736// CHECK21-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP9]]6737// CHECK21-NEXT:    [[MUL4:%.*]] = fmul float [[TMP15]], [[TMP18]]6738// CHECK21-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP9]]6739// CHECK21-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]6740// CHECK21-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP20]] to i646741// CHECK21-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i64 [[IDXPROM5]]6742// CHECK21-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP9]]6743// CHECK21-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP21]]6744// CHECK21-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP9]]6745// CHECK21-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]6746// CHECK21-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP23]] to i646747// CHECK21-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i64 [[IDXPROM8]]6748// CHECK21-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 4, !llvm.access.group [[ACC_GRP9]]6749// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6750// CHECK21:       omp.body.continue:6751// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6752// CHECK21:       omp.inner.for.inc:6753// CHECK21-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]6754// CHECK21-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], 16755// CHECK21-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]6756// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]6757// CHECK21:       omp.inner.for.end:6758// CHECK21-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]6759// CHECK21:       omp.loop.exit:6760// CHECK21-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])6761// CHECK21-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46762// CHECK21-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 06763// CHECK21-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6764// CHECK21:       .omp.final.then:6765// CHECK21-NEXT:    store i32 32000001, ptr [[I]], align 46766// CHECK21-NEXT:    br label [[DOTOMP_FINAL_DONE]]6767// CHECK21:       .omp.final.done:6768// CHECK21-NEXT:    ret void6769//6770//6771// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l866772// CHECK21-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {6773// CHECK21-NEXT:  entry:6774// CHECK21-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 86775// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86776// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86777// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86778// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86779// CHECK21-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 86780// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86781// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86782// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86783// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86784// CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6785// CHECK21-NEXT:    ret void6786//6787//6788// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined6789// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {6790// CHECK21-NEXT:  entry:6791// CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86792// CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86793// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86794// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86795// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86796// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86797// CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46798// CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 46799// CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46800// CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46801// CHECK21-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46802// CHECK21-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46803// CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 46804// CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86805// CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86806// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86807// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86808// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86809// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86810// CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86811// CHECK21-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 86812// CHECK21-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 86813// CHECK21-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 86814// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46815// CHECK21-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 46816// CHECK21-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46817// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46818// CHECK21-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86819// CHECK21-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 46820// CHECK21-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6821// CHECK21-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46822// CHECK21-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714236823// CHECK21-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6824// CHECK21:       cond.true:6825// CHECK21-NEXT:    br label [[COND_END:%.*]]6826// CHECK21:       cond.false:6827// CHECK21-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46828// CHECK21-NEXT:    br label [[COND_END]]6829// CHECK21:       cond.end:6830// CHECK21-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]6831// CHECK21-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46832// CHECK21-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46833// CHECK21-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 46834// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6835// CHECK21:       omp.inner.for.cond:6836// CHECK21-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46837// CHECK21-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46838// CHECK21-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]6839// CHECK21-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6840// CHECK21:       omp.inner.for.body:6841// CHECK21-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46842// CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 76843// CHECK21-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]6844// CHECK21-NEXT:    store i32 [[SUB]], ptr [[I]], align 46845// CHECK21-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8, !nontemporal [[META16:![0-9]+]]6846// CHECK21-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 46847// CHECK21-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i646848// CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]6849// CHECK21-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 46850// CHECK21-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 86851// CHECK21-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 46852// CHECK21-NEXT:    [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i646853// CHECK21-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]6854// CHECK21-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 46855// CHECK21-NEXT:    [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]6856// CHECK21-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 86857// CHECK21-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 46858// CHECK21-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i646859// CHECK21-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]6860// CHECK21-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 46861// CHECK21-NEXT:    [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]6862// CHECK21-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8, !nontemporal [[META16]]6863// CHECK21-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 46864// CHECK21-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i646865// CHECK21-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]6866// CHECK21-NEXT:    store float [[MUL7]], ptr [[ARRAYIDX9]], align 46867// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6868// CHECK21:       omp.body.continue:6869// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6870// CHECK21:       omp.inner.for.inc:6871// CHECK21-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46872// CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 16873// CHECK21-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 46874// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]6875// CHECK21:       omp.inner.for.end:6876// CHECK21-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]6877// CHECK21:       omp.loop.exit:6878// CHECK21-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])6879// CHECK21-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 46880// CHECK21-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 06881// CHECK21-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]6882// CHECK21:       .omp.final.then:6883// CHECK21-NEXT:    store i32 32, ptr [[I]], align 46884// CHECK21-NEXT:    br label [[DOTOMP_FINAL_DONE]]6885// CHECK21:       .omp.final.done:6886// CHECK21-NEXT:    ret void6887//6888//6889// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1036890// CHECK21-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {6891// CHECK21-NEXT:  entry:6892// CHECK21-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 86893// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86894// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86895// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86896// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86897// CHECK21-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 86898// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86899// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86900// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86901// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86902// CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])6903// CHECK21-NEXT:    ret void6904//6905//6906// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined6907// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {6908// CHECK21-NEXT:  entry:6909// CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 86910// CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 86911// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 86912// CHECK21-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 86913// CHECK21-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 86914// CHECK21-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 86915// CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 46916// CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 46917// CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 46918// CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 46919// CHECK21-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46920// CHECK21-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46921// CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 46922// CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 86923// CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 86924// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 86925// CHECK21-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 86926// CHECK21-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 86927// CHECK21-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 86928// CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 86929// CHECK21-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 86930// CHECK21-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 86931// CHECK21-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 86932// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 46933// CHECK21-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 46934// CHECK21-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 46935// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 46936// CHECK21-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 86937// CHECK21-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 46938// CHECK21-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)6939// CHECK21-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]6940// CHECK21:       omp.dispatch.cond:6941// CHECK21-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46942// CHECK21-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082886943// CHECK21-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6944// CHECK21:       cond.true:6945// CHECK21-NEXT:    br label [[COND_END:%.*]]6946// CHECK21:       cond.false:6947// CHECK21-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46948// CHECK21-NEXT:    br label [[COND_END]]6949// CHECK21:       cond.end:6950// CHECK21-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]6951// CHECK21-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 46952// CHECK21-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46953// CHECK21-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 46954// CHECK21-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46955// CHECK21-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46956// CHECK21-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]6957// CHECK21-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]6958// CHECK21:       omp.dispatch.body:6959// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]6960// CHECK21:       omp.inner.for.cond:6961// CHECK21-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]6962// CHECK21-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]6963// CHECK21-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]6964// CHECK21-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6965// CHECK21:       omp.inner.for.body:6966// CHECK21-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6967// CHECK21-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1276968// CHECK21-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]6969// CHECK21-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6970// CHECK21-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP19]]6971// CHECK21-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6972// CHECK21-NEXT:    [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i646973// CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i64 [[IDXPROM]]6974// CHECK21-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]6975// CHECK21-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP19]]6976// CHECK21-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6977// CHECK21-NEXT:    [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i646978// CHECK21-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i64 [[IDXPROM3]]6979// CHECK21-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP19]]6980// CHECK21-NEXT:    [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]6981// CHECK21-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP19]]6982// CHECK21-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6983// CHECK21-NEXT:    [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i646984// CHECK21-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i64 [[IDXPROM6]]6985// CHECK21-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP19]]6986// CHECK21-NEXT:    [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]6987// CHECK21-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP19]]6988// CHECK21-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP19]]6989// CHECK21-NEXT:    [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i646990// CHECK21-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i64 [[IDXPROM9]]6991// CHECK21-NEXT:    store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP19]]6992// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]6993// CHECK21:       omp.body.continue:6994// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]6995// CHECK21:       omp.inner.for.inc:6996// CHECK21-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6997// CHECK21-NEXT:    [[ADD11:%.*]] = add i32 [[TMP25]], 16998// CHECK21-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]6999// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]7000// CHECK21:       omp.inner.for.end:7001// CHECK21-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]7002// CHECK21:       omp.dispatch.inc:7003// CHECK21-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47004// CHECK21-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47005// CHECK21-NEXT:    [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]7006// CHECK21-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 47007// CHECK21-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47008// CHECK21-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47009// CHECK21-NEXT:    [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]7010// CHECK21-NEXT:    store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 47011// CHECK21-NEXT:    br label [[OMP_DISPATCH_COND]]7012// CHECK21:       omp.dispatch.end:7013// CHECK21-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])7014// CHECK21-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47015// CHECK21-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 07016// CHECK21-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7017// CHECK21:       .omp.final.then:7018// CHECK21-NEXT:    store i32 -2147483522, ptr [[I]], align 47019// CHECK21-NEXT:    br label [[DOTOMP_FINAL_DONE]]7020// CHECK21:       .omp.final.done:7021// CHECK21-NEXT:    ret void7022//7023//7024// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1157025// CHECK21-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[I:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {7026// CHECK21-NEXT:  entry:7027// CHECK21-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 87028// CHECK21-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 87029// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 87030// CHECK21-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 87031// CHECK21-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 87032// CHECK21-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 87033// CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])7034// CHECK21-NEXT:    ret void7035//7036//7037// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined7038// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {7039// CHECK21-NEXT:  entry:7040// CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87041// CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87042// CHECK21-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 87043// CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 87044// CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47045// CHECK21-NEXT:    [[TMP:%.*]] = alloca i8, align 17046// CHECK21-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 17047// CHECK21-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47048// CHECK21-NEXT:    [[I4:%.*]] = alloca i8, align 17049// CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47050// CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47051// CHECK21-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47052// CHECK21-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47053// CHECK21-NEXT:    [[I6:%.*]] = alloca i8, align 17054// CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87055// CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87056// CHECK21-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 87057// CHECK21-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 87058// CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 87059// CHECK21-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 87060// CHECK21-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 17061// CHECK21-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 17062// CHECK21-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17063// CHECK21-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i327064// CHECK21-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]7065// CHECK21-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 17066// CHECK21-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 17067// CHECK21-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 17068// CHECK21-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 17069// CHECK21-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 47070// CHECK21-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17071// CHECK21-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 17072// CHECK21-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17073// CHECK21-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i327074// CHECK21-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 107075// CHECK21-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7076// CHECK21:       omp.precond.then:7077// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47078// CHECK21-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47079// CHECK21-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 47080// CHECK21-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47081// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47082// CHECK21-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87083// CHECK21-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47084// CHECK21-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7085// CHECK21-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47086// CHECK21-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47087// CHECK21-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]7088// CHECK21-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7089// CHECK21:       cond.true:7090// CHECK21-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47091// CHECK21-NEXT:    br label [[COND_END:%.*]]7092// CHECK21:       cond.false:7093// CHECK21-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47094// CHECK21-NEXT:    br label [[COND_END]]7095// CHECK21:       cond.end:7096// CHECK21-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]7097// CHECK21-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47098// CHECK21-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47099// CHECK21-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 47100// CHECK21-NEXT:    [[TMP14:%.*]] = load i8, ptr [[TMP1]], align 17101// CHECK21-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP14]], 07102// CHECK21-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]7103// CHECK21:       omp_if.then:7104// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7105// CHECK21:       omp.inner.for.cond:7106// CHECK21-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]7107// CHECK21-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]7108// CHECK21-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]7109// CHECK21-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7110// CHECK21:       omp.inner.for.body:7111// CHECK21-NEXT:    [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP22]]7112// CHECK21-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP17]] to i327113// CHECK21-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]7114// CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 17115// CHECK21-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]7116// CHECK21-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i87117// CHECK21-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META16]], !llvm.access.group [[ACC_GRP22]]7118// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7119// CHECK21:       omp.body.continue:7120// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7121// CHECK21:       omp.inner.for.inc:7122// CHECK21-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]7123// CHECK21-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP19]], 17124// CHECK21-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]7125// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]7126// CHECK21:       omp.inner.for.end:7127// CHECK21-NEXT:    br label [[OMP_IF_END:%.*]]7128// CHECK21:       omp_if.else:7129// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]7130// CHECK21:       omp.inner.for.cond13:7131// CHECK21-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47132// CHECK21-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47133// CHECK21-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]7134// CHECK21-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]7135// CHECK21:       omp.inner.for.body15:7136// CHECK21-NEXT:    [[TMP22:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17137// CHECK21-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP22]] to i327138// CHECK21-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47139// CHECK21-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP23]], 17140// CHECK21-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]7141// CHECK21-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i87142// CHECK21-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 17143// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]7144// CHECK21:       omp.body.continue20:7145// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]7146// CHECK21:       omp.inner.for.inc21:7147// CHECK21-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47148// CHECK21-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP24]], 17149// CHECK21-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 47150// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP25:![0-9]+]]7151// CHECK21:       omp.inner.for.end23:7152// CHECK21-NEXT:    br label [[OMP_IF_END]]7153// CHECK21:       omp_if.end:7154// CHECK21-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]7155// CHECK21:       omp.loop.exit:7156// CHECK21-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87157// CHECK21-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 47158// CHECK21-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])7159// CHECK21-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47160// CHECK21-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 07161// CHECK21-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7162// CHECK21:       .omp.final.then:7163// CHECK21-NEXT:    [[TMP29:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17164// CHECK21-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP29]] to i327165// CHECK21-NEXT:    [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17166// CHECK21-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP30]] to i327167// CHECK21-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]7168// CHECK21-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 17169// CHECK21-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 17170// CHECK21-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 17171// CHECK21-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 17172// CHECK21-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]7173// CHECK21-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i87174// CHECK21-NEXT:    store i8 [[CONV32]], ptr [[TMP0]], align 17175// CHECK21-NEXT:    br label [[DOTOMP_FINAL_DONE]]7176// CHECK21:       .omp.final.done:7177// CHECK21-NEXT:    br label [[OMP_PRECOND_END]]7178// CHECK21:       omp.precond.end:7179// CHECK21-NEXT:    ret void7180//7181//7182// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1357183// CHECK21-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] {7184// CHECK21-NEXT:  entry:7185// CHECK21-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 87186// CHECK21-NEXT:    [[AA_ADDR:%.*]] = alloca i64, align 87187// CHECK21-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 87188// CHECK21-NEXT:    store i64 [[AA]], ptr [[AA_ADDR]], align 87189// CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])7190// CHECK21-NEXT:    ret void7191//7192//7193// CHECK21-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined7194// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {7195// CHECK21-NEXT:  entry:7196// CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87197// CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87198// CHECK21-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 87199// CHECK21-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47200// CHECK21-NEXT:    [[TMP:%.*]] = alloca i32, align 47201// CHECK21-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47202// CHECK21-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47203// CHECK21-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47204// CHECK21-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47205// CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 47206// CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87207// CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87208// CHECK21-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 87209// CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 87210// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47211// CHECK21-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 47212// CHECK21-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47213// CHECK21-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47214// CHECK21-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 27215// CHECK21-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i327216// CHECK21-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87217// CHECK21-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47218// CHECK21-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])7219// CHECK21-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]7220// CHECK21:       omp.dispatch.cond:7221// CHECK21-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47222// CHECK21-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 997223// CHECK21-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7224// CHECK21:       cond.true:7225// CHECK21-NEXT:    br label [[COND_END:%.*]]7226// CHECK21:       cond.false:7227// CHECK21-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47228// CHECK21-NEXT:    br label [[COND_END]]7229// CHECK21:       cond.end:7230// CHECK21-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7231// CHECK21-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47232// CHECK21-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47233// CHECK21-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47234// CHECK21-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47235// CHECK21-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47236// CHECK21-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7237// CHECK21-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]7238// CHECK21:       omp.dispatch.body:7239// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7240// CHECK21:       omp.inner.for.cond:7241// CHECK21-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]7242// CHECK21-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]7243// CHECK21-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]7244// CHECK21-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7245// CHECK21:       omp.inner.for.body:7246// CHECK21-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]7247// CHECK21-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 17248// CHECK21-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]7249// CHECK21-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]7250// CHECK21-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7251// CHECK21:       omp.body.continue:7252// CHECK21-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7253// CHECK21:       omp.inner.for.inc:7254// CHECK21-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]7255// CHECK21-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 17256// CHECK21-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]7257// CHECK21-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]7258// CHECK21:       omp.inner.for.end:7259// CHECK21-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]7260// CHECK21:       omp.dispatch.inc:7261// CHECK21-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47262// CHECK21-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47263// CHECK21-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]7264// CHECK21-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 47265// CHECK21-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47266// CHECK21-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47267// CHECK21-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]7268// CHECK21-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 47269// CHECK21-NEXT:    br label [[OMP_DISPATCH_COND]]7270// CHECK21:       omp.dispatch.end:7271// CHECK21-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7272// CHECK21-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47273// CHECK21-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 07274// CHECK21-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7275// CHECK21:       .omp.final.then:7276// CHECK21-NEXT:    store i32 100, ptr [[I]], align 47277// CHECK21-NEXT:    br label [[DOTOMP_FINAL_DONE]]7278// CHECK21:       .omp.final.done:7279// CHECK21-NEXT:    ret void7280//7281//7282// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l707283// CHECK23-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {7284// CHECK23-NEXT:  entry:7285// CHECK23-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 47286// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47287// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47288// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47289// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47290// CHECK23-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 47291// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47292// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47293// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47294// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47295// CHECK23-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])7296// CHECK23-NEXT:    ret void7297//7298//7299// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l70.omp_outlined7300// CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {7301// CHECK23-NEXT:  entry:7302// CHECK23-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47303// CHECK23-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47304// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47305// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47306// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47307// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47308// CHECK23-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47309// CHECK23-NEXT:    [[TMP:%.*]] = alloca i32, align 47310// CHECK23-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47311// CHECK23-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47312// CHECK23-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47313// CHECK23-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47314// CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 47315// CHECK23-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47316// CHECK23-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47317// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47318// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47319// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47320// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47321// CHECK23-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 47322// CHECK23-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 47323// CHECK23-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 47324// CHECK23-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 47325// CHECK23-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP0]], align 47326// CHECK23-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP4]], i32 16) ]7327// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47328// CHECK23-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 47329// CHECK23-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47330// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47331// CHECK23-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47332// CHECK23-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 47333// CHECK23-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7334// CHECK23-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47335// CHECK23-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 45714237336// CHECK23-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7337// CHECK23:       cond.true:7338// CHECK23-NEXT:    br label [[COND_END:%.*]]7339// CHECK23:       cond.false:7340// CHECK23-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47341// CHECK23-NEXT:    br label [[COND_END]]7342// CHECK23:       cond.end:7343// CHECK23-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]7344// CHECK23-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47345// CHECK23-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47346// CHECK23-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 47347// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7348// CHECK23:       omp.inner.for.cond:7349// CHECK23-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]7350// CHECK23-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]7351// CHECK23-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]7352// CHECK23-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7353// CHECK23:       omp.inner.for.body:7354// CHECK23-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]7355// CHECK23-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 77356// CHECK23-NEXT:    [[ADD:%.*]] = add nsw i32 33, [[MUL]]7357// CHECK23-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]7358// CHECK23-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP10]]7359// CHECK23-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]7360// CHECK23-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP13]], i32 [[TMP14]]7361// CHECK23-NEXT:    [[TMP15:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]7362// CHECK23-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP10]]7363// CHECK23-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]7364// CHECK23-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i32 [[TMP17]]7365// CHECK23-NEXT:    [[TMP18:%.*]] = load float, ptr [[ARRAYIDX2]], align 4, !llvm.access.group [[ACC_GRP10]]7366// CHECK23-NEXT:    [[MUL3:%.*]] = fmul float [[TMP15]], [[TMP18]]7367// CHECK23-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP10]]7368// CHECK23-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]7369// CHECK23-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP19]], i32 [[TMP20]]7370// CHECK23-NEXT:    [[TMP21:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP10]]7371// CHECK23-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP21]]7372// CHECK23-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP10]]7373// CHECK23-NEXT:    [[TMP23:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]7374// CHECK23-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP22]], i32 [[TMP23]]7375// CHECK23-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP10]]7376// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7377// CHECK23:       omp.body.continue:7378// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7379// CHECK23:       omp.inner.for.inc:7380// CHECK23-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]7381// CHECK23-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], 17382// CHECK23-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]7383// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]7384// CHECK23:       omp.inner.for.end:7385// CHECK23-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]7386// CHECK23:       omp.loop.exit:7387// CHECK23-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])7388// CHECK23-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47389// CHECK23-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 07390// CHECK23-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7391// CHECK23:       .omp.final.then:7392// CHECK23-NEXT:    store i32 32000001, ptr [[I]], align 47393// CHECK23-NEXT:    br label [[DOTOMP_FINAL_DONE]]7394// CHECK23:       .omp.final.done:7395// CHECK23-NEXT:    ret void7396//7397//7398// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l867399// CHECK23-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {7400// CHECK23-NEXT:  entry:7401// CHECK23-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 47402// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47403// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47404// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47405// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47406// CHECK23-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 47407// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47408// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47409// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47410// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47411// CHECK23-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])7412// CHECK23-NEXT:    ret void7413//7414//7415// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l86.omp_outlined7416// CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {7417// CHECK23-NEXT:  entry:7418// CHECK23-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47419// CHECK23-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47420// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47421// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47422// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47423// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47424// CHECK23-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47425// CHECK23-NEXT:    [[TMP:%.*]] = alloca i32, align 47426// CHECK23-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47427// CHECK23-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47428// CHECK23-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47429// CHECK23-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47430// CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 47431// CHECK23-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47432// CHECK23-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47433// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47434// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47435// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47436// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47437// CHECK23-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 47438// CHECK23-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 47439// CHECK23-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 47440// CHECK23-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 47441// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47442// CHECK23-NEXT:    store i32 4571423, ptr [[DOTOMP_UB]], align 47443// CHECK23-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47444// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47445// CHECK23-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47446// CHECK23-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 47447// CHECK23-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7448// CHECK23-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47449// CHECK23-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 45714237450// CHECK23-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7451// CHECK23:       cond.true:7452// CHECK23-NEXT:    br label [[COND_END:%.*]]7453// CHECK23:       cond.false:7454// CHECK23-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47455// CHECK23-NEXT:    br label [[COND_END]]7456// CHECK23:       cond.end:7457// CHECK23-NEXT:    [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]7458// CHECK23-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47459// CHECK23-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47460// CHECK23-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 47461// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7462// CHECK23:       omp.inner.for.cond:7463// CHECK23-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47464// CHECK23-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47465// CHECK23-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]7466// CHECK23-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7467// CHECK23:       omp.inner.for.body:7468// CHECK23-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47469// CHECK23-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 77470// CHECK23-NEXT:    [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]7471// CHECK23-NEXT:    store i32 [[SUB]], ptr [[I]], align 47472// CHECK23-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4, !nontemporal [[META17:![0-9]+]]7473// CHECK23-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 47474// CHECK23-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]7475// CHECK23-NEXT:    [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 47476// CHECK23-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 47477// CHECK23-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 47478// CHECK23-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]7479// CHECK23-NEXT:    [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 47480// CHECK23-NEXT:    [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]7481// CHECK23-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 47482// CHECK23-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 47483// CHECK23-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]7484// CHECK23-NEXT:    [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 47485// CHECK23-NEXT:    [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]7486// CHECK23-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4, !nontemporal [[META17]]7487// CHECK23-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I]], align 47488// CHECK23-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]7489// CHECK23-NEXT:    store float [[MUL5]], ptr [[ARRAYIDX6]], align 47490// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7491// CHECK23:       omp.body.continue:7492// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7493// CHECK23:       omp.inner.for.inc:7494// CHECK23-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47495// CHECK23-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], 17496// CHECK23-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 47497// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]7498// CHECK23:       omp.inner.for.end:7499// CHECK23-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]7500// CHECK23:       omp.loop.exit:7501// CHECK23-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])7502// CHECK23-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47503// CHECK23-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 07504// CHECK23-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7505// CHECK23:       .omp.final.then:7506// CHECK23-NEXT:    store i32 32, ptr [[I]], align 47507// CHECK23-NEXT:    br label [[DOTOMP_FINAL_DONE]]7508// CHECK23:       .omp.final.done:7509// CHECK23-NEXT:    ret void7510//7511//7512// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l1037513// CHECK23-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {7514// CHECK23-NEXT:  entry:7515// CHECK23-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 47516// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47517// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47518// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47519// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47520// CHECK23-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 47521// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47522// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47523// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47524// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47525// CHECK23-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])7526// CHECK23-NEXT:    ret void7527//7528//7529// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l103.omp_outlined7530// CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {7531// CHECK23-NEXT:  entry:7532// CHECK23-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47533// CHECK23-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47534// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47535// CHECK23-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 47536// CHECK23-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 47537// CHECK23-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 47538// CHECK23-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47539// CHECK23-NEXT:    [[TMP:%.*]] = alloca i32, align 47540// CHECK23-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47541// CHECK23-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47542// CHECK23-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47543// CHECK23-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47544// CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 47545// CHECK23-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47546// CHECK23-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47547// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47548// CHECK23-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 47549// CHECK23-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 47550// CHECK23-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 47551// CHECK23-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 47552// CHECK23-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 47553// CHECK23-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 47554// CHECK23-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 47555// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47556// CHECK23-NEXT:    store i32 16908288, ptr [[DOTOMP_UB]], align 47557// CHECK23-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47558// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47559// CHECK23-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47560// CHECK23-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 47561// CHECK23-NEXT:    call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)7562// CHECK23-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]7563// CHECK23:       omp.dispatch.cond:7564// CHECK23-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47565// CHECK23-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 169082887566// CHECK23-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7567// CHECK23:       cond.true:7568// CHECK23-NEXT:    br label [[COND_END:%.*]]7569// CHECK23:       cond.false:7570// CHECK23-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47571// CHECK23-NEXT:    br label [[COND_END]]7572// CHECK23:       cond.end:7573// CHECK23-NEXT:    [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]7574// CHECK23-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47575// CHECK23-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47576// CHECK23-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 47577// CHECK23-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47578// CHECK23-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47579// CHECK23-NEXT:    [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]7580// CHECK23-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]7581// CHECK23:       omp.dispatch.body:7582// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7583// CHECK23:       omp.inner.for.cond:7584// CHECK23-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]7585// CHECK23-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP20]]7586// CHECK23-NEXT:    [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]7587// CHECK23-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7588// CHECK23:       omp.inner.for.body:7589// CHECK23-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]7590// CHECK23-NEXT:    [[MUL:%.*]] = mul i32 [[TMP13]], 1277591// CHECK23-NEXT:    [[ADD:%.*]] = add i32 131071, [[MUL]]7592// CHECK23-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]7593// CHECK23-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP20]]7594// CHECK23-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]7595// CHECK23-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP14]], i32 [[TMP15]]7596// CHECK23-NEXT:    [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP20]]7597// CHECK23-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP20]]7598// CHECK23-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]7599// CHECK23-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i32 [[TMP18]]7600// CHECK23-NEXT:    [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP20]]7601// CHECK23-NEXT:    [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]7602// CHECK23-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP20]]7603// CHECK23-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]7604// CHECK23-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i32 [[TMP21]]7605// CHECK23-NEXT:    [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP20]]7606// CHECK23-NEXT:    [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]7607// CHECK23-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP20]]7608// CHECK23-NEXT:    [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]7609// CHECK23-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i32 [[TMP24]]7610// CHECK23-NEXT:    store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP20]]7611// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7612// CHECK23:       omp.body.continue:7613// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7614// CHECK23:       omp.inner.for.inc:7615// CHECK23-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]7616// CHECK23-NEXT:    [[ADD8:%.*]] = add i32 [[TMP25]], 17617// CHECK23-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]7618// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]7619// CHECK23:       omp.inner.for.end:7620// CHECK23-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]7621// CHECK23:       omp.dispatch.inc:7622// CHECK23-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47623// CHECK23-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47624// CHECK23-NEXT:    [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]7625// CHECK23-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 47626// CHECK23-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47627// CHECK23-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47628// CHECK23-NEXT:    [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]7629// CHECK23-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 47630// CHECK23-NEXT:    br label [[OMP_DISPATCH_COND]]7631// CHECK23:       omp.dispatch.end:7632// CHECK23-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])7633// CHECK23-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47634// CHECK23-NEXT:    [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 07635// CHECK23-NEXT:    br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7636// CHECK23:       .omp.final.then:7637// CHECK23-NEXT:    store i32 -2147483522, ptr [[I]], align 47638// CHECK23-NEXT:    br label [[DOTOMP_FINAL_DONE]]7639// CHECK23:       .omp.final.done:7640// CHECK23-NEXT:    ret void7641//7642//7643// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l1157644// CHECK23-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[I:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {7645// CHECK23-NEXT:  entry:7646// CHECK23-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 47647// CHECK23-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 47648// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 47649// CHECK23-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 47650// CHECK23-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 47651// CHECK23-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 47652// CHECK23-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined, ptr [[I_ADDR]], ptr [[A_ADDR]])7653// CHECK23-NEXT:    ret void7654//7655//7656// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l115.omp_outlined7657// CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[I:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {7658// CHECK23-NEXT:  entry:7659// CHECK23-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47660// CHECK23-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47661// CHECK23-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 47662// CHECK23-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 47663// CHECK23-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47664// CHECK23-NEXT:    [[TMP:%.*]] = alloca i8, align 17665// CHECK23-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 17666// CHECK23-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 47667// CHECK23-NEXT:    [[I4:%.*]] = alloca i8, align 17668// CHECK23-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47669// CHECK23-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47670// CHECK23-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47671// CHECK23-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47672// CHECK23-NEXT:    [[I6:%.*]] = alloca i8, align 17673// CHECK23-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47674// CHECK23-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47675// CHECK23-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 47676// CHECK23-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 47677// CHECK23-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 47678// CHECK23-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 47679// CHECK23-NEXT:    [[TMP2:%.*]] = load i8, ptr [[TMP1]], align 17680// CHECK23-NEXT:    store i8 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 17681// CHECK23-NEXT:    [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17682// CHECK23-NEXT:    [[CONV:%.*]] = sext i8 [[TMP3]] to i327683// CHECK23-NEXT:    [[SUB:%.*]] = sub i32 10, [[CONV]]7684// CHECK23-NEXT:    [[SUB2:%.*]] = sub i32 [[SUB]], 17685// CHECK23-NEXT:    [[ADD:%.*]] = add i32 [[SUB2]], 17686// CHECK23-NEXT:    [[DIV:%.*]] = udiv i32 [[ADD]], 17687// CHECK23-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 17688// CHECK23-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 47689// CHECK23-NEXT:    [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17690// CHECK23-NEXT:    store i8 [[TMP4]], ptr [[I4]], align 17691// CHECK23-NEXT:    [[TMP5:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17692// CHECK23-NEXT:    [[CONV5:%.*]] = sext i8 [[TMP5]] to i327693// CHECK23-NEXT:    [[CMP:%.*]] = icmp slt i32 [[CONV5]], 107694// CHECK23-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]7695// CHECK23:       omp.precond.then:7696// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47697// CHECK23-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47698// CHECK23-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 47699// CHECK23-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47700// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47701// CHECK23-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47702// CHECK23-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47703// CHECK23-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7704// CHECK23-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47705// CHECK23-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47706// CHECK23-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]7707// CHECK23-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7708// CHECK23:       cond.true:7709// CHECK23-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 47710// CHECK23-NEXT:    br label [[COND_END:%.*]]7711// CHECK23:       cond.false:7712// CHECK23-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47713// CHECK23-NEXT:    br label [[COND_END]]7714// CHECK23:       cond.end:7715// CHECK23-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]7716// CHECK23-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47717// CHECK23-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47718// CHECK23-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 47719// CHECK23-NEXT:    [[TMP14:%.*]] = load i8, ptr [[TMP1]], align 17720// CHECK23-NEXT:    [[TOBOOL:%.*]] = icmp ne i8 [[TMP14]], 07721// CHECK23-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]7722// CHECK23:       omp_if.then:7723// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7724// CHECK23:       omp.inner.for.cond:7725// CHECK23-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]7726// CHECK23-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]7727// CHECK23-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]7728// CHECK23-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7729// CHECK23:       omp.inner.for.body:7730// CHECK23-NEXT:    [[TMP17:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP23]]7731// CHECK23-NEXT:    [[CONV9:%.*]] = sext i8 [[TMP17]] to i327732// CHECK23-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]7733// CHECK23-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 17734// CHECK23-NEXT:    [[ADD10:%.*]] = add nsw i32 [[CONV9]], [[MUL]]7735// CHECK23-NEXT:    [[CONV11:%.*]] = trunc i32 [[ADD10]] to i87736// CHECK23-NEXT:    store i8 [[CONV11]], ptr [[I6]], align 1, !nontemporal [[META17]], !llvm.access.group [[ACC_GRP23]]7737// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7738// CHECK23:       omp.body.continue:7739// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7740// CHECK23:       omp.inner.for.inc:7741// CHECK23-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]7742// CHECK23-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP19]], 17743// CHECK23-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]7744// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]7745// CHECK23:       omp.inner.for.end:7746// CHECK23-NEXT:    br label [[OMP_IF_END:%.*]]7747// CHECK23:       omp_if.else:7748// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND13:%.*]]7749// CHECK23:       omp.inner.for.cond13:7750// CHECK23-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47751// CHECK23-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47752// CHECK23-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]7753// CHECK23-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY15:%.*]], label [[OMP_INNER_FOR_END23:%.*]]7754// CHECK23:       omp.inner.for.body15:7755// CHECK23-NEXT:    [[TMP22:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17756// CHECK23-NEXT:    [[CONV16:%.*]] = sext i8 [[TMP22]] to i327757// CHECK23-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47758// CHECK23-NEXT:    [[MUL17:%.*]] = mul nsw i32 [[TMP23]], 17759// CHECK23-NEXT:    [[ADD18:%.*]] = add nsw i32 [[CONV16]], [[MUL17]]7760// CHECK23-NEXT:    [[CONV19:%.*]] = trunc i32 [[ADD18]] to i87761// CHECK23-NEXT:    store i8 [[CONV19]], ptr [[I6]], align 17762// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE20:%.*]]7763// CHECK23:       omp.body.continue20:7764// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC21:%.*]]7765// CHECK23:       omp.inner.for.inc21:7766// CHECK23-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47767// CHECK23-NEXT:    [[ADD22:%.*]] = add nsw i32 [[TMP24]], 17768// CHECK23-NEXT:    store i32 [[ADD22]], ptr [[DOTOMP_IV]], align 47769// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]]7770// CHECK23:       omp.inner.for.end23:7771// CHECK23-NEXT:    br label [[OMP_IF_END]]7772// CHECK23:       omp_if.end:7773// CHECK23-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]7774// CHECK23:       omp.loop.exit:7775// CHECK23-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47776// CHECK23-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 47777// CHECK23-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])7778// CHECK23-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47779// CHECK23-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 07780// CHECK23-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7781// CHECK23:       .omp.final.then:7782// CHECK23-NEXT:    [[TMP29:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17783// CHECK23-NEXT:    [[CONV24:%.*]] = sext i8 [[TMP29]] to i327784// CHECK23-NEXT:    [[TMP30:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 17785// CHECK23-NEXT:    [[CONV25:%.*]] = sext i8 [[TMP30]] to i327786// CHECK23-NEXT:    [[SUB26:%.*]] = sub i32 10, [[CONV25]]7787// CHECK23-NEXT:    [[SUB27:%.*]] = sub i32 [[SUB26]], 17788// CHECK23-NEXT:    [[ADD28:%.*]] = add i32 [[SUB27]], 17789// CHECK23-NEXT:    [[DIV29:%.*]] = udiv i32 [[ADD28]], 17790// CHECK23-NEXT:    [[MUL30:%.*]] = mul nsw i32 [[DIV29]], 17791// CHECK23-NEXT:    [[ADD31:%.*]] = add nsw i32 [[CONV24]], [[MUL30]]7792// CHECK23-NEXT:    [[CONV32:%.*]] = trunc i32 [[ADD31]] to i87793// CHECK23-NEXT:    store i8 [[CONV32]], ptr [[TMP0]], align 17794// CHECK23-NEXT:    br label [[DOTOMP_FINAL_DONE]]7795// CHECK23:       .omp.final.done:7796// CHECK23-NEXT:    br label [[OMP_PRECOND_END]]7797// CHECK23:       omp.precond.end:7798// CHECK23-NEXT:    ret void7799//7800//7801// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l1357802// CHECK23-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] {7803// CHECK23-NEXT:  entry:7804// CHECK23-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 47805// CHECK23-NEXT:    [[AA_ADDR:%.*]] = alloca i32, align 47806// CHECK23-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 47807// CHECK23-NEXT:    store i32 [[AA]], ptr [[AA_ADDR]], align 47808// CHECK23-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined, ptr [[AA_ADDR]])7809// CHECK23-NEXT:    ret void7810//7811//7812// CHECK23-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l135.omp_outlined7813// CHECK23-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {7814// CHECK23-NEXT:  entry:7815// CHECK23-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47816// CHECK23-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47817// CHECK23-NEXT:    [[AA_ADDR:%.*]] = alloca ptr, align 47818// CHECK23-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 47819// CHECK23-NEXT:    [[TMP:%.*]] = alloca i32, align 47820// CHECK23-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 47821// CHECK23-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 47822// CHECK23-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47823// CHECK23-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47824// CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 47825// CHECK23-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47826// CHECK23-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47827// CHECK23-NEXT:    store ptr [[AA]], ptr [[AA_ADDR]], align 47828// CHECK23-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 47829// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 47830// CHECK23-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 47831// CHECK23-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 47832// CHECK23-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 47833// CHECK23-NEXT:    [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 27834// CHECK23-NEXT:    [[CONV:%.*]] = sext i16 [[TMP1]] to i327835// CHECK23-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47836// CHECK23-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47837// CHECK23-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])7838// CHECK23-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]7839// CHECK23:       omp.dispatch.cond:7840// CHECK23-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47841// CHECK23-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 997842// CHECK23-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7843// CHECK23:       cond.true:7844// CHECK23-NEXT:    br label [[COND_END:%.*]]7845// CHECK23:       cond.false:7846// CHECK23-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47847// CHECK23-NEXT:    br label [[COND_END]]7848// CHECK23:       cond.end:7849// CHECK23-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7850// CHECK23-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 47851// CHECK23-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47852// CHECK23-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47853// CHECK23-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47854// CHECK23-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47855// CHECK23-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7856// CHECK23-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]7857// CHECK23:       omp.dispatch.body:7858// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]7859// CHECK23:       omp.inner.for.cond:7860// CHECK23-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]7861// CHECK23-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]7862// CHECK23-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]7863// CHECK23-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7864// CHECK23:       omp.inner.for.body:7865// CHECK23-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]7866// CHECK23-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 17867// CHECK23-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]7868// CHECK23-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]7869// CHECK23-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]7870// CHECK23:       omp.body.continue:7871// CHECK23-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]7872// CHECK23:       omp.inner.for.inc:7873// CHECK23-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]7874// CHECK23-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 17875// CHECK23-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]7876// CHECK23-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]7877// CHECK23:       omp.inner.for.end:7878// CHECK23-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]7879// CHECK23:       omp.dispatch.inc:7880// CHECK23-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47881// CHECK23-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47882// CHECK23-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]7883// CHECK23-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 47884// CHECK23-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47885// CHECK23-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 47886// CHECK23-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]7887// CHECK23-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 47888// CHECK23-NEXT:    br label [[OMP_DISPATCH_COND]]7889// CHECK23:       omp.dispatch.end:7890// CHECK23-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7891// CHECK23-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 47892// CHECK23-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 07893// CHECK23-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]7894// CHECK23:       .omp.final.then:7895// CHECK23-NEXT:    store i32 100, ptr [[I]], align 47896// CHECK23-NEXT:    br label [[DOTOMP_FINAL_DONE]]7897// CHECK23:       .omp.final.done:7898// CHECK23-NEXT:    ret void7899//7900