2740 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35 T f;36 S(T a) : f(a) {}37 S() : f() {}38 operator T() { return T(); }39 ~S() {}40};41 42template <typename T>43T tmain() {44 S<T> test;45 T t_var = T();46 T vec[] = {1, 2};47 S<T> s_arr[] = {1, 2};48 S<T> &var = test;49 #pragma omp target50 #pragma omp teams51#pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)52 for (int i = 0; i < 2; ++i) {53 vec[i] = t_var;54 s_arr[i] = var;55 }56 return T();57}58 59int main() {60 static int svar;61 volatile double g;62 volatile double &g1 = g;63 64 #ifdef LAMBDA65 [&]() {66 static float sfvar;67 68 #pragma omp target69 #pragma omp teams70#pragma omp distribute simd lastprivate(g, g1, svar, sfvar)71 for (int i = 0; i < 2; ++i) {72 // loop variables73 74 // init private variables75 g = 1;76 g1 = 1;77 svar = 3;78 sfvar = 4.0;79 80 // linear counter81 82 83 84 85 [&]() {86 g = 2;87 g1 = 2;88 svar = 4;89 sfvar = 8.0;90 91 }();92 }93 }();94 return 0;95 #else96 S<float> test;97 int t_var = 0;98 int vec[] = {1, 2};99 S<float> s_arr[] = {1, 2};100 S<float> &var = test;101 102 #pragma omp target103 #pragma omp teams104#pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)105 for (int i = 0; i < 2; ++i) {106 vec[i] = t_var;107 s_arr[i] = var;108 }109 int i;110 111 return tmain<int>();112 #endif113}114 115 116// skip loop variables117 118// copy from parameters to local address variables119 120// load content of local address variables121// the distribute loop122// assignment: vec[i] = t_var;123 124// assignment: s_arr[i] = var;125 126// lastprivates127 128 129// template tmain130 131 132 133// skip alloca of global_tid and bound_tid134// skip loop variables135 136// skip init of bound and global tid137// copy from parameters to local address variables138 139// load content of local address variables140// assignment: vec[i] = t_var;141 142// assignment: s_arr[i] = var;143 144// lastprivates145 146 147#endif148// CHECK1-LABEL: define {{[^@]+}}@main149// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {150// CHECK1-NEXT: entry:151// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4152// CHECK1-NEXT: [[G:%.*]] = alloca double, align 8153// CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8154// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8155// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4156// CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8157// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0158// CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8159// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1160// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]161// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8162// CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])163// CHECK1-NEXT: ret i32 0164//165//166// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68167// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {168// CHECK1-NEXT: entry:169// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8170// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8171// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8172// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8173// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8174// CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8175// CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8176// CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8177// CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8178// CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8179// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]180// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])181// CHECK1-NEXT: ret void182//183//184// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined185// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {186// CHECK1-NEXT: entry:187// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8188// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8189// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8190// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8191// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8192// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8193// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8194// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8195// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4196// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4197// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4198// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4199// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4200// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4201// CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8202// CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8203// CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8204// CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4205// CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4206// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4207// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8208// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8209// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8210// CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8211// CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8212// CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8213// CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8214// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]215// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8, !nonnull [[META5]], !align [[META6]]216// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7:![0-9]+]]217// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8, !nonnull [[META5]], !align [[META7]]218// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8219// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]220// CHECK1-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8221// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4222// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4223// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4224// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4225// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META5]], !align [[META6]]226// CHECK1-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 8227// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8228// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4229// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)230// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4231// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1232// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]233// CHECK1: cond.true:234// CHECK1-NEXT: br label [[COND_END:%.*]]235// CHECK1: cond.false:236// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4237// CHECK1-NEXT: br label [[COND_END]]238// CHECK1: cond.end:239// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]240// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4241// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4242// CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4243// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]244// CHECK1: omp.inner.for.cond:245// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]246// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]247// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]248// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]249// CHECK1: omp.inner.for.body:250// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]251// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1252// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]253// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]254// CHECK1-NEXT: store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP8]]255// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP8]]256// CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP8]]257// CHECK1-NEXT: store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]258// CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP8]]259// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0260// CHECK1-NEXT: store ptr [[G3]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]]261// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1262// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP8]]263// CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 8, !llvm.access.group [[ACC_GRP8]]264// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2265// CHECK1-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 8, !llvm.access.group [[ACC_GRP8]]266// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3267// CHECK1-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 8, !llvm.access.group [[ACC_GRP8]]268// CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]269// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]270// CHECK1: omp.body.continue:271// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]272// CHECK1: omp.inner.for.inc:273// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]274// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1275// CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]276// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]277// CHECK1: omp.inner.for.end:278// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]279// CHECK1: omp.loop.exit:280// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])281// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4282// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0283// CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]284// CHECK1: .omp.final.then:285// CHECK1-NEXT: store i32 2, ptr [[I]], align 4286// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]287// CHECK1: .omp.final.done:288// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4289// CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0290// CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]291// CHECK1: .omp.lastprivate.then:292// CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[G3]], align 8293// CHECK1-NEXT: store volatile double [[TMP25]], ptr [[TMP0]], align 8294// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP5]], align 8295// CHECK1-NEXT: [[TMP27:%.*]] = load double, ptr [[TMP26]], align 8296// CHECK1-NEXT: store volatile double [[TMP27]], ptr [[TMP5]], align 8297// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR6]], align 4298// CHECK1-NEXT: store i32 [[TMP28]], ptr [[TMP2]], align 4299// CHECK1-NEXT: [[TMP29:%.*]] = load float, ptr [[SFVAR7]], align 4300// CHECK1-NEXT: store float [[TMP29]], ptr [[TMP3]], align 4301// CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]302// CHECK1: .omp.lastprivate.done:303// CHECK1-NEXT: ret void304//305//306// CHECK3-LABEL: define {{[^@]+}}@main307// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {308// CHECK3-NEXT: entry:309// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4310// CHECK3-NEXT: [[G:%.*]] = alloca double, align 8311// CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4312// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4313// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4314// CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4315// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0316// CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4317// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1318// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META6:![0-9]+]], !align [[META7:![0-9]+]]319// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4320// CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])321// CHECK3-NEXT: ret i32 0322//323//324// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68325// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {326// CHECK3-NEXT: entry:327// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4328// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4329// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4330// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4331// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4332// CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8333// CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8334// CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4335// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4336// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4337// CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4338// CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4339// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]340// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]341// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4342// CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8343// CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8344// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]345// CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4346// CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8347// CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4348// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]]349// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])350// CHECK3-NEXT: ret void351//352//353// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined354// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {355// CHECK3-NEXT: entry:356// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4357// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4358// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4359// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4360// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4361// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4362// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4363// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4364// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4365// CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4366// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4367// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4368// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4369// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4370// CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8371// CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8372// CHECK3-NEXT: [[_TMP5:%.*]] = alloca ptr, align 4373// CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4374// CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4375// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4376// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4377// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4378// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4379// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4380// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4381// CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4382// CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4383// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]384// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]385// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]386// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]387// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4388// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]389// CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4390// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4391// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4392// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4393// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4394// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META6]], !align [[META7]]395// CHECK3-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 4396// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4397// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4398// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)399// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4400// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1401// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]402// CHECK3: cond.true:403// CHECK3-NEXT: br label [[COND_END:%.*]]404// CHECK3: cond.false:405// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4406// CHECK3-NEXT: br label [[COND_END]]407// CHECK3: cond.end:408// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]409// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4410// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4411// CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4412// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]413// CHECK3: omp.inner.for.cond:414// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]415// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]416// CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]417// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]418// CHECK3: omp.inner.for.body:419// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]420// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1421// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]422// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]423// CHECK3-NEXT: store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP8]]424// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]425// CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP8]]426// CHECK3-NEXT: store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]427// CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP8]]428// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0429// CHECK3-NEXT: store ptr [[G3]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP8]]430// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1431// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]432// CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP8]]433// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2434// CHECK3-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP8]]435// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3436// CHECK3-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP8]]437// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]438// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]439// CHECK3: omp.body.continue:440// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]441// CHECK3: omp.inner.for.inc:442// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]443// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1444// CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]445// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]446// CHECK3: omp.inner.for.end:447// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]448// CHECK3: omp.loop.exit:449// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])450// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4451// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0452// CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]453// CHECK3: .omp.final.then:454// CHECK3-NEXT: store i32 2, ptr [[I]], align 4455// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]456// CHECK3: .omp.final.done:457// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4458// CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0459// CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]460// CHECK3: .omp.lastprivate.then:461// CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[G3]], align 8462// CHECK3-NEXT: store volatile double [[TMP25]], ptr [[TMP0]], align 8463// CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP5]], align 4464// CHECK3-NEXT: [[TMP27:%.*]] = load double, ptr [[TMP26]], align 4465// CHECK3-NEXT: store volatile double [[TMP27]], ptr [[TMP5]], align 4466// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR6]], align 4467// CHECK3-NEXT: store i32 [[TMP28]], ptr [[TMP2]], align 4468// CHECK3-NEXT: [[TMP29:%.*]] = load float, ptr [[SFVAR7]], align 4469// CHECK3-NEXT: store float [[TMP29]], ptr [[TMP3]], align 4470// CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]471// CHECK3: .omp.lastprivate.done:472// CHECK3-NEXT: ret void473//474//475// CHECK5-LABEL: define {{[^@]+}}@main476// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {477// CHECK5-NEXT: entry:478// CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4479// CHECK5-NEXT: [[G:%.*]] = alloca double, align 8480// CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8481// CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8482// CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4483// CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8484// CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0485// CHECK5-NEXT: store ptr [[G]], ptr [[TMP0]], align 8486// CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1487// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]488// CHECK5-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8489// CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])490// CHECK5-NEXT: ret i32 0491//492//493// CHECK7-LABEL: define {{[^@]+}}@main494// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {495// CHECK7-NEXT: entry:496// CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4497// CHECK7-NEXT: [[G:%.*]] = alloca double, align 8498// CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4499// CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4500// CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4501// CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4502// CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0503// CHECK7-NEXT: store ptr [[G]], ptr [[TMP0]], align 4504// CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1505// CHECK7-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]506// CHECK7-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4507// CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])508// CHECK7-NEXT: ret i32 0509//510//511// CHECK9-LABEL: define {{[^@]+}}@main512// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {513// CHECK9-NEXT: entry:514// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4515// CHECK9-NEXT: [[G:%.*]] = alloca double, align 8516// CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8517// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4518// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4519// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4520// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4521// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8522// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8523// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8524// CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8525// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8526// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8527// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8528// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4529// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8530// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4531// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4532// CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8533// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])534// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4535// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)536// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)537// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1538// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)539// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8540// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7:![0-9]+]], !align [[META8:![0-9]+]]541// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8542// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4543// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4544// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8545// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]546// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4547// CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4548// CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8549// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]550// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]551// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0552// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8553// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0554// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8555// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0556// CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8557// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1558// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8559// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1560// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8561// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1562// CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8563// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2564// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8565// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2566// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8567// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2568// CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8569// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3570// CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8571// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3572// CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8573// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3574// CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8575// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4576// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8577// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4578// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8579// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4580// CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8581// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0582// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0583// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0584// CHECK9-NEXT: store i32 3, ptr [[TMP25]], align 4585// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1586// CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4587// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2588// CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8589// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3590// CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8591// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4592// CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8593// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5594// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8595// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6596// CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8597// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7598// CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8599// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8600// CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8601// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9602// CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8603// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10604// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4605// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11606// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4607// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12608// CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4609// CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS]])610// CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0611// CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]612// CHECK9: omp_offload.failed:613// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]614// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]615// CHECK9: omp_offload.cont:616// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()617// CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4618// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0619// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2620// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]621// CHECK9: arraydestroy.body:622// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]623// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1624// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]625// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]626// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]627// CHECK9: arraydestroy.done2:628// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]629// CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4630// CHECK9-NEXT: ret i32 [[TMP41]]631//632//633// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev634// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {635// CHECK9-NEXT: entry:636// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8637// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8638// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8639// CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])640// CHECK9-NEXT: ret void641//642//643// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef644// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {645// CHECK9-NEXT: entry:646// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8647// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4648// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8649// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4650// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8651// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4652// CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])653// CHECK9-NEXT: ret void654//655//656// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102657// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {658// CHECK9-NEXT: entry:659// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8660// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8661// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8662// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8663// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8664// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8665// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8666// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8667// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8668// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8669// CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8670// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]671// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]672// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]673// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8674// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]675// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])676// CHECK9-NEXT: ret void677//678//679// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined680// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {681// CHECK9-NEXT: entry:682// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8683// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8684// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8685// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8686// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8687// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8688// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8689// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8690// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8691// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4692// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4693// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4694// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4695// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4696// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4697// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4698// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4699// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4700// CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4701// CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8702// CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4703// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4704// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8705// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8706// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8707// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8708// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8709// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8710// CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8711// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]712// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]713// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]714// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]715// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]716// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8717// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]718// CHECK9-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 8719// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4720// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4721// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4722// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4723// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0724// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2725// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]726// CHECK9: arrayctor.loop:727// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]728// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])729// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1730// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]731// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]732// CHECK9: arrayctor.cont:733// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META7]], !align [[META8]]734// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])735// CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8736// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8737// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4738// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)739// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4740// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1741// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]742// CHECK9: cond.true:743// CHECK9-NEXT: br label [[COND_END:%.*]]744// CHECK9: cond.false:745// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4746// CHECK9-NEXT: br label [[COND_END]]747// CHECK9: cond.end:748// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]749// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4750// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4751// CHECK9-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4752// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]753// CHECK9: omp.inner.for.cond:754// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]755// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]756// CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]757// CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]758// CHECK9: omp.inner.for.cond.cleanup:759// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]760// CHECK9: omp.inner.for.body:761// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]762// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1763// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]764// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]765// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP9]]766// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]767// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64768// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]769// CHECK9-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]770// CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP9]]771// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]772// CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64773// CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]774// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]775// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]776// CHECK9: omp.body.continue:777// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]778// CHECK9: omp.inner.for.inc:779// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]780// CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP19]], 1781// CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]782// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]783// CHECK9: omp.inner.for.end:784// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]785// CHECK9: omp.loop.exit:786// CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8787// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4788// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])789// CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4790// CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0791// CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]792// CHECK9: .omp.final.then:793// CHECK9-NEXT: store i32 2, ptr [[I]], align 4794// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]795// CHECK9: .omp.final.done:796// CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4797// CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0798// CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]799// CHECK9: .omp.lastprivate.then:800// CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4801// CHECK9-NEXT: store i32 [[TMP26]], ptr [[TMP0]], align 4802// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)803// CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0804// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2805// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP27]]806// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]807// CHECK9: omp.arraycpy.body:808// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]809// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]810// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)811// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1812// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1813// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]814// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]815// CHECK9: omp.arraycpy.done14:816// CHECK9-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 8817// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)818// CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[SVAR8]], align 4819// CHECK9-NEXT: store i32 [[TMP29]], ptr [[TMP4]], align 4820// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]821// CHECK9: .omp.lastprivate.done:822// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]823// CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0824// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2825// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]826// CHECK9: arraydestroy.body:827// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]828// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1829// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]830// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]831// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]832// CHECK9: arraydestroy.done16:833// CHECK9-NEXT: ret void834//835//836// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev837// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {838// CHECK9-NEXT: entry:839// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8840// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8841// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8842// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]843// CHECK9-NEXT: ret void844//845//846// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v847// CHECK9-SAME: () #[[ATTR1]] comdat {848// CHECK9-NEXT: entry:849// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4850// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4851// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4852// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4853// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4854// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8855// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8856// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8857// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8858// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8859// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8860// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4861// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8862// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])863// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4864// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)865// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)866// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1867// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)868// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8869// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7]], !align [[META8]]870// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8871// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4872// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4873// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8874// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]875// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]876// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]877// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0878// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8879// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0880// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8881// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0882// CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8883// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1884// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8885// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1886// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8887// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1888// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8889// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2890// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8891// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2892// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8893// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2894// CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8895// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3896// CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8897// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3898// CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8899// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3900// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8901// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0902// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0903// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0904// CHECK9-NEXT: store i32 3, ptr [[TMP20]], align 4905// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1906// CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4907// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2908// CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8909// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3910// CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8911// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4912// CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8913// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5914// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8915// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6916// CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8917// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7918// CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8919// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8920// CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8921// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9922// CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8923// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10924// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4925// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11926// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4927// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12928// CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4929// CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])930// CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0931// CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]932// CHECK9: omp_offload.failed:933// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]934// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]935// CHECK9: omp_offload.cont:936// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4937// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0938// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2939// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]940// CHECK9: arraydestroy.body:941// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]942// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1943// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]944// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]945// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]946// CHECK9: arraydestroy.done2:947// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]948// CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4949// CHECK9-NEXT: ret i32 [[TMP36]]950//951//952// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev953// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {954// CHECK9-NEXT: entry:955// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8956// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8957// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8958// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0959// CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4960// CHECK9-NEXT: ret void961//962//963// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef964// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {965// CHECK9-NEXT: entry:966// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8967// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4968// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8969// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4970// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8971// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0972// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4973// CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4974// CHECK9-NEXT: ret void975//976//977// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev978// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {979// CHECK9-NEXT: entry:980// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8981// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8982// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8983// CHECK9-NEXT: ret void984//985//986// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev987// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {988// CHECK9-NEXT: entry:989// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8990// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8991// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8992// CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])993// CHECK9-NEXT: ret void994//995//996// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei997// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {998// CHECK9-NEXT: entry:999// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81000// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41001// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81002// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41003// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81004// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41005// CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])1006// CHECK9-NEXT: ret void1007//1008//1009// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491010// CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1011// CHECK9-NEXT: entry:1012// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 81013// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 81014// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 81015// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 81016// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 81017// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 81018// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 81019// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81020// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 81021// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1022// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1023// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1024// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 81025// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1026// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])1027// CHECK9-NEXT: ret void1028//1029//1030// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1031// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1032// CHECK9-NEXT: entry:1033// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81034// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81035// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 81036// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 81037// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 81038// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 81039// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 81040// CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 81041// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41042// CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 41043// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41044// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41045// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41046// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41047// CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41048// CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41049// CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41050// CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41051// CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 81052// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41053// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81054// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81055// CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81056// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 81057// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81058// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 81059// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1060// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1061// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1062// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1063// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 81064// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1065// CHECK9-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 81066// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41067// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41068// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41069// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41070// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01071// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21072// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1073// CHECK9: arrayctor.loop:1074// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1075// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1076// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11077// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1078// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1079// CHECK9: arrayctor.cont:1080// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META7]], !align [[META8]]1081// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1082// CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 81083// CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81084// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41085// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1086// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41087// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11088// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1089// CHECK9: cond.true:1090// CHECK9-NEXT: br label [[COND_END:%.*]]1091// CHECK9: cond.false:1092// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41093// CHECK9-NEXT: br label [[COND_END]]1094// CHECK9: cond.end:1095// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1096// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41097// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41098// CHECK9-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41099// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1100// CHECK9: omp.inner.for.cond:1101// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1102// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1103// CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1104// CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1105// CHECK9: omp.inner.for.cond.cleanup:1106// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1107// CHECK9: omp.inner.for.body:1108// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1109// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11110// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1111// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1112// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP15]]1113// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1114// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i641115// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1116// CHECK9-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]1117// CHECK9-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP15]]1118// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1119// CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i641120// CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]1121// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP16]], i64 4, i1 false), !llvm.access.group [[ACC_GRP15]]1122// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1123// CHECK9: omp.body.continue:1124// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1125// CHECK9: omp.inner.for.inc:1126// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1127// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 11128// CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1129// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1130// CHECK9: omp.inner.for.end:1131// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1132// CHECK9: omp.loop.exit:1133// CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81134// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41135// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1136// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41137// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01138// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1139// CHECK9: .omp.final.then:1140// CHECK9-NEXT: store i32 2, ptr [[I]], align 41141// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]1142// CHECK9: .omp.final.done:1143// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41144// CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01145// CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1146// CHECK9: .omp.lastprivate.then:1147// CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 41148// CHECK9-NEXT: store i32 [[TMP25]], ptr [[TMP0]], align 41149// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)1150// CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01151// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 21152// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP26]]1153// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1154// CHECK9: omp.arraycpy.body:1155// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1156// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1157// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1158// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11159// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11160// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]1161// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]1162// CHECK9: omp.arraycpy.done13:1163// CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 81164// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i64 4, i1 false)1165// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1166// CHECK9: .omp.lastprivate.done:1167// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1168// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01169// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 21170// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1171// CHECK9: arraydestroy.body:1172// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1173// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11174// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1175// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]1176// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]1177// CHECK9: arraydestroy.done15:1178// CHECK9-NEXT: ret void1179//1180//1181// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1182// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1183// CHECK9-NEXT: entry:1184// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81185// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81186// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81187// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1188// CHECK9-NEXT: ret void1189//1190//1191// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1192// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1193// CHECK9-NEXT: entry:1194// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81195// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81196// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81197// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01198// CHECK9-NEXT: store i32 0, ptr [[F]], align 41199// CHECK9-NEXT: ret void1200//1201//1202// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1203// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1204// CHECK9-NEXT: entry:1205// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81206// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41207// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81208// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41209// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81210// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01211// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41212// CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 41213// CHECK9-NEXT: ret void1214//1215//1216// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1217// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1218// CHECK9-NEXT: entry:1219// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81220// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81221// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81222// CHECK9-NEXT: ret void1223//1224//1225// CHECK11-LABEL: define {{[^@]+}}@main1226// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1227// CHECK11-NEXT: entry:1228// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41229// CHECK11-NEXT: [[G:%.*]] = alloca double, align 81230// CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 41231// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41232// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41233// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41234// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41235// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41236// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41237// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41238// CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 41239// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41240// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41241// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41242// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41243// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81244// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41245// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41246// CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 41247// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1248// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41249// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1250// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1251// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11252// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1253// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41254// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]1255// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41256// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41257// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41258// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41259// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1260// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41261// CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41262// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41263// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1264// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1265// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01266// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 41267// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01268// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 41269// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01270// CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 41271// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11272// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 41273// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11274// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 41275// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11276// CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 41277// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21278// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 41279// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21280// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 41281// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21282// CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 41283// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31284// CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 41285// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31286// CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 41287// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31288// CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 41289// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41290// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 41291// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41292// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 41293// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41294// CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 41295// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01296// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01297// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01298// CHECK11-NEXT: store i32 3, ptr [[TMP25]], align 41299// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11300// CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 41301// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21302// CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 41303// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31304// CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 41305// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41306// CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 41307// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51308// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 41309// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61310// CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 41311// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71312// CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 41313// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81314// CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 81315// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91316// CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 81317// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101318// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 41319// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111320// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 41321// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121322// CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 41323// CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS]])1324// CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 01325// CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1326// CHECK11: omp_offload.failed:1327// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1328// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1329// CHECK11: omp_offload.cont:1330// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1331// CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41332// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01333// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21334// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1335// CHECK11: arraydestroy.body:1336// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1337// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11338// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1339// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1340// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1341// CHECK11: arraydestroy.done2:1342// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1343// CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 41344// CHECK11-NEXT: ret i32 [[TMP41]]1345//1346//1347// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1348// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1349// CHECK11-NEXT: entry:1350// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41351// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41352// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41353// CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1354// CHECK11-NEXT: ret void1355//1356//1357// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1358// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1359// CHECK11-NEXT: entry:1360// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41361// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41362// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41363// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41364// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41365// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41366// CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1367// CHECK11-NEXT: ret void1368//1369//1370// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1021371// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1372// CHECK11-NEXT: entry:1373// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41374// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41375// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41376// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41377// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 41378// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41379// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41380// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41381// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41382// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41383// CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41384// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1385// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1386// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1387// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41388// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1389// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])1390// CHECK11-NEXT: ret void1391//1392//1393// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined1394// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {1395// CHECK11-NEXT: entry:1396// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41397// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41398// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41399// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41400// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41401// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41402// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 41403// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41404// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41405// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41406// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41407// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41408// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41409// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41410// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41411// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41412// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41413// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 41414// CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 41415// CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 41416// CHECK11-NEXT: [[SVAR8:%.*]] = alloca i32, align 41417// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41418// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41419// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41420// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41421// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41422// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41423// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41424// CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 41425// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1426// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1427// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1428// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1429// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1430// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41431// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1432// CHECK11-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 41433// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41434// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41435// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41436// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41437// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01438// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21439// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1440// CHECK11: arrayctor.loop:1441// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1442// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1443// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11444// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1445// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1446// CHECK11: arrayctor.cont:1447// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META8]], !align [[META9]]1448// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1449// CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 41450// CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41451// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41452// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1453// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41454// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 11455// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1456// CHECK11: cond.true:1457// CHECK11-NEXT: br label [[COND_END:%.*]]1458// CHECK11: cond.false:1459// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41460// CHECK11-NEXT: br label [[COND_END]]1461// CHECK11: cond.end:1462// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1463// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41464// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41465// CHECK11-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41466// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1467// CHECK11: omp.inner.for.cond:1468// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1469// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]1470// CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]1471// CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1472// CHECK11: omp.inner.for.cond.cleanup:1473// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1474// CHECK11: omp.inner.for.body:1475// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1476// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 11477// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1478// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1479// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP10]]1480// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1481// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP16]]1482// CHECK11-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]1483// CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP10]]1484// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1485// CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP18]]1486// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]1487// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1488// CHECK11: omp.body.continue:1489// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1490// CHECK11: omp.inner.for.inc:1491// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1492// CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP19]], 11493// CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1494// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]1495// CHECK11: omp.inner.for.end:1496// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1497// CHECK11: omp.loop.exit:1498// CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41499// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41500// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])1501// CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41502// CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01503// CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1504// CHECK11: .omp.final.then:1505// CHECK11-NEXT: store i32 2, ptr [[I]], align 41506// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]1507// CHECK11: .omp.final.done:1508// CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41509// CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01510// CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1511// CHECK11: .omp.lastprivate.then:1512// CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 41513// CHECK11-NEXT: store i32 [[TMP26]], ptr [[TMP0]], align 41514// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)1515// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 01516// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 21517// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP27]]1518// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1519// CHECK11: omp.arraycpy.body:1520// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1521// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1522// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1523// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11524// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11525// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]1526// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]1527// CHECK11: omp.arraycpy.done13:1528// CHECK11-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 41529// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)1530// CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[SVAR8]], align 41531// CHECK11-NEXT: store i32 [[TMP29]], ptr [[TMP4]], align 41532// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1533// CHECK11: .omp.lastprivate.done:1534// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1535// CHECK11-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 01536// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i32 21537// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1538// CHECK11: arraydestroy.body:1539// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1540// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11541// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1542// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]1543// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]1544// CHECK11: arraydestroy.done15:1545// CHECK11-NEXT: ret void1546//1547//1548// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1549// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1550// CHECK11-NEXT: entry:1551// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41552// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41553// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41554// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1555// CHECK11-NEXT: ret void1556//1557//1558// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1559// CHECK11-SAME: () #[[ATTR1]] comdat {1560// CHECK11-NEXT: entry:1561// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41562// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41563// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41564// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41565// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41566// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41567// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41568// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41569// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41570// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41571// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41572// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41573// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81574// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1575// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41576// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1577// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1578// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11579// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1580// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41581// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8]], !align [[META9]]1582// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41583// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41584// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41585// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41586// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1587// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1588// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1589// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01590// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 41591// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01592// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 41593// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01594// CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 41595// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11596// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 41597// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11598// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 41599// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11600// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 41601// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21602// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 41603// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21604// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 41605// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21606// CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 41607// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31608// CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 41609// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31610// CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 41611// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31612// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 41613// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01614// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01615// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01616// CHECK11-NEXT: store i32 3, ptr [[TMP20]], align 41617// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11618// CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 41619// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21620// CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 41621// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31622// CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 41623// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41624// CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 41625// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51626// CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 41627// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61628// CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 41629// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71630// CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 41631// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81632// CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 81633// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91634// CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 81635// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101636// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 41637// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111638// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 41639// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121640// CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 41641// CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1642// CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 01643// CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1644// CHECK11: omp_offload.failed:1645// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1646// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1647// CHECK11: omp_offload.cont:1648// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41649// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01650// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21651// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1652// CHECK11: arraydestroy.body:1653// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1654// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11655// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1656// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1657// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1658// CHECK11: arraydestroy.done2:1659// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1660// CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 41661// CHECK11-NEXT: ret i32 [[TMP36]]1662//1663//1664// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1665// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1666// CHECK11-NEXT: entry:1667// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41668// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41669// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41670// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01671// CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 41672// CHECK11-NEXT: ret void1673//1674//1675// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1676// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1677// CHECK11-NEXT: entry:1678// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41679// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41680// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41681// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41682// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41683// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01684// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41685// CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 41686// CHECK11-NEXT: ret void1687//1688//1689// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1690// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1691// CHECK11-NEXT: entry:1692// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41693// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41694// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41695// CHECK11-NEXT: ret void1696//1697//1698// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1699// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1700// CHECK11-NEXT: entry:1701// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41702// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41703// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41704// CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1705// CHECK11-NEXT: ret void1706//1707//1708// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1709// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1710// CHECK11-NEXT: entry:1711// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41712// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41713// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41714// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41715// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41716// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41717// CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1718// CHECK11-NEXT: ret void1719//1720//1721// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491722// CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1723// CHECK11-NEXT: entry:1724// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41725// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41726// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41727// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41728// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41729// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41730// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41731// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41732// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41733// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1734// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1735// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1736// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41737// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1738// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])1739// CHECK11-NEXT: ret void1740//1741//1742// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1743// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1744// CHECK11-NEXT: entry:1745// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41746// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41747// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 41748// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41749// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41750// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41751// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41752// CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 41753// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41754// CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 41755// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41756// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41757// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41758// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41759// CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 41760// CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 41761// CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 41762// CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41763// CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 41764// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41765// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41766// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41767// CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 41768// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41769// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41770// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41771// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1772// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1773// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1774// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1775// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 41776// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1777// CHECK11-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 41778// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41779// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41780// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41781// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41782// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01783// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21784// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1785// CHECK11: arrayctor.loop:1786// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1787// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1788// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11789// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1790// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1791// CHECK11: arrayctor.cont:1792// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META8]], !align [[META9]]1793// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1794// CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 41795// CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41796// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41797// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1798// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41799// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11800// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1801// CHECK11: cond.true:1802// CHECK11-NEXT: br label [[COND_END:%.*]]1803// CHECK11: cond.false:1804// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41805// CHECK11-NEXT: br label [[COND_END]]1806// CHECK11: cond.end:1807// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1808// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41809// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41810// CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41811// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1812// CHECK11: omp.inner.for.cond:1813// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]1814// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]1815// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1816// CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1817// CHECK11: omp.inner.for.cond.cleanup:1818// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1819// CHECK11: omp.inner.for.body:1820// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1821// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11822// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1823// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1824// CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP16]]1825// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1826// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP15]]1827// CHECK11-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]1828// CHECK11-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP16]]1829// CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1830// CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP17]]1831// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP16]], i32 4, i1 false), !llvm.access.group [[ACC_GRP16]]1832// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1833// CHECK11: omp.body.continue:1834// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1835// CHECK11: omp.inner.for.inc:1836// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1837// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 11838// CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1839// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]1840// CHECK11: omp.inner.for.end:1841// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1842// CHECK11: omp.loop.exit:1843// CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41844// CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41845// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1846// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41847// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01848// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1849// CHECK11: .omp.final.then:1850// CHECK11-NEXT: store i32 2, ptr [[I]], align 41851// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]1852// CHECK11: .omp.final.done:1853// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41854// CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01855// CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1856// CHECK11: .omp.lastprivate.then:1857// CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 41858// CHECK11-NEXT: store i32 [[TMP25]], ptr [[TMP0]], align 41859// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)1860// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01861// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 21862// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP26]]1863// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1864// CHECK11: omp.arraycpy.body:1865// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1866// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1867// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1868// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11869// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11870// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]1871// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1872// CHECK11: omp.arraycpy.done12:1873// CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 41874// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i32 4, i1 false)1875// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1876// CHECK11: .omp.lastprivate.done:1877// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1878// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01879// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 21880// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1881// CHECK11: arraydestroy.body:1882// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1883// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11884// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1885// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1886// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1887// CHECK11: arraydestroy.done14:1888// CHECK11-NEXT: ret void1889//1890//1891// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1892// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1893// CHECK11-NEXT: entry:1894// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41895// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41896// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41897// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1898// CHECK11-NEXT: ret void1899//1900//1901// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1902// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1903// CHECK11-NEXT: entry:1904// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41905// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41906// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41907// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01908// CHECK11-NEXT: store i32 0, ptr [[F]], align 41909// CHECK11-NEXT: ret void1910//1911//1912// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1913// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1914// CHECK11-NEXT: entry:1915// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41916// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41917// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41918// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41919// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41920// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01921// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41922// CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 41923// CHECK11-NEXT: ret void1924//1925//1926// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1927// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1928// CHECK11-NEXT: entry:1929// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41930// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41931// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41932// CHECK11-NEXT: ret void1933//1934//1935// CHECK13-LABEL: define {{[^@]+}}@main1936// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {1937// CHECK13-NEXT: entry:1938// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 41939// CHECK13-NEXT: [[G:%.*]] = alloca double, align 81940// CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 81941// CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41942// CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 41943// CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41944// CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41945// CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 81946// CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 81947// CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 81948// CHECK13-NEXT: [[_TMP2:%.*]] = alloca ptr, align 81949// CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 41950// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41951// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41952// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41953// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 41954// CHECK13-NEXT: [[T_VAR4:%.*]] = alloca i32, align 41955// CHECK13-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 41956// CHECK13-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 41957// CHECK13-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S]], align 41958// CHECK13-NEXT: [[_TMP8:%.*]] = alloca ptr, align 81959// CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 41960// CHECK13-NEXT: [[I16:%.*]] = alloca i32, align 41961// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 41962// CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 81963// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1964// CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 41965// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1966// CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1967// CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11968// CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1969// CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 81970// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]1971// CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 81972// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]1973// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]1974// CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 81975// CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]1976// CHECK13-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 81977// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41978// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41979// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41980// CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41981// CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 01982// CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21983// CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1984// CHECK13: arrayctor.loop:1985// CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1986// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1987// CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11988// CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1989// CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1990// CHECK13: arrayctor.cont:1991// CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]1992// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])1993// CHECK13-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 81994// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1995// CHECK13: omp.inner.for.cond:1996// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]1997// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]1998// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1999// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2000// CHECK13: omp.inner.for.cond.cleanup:2001// CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2002// CHECK13: omp.inner.for.body:2003// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2004// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12005// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2006// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2007// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP4]]2008// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2009// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i642010// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]2011// CHECK13-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP4]]2012// CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP4]]2013// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]2014// CHECK13-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i642015// CHECK13-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]2016// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP4]]2017// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2018// CHECK13: omp.body.continue:2019// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2020// CHECK13: omp.inner.for.inc:2021// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2022// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP13]], 12023// CHECK13-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2024// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]2025// CHECK13: omp.inner.for.end:2026// CHECK13-NEXT: store i32 2, ptr [[I]], align 42027// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 42028// CHECK13-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 42029// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)2030// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02031// CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 22032// CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]2033// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2034// CHECK13: omp.arraycpy.body:2035// CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2036// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2037// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2038// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12039// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12040// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]2041// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]2042// CHECK13: omp.arraycpy.done13:2043// CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 82044// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)2045// CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 42046// CHECK13-NEXT: store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 42047// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3:[0-9]+]]2048// CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 02049// CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 22050// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2051// CHECK13: arraydestroy.body:2052// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2053// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12054// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2055// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]2056// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]2057// CHECK13: arraydestroy.done15:2058// CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()2059// CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 42060// CHECK13-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02061// CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN17]], i64 22062// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]]2063// CHECK13: arraydestroy.body18:2064// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]2065// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST19]], i64 -12066// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR3]]2067// CHECK13-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]2068// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]2069// CHECK13: arraydestroy.done22:2070// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2071// CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 42072// CHECK13-NEXT: ret i32 [[TMP20]]2073//2074//2075// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2076// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {2077// CHECK13-NEXT: entry:2078// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82079// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82080// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82081// CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2082// CHECK13-NEXT: ret void2083//2084//2085// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2086// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2087// CHECK13-NEXT: entry:2088// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82089// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 42090// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82091// CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 42092// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82093// CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42094// CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2095// CHECK13-NEXT: ret void2096//2097//2098// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2099// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2100// CHECK13-NEXT: entry:2101// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82102// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82103// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82104// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2105// CHECK13-NEXT: ret void2106//2107//2108// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2109// CHECK13-SAME: () #[[ATTR1]] comdat {2110// CHECK13-NEXT: entry:2111// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 42112// CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42113// CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 42114// CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42115// CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42116// CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 82117// CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 82118// CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 82119// CHECK13-NEXT: [[_TMP2:%.*]] = alloca ptr, align 82120// CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 42121// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42122// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42123// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42124// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 42125// CHECK13-NEXT: [[T_VAR4:%.*]] = alloca i32, align 42126// CHECK13-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 42127// CHECK13-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 42128// CHECK13-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 42129// CHECK13-NEXT: [[_TMP8:%.*]] = alloca ptr, align 82130// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2131// CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 42132// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)2133// CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)2134// CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 12135// CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)2136// CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 82137// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2138// CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 82139// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2140// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]2141// CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 82142// CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8, !nonnull [[META2]], !align [[META3]]2143// CHECK13-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 82144// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42145// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42146// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42147// CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42148// CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 02149// CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 22150// CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2151// CHECK13: arrayctor.loop:2152// CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2153// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2154// CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 12155// CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2156// CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2157// CHECK13: arrayctor.cont:2158// CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META2]], !align [[META3]]2159// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])2160// CHECK13-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 82161// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2162// CHECK13: omp.inner.for.cond:2163// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]2164// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]2165// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2166// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2167// CHECK13: omp.inner.for.cond.cleanup:2168// CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2169// CHECK13: omp.inner.for.body:2170// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2171// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12172// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2173// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2174// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP8]]2175// CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2176// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i642177// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]2178// CHECK13-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]2179// CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP8]]2180// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2181// CHECK13-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i642182// CHECK13-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]2183// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP8]]2184// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2185// CHECK13: omp.body.continue:2186// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2187// CHECK13: omp.inner.for.inc:2188// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2189// CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP13]], 12190// CHECK13-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2191// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]2192// CHECK13: omp.inner.for.end:2193// CHECK13-NEXT: store i32 2, ptr [[I]], align 42194// CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 42195// CHECK13-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 42196// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)2197// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02198// CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 22199// CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]2200// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2201// CHECK13: omp.arraycpy.body:2202// CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2203// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2204// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2205// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12206// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12207// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]2208// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]2209// CHECK13: omp.arraycpy.done13:2210// CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 82211// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)2212// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3]]2213// CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 02214// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 22215// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2216// CHECK13: arraydestroy.body:2217// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2218// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12219// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2220// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]2221// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]2222// CHECK13: arraydestroy.done15:2223// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 42224// CHECK13-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02225// CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 22226// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]]2227// CHECK13: arraydestroy.body17:2228// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]2229// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -12230// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]2231// CHECK13-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]2232// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]2233// CHECK13: arraydestroy.done21:2234// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2235// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42236// CHECK13-NEXT: ret i32 [[TMP19]]2237//2238//2239// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2240// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2241// CHECK13-NEXT: entry:2242// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82243// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82244// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82245// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02246// CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 42247// CHECK13-NEXT: ret void2248//2249//2250// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2251// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2252// CHECK13-NEXT: entry:2253// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82254// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82255// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82256// CHECK13-NEXT: ret void2257//2258//2259// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2260// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2261// CHECK13-NEXT: entry:2262// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82263// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 42264// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82265// CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 42266// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82267// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02268// CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42269// CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 42270// CHECK13-NEXT: ret void2271//2272//2273// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2274// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2275// CHECK13-NEXT: entry:2276// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82277// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82278// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82279// CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2280// CHECK13-NEXT: ret void2281//2282//2283// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2284// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2285// CHECK13-NEXT: entry:2286// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82287// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42288// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82289// CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42290// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82291// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42292// CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])2293// CHECK13-NEXT: ret void2294//2295//2296// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2297// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2298// CHECK13-NEXT: entry:2299// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82300// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82301// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82302// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2303// CHECK13-NEXT: ret void2304//2305//2306// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2307// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2308// CHECK13-NEXT: entry:2309// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82310// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82311// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82312// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02313// CHECK13-NEXT: store i32 0, ptr [[F]], align 42314// CHECK13-NEXT: ret void2315//2316//2317// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2318// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2319// CHECK13-NEXT: entry:2320// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82321// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42322// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82323// CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42324// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82325// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02326// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42327// CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 42328// CHECK13-NEXT: ret void2329//2330//2331// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2332// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2333// CHECK13-NEXT: entry:2334// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82335// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82336// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82337// CHECK13-NEXT: ret void2338//2339//2340// CHECK15-LABEL: define {{[^@]+}}@main2341// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2342// CHECK15-NEXT: entry:2343// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 42344// CHECK15-NEXT: [[G:%.*]] = alloca double, align 82345// CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 42346// CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42347// CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 42348// CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42349// CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42350// CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 42351// CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 42352// CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 42353// CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 42354// CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 42355// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42356// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42357// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42358// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 42359// CHECK15-NEXT: [[T_VAR4:%.*]] = alloca i32, align 42360// CHECK15-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 42361// CHECK15-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 42362// CHECK15-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S]], align 42363// CHECK15-NEXT: [[_TMP8:%.*]] = alloca ptr, align 42364// CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 42365// CHECK15-NEXT: [[I15:%.*]] = alloca i32, align 42366// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 42367// CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 42368// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2369// CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 42370// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)2371// CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2372// CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 12373// CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2374// CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 42375// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]2376// CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 42377// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2378// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2379// CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 42380// CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]2381// CHECK15-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 42382// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42383// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42384// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42385// CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42386// CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 02387// CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22388// CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2389// CHECK15: arrayctor.loop:2390// CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2391// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2392// CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12393// CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2394// CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2395// CHECK15: arrayctor.cont:2396// CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META3]], !align [[META4]]2397// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])2398// CHECK15-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 42399// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2400// CHECK15: omp.inner.for.cond:2401// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]2402// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]2403// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2404// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2405// CHECK15: omp.inner.for.cond.cleanup:2406// CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2407// CHECK15: omp.inner.for.body:2408// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2409// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12410// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2411// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2412// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP5]]2413// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2414// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]2415// CHECK15-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]2416// CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP5]]2417// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2418// CHECK15-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]2419// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP5]]2420// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2421// CHECK15: omp.body.continue:2422// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2423// CHECK15: omp.inner.for.inc:2424// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2425// CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP13]], 12426// CHECK15-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2427// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]2428// CHECK15: omp.inner.for.end:2429// CHECK15-NEXT: store i32 2, ptr [[I]], align 42430// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 42431// CHECK15-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 42432// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)2433// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02434// CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 22435// CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]2436// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2437// CHECK15: omp.arraycpy.body:2438// CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2439// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2440// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2441// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12442// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12443// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]2444// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]2445// CHECK15: omp.arraycpy.done12:2446// CHECK15-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 42447// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)2448// CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 42449// CHECK15-NEXT: store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 42450// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3:[0-9]+]]2451// CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 02452// CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 22453// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2454// CHECK15: arraydestroy.body:2455// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2456// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12457// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2458// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]2459// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]2460// CHECK15: arraydestroy.done14:2461// CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2462// CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 42463// CHECK15-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02464// CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i32 22465// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]]2466// CHECK15: arraydestroy.body17:2467// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]2468// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i32 -12469// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]2470// CHECK15-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]2471// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]2472// CHECK15: arraydestroy.done21:2473// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2474// CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 42475// CHECK15-NEXT: ret i32 [[TMP20]]2476//2477//2478// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2479// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {2480// CHECK15-NEXT: entry:2481// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42482// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42483// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42484// CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2485// CHECK15-NEXT: ret void2486//2487//2488// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2489// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2490// CHECK15-NEXT: entry:2491// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42492// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 42493// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42494// CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 42495// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42496// CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42497// CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2498// CHECK15-NEXT: ret void2499//2500//2501// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2502// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2503// CHECK15-NEXT: entry:2504// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42505// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42506// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42507// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2508// CHECK15-NEXT: ret void2509//2510//2511// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2512// CHECK15-SAME: () #[[ATTR1]] comdat {2513// CHECK15-NEXT: entry:2514// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 42515// CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42516// CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 42517// CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42518// CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42519// CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 42520// CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 42521// CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 42522// CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 42523// CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 42524// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42525// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42526// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42527// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 42528// CHECK15-NEXT: [[T_VAR4:%.*]] = alloca i32, align 42529// CHECK15-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 42530// CHECK15-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 42531// CHECK15-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 42532// CHECK15-NEXT: [[_TMP8:%.*]] = alloca ptr, align 42533// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2534// CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 42535// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2536// CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2537// CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12538// CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2539// CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 42540// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2541// CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 42542// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2543// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2544// CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 42545// CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4, !nonnull [[META3]], !align [[META4]]2546// CHECK15-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 42547// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42548// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42549// CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42550// CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42551// CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 02552// CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22553// CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2554// CHECK15: arrayctor.loop:2555// CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2556// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2557// CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12558// CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2559// CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2560// CHECK15: arrayctor.cont:2561// CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META3]], !align [[META4]]2562// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])2563// CHECK15-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 42564// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2565// CHECK15: omp.inner.for.cond:2566// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]2567// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]2568// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2569// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2570// CHECK15: omp.inner.for.cond.cleanup:2571// CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2572// CHECK15: omp.inner.for.body:2573// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2574// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12575// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2576// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2577// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP9]]2578// CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2579// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]2580// CHECK15-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]2581// CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP9]]2582// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2583// CHECK15-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]2584// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP9]]2585// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2586// CHECK15: omp.body.continue:2587// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2588// CHECK15: omp.inner.for.inc:2589// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2590// CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP13]], 12591// CHECK15-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2592// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]2593// CHECK15: omp.inner.for.end:2594// CHECK15-NEXT: store i32 2, ptr [[I]], align 42595// CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 42596// CHECK15-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 42597// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)2598// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02599// CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 22600// CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]2601// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2602// CHECK15: omp.arraycpy.body:2603// CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2604// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2605// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2606// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12607// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12608// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]2609// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]2610// CHECK15: omp.arraycpy.done12:2611// CHECK15-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 42612// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)2613// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR3]]2614// CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 02615// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 22616// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2617// CHECK15: arraydestroy.body:2618// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2619// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12620// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2621// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]2622// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]2623// CHECK15: arraydestroy.done14:2624// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 42625// CHECK15-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02626// CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i32 22627// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]]2628// CHECK15: arraydestroy.body16:2629// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]2630// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -12631// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]2632// CHECK15-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]2633// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]2634// CHECK15: arraydestroy.done20:2635// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2636// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42637// CHECK15-NEXT: ret i32 [[TMP19]]2638//2639//2640// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2641// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2642// CHECK15-NEXT: entry:2643// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42644// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42645// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42646// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02647// CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 42648// CHECK15-NEXT: ret void2649//2650//2651// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2652// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2653// CHECK15-NEXT: entry:2654// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42655// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42656// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42657// CHECK15-NEXT: ret void2658//2659//2660// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2661// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2662// CHECK15-NEXT: entry:2663// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42664// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 42665// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42666// CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 42667// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42668// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02669// CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42670// CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 42671// CHECK15-NEXT: ret void2672//2673//2674// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2675// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2676// CHECK15-NEXT: entry:2677// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42678// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42679// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42680// CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2681// CHECK15-NEXT: ret void2682//2683//2684// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2685// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2686// CHECK15-NEXT: entry:2687// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42688// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42689// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42690// CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42691// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42692// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42693// CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2694// CHECK15-NEXT: ret void2695//2696//2697// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2698// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2699// CHECK15-NEXT: entry:2700// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42701// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42702// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42703// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2704// CHECK15-NEXT: ret void2705//2706//2707// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2708// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2709// CHECK15-NEXT: entry:2710// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42711// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42712// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42713// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02714// CHECK15-NEXT: store i32 0, ptr [[F]], align 42715// CHECK15-NEXT: ret void2716//2717//2718// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2719// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2720// CHECK15-NEXT: entry:2721// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42722// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42723// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42724// CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42725// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42726// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02727// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42728// CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 42729// CHECK15-NEXT: ret void2730//2731//2732// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2733// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2734// CHECK15-NEXT: entry:2735// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42736// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42737// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42738// CHECK15-NEXT: ret void2739//2740