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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target50  #pragma omp teams51#pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var)52  for (int i = 0; i < 2; ++i) {53    vec[i] = t_var;54    s_arr[i] = var;55  }56  return T();57}58 59int main() {60  static int svar;61  volatile double g;62  volatile double &g1 = g;63 64  #ifdef LAMBDA65  [&]() {66    static float sfvar;67 68    #pragma omp target69    #pragma omp teams70#pragma omp distribute simd private(g, g1, svar, sfvar)71    for (int i = 0; i < 2; ++i) {72      g = 1;73      g1 = 1;74      svar = 3;75      sfvar = 4.0;76      [&]() {77	g = 2;78	g1 = 2;79	svar = 4;80	sfvar = 8.0;81 82      }();83    }84  }();85  return 0;86  #else87  S<float> test;88  int t_var = 0;89  int vec[] = {1, 2};90  S<float> s_arr[] = {1, 2};91  S<float> &var = test;92 93  #pragma omp target94  #pragma omp teams95#pragma omp distribute simd private(t_var, vec, s_arr, s_arr, var, var, svar)96  for (int i = 0; i < 2; ++i) {97    vec[i] = t_var;98    s_arr[i] = var;99  }100  int i;101 102  #pragma omp target103  #pragma omp teams104#pragma omp distribute simd105  for (i = 0; i < 2; ++i) {106    ;107  }108  return tmain<int>();109  #endif110}111 112 113 114 115 116 117#endif118// CHECK1-LABEL: define {{[^@]+}}@main119// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {120// CHECK1-NEXT:  entry:121// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4122// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8123// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8124// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1125// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4126// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8127// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])128// CHECK1-NEXT:    ret i32 0129//130//131// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68132// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {133// CHECK1-NEXT:  entry:134// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)135// CHECK1-NEXT:    ret void136//137//138// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined139// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {140// CHECK1-NEXT:  entry:141// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8142// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8143// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4144// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4145// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8146// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4147// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4148// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4149// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4150// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8151// CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8152// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8153// CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4154// CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4155// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4156// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8157// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8158// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8159// CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8160// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4161// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4162// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4163// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4164// CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 8165// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8166// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4167// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)168// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4169// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1170// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]171// CHECK1:       cond.true:172// CHECK1-NEXT:    br label [[COND_END:%.*]]173// CHECK1:       cond.false:174// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4175// CHECK1-NEXT:    br label [[COND_END]]176// CHECK1:       cond.end:177// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]178// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4179// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4180// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4181// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]182// CHECK1:       omp.inner.for.cond:183// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]184// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]185// CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]186// CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]187// CHECK1:       omp.inner.for.body:188// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]189// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1190// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]191// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]192// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP5]]193// CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META6:![0-9]+]], !align [[META7:![0-9]+]], !llvm.access.group [[ACC_GRP5]]194// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP8]], align 8, !llvm.access.group [[ACC_GRP5]]195// CHECK1-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP5]]196// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP5]]197// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0198// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP9]], align 8, !llvm.access.group [[ACC_GRP5]]199// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1200// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP5]]201// CHECK1-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP5]]202// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2203// CHECK1-NEXT:    store ptr [[SVAR]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP5]]204// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3205// CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP5]]206// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP5]]207// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]208// CHECK1:       omp.body.continue:209// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]210// CHECK1:       omp.inner.for.inc:211// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]212// CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1213// CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]214// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]215// CHECK1:       omp.inner.for.end:216// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]217// CHECK1:       omp.loop.exit:218// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])219// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4220// CHECK1-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0221// CHECK1-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]222// CHECK1:       .omp.final.then:223// CHECK1-NEXT:    store i32 2, ptr [[I]], align 4224// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]225// CHECK1:       .omp.final.done:226// CHECK1-NEXT:    ret void227//228//229// CHECK3-LABEL: define {{[^@]+}}@main230// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {231// CHECK3-NEXT:  entry:232// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4233// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8234// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4235// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1236// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4237// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4238// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])239// CHECK3-NEXT:    ret i32 0240//241//242// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68243// CHECK3-SAME: () #[[ATTR2:[0-9]+]] {244// CHECK3-NEXT:  entry:245// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)246// CHECK3-NEXT:    ret void247//248//249// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined250// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {251// CHECK3-NEXT:  entry:252// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4253// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4254// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4255// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4256// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4257// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4258// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4259// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4260// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4261// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8262// CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8263// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4264// CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4265// CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4266// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4267// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4268// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4269// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4270// CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4271// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4272// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4273// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4274// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4275// CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4276// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4277// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4278// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)279// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4280// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1281// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]282// CHECK3:       cond.true:283// CHECK3-NEXT:    br label [[COND_END:%.*]]284// CHECK3:       cond.false:285// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4286// CHECK3-NEXT:    br label [[COND_END]]287// CHECK3:       cond.end:288// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]289// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4290// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4291// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4292// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]293// CHECK3:       omp.inner.for.cond:294// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]295// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]296// CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]297// CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]298// CHECK3:       omp.inner.for.body:299// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]300// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1301// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]302// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]303// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP6]]304// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META7:![0-9]+]], !align [[META8:![0-9]+]], !llvm.access.group [[ACC_GRP6]]305// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP8]], align 4, !llvm.access.group [[ACC_GRP6]]306// CHECK3-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP6]]307// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP6]]308// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0309// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP9]], align 4, !llvm.access.group [[ACC_GRP6]]310// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1311// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP6]]312// CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP6]]313// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2314// CHECK3-NEXT:    store ptr [[SVAR]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP6]]315// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3316// CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP6]]317// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP6]]318// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]319// CHECK3:       omp.body.continue:320// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]321// CHECK3:       omp.inner.for.inc:322// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]323// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1324// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]325// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]326// CHECK3:       omp.inner.for.end:327// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]328// CHECK3:       omp.loop.exit:329// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])330// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4331// CHECK3-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0332// CHECK3-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]333// CHECK3:       .omp.final.then:334// CHECK3-NEXT:    store i32 2, ptr [[I]], align 4335// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]336// CHECK3:       .omp.final.done:337// CHECK3-NEXT:    ret void338//339//340// CHECK5-LABEL: define {{[^@]+}}@main341// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {342// CHECK5-NEXT:  entry:343// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4344// CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8345// CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8346// CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1347// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4348// CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8349// CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])350// CHECK5-NEXT:    ret i32 0351//352//353// CHECK7-LABEL: define {{[^@]+}}@main354// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {355// CHECK7-NEXT:  entry:356// CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4357// CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8358// CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4359// CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1360// CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4361// CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4362// CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])363// CHECK7-NEXT:    ret i32 0364//365//366// CHECK9-LABEL: define {{[^@]+}}@main367// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {368// CHECK9-NEXT:  entry:369// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4370// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8371// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8372// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4373// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4374// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4375// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4376// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8377// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4378// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8379// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8380// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4381// CHECK9-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8382// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8383// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8384// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8385// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4386// CHECK9-NEXT:    [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8387// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4388// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8389// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])390// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4391// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)392// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)393// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1394// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)395// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8396// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8397// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0398// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4399// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1400// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4401// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2402// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8403// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3404// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8405// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4406// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8407// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5408// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8409// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6410// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8411// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7412// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8413// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8414// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8415// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9416// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8417// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10418// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4419// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11420// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4421// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12422// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4423// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]])424// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0425// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]426// CHECK9:       omp_offload.failed:427// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]]428// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]429// CHECK9:       omp_offload.cont:430// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4431// CHECK9-NEXT:    store i32 [[TMP15]], ptr [[I_CASTED]], align 4432// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[I_CASTED]], align 8433// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0434// CHECK9-NEXT:    store i64 [[TMP16]], ptr [[TMP17]], align 8435// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0436// CHECK9-NEXT:    store i64 [[TMP16]], ptr [[TMP18]], align 8437// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0438// CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8439// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0440// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0441// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 0442// CHECK9-NEXT:    store i32 3, ptr [[TMP22]], align 4443// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 1444// CHECK9-NEXT:    store i32 1, ptr [[TMP23]], align 4445// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 2446// CHECK9-NEXT:    store ptr [[TMP20]], ptr [[TMP24]], align 8447// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 3448// CHECK9-NEXT:    store ptr [[TMP21]], ptr [[TMP25]], align 8449// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 4450// CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP26]], align 8451// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 5452// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP27]], align 8453// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 6454// CHECK9-NEXT:    store ptr null, ptr [[TMP28]], align 8455// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 7456// CHECK9-NEXT:    store ptr null, ptr [[TMP29]], align 8457// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 8458// CHECK9-NEXT:    store i64 2, ptr [[TMP30]], align 8459// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 9460// CHECK9-NEXT:    store i64 0, ptr [[TMP31]], align 8461// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 10462// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP32]], align 4463// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 11464// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 4465// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 12466// CHECK9-NEXT:    store i32 0, ptr [[TMP34]], align 4467// CHECK9-NEXT:    [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]])468// CHECK9-NEXT:    [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0469// CHECK9-NEXT:    br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]]470// CHECK9:       omp_offload.failed4:471// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP16]]) #[[ATTR4]]472// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT5]]473// CHECK9:       omp_offload.cont5:474// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()475// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4476// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0477// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2478// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]479// CHECK9:       arraydestroy.body:480// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP37]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]481// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1482// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]483// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]484// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]485// CHECK9:       arraydestroy.done6:486// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]487// CHECK9-NEXT:    [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4488// CHECK9-NEXT:    ret i32 [[TMP38]]489//490//491// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev492// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {493// CHECK9-NEXT:  entry:494// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8495// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8496// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8497// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])498// CHECK9-NEXT:    ret void499//500//501// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef502// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {503// CHECK9-NEXT:  entry:504// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8505// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4506// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8507// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4508// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8509// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4510// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])511// CHECK9-NEXT:    ret void512//513//514// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93515// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {516// CHECK9-NEXT:  entry:517// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined)518// CHECK9-NEXT:    ret void519//520//521// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined522// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {523// CHECK9-NEXT:  entry:524// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8525// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8526// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4527// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4528// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8529// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4530// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4531// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4532// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4533// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4534// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4535// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4536// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4537// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8538// CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4539// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4540// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8541// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8542// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8543// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4544// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4545// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4546// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4547// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0548// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2549// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]550// CHECK9:       arrayctor.loop:551// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]552// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])553// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1554// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]555// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]556// CHECK9:       arrayctor.cont:557// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])558// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8559// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8560// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4561// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)562// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4563// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1564// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]565// CHECK9:       cond.true:566// CHECK9-NEXT:    br label [[COND_END:%.*]]567// CHECK9:       cond.false:568// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4569// CHECK9-NEXT:    br label [[COND_END]]570// CHECK9:       cond.end:571// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]572// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4573// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4574// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4575// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]576// CHECK9:       omp.inner.for.cond:577// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]578// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]579// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]580// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]581// CHECK9:       omp.inner.for.cond.cleanup:582// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]583// CHECK9:       omp.inner.for.body:584// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]585// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1586// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]587// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]588// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP9]]589// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]590// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64591// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]592// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]593// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META10:![0-9]+]], !align [[META11:![0-9]+]], !llvm.access.group [[ACC_GRP9]]594// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]595// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64596// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]]597// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]598// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]599// CHECK9:       omp.body.continue:600// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]601// CHECK9:       omp.inner.for.inc:602// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]603// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1604// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]605// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]606// CHECK9:       omp.inner.for.end:607// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]608// CHECK9:       omp.loop.exit:609// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8610// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4611// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])612// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4613// CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0614// CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]615// CHECK9:       .omp.final.then:616// CHECK9-NEXT:    store i32 2, ptr [[I]], align 4617// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]618// CHECK9:       .omp.final.done:619// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]620// CHECK9-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0621// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 2622// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]623// CHECK9:       arraydestroy.body:624// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]625// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1626// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]627// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]628// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]629// CHECK9:       arraydestroy.done8:630// CHECK9-NEXT:    ret void631//632//633// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev634// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {635// CHECK9-NEXT:  entry:636// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8637// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8638// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8639// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]640// CHECK9-NEXT:    ret void641//642//643// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102644// CHECK9-SAME: (i64 noundef [[I:%.*]]) #[[ATTR3]] {645// CHECK9-NEXT:  entry:646// CHECK9-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8647// CHECK9-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8648// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[I_ADDR]])649// CHECK9-NEXT:    ret void650//651//652// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined653// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] {654// CHECK9-NEXT:  entry:655// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8656// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8657// CHECK9-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 8658// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4659// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4660// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4661// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4662// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4663// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4664// CHECK9-NEXT:    [[I1:%.*]] = alloca i32, align 4665// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8666// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8667// CHECK9-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 8668// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8, !nonnull [[META10]], !align [[META11]]669// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4670// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4671// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4672// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4673// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8674// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4675// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)676// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4677// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1678// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]679// CHECK9:       cond.true:680// CHECK9-NEXT:    br label [[COND_END:%.*]]681// CHECK9:       cond.false:682// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4683// CHECK9-NEXT:    br label [[COND_END]]684// CHECK9:       cond.end:685// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]686// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4687// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4688// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4689// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]690// CHECK9:       omp.inner.for.cond:691// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]692// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]693// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]694// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]695// CHECK9:       omp.inner.for.body:696// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]697// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1698// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]699// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I1]], align 4, !llvm.access.group [[ACC_GRP17]]700// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]701// CHECK9:       omp.body.continue:702// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]703// CHECK9:       omp.inner.for.inc:704// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]705// CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1706// CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]707// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]708// CHECK9:       omp.inner.for.end:709// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]710// CHECK9:       omp.loop.exit:711// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])712// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4713// CHECK9-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0714// CHECK9-NEXT:    br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]715// CHECK9:       .omp.final.then:716// CHECK9-NEXT:    store i32 2, ptr [[TMP0]], align 4717// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]718// CHECK9:       .omp.final.done:719// CHECK9-NEXT:    ret void720//721//722// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v723// CHECK9-SAME: () #[[ATTR1]] comdat {724// CHECK9-NEXT:  entry:725// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4726// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4727// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4728// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4729// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4730// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8731// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4732// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8733// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8734// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])735// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4736// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)737// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)738// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1739// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)740// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8741// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8742// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0743// CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4744// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1745// CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4746// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2747// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8748// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3749// CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8750// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4751// CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8752// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5753// CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8754// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6755// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8756// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7757// CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8758// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8759// CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8760// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9761// CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8762// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10763// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4764// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11765// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 4766// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12767// CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4768// CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])769// CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0770// CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]771// CHECK9:       omp_offload.failed:772// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]773// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]774// CHECK9:       omp_offload.cont:775// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4776// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0777// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2778// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]779// CHECK9:       arraydestroy.body:780// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]781// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1782// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]783// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]784// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]785// CHECK9:       arraydestroy.done2:786// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]787// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4788// CHECK9-NEXT:    ret i32 [[TMP16]]789//790//791// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev792// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {793// CHECK9-NEXT:  entry:794// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8795// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8796// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8797// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0798// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4799// CHECK9-NEXT:    ret void800//801//802// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef803// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {804// CHECK9-NEXT:  entry:805// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8806// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4807// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8808// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4809// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8810// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0811// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4812// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4813// CHECK9-NEXT:    ret void814//815//816// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev817// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {818// CHECK9-NEXT:  entry:819// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8820// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8821// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8822// CHECK9-NEXT:    ret void823//824//825// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev826// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {827// CHECK9-NEXT:  entry:828// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8829// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8830// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8831// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])832// CHECK9-NEXT:    ret void833//834//835// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei836// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {837// CHECK9-NEXT:  entry:838// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8839// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4840// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8841// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4842// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8843// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4844// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])845// CHECK9-NEXT:    ret void846//847//848// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49849// CHECK9-SAME: () #[[ATTR3]] {850// CHECK9-NEXT:  entry:851// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)852// CHECK9-NEXT:    ret void853//854//855// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined856// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {857// CHECK9-NEXT:  entry:858// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8859// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8860// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4861// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4862// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8863// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4864// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4865// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4866// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4867// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4868// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4869// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4870// CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4871// CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8872// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4873// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8874// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8875// CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8876// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4877// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4878// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4879// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4880// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0881// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2882// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]883// CHECK9:       arrayctor.loop:884// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]885// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])886// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1887// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]888// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]889// CHECK9:       arrayctor.cont:890// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])891// CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8892// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8893// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4894// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)895// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4896// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1897// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]898// CHECK9:       cond.true:899// CHECK9-NEXT:    br label [[COND_END:%.*]]900// CHECK9:       cond.false:901// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4902// CHECK9-NEXT:    br label [[COND_END]]903// CHECK9:       cond.end:904// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]905// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4906// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4907// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4908// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]909// CHECK9:       omp.inner.for.cond:910// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]911// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP20]]912// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]913// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]914// CHECK9:       omp.inner.for.cond.cleanup:915// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]916// CHECK9:       omp.inner.for.body:917// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]918// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1919// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]920// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]921// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP20]]922// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]923// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64924// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]925// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP20]]926// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 8, !nonnull [[META10]], !align [[META11]], !llvm.access.group [[ACC_GRP20]]927// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP20]]928// CHECK9-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64929// CHECK9-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM4]]930// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX5]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP20]]931// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]932// CHECK9:       omp.body.continue:933// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]934// CHECK9:       omp.inner.for.inc:935// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]936// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1937// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]938// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]939// CHECK9:       omp.inner.for.end:940// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]941// CHECK9:       omp.loop.exit:942// CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8943// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4944// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])945// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4946// CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0947// CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]948// CHECK9:       .omp.final.then:949// CHECK9-NEXT:    store i32 2, ptr [[I]], align 4950// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]951// CHECK9:       .omp.final.done:952// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]953// CHECK9-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0954// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN7]], i64 2955// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]956// CHECK9:       arraydestroy.body:957// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]958// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1959// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]960// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]961// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]962// CHECK9:       arraydestroy.done8:963// CHECK9-NEXT:    ret void964//965//966// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev967// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {968// CHECK9-NEXT:  entry:969// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8970// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8971// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8972// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]973// CHECK9-NEXT:    ret void974//975//976// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev977// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {978// CHECK9-NEXT:  entry:979// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8980// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8981// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8982// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0983// CHECK9-NEXT:    store i32 0, ptr [[F]], align 4984// CHECK9-NEXT:    ret void985//986//987// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei988// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {989// CHECK9-NEXT:  entry:990// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8991// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4992// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8993// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4994// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8995// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0996// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4997// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4998// CHECK9-NEXT:    ret void999//1000//1001// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1002// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1003// CHECK9-NEXT:  entry:1004// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81005// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81006// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81007// CHECK9-NEXT:    ret void1008//1009//1010// CHECK11-LABEL: define {{[^@]+}}@main1011// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1012// CHECK11-NEXT:  entry:1013// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41014// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 81015// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 41016// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41017// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41018// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41019// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41020// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41021// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41022// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41023// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81024// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41025// CHECK11-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 41026// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41027// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41028// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41029// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41030// CHECK11-NEXT:    [[KERNEL_ARGS3:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81031// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41032// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 41033// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1034// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41035// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1036// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1037// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11038// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1039// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41040// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41041// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01042// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 41043// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11044// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 41045// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21046// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41047// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31048// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 41049// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41050// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 41051// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51052// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 41053// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61054// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41055// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71056// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 41057// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81058// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 81059// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91060// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 81061// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101062// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41063// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111064// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 41065// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121066// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 41067// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.region_id, ptr [[KERNEL_ARGS]])1068// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01069// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1070// CHECK11:       omp_offload.failed:1071// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93() #[[ATTR4:[0-9]+]]1072// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1073// CHECK11:       omp_offload.cont:1074// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 41075// CHECK11-NEXT:    store i32 [[TMP15]], ptr [[I_CASTED]], align 41076// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I_CASTED]], align 41077// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01078// CHECK11-NEXT:    store i32 [[TMP16]], ptr [[TMP17]], align 41079// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01080// CHECK11-NEXT:    store i32 [[TMP16]], ptr [[TMP18]], align 41081// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01082// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 41083// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01084// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01085// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 01086// CHECK11-NEXT:    store i32 3, ptr [[TMP22]], align 41087// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 11088// CHECK11-NEXT:    store i32 1, ptr [[TMP23]], align 41089// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 21090// CHECK11-NEXT:    store ptr [[TMP20]], ptr [[TMP24]], align 41091// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 31092// CHECK11-NEXT:    store ptr [[TMP21]], ptr [[TMP25]], align 41093// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 41094// CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP26]], align 41095// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 51096// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP27]], align 41097// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 61098// CHECK11-NEXT:    store ptr null, ptr [[TMP28]], align 41099// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 71100// CHECK11-NEXT:    store ptr null, ptr [[TMP29]], align 41101// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 81102// CHECK11-NEXT:    store i64 2, ptr [[TMP30]], align 81103// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 91104// CHECK11-NEXT:    store i64 0, ptr [[TMP31]], align 81105// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 101106// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP32]], align 41107// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 111108// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP33]], align 41109// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS3]], i32 0, i32 121110// CHECK11-NEXT:    store i32 0, ptr [[TMP34]], align 41111// CHECK11-NEXT:    [[TMP35:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS3]])1112// CHECK11-NEXT:    [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 01113// CHECK11-NEXT:    br i1 [[TMP36]], label [[OMP_OFFLOAD_FAILED4:%.*]], label [[OMP_OFFLOAD_CONT5:%.*]]1114// CHECK11:       omp_offload.failed4:1115// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP16]]) #[[ATTR4]]1116// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT5]]1117// CHECK11:       omp_offload.cont5:1118// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1119// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41120// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01121// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21122// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1123// CHECK11:       arraydestroy.body:1124// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP37]], [[OMP_OFFLOAD_CONT5]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1125// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11126// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1127// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1128// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE6:%.*]], label [[ARRAYDESTROY_BODY]]1129// CHECK11:       arraydestroy.done6:1130// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1131// CHECK11-NEXT:    [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 41132// CHECK11-NEXT:    ret i32 [[TMP38]]1133//1134//1135// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1136// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1137// CHECK11-NEXT:  entry:1138// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41139// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41140// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41141// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1142// CHECK11-NEXT:    ret void1143//1144//1145// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1146// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1147// CHECK11-NEXT:  entry:1148// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41149// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41150// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41151// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41152// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41153// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41154// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1155// CHECK11-NEXT:    ret void1156//1157//1158// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l931159// CHECK11-SAME: () #[[ATTR3:[0-9]+]] {1160// CHECK11-NEXT:  entry:1161// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined)1162// CHECK11-NEXT:    ret void1163//1164//1165// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l93.omp_outlined1166// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1167// CHECK11-NEXT:  entry:1168// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41169// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41170// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41171// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41172// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41173// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41174// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41175// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41176// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41177// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41178// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41179// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41180// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 41181// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41182// CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 41183// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41184// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41185// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41186// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41187// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41188// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41189// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41190// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41191// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01192// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21193// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1194// CHECK11:       arrayctor.loop:1195// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1196// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1197// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11198// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1199// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1200// CHECK11:       arrayctor.cont:1201// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1202// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41203// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41204// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41205// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1206// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41207// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11208// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1209// CHECK11:       cond.true:1210// CHECK11-NEXT:    br label [[COND_END:%.*]]1211// CHECK11:       cond.false:1212// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41213// CHECK11-NEXT:    br label [[COND_END]]1214// CHECK11:       cond.end:1215// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1216// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41217// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41218// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41219// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1220// CHECK11:       omp.inner.for.cond:1221// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1222// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]1223// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1224// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1225// CHECK11:       omp.inner.for.cond.cleanup:1226// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1227// CHECK11:       omp.inner.for.body:1228// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1229// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11230// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1231// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1232// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP10]]1233// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1234// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]1235// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]1236// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META11:![0-9]+]], !align [[META12:![0-9]+]], !llvm.access.group [[ACC_GRP10]]1237// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1238// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP11]]1239// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]1240// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1241// CHECK11:       omp.body.continue:1242// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1243// CHECK11:       omp.inner.for.inc:1244// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1245// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 11246// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1247// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]1248// CHECK11:       omp.inner.for.end:1249// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1250// CHECK11:       omp.loop.exit:1251// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41252// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41253// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1254// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41255// CHECK11-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 01256// CHECK11-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1257// CHECK11:       .omp.final.then:1258// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41259// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1260// CHECK11:       .omp.final.done:1261// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1262// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01263// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 21264// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1265// CHECK11:       arraydestroy.body:1266// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1267// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11268// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1269// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1270// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1271// CHECK11:       arraydestroy.done7:1272// CHECK11-NEXT:    ret void1273//1274//1275// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1276// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1277// CHECK11-NEXT:  entry:1278// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41279// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41280// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41281// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1282// CHECK11-NEXT:    ret void1283//1284//1285// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1021286// CHECK11-SAME: (i32 noundef [[I:%.*]]) #[[ATTR3]] {1287// CHECK11-NEXT:  entry:1288// CHECK11-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 41289// CHECK11-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 41290// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[I_ADDR]])1291// CHECK11-NEXT:    ret void1292//1293//1294// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined1295// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR3]] {1296// CHECK11-NEXT:  entry:1297// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41298// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41299// CHECK11-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 41300// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41301// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41302// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41303// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41304// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41305// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41306// CHECK11-NEXT:    [[I1:%.*]] = alloca i32, align 41307// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41308// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41309// CHECK11-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 41310// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4, !nonnull [[META11]], !align [[META12]]1311// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41312// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41313// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41314// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41315// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41316// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41317// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1318// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41319// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11320// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1321// CHECK11:       cond.true:1322// CHECK11-NEXT:    br label [[COND_END:%.*]]1323// CHECK11:       cond.false:1324// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41325// CHECK11-NEXT:    br label [[COND_END]]1326// CHECK11:       cond.end:1327// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1328// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41329// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41330// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41331// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1332// CHECK11:       omp.inner.for.cond:1333// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1334// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1335// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1336// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1337// CHECK11:       omp.inner.for.body:1338// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1339// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11340// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1341// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I1]], align 4, !llvm.access.group [[ACC_GRP18]]1342// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1343// CHECK11:       omp.body.continue:1344// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1345// CHECK11:       omp.inner.for.inc:1346// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1347// CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 11348// CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1349// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1350// CHECK11:       omp.inner.for.end:1351// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1352// CHECK11:       omp.loop.exit:1353// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1354// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41355// CHECK11-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 01356// CHECK11-NEXT:    br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1357// CHECK11:       .omp.final.then:1358// CHECK11-NEXT:    store i32 2, ptr [[TMP0]], align 41359// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1360// CHECK11:       .omp.final.done:1361// CHECK11-NEXT:    ret void1362//1363//1364// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1365// CHECK11-SAME: () #[[ATTR1]] comdat {1366// CHECK11-NEXT:  entry:1367// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41368// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41369// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41370// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41371// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41372// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41373// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41374// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41375// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81376// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1377// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41378// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1379// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1380// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11381// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1382// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41383// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41384// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01385// CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 41386// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11387// CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 41388// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21389// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41390// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31391// CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 41392// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41393// CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 41394// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51395// CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 41396// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61397// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41398// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71399// CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 41400// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81401// CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 81402// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91403// CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 81404// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101405// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 41406// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111407// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP11]], align 41408// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121409// CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 41410// CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1411// CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 01412// CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1413// CHECK11:       omp_offload.failed:1414// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]1415// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1416// CHECK11:       omp_offload.cont:1417// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41418// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01419// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21420// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1421// CHECK11:       arraydestroy.body:1422// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1423// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11424// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1425// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1426// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1427// CHECK11:       arraydestroy.done2:1428// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1429// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41430// CHECK11-NEXT:    ret i32 [[TMP16]]1431//1432//1433// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1434// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1435// CHECK11-NEXT:  entry:1436// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41437// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41438// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41439// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01440// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 41441// CHECK11-NEXT:    ret void1442//1443//1444// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1445// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1446// CHECK11-NEXT:  entry:1447// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41448// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41449// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41450// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41451// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41452// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01453// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41454// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 41455// CHECK11-NEXT:    ret void1456//1457//1458// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1459// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1460// CHECK11-NEXT:  entry:1461// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41462// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41463// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41464// CHECK11-NEXT:    ret void1465//1466//1467// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1468// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1469// CHECK11-NEXT:  entry:1470// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41471// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41472// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41473// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1474// CHECK11-NEXT:    ret void1475//1476//1477// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1478// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1479// CHECK11-NEXT:  entry:1480// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41481// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41482// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41483// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41484// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41485// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41486// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1487// CHECK11-NEXT:    ret void1488//1489//1490// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491491// CHECK11-SAME: () #[[ATTR3]] {1492// CHECK11-NEXT:  entry:1493// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)1494// CHECK11-NEXT:    ret void1495//1496//1497// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1498// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {1499// CHECK11-NEXT:  entry:1500// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41501// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41502// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41503// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41504// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 41505// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41506// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41507// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41508// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41509// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41510// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41511// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41512// CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41513// CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 41514// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41515// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41516// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41517// CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 41518// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41519// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41520// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41521// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41522// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01523// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21524// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1525// CHECK11:       arrayctor.loop:1526// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1527// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1528// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11529// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1530// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1531// CHECK11:       arrayctor.cont:1532// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])1533// CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 41534// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41535// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41536// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1537// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41538// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11539// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1540// CHECK11:       cond.true:1541// CHECK11-NEXT:    br label [[COND_END:%.*]]1542// CHECK11:       cond.false:1543// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41544// CHECK11-NEXT:    br label [[COND_END]]1545// CHECK11:       cond.end:1546// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1547// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41548// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41549// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41550// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1551// CHECK11:       omp.inner.for.cond:1552// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]1553// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]1554// CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1555// CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1556// CHECK11:       omp.inner.for.cond.cleanup:1557// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1558// CHECK11:       omp.inner.for.body:1559// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1560// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11561// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1562// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1563// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP21]]1564// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1565// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP9]]1566// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]1567// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !nonnull [[META11]], !align [[META12]], !llvm.access.group [[ACC_GRP21]]1568// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]1569// CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP11]]1570// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP21]]1571// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1572// CHECK11:       omp.body.continue:1573// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1574// CHECK11:       omp.inner.for.inc:1575// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1576// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 11577// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]1578// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]1579// CHECK11:       omp.inner.for.end:1580// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1581// CHECK11:       omp.loop.exit:1582// CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41583// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 41584// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])1585// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41586// CHECK11-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 01587// CHECK11-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1588// CHECK11:       .omp.final.then:1589// CHECK11-NEXT:    store i32 2, ptr [[I]], align 41590// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]1591// CHECK11:       .omp.final.done:1592// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]1593// CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01594// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 21595// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1596// CHECK11:       arraydestroy.body:1597// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1598// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11599// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1600// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]1601// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]1602// CHECK11:       arraydestroy.done7:1603// CHECK11-NEXT:    ret void1604//1605//1606// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1607// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1608// CHECK11-NEXT:  entry:1609// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41610// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41611// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41612// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1613// CHECK11-NEXT:    ret void1614//1615//1616// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1617// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1618// CHECK11-NEXT:  entry:1619// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41620// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41621// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41622// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01623// CHECK11-NEXT:    store i32 0, ptr [[F]], align 41624// CHECK11-NEXT:    ret void1625//1626//1627// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1628// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1629// CHECK11-NEXT:  entry:1630// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41631// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41632// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41633// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41634// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41635// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01636// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41637// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41638// CHECK11-NEXT:    ret void1639//1640//1641// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1642// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1643// CHECK11-NEXT:  entry:1644// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41645// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41646// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41647// CHECK11-NEXT:    ret void1648//1649//1650// CHECK13-LABEL: define {{[^@]+}}@main1651// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {1652// CHECK13-NEXT:  entry:1653// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41654// CHECK13-NEXT:    [[G:%.*]] = alloca double, align 81655// CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 81656// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41657// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41658// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41659// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41660// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 81661// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 41662// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81663// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41664// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41665// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41666// CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41667// CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41668// CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 41669// CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 41670// CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81671// CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 41672// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 41673// CHECK13-NEXT:    [[I12:%.*]] = alloca i32, align 41674// CHECK13-NEXT:    [[_TMP13:%.*]] = alloca i32, align 41675// CHECK13-NEXT:    [[DOTOMP_LB14:%.*]] = alloca i32, align 41676// CHECK13-NEXT:    [[DOTOMP_UB15:%.*]] = alloca i32, align 41677// CHECK13-NEXT:    [[DOTOMP_IV16:%.*]] = alloca i32, align 41678// CHECK13-NEXT:    [[I17:%.*]] = alloca i32, align 41679// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 41680// CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 81681// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1682// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 41683// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1684// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1685// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11686// CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1687// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 81688// CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 81689// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41690// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41691// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41692// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41693// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01694// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21695// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1696// CHECK13:       arrayctor.loop:1697// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1698// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1699// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11700// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1701// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1702// CHECK13:       arrayctor.cont:1703// CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1704// CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 81705// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1706// CHECK13:       omp.inner.for.cond:1707// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]1708// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]1709// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1710// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1711// CHECK13:       omp.inner.for.cond.cleanup:1712// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1713// CHECK13:       omp.inner.for.body:1714// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1715// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11716// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1717// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1718// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]]1719// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1720// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i641721// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1722// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]1723// CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]], !llvm.access.group [[ACC_GRP2]]1724// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1725// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i641726// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]1727// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]1728// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1729// CHECK13:       omp.body.continue:1730// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1731// CHECK13:       omp.inner.for.inc:1732// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1733// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 11734// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1735// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]1736// CHECK13:       omp.inner.for.end:1737// CHECK13-NEXT:    store i32 2, ptr [[I]], align 41738// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]1739// CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01740// CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 21741// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1742// CHECK13:       arraydestroy.body:1743// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1744// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11745// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1746// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]1747// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]1748// CHECK13:       arraydestroy.done11:1749// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB14]], align 41750// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB15]], align 41751// CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB14]], align 41752// CHECK13-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV16]], align 41753// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND18:%.*]]1754// CHECK13:       omp.inner.for.cond18:1755// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]1756// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB15]], align 4, !llvm.access.group [[ACC_GRP8]]1757// CHECK13-NEXT:    [[CMP19:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1758// CHECK13-NEXT:    br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY20:%.*]], label [[OMP_INNER_FOR_END26:%.*]]1759// CHECK13:       omp.inner.for.body20:1760// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP8]]1761// CHECK13-NEXT:    [[MUL21:%.*]] = mul nsw i32 [[TMP13]], 11762// CHECK13-NEXT:    [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]1763// CHECK13-NEXT:    store i32 [[ADD22]], ptr [[I17]], align 4, !llvm.access.group [[ACC_GRP8]]1764// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE23:%.*]]1765// CHECK13:       omp.body.continue23:1766// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC24:%.*]]1767// CHECK13:       omp.inner.for.inc24:1768// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP8]]1769// CHECK13-NEXT:    [[ADD25:%.*]] = add nsw i32 [[TMP14]], 11770// CHECK13-NEXT:    store i32 [[ADD25]], ptr [[DOTOMP_IV16]], align 4, !llvm.access.group [[ACC_GRP8]]1771// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND18]], !llvm.loop [[LOOP9:![0-9]+]]1772// CHECK13:       omp.inner.for.end26:1773// CHECK13-NEXT:    store i32 2, ptr [[I12]], align 41774// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()1775// CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41776// CHECK13-NEXT:    [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01777// CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN27]], i64 21778// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY28:%.*]]1779// CHECK13:       arraydestroy.body28:1780// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST29:%.*]] = phi ptr [ [[TMP15]], [[OMP_INNER_FOR_END26]] ], [ [[ARRAYDESTROY_ELEMENT30:%.*]], [[ARRAYDESTROY_BODY28]] ]1781// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT30]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST29]], i64 -11782// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT30]]) #[[ATTR3]]1783// CHECK13-NEXT:    [[ARRAYDESTROY_DONE31:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT30]], [[ARRAY_BEGIN27]]1784// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE31]], label [[ARRAYDESTROY_DONE32:%.*]], label [[ARRAYDESTROY_BODY28]]1785// CHECK13:       arraydestroy.done32:1786// CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]1787// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 41788// CHECK13-NEXT:    ret i32 [[TMP16]]1789//1790//1791// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1792// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {1793// CHECK13-NEXT:  entry:1794// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81795// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81796// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81797// CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1798// CHECK13-NEXT:    ret void1799//1800//1801// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1802// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1803// CHECK13-NEXT:  entry:1804// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81805// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41806// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81807// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41808// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81809// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41810// CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1811// CHECK13-NEXT:    ret void1812//1813//1814// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1815// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1816// CHECK13-NEXT:  entry:1817// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81818// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81819// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81820// CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]1821// CHECK13-NEXT:    ret void1822//1823//1824// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1825// CHECK13-SAME: () #[[ATTR1]] comdat {1826// CHECK13-NEXT:  entry:1827// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41828// CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41829// CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41830// CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41831// CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41832// CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 81833// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 41834// CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81835// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41836// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41837// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41838// CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41839// CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41840// CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41841// CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 41842// CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81843// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 41844// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1845// CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 41846// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)1847// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)1848// CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 11849// CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)1850// CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 81851// CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 81852// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41853// CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41854// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41855// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41856// CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01857// CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21858// CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1859// CHECK13:       arrayctor.loop:1860// CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1861// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1862// CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11863// CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1864// CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1865// CHECK13:       arrayctor.cont:1866// CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1867// CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 81868// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1869// CHECK13:       omp.inner.for.cond:1870// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]1871// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]1872// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1873// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1874// CHECK13:       omp.inner.for.cond.cleanup:1875// CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1876// CHECK13:       omp.inner.for.body:1877// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1878// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11879// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1880// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]1881// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP11]]1882// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]1883// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i641884// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1885// CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]1886// CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP11]]1887// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]1888// CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i641889// CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]1890// CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP11]]1891// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1892// CHECK13:       omp.body.continue:1893// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1894// CHECK13:       omp.inner.for.inc:1895// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1896// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 11897// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]1898// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]1899// CHECK13:       omp.inner.for.end:1900// CHECK13-NEXT:    store i32 2, ptr [[I]], align 41901// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]1902// CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01903// CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 21904// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1905// CHECK13:       arraydestroy.body:1906// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1907// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11908// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1909// CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]1910// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]1911// CHECK13:       arraydestroy.done11:1912// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 41913// CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01914// CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 21915// CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]1916// CHECK13:       arraydestroy.body13:1917// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]1918// CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -11919// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR3]]1920// CHECK13-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]1921// CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]1922// CHECK13:       arraydestroy.done17:1923// CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]1924// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 41925// CHECK13-NEXT:    ret i32 [[TMP11]]1926//1927//1928// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1929// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1930// CHECK13-NEXT:  entry:1931// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81932// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81933// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81934// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01935// CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 41936// CHECK13-NEXT:    ret void1937//1938//1939// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1940// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1941// CHECK13-NEXT:  entry:1942// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81943// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81944// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81945// CHECK13-NEXT:    ret void1946//1947//1948// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1949// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1950// CHECK13-NEXT:  entry:1951// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81952// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41953// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81954// CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41955// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81956// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01957// CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41958// CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 41959// CHECK13-NEXT:    ret void1960//1961//1962// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1963// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1964// CHECK13-NEXT:  entry:1965// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81966// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81967// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81968// CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1969// CHECK13-NEXT:    ret void1970//1971//1972// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1973// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1974// CHECK13-NEXT:  entry:1975// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81976// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41977// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81978// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41979// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81980// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41981// CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])1982// CHECK13-NEXT:    ret void1983//1984//1985// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1986// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1987// CHECK13-NEXT:  entry:1988// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81989// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81990// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81991// CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]1992// CHECK13-NEXT:    ret void1993//1994//1995// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1996// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1997// CHECK13-NEXT:  entry:1998// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81999// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82000// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82001// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02002// CHECK13-NEXT:    store i32 0, ptr [[F]], align 42003// CHECK13-NEXT:    ret void2004//2005//2006// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2007// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2008// CHECK13-NEXT:  entry:2009// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82010// CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42011// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82012// CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42013// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82014// CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02015// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42016// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42017// CHECK13-NEXT:    ret void2018//2019//2020// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2021// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2022// CHECK13-NEXT:  entry:2023// CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82024// CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82025// CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82026// CHECK13-NEXT:    ret void2027//2028//2029// CHECK15-LABEL: define {{[^@]+}}@main2030// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2031// CHECK15-NEXT:  entry:2032// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42033// CHECK15-NEXT:    [[G:%.*]] = alloca double, align 82034// CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 42035// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42036// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42037// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42038// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42039// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42040// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 42041// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42042// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42043// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42044// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42045// CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42046// CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42047// CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 42048// CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 42049// CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42050// CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 42051// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42052// CHECK15-NEXT:    [[I11:%.*]] = alloca i32, align 42053// CHECK15-NEXT:    [[_TMP12:%.*]] = alloca i32, align 42054// CHECK15-NEXT:    [[DOTOMP_LB13:%.*]] = alloca i32, align 42055// CHECK15-NEXT:    [[DOTOMP_UB14:%.*]] = alloca i32, align 42056// CHECK15-NEXT:    [[DOTOMP_IV15:%.*]] = alloca i32, align 42057// CHECK15-NEXT:    [[I16:%.*]] = alloca i32, align 42058// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42059// CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 42060// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2061// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42062// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)2063// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2064// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 12065// CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2066// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42067// CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 42068// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42069// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42070// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42071// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42072// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02073// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22074// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2075// CHECK15:       arrayctor.loop:2076// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2077// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2078// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12079// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2080// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2081// CHECK15:       arrayctor.cont:2082// CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2083// CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42084// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2085// CHECK15:       omp.inner.for.cond:2086// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]2087// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]2088// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2089// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2090// CHECK15:       omp.inner.for.cond.cleanup:2091// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2092// CHECK15:       omp.inner.for.body:2093// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2094// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12095// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2096// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2097// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]]2098// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2099// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]2100// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]2101// CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]], !llvm.access.group [[ACC_GRP3]]2102// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]2103// CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]2104// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]2105// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2106// CHECK15:       omp.body.continue:2107// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2108// CHECK15:       omp.inner.for.inc:2109// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2110// CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 12111// CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]2112// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]2113// CHECK15:       omp.inner.for.end:2114// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42115// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]2116// CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02117// CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 22118// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2119// CHECK15:       arraydestroy.body:2120// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2121// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12122// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2123// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]2124// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]2125// CHECK15:       arraydestroy.done10:2126// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB13]], align 42127// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB14]], align 42128// CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB13]], align 42129// CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV15]], align 42130// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND17:%.*]]2131// CHECK15:       omp.inner.for.cond17:2132// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]2133// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB14]], align 4, !llvm.access.group [[ACC_GRP9]]2134// CHECK15-NEXT:    [[CMP18:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]2135// CHECK15-NEXT:    br i1 [[CMP18]], label [[OMP_INNER_FOR_BODY19:%.*]], label [[OMP_INNER_FOR_END25:%.*]]2136// CHECK15:       omp.inner.for.body19:2137// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP9]]2138// CHECK15-NEXT:    [[MUL20:%.*]] = mul nsw i32 [[TMP13]], 12139// CHECK15-NEXT:    [[ADD21:%.*]] = add nsw i32 0, [[MUL20]]2140// CHECK15-NEXT:    store i32 [[ADD21]], ptr [[I16]], align 4, !llvm.access.group [[ACC_GRP9]]2141// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE22:%.*]]2142// CHECK15:       omp.body.continue22:2143// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC23:%.*]]2144// CHECK15:       omp.inner.for.inc23:2145// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP9]]2146// CHECK15-NEXT:    [[ADD24:%.*]] = add nsw i32 [[TMP14]], 12147// CHECK15-NEXT:    store i32 [[ADD24]], ptr [[DOTOMP_IV15]], align 4, !llvm.access.group [[ACC_GRP9]]2148// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND17]], !llvm.loop [[LOOP10:![0-9]+]]2149// CHECK15:       omp.inner.for.end25:2150// CHECK15-NEXT:    store i32 2, ptr [[I11]], align 42151// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2152// CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42153// CHECK15-NEXT:    [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02154// CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN26]], i32 22155// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY27:%.*]]2156// CHECK15:       arraydestroy.body27:2157// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST28:%.*]] = phi ptr [ [[TMP15]], [[OMP_INNER_FOR_END25]] ], [ [[ARRAYDESTROY_ELEMENT29:%.*]], [[ARRAYDESTROY_BODY27]] ]2158// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT29]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST28]], i32 -12159// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT29]]) #[[ATTR3]]2160// CHECK15-NEXT:    [[ARRAYDESTROY_DONE30:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT29]], [[ARRAY_BEGIN26]]2161// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE30]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY27]]2162// CHECK15:       arraydestroy.done31:2163// CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2164// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 42165// CHECK15-NEXT:    ret i32 [[TMP16]]2166//2167//2168// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2169// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {2170// CHECK15-NEXT:  entry:2171// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42172// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42173// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42174// CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2175// CHECK15-NEXT:    ret void2176//2177//2178// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2179// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2180// CHECK15-NEXT:  entry:2181// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42182// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42183// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42184// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42185// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42186// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42187// CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2188// CHECK15-NEXT:    ret void2189//2190//2191// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2192// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2193// CHECK15-NEXT:  entry:2194// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42195// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42196// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42197// CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2198// CHECK15-NEXT:    ret void2199//2200//2201// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2202// CHECK15-SAME: () #[[ATTR1]] comdat {2203// CHECK15-NEXT:  entry:2204// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42205// CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42206// CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42207// CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42208// CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42209// CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 42210// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 42211// CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 42212// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42213// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42214// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42215// CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 42216// CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 42217// CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42218// CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 42219// CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 42220// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 42221// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2222// CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 42223// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2224// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2225// CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12226// CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2227// CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 42228// CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 42229// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42230// CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42231// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42232// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 42233// CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02234// CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22235// CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2236// CHECK15:       arrayctor.loop:2237// CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2238// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2239// CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12240// CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2241// CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2242// CHECK15:       arrayctor.cont:2243// CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2244// CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 42245// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2246// CHECK15:       omp.inner.for.cond:2247// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]2248// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]2249// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]2250// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2251// CHECK15:       omp.inner.for.cond.cleanup:2252// CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2253// CHECK15:       omp.inner.for.body:2254// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]2255// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 12256// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2257// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]2258// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP12]]2259// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]2260// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]2261// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]2262// CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META4]], !align [[META5]], !llvm.access.group [[ACC_GRP12]]2263// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]2264// CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]2265// CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP12]]2266// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2267// CHECK15:       omp.body.continue:2268// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2269// CHECK15:       omp.inner.for.inc:2270// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]2271// CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 12272// CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]2273// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]2274// CHECK15:       omp.inner.for.end:2275// CHECK15-NEXT:    store i32 2, ptr [[I]], align 42276// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]2277// CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02278// CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 22279// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2280// CHECK15:       arraydestroy.body:2281// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2282// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12283// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2284// CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]2285// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]2286// CHECK15:       arraydestroy.done10:2287// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 42288// CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02289// CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 22290// CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]2291// CHECK15:       arraydestroy.body12:2292// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]2293// CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -12294// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR3]]2295// CHECK15-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]2296// CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]2297// CHECK15:       arraydestroy.done16:2298// CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2299// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 42300// CHECK15-NEXT:    ret i32 [[TMP11]]2301//2302//2303// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2304// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2305// CHECK15-NEXT:  entry:2306// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42307// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42308// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42309// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02310// CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 42311// CHECK15-NEXT:    ret void2312//2313//2314// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2315// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2316// CHECK15-NEXT:  entry:2317// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42318// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42319// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42320// CHECK15-NEXT:    ret void2321//2322//2323// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2324// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2325// CHECK15-NEXT:  entry:2326// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42327// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42328// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42329// CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42330// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42331// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02332// CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42333// CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 42334// CHECK15-NEXT:    ret void2335//2336//2337// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2338// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2339// CHECK15-NEXT:  entry:2340// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42341// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42342// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42343// CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2344// CHECK15-NEXT:    ret void2345//2346//2347// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2348// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2349// CHECK15-NEXT:  entry:2350// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42351// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42352// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42353// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42354// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42355// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42356// CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2357// CHECK15-NEXT:    ret void2358//2359//2360// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2361// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2362// CHECK15-NEXT:  entry:2363// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42364// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42365// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42366// CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2367// CHECK15-NEXT:    ret void2368//2369//2370// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2371// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2372// CHECK15-NEXT:  entry:2373// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42374// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42375// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42376// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02377// CHECK15-NEXT:    store i32 0, ptr [[F]], align 42378// CHECK15-NEXT:    ret void2379//2380//2381// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2382// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2383// CHECK15-NEXT:  entry:2384// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42385// CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 42386// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42387// CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 42388// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42389// CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02390// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42391// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 42392// CHECK15-NEXT:    ret void2393//2394//2395// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2396// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2397// CHECK15-NEXT:  entry:2398// CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 42399// CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 42400// CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42401// CHECK15-NEXT:    ret void2402//2403