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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK47// RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK58// RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s9// RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK412 13// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"14// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s15// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"16// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"17// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"18// RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"19// RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s20// RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"21// RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"22// RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"23// expected-no-diagnostics24#ifndef HEADER25#define HEADER26 27#ifdef OMP528#define CONDITIONAL conditional :29#else30#define CONDITIONAL31#endif //OMP532 33enum omp_allocator_handle_t {34  omp_null_allocator = 0,35  omp_default_mem_alloc = 1,36  omp_large_cap_mem_alloc = 2,37  omp_const_mem_alloc = 3,38  omp_high_bw_mem_alloc = 4,39  omp_low_lat_mem_alloc = 5,40  omp_cgroup_mem_alloc = 6,41  omp_pteam_mem_alloc = 7,42  omp_thread_mem_alloc = 8,43  KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__44};45 46struct SS {47  int a;48  char e[4];49  int b : 4;50  int &c;51  SS(int &d) : a(0), b(0), c(d) {52#pragma omp parallel53#pragma omp for firstprivate(e) lastprivate(a, b, c, e)54    for (int i = 0; i < 2; ++i)55#ifdef LAMBDA56      [&]() {57        ++this->a, --b, (this)->c /= 1;58#pragma omp parallel59#pragma omp for lastprivate(a, b, c)60        for (int i = 0; i < 2; ++i)61          ++(this)->a, --b, this->c /= 1;62      }();63#elif defined(BLOCKS)64      ^{65        ++a;66        --this->b;67        (this)->c /= 1;68#pragma omp parallel69#pragma omp for lastprivate(a, b, c)70        for (int i = 0; i < 2; ++i)71          ++(this)->a, --b, this->c /= 1;72      }();73#else74      ++this->a, --b, c /= 1;75#endif76#pragma omp for77    for (a = 0; a < 2; ++a)78#ifdef LAMBDA79      [&]() {80        --this->a, ++b, (this)->c *= 2;81#pragma omp parallel82#pragma omp for lastprivate(b)83        for (b = 0; b < 2; ++b)84          ++(this)->a, --b, this->c /= 1;85      }();86#elif defined(BLOCKS)87      ^{88        ++a;89        --this->b;90        (this)->c /= 1;91#pragma omp parallel92#pragma omp for93        for (c = 0; c < 2; ++c)94          ++(this)->a, --b, this->c /= 1;95      }();96#else97      ++this->a, --b, c /= 1;98#endif99  }100};101 102template <typename T>103struct SST {104  T a;105  SST() : a(T()) {106#pragma omp parallel107#pragma omp for lastprivate(a)108    for (int i = 0; i < 2; ++i)109#ifdef LAMBDA110      [&]() {111        [&]() {112          ++this->a;113#pragma omp parallel114#pragma omp for lastprivate(a)115          for (int i = 0; i < 2; ++i)116            ++(this)->a;117        }();118      }();119#elif defined(BLOCKS)120      ^{121        ^{122          ++a;123#pragma omp parallel124#pragma omp for lastprivate(a)125          for (int i = 0; i < 2; ++i)126            ++(this)->a;127        }();128      }();129#else130      ++(this)->a;131#endif132#pragma omp for133    for (a = 0; a < 2; ++a)134#ifdef LAMBDA135      [&]() {136        ++this->a;137#pragma omp parallel138#pragma omp for139        for (a = 0; a < 2; ++(this)->a)140          ++(this)->a;141      }();142#elif defined(BLOCKS)143      ^{144        ++a;145#pragma omp parallel146#pragma omp for147        for (this->a = 0; a < 2; ++a)148          ++(this)->a;149      }();150#else151      ++(this)->a;152#endif153  }154};155 156template <class T>157struct S {158  T f;159  S(T a) : f(a) {}160  S() : f() {}161  S<T> &operator=(const S<T> &);162  operator T() { return T(); }163  ~S() {}164};165 166volatile int g __attribute__((aligned(128)))= 1212;167volatile int &g1 = g;168float f;169char cnt;170 171 172template <typename T>173T tmain() {174  S<T> test;175  SST<T> sst;176  T t_var __attribute__((aligned(128))) = T();177  T vec[] __attribute__((aligned(128))) = {1, 2};178  S<T> s_arr[] __attribute__((aligned(128))) = {1, 2};179  S<T> &var __attribute__((aligned(128))) = test;180#pragma omp parallel181#pragma omp for lastprivate(t_var, vec, s_arr, var)182  for (int i = 0; i < 2; ++i) {183    vec[i] = t_var;184    s_arr[i] = var;185  }186  return T();187}188 189namespace A {190double x;191}192namespace B {193using A::x;194}195 196int main() {197  static int sivar;198  SS ss(sivar);199#ifdef LAMBDA200  // FIXME: The outer lambda should not capture 'sivar'; that capture is not201  // used for anything.202  [&]() {203#pragma omp parallel204#pragma omp for lastprivate(g, g1, sivar)205  for (int i = 0; i < 2; ++i) {206 207 208 209 210 211 212    g = 1;213    g1 = 1;214    sivar = 2;215    // Check for final copying of private values back to original vars.216    // Actual copying.217 218    // original g=private_g;219 220    // original sivar=private_sivar;221    [&]() {222      g = 2;223      g1 = 2;224      sivar = 4;225    }();226  }227  }();228  return 0;229#elif defined(BLOCKS)230  ^{231#pragma omp parallel232#pragma omp for lastprivate(g, g1, sivar)233  for (int i = 0; i < 2; ++i) {234    g = 1;235    g1 = 1;236    sivar = 2;237    // Check for final copying of private values back to original vars.238    // Actual copying.239 240    // original g=private_g;241    g = 1;242    g1 = 1;243    ^{244      g = 2;245      g1 = 1;246      sivar = 4;247    }();248  }249  }();250  return 0;251 252 253#else254  S<float> test;255  int t_var = 0;256  int vec[] = {1, 2};257  S<float> s_arr[] = {1, 2};258  S<float> var(3);259#pragma omp parallel260#pragma omp for lastprivate(t_var, vec, s_arr, var, sivar)261  for (int i = 0; i < 2; ++i) {262    vec[i] = t_var;263    s_arr[i] = var;264    sivar += i;265  }266#pragma omp parallel267#pragma omp for lastprivate(A::x, B::x) firstprivate(f) lastprivate(f)268  for (int i = 0; i < 2; ++i) {269    A::x++;270  }271#pragma omp parallel272#pragma omp for allocate(omp_const_mem_alloc: f) firstprivate(f) lastprivate(f)273  for (int i = 0; i < 2; ++i) {274    A::x++;275  }276#pragma omp parallel277#pragma omp for allocate(omp_const_mem_alloc :cnt) lastprivate(cnt) lastprivate(CONDITIONAL f)278  for (cnt = 0; cnt < 2; ++cnt) {279    A::x++;280    f = 0;281  }282  return tmain<int>();283#endif284}285 286 287 288 289// Check for default initialization.290// <Skip loop body>291 292// Check for final copying of private values back to original vars.293// Actual copying.294 295// original t_var=private_t_var;296 297// original vec[]=private_vec[];298 299// original s_arr[]=private_s_arr[];300 301// original var=private_var;302 303 304// Check for default initialization.305 306// <Skip loop body>307 308// Check for final copying of private values back to original vars.309// Actual copying.310 311// original x=private_x;312 313// original f=private_f;314 315 316 317 318// Check for default initialization.319 320// <Skip loop body>321 322// Check for final copying of private values back to original vars.323// Actual copying.324 325// original f=private_f;326 327 328 329 330// UB = min(UB, GlobalUB)331// <Skip loop body>332 333 334 335// Check for final copying of private values back to original vars.336 337// Calculate private cnt value.338// original cnt=private_cnt;339 340 341 342 343 344 345 346 347// Check for default initialization.348// <Skip loop body>349 350// Check for final copying of private values back to original vars.351// Actual copying.352 353// original t_var=private_t_var;354 355// original vec[]=private_vec[];356 357// original s_arr[]=private_s_arr[];358 359// original var=private_var;360#endif361 362// CHECK1-LABEL: define {{[^@]+}}@main363// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {364// CHECK1-NEXT:  entry:365// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4366// CHECK1-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8367// CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4368// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4369// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4370// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4371// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4372// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4373// CHECK1-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)374// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])375// CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 4376// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)377// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)378// CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1379// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)380// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)381// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 5, ptr @main.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[VAR]], ptr @_ZZ4mainE5sivar)382// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.1)383// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.2)384// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.3)385// CHECK1-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()386// CHECK1-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4387// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]]388// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0389// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2390// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]391// CHECK1:       arraydestroy.body:392// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]393// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1394// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]395// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]396// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]397// CHECK1:       arraydestroy.done1:398// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]399// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4400// CHECK1-NEXT:    ret i32 [[TMP1]]401//402//403// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi404// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {405// CHECK1-NEXT:  entry:406// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8407// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8408// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8409// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8410// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8411// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8412// CHECK1-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])413// CHECK1-NEXT:    ret void414//415//416// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev417// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {418// CHECK1-NEXT:  entry:419// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8420// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8421// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8422// CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])423// CHECK1-NEXT:    ret void424//425//426// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef427// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {428// CHECK1-NEXT:  entry:429// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8430// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4431// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8432// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4433// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8434// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4435// CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])436// CHECK1-NEXT:    ret void437//438//439// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined440// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {441// CHECK1-NEXT:  entry:442// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8443// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8444// CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8445// CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8446// CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8447// CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8448// CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8449// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4450// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4451// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4452// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4453// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4454// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4455// CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4456// CHECK1-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4457// CHECK1-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4458// CHECK1-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4459// CHECK1-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4460// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4461// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8462// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8463// CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8464// CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8465// CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8466// CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8467// CHECK1-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8468// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8469// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8470// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8471// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8472// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8473// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4474// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4475// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4476// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4477// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0478// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2479// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]480// CHECK1:       arrayctor.loop:481// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]482// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])483// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1484// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]485// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]486// CHECK1:       arrayctor.cont:487// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])488// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8489// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4490// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)491// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4492// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1493// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]494// CHECK1:       cond.true:495// CHECK1-NEXT:    br label [[COND_END:%.*]]496// CHECK1:       cond.false:497// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4498// CHECK1-NEXT:    br label [[COND_END]]499// CHECK1:       cond.end:500// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]501// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4502// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4503// CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4504// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]505// CHECK1:       omp.inner.for.cond:506// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4507// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4508// CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]509// CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]510// CHECK1:       omp.inner.for.cond.cleanup:511// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]512// CHECK1:       omp.inner.for.body:513// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4514// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1515// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]516// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4517// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4518// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4519// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64520// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i64 0, i64 [[IDXPROM]]521// CHECK1-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4522// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4523// CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64524// CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i64 0, i64 [[IDXPROM7]]525// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])526// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4527// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SIVAR5]], align 4528// CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]529// CHECK1-NEXT:    store i32 [[ADD9]], ptr [[SIVAR5]], align 4530// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]531// CHECK1:       omp.body.continue:532// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]533// CHECK1:       omp.inner.for.inc:534// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4535// CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1536// CHECK1-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4537// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]538// CHECK1:       omp.inner.for.end:539// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]540// CHECK1:       omp.loop.exit:541// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8542// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4543// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])544// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4545// CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0546// CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]547// CHECK1:       .omp.lastprivate.then:548// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4549// CHECK1-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 4550// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC2]], i64 8, i1 false)551// CHECK1-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0552// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2553// CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]554// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]555// CHECK1:       omp.arraycpy.body:556// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR3]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]557// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]558// CHECK1-NEXT:    [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])559// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1560// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1561// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]562// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]563// CHECK1:       omp.arraycpy.done13:564// CHECK1-NEXT:    [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])565// CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SIVAR5]], align 4566// CHECK1-NEXT:    store i32 [[TMP25]], ptr [[TMP4]], align 4567// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]568// CHECK1:       .omp.lastprivate.done:569// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]]570// CHECK1-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0571// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2572// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]573// CHECK1:       arraydestroy.body:574// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]575// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1576// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]577// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]578// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]579// CHECK1:       arraydestroy.done16:580// CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8581// CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4582// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP28]])583// CHECK1-NEXT:    ret void584//585//586// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev587// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {588// CHECK1-NEXT:  entry:589// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8590// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8591// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8592// CHECK1-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]593// CHECK1-NEXT:    ret void594//595//596// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1597// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {598// CHECK1-NEXT:  entry:599// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8600// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8601// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4602// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4603// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4604// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4605// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4606// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4607// CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4608// CHECK1-NEXT:    [[X:%.*]] = alloca double, align 8609// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4610// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8611// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8612// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4613// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4614// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4615// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4616// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr @f, align 4617// CHECK1-NEXT:    store float [[TMP0]], ptr [[F]], align 4618// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8619// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4620// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])621// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)622// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4623// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1624// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]625// CHECK1:       cond.true:626// CHECK1-NEXT:    br label [[COND_END:%.*]]627// CHECK1:       cond.false:628// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4629// CHECK1-NEXT:    br label [[COND_END]]630// CHECK1:       cond.end:631// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]632// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4633// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4634// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4635// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]636// CHECK1:       omp.inner.for.cond:637// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4638// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4639// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]640// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]641// CHECK1:       omp.inner.for.body:642// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4643// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1644// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]645// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4646// CHECK1-NEXT:    [[TMP9:%.*]] = load double, ptr [[X]], align 8647// CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00648// CHECK1-NEXT:    store double [[INC]], ptr [[X]], align 8649// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]650// CHECK1:       omp.body.continue:651// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]652// CHECK1:       omp.inner.for.inc:653// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4654// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1655// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4656// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]657// CHECK1:       omp.inner.for.end:658// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]659// CHECK1:       omp.loop.exit:660// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])661// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4662// CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0663// CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]664// CHECK1:       .omp.lastprivate.then:665// CHECK1-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 8666// CHECK1-NEXT:    store double [[TMP13]], ptr @_ZN1A1xE, align 8667// CHECK1-NEXT:    [[TMP14:%.*]] = load float, ptr [[F]], align 4668// CHECK1-NEXT:    store float [[TMP14]], ptr @f, align 4669// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]670// CHECK1:       .omp.lastprivate.done:671// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])672// CHECK1-NEXT:    ret void673//674//675// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2676// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {677// CHECK1-NEXT:  entry:678// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8679// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8680// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4681// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4682// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4683// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4684// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4685// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4686// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4687// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8688// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8689// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4690// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4691// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4692// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4693// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8694// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4695// CHECK1-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 4, ptr inttoptr (i64 3 to ptr))696// CHECK1-NEXT:    [[TMP2:%.*]] = load float, ptr @f, align 4697// CHECK1-NEXT:    store float [[TMP2]], ptr [[DOTF__VOID_ADDR]], align 4698// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])699// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)700// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4701// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1702// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]703// CHECK1:       cond.true:704// CHECK1-NEXT:    br label [[COND_END:%.*]]705// CHECK1:       cond.false:706// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4707// CHECK1-NEXT:    br label [[COND_END]]708// CHECK1:       cond.end:709// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]710// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4711// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4712// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4713// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]714// CHECK1:       omp.inner.for.cond:715// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4716// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4717// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]718// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]719// CHECK1:       omp.inner.for.cond.cleanup:720// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]721// CHECK1:       omp.inner.for.body:722// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4723// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1724// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]725// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4726// CHECK1-NEXT:    [[TMP9:%.*]] = load double, ptr @_ZN1A1xE, align 8727// CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00728// CHECK1-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8729// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]730// CHECK1:       omp.body.continue:731// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]732// CHECK1:       omp.inner.for.inc:733// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4734// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1735// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4736// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]737// CHECK1:       omp.inner.for.end:738// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]739// CHECK1:       omp.loop.exit:740// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])741// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4742// CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0743// CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]744// CHECK1:       .omp.lastprivate.then:745// CHECK1-NEXT:    [[TMP13:%.*]] = load float, ptr [[DOTF__VOID_ADDR]], align 4746// CHECK1-NEXT:    store float [[TMP13]], ptr @f, align 4747// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]748// CHECK1:       .omp.lastprivate.done:749// CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTF__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))750// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])751// CHECK1-NEXT:    ret void752//753//754// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.3755// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {756// CHECK1-NEXT:  entry:757// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8758// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8759// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4760// CHECK1-NEXT:    [[TMP:%.*]] = alloca i8, align 1761// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4762// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4763// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4764// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4765// CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4766// CHECK1-NEXT:    [[CNT:%.*]] = alloca i8, align 1767// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8768// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8769// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4770// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4771// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4772// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4773// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8774// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4775// CHECK1-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 1, ptr inttoptr (i64 3 to ptr))776// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)777// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4778// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1779// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]780// CHECK1:       cond.true:781// CHECK1-NEXT:    br label [[COND_END:%.*]]782// CHECK1:       cond.false:783// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4784// CHECK1-NEXT:    br label [[COND_END]]785// CHECK1:       cond.end:786// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]787// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4788// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4789// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4790// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]791// CHECK1:       omp.inner.for.cond:792// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4793// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4794// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]795// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]796// CHECK1:       omp.inner.for.cond.cleanup:797// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]798// CHECK1:       omp.inner.for.body:799// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4800// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1801// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]802// CHECK1-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8803// CHECK1-NEXT:    store i8 [[CONV]], ptr [[DOTCNT__VOID_ADDR]], align 1804// CHECK1-NEXT:    [[TMP8:%.*]] = load double, ptr @_ZN1A1xE, align 8805// CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP8]], 1.000000e+00806// CHECK1-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8807// CHECK1-NEXT:    store float 0.000000e+00, ptr [[F]], align 4808// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]809// CHECK1:       omp.body.continue:810// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]811// CHECK1:       omp.inner.for.inc:812// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4813// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1814// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4815// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]816// CHECK1:       omp.inner.for.end:817// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]818// CHECK1:       omp.loop.exit:819// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])820// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4821// CHECK1-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0822// CHECK1-NEXT:    br i1 [[TMP11]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]823// CHECK1:       .omp.lastprivate.then:824// CHECK1-NEXT:    store i8 2, ptr [[DOTCNT__VOID_ADDR]], align 1825// CHECK1-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCNT__VOID_ADDR]], align 1826// CHECK1-NEXT:    store i8 [[TMP12]], ptr @cnt, align 1827// CHECK1-NEXT:    [[TMP13:%.*]] = load float, ptr [[F]], align 4828// CHECK1-NEXT:    store float [[TMP13]], ptr @f, align 4829// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]830// CHECK1:       .omp.lastprivate.done:831// CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTCNT__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))832// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])833// CHECK1-NEXT:    ret void834//835//836// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v837// CHECK1-SAME: () #[[ATTR1]] {838// CHECK1-NEXT:  entry:839// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4840// CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4841// CHECK1-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4842// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128843// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128844// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128845// CHECK1-NEXT:    [[VAR:%.*]] = alloca ptr, align 128846// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])847// CHECK1-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])848// CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 128849// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)850// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)851// CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1852// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)853// CHECK1-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 128854// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 128855// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP0]])856// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4857// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0858// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2859// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]860// CHECK1:       arraydestroy.body:861// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]862// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1863// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]864// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]865// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]866// CHECK1:       arraydestroy.done1:867// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]868// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[RETVAL]], align 4869// CHECK1-NEXT:    ret i32 [[TMP2]]870//871//872// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi873// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {874// CHECK1-NEXT:  entry:875// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8876// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8877// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4878// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4879// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8880// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4881// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4882// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4883// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4884// CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4885// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8886// CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])887// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8888// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8889// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8890// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0891// CHECK1-NEXT:    store i32 0, ptr [[A]], align 8892// CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2893// CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8894// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16895// CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0896// CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8897// CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3898// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8899// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8900// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])901// CHECK1-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8902// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4903// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4904// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4905// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4906// CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8907// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)908// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4909// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1910// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]911// CHECK1:       cond.true:912// CHECK1-NEXT:    br label [[COND_END:%.*]]913// CHECK1:       cond.false:914// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4915// CHECK1-NEXT:    br label [[COND_END]]916// CHECK1:       cond.end:917// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]918// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4919// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4920// CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4921// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]922// CHECK1:       omp.inner.for.cond:923// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4924// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4925// CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]926// CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]927// CHECK1:       omp.inner.for.body:928// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4929// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1930// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]931// CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8932// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 4933// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8934// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4935// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1936// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP9]], align 4937// CHECK1-NEXT:    [[B6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2938// CHECK1-NEXT:    [[BF_LOAD7:%.*]] = load i8, ptr [[B6]], align 8939// CHECK1-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4940// CHECK1-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4941// CHECK1-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32942// CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1943// CHECK1-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8944// CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B6]], align 8945// CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15946// CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16947// CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]948// CHECK1-NEXT:    store i8 [[BF_SET10]], ptr [[B6]], align 8949// CHECK1-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4950// CHECK1-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4951// CHECK1-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32952// CHECK1-NEXT:    [[C11:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3953// CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[C11]], align 8954// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4955// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1956// CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP12]], align 4957// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]958// CHECK1:       omp.body.continue:959// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]960// CHECK1:       omp.inner.for.inc:961// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4962// CHECK1-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1963// CHECK1-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4964// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]965// CHECK1:       omp.inner.for.end:966// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]967// CHECK1:       omp.loop.exit:968// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])969// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])970// CHECK1-NEXT:    ret void971//972//973// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined974// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {975// CHECK1-NEXT:  entry:976// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8977// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8978// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8979// CHECK1-NEXT:    [[E:%.*]] = alloca ptr, align 8980// CHECK1-NEXT:    [[A:%.*]] = alloca ptr, align 8981// CHECK1-NEXT:    [[B:%.*]] = alloca i32, align 4982// CHECK1-NEXT:    [[C:%.*]] = alloca ptr, align 8983// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8984// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8985// CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8986// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4987// CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4988// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4989// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4990// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4991// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4992// CHECK1-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1993// CHECK1-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8994// CHECK1-NEXT:    [[A9:%.*]] = alloca i32, align 4995// CHECK1-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 8996// CHECK1-NEXT:    [[B11:%.*]] = alloca i32, align 4997// CHECK1-NEXT:    [[C12:%.*]] = alloca i32, align 4998// CHECK1-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 8999// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 41000// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81001// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81002// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81003// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81004// CHECK1-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 11005// CHECK1-NEXT:    store ptr [[E1]], ptr [[E]], align 81006// CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 01007// CHECK1-NEXT:    store ptr [[A2]], ptr [[A]], align 81008// CHECK1-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 31009// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 81010// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C]], align 81011// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 81012// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 81013// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 81014// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 81015// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 81016// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 81017// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41018// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41019// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41020// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41021// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 81022// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)1023// CHECK1-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 81024// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81025// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41026// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])1027// CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 81028// CHECK1-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 81029// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 81030// CHECK1-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 81031// CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 81032// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1033// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41034// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 11035// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1036// CHECK1:       cond.true:1037// CHECK1-NEXT:    br label [[COND_END:%.*]]1038// CHECK1:       cond.false:1039// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41040// CHECK1-NEXT:    br label [[COND_END]]1041// CHECK1:       cond.end:1042// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1043// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41044// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41045// CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41046// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1047// CHECK1:       omp.inner.for.cond:1048// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41049// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41050// CHECK1-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1051// CHECK1-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1052// CHECK1:       omp.inner.for.body:1053// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41054// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 11055// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1056// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 41057// CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 81058// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41059// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP18]], 11060// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP17]], align 41061// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B11]], align 41062// CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP19]], -11063// CHECK1-NEXT:    store i32 [[DEC]], ptr [[B11]], align 41064// CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[_TMP13]], align 81065// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 41066// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP21]], 11067// CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP20]], align 41068// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1069// CHECK1:       omp.body.continue:1070// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1071// CHECK1:       omp.inner.for.inc:1072// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41073// CHECK1-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP22]], 11074// CHECK1-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 41075// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]1076// CHECK1:       omp.inner.for.end:1077// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1078// CHECK1:       omp.loop.exit:1079// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])1080// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41081// CHECK1-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 01082// CHECK1-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1083// CHECK1:       .omp.lastprivate.then:1084// CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 81085// CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 41086// CHECK1-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 41087// CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 41088// CHECK1-NEXT:    store i32 [[TMP27]], ptr [[B]], align 41089// CHECK1-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 81090// CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 41091// CHECK1-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 41092// CHECK1-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 81093// CHECK1-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 11094// CHECK1-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 11095// CHECK1-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 41096// CHECK1-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 21097// CHECK1-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i81098// CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 81099// CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 151100// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161101// CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]1102// CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 81103// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1104// CHECK1:       .omp.lastprivate.done:1105// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])1106// CHECK1-NEXT:    ret void1107//1108//1109// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1110// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1111// CHECK1-NEXT:  entry:1112// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81113// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81114// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81115// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01116// CHECK1-NEXT:    store float 0.000000e+00, ptr [[F]], align 41117// CHECK1-NEXT:    ret void1118//1119//1120// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1121// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1122// CHECK1-NEXT:  entry:1123// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81124// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81125// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81126// CHECK1-NEXT:    ret void1127//1128//1129// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1130// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1131// CHECK1-NEXT:  entry:1132// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81133// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41134// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81135// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41136// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81137// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01138// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41139// CHECK1-NEXT:    store float [[TMP0]], ptr [[F]], align 41140// CHECK1-NEXT:    ret void1141//1142//1143// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1144// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1145// CHECK1-NEXT:  entry:1146// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81147// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81148// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81149// CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1150// CHECK1-NEXT:    ret void1151//1152//1153// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev1154// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1155// CHECK1-NEXT:  entry:1156// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81157// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81158// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81159// CHECK1-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1160// CHECK1-NEXT:    ret void1161//1162//1163// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1164// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1165// CHECK1-NEXT:  entry:1166// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81167// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41168// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81169// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41170// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81171// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41172// CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1173// CHECK1-NEXT:    ret void1174//1175//1176// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined1177// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1178// CHECK1-NEXT:  entry:1179// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81180// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81181// CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81182// CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81183// CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81184// CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81185// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 81186// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81187// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41188// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41189// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41190// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41191// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41192// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41193// CHECK1-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 1281194// CHECK1-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 1281195// CHECK1-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 1281196// CHECK1-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 1281197// CHECK1-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 81198// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 41199// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81200// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81201// CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81202// CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81203// CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81204// CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81205// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 81206// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 81207// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 81208// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 81209// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 81210// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81211// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 81212// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41213// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41214// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41215// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41216// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01217// CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21218// CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1219// CHECK1:       arrayctor.loop:1220// CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1221// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1222// CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11223// CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1224// CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1225// CHECK1:       arrayctor.cont:1226// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81227// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])1228// CHECK1-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 81229// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81230// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41231// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1232// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41233// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 11234// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1235// CHECK1:       cond.true:1236// CHECK1-NEXT:    br label [[COND_END:%.*]]1237// CHECK1:       cond.false:1238// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41239// CHECK1-NEXT:    br label [[COND_END]]1240// CHECK1:       cond.end:1241// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]1242// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41243// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41244// CHECK1-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 41245// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1246// CHECK1:       omp.inner.for.cond:1247// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41248// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41249// CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]1250// CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1251// CHECK1:       omp.inner.for.cond.cleanup:1252// CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1253// CHECK1:       omp.inner.for.body:1254// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41255// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 11256// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1257// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 41258// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 1281259// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 41260// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i641261// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]1262// CHECK1-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 41263// CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 81264// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 41265// CHECK1-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i641266// CHECK1-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]1267// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP16]])1268// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1269// CHECK1:       omp.body.continue:1270// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1271// CHECK1:       omp.inner.for.inc:1272// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41273// CHECK1-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 11274// CHECK1-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 41275// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]1276// CHECK1:       omp.inner.for.end:1277// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1278// CHECK1:       omp.loop.exit:1279// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81280// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41281// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])1282// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41283// CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01284// CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1285// CHECK1:       .omp.lastprivate.then:1286// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 1281287// CHECK1-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 1281288// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP1]], ptr align 128 [[VEC4]], i64 8, i1 false)1289// CHECK1-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 01290// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 21291// CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]1292// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1293// CHECK1:       omp.arraycpy.body:1294// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1295// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1296// CHECK1-NEXT:    [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])1297// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11298// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11299// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1300// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]1301// CHECK1:       omp.arraycpy.done14:1302// CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 81303// CHECK1-NEXT:    [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP25]])1304// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1305// CHECK1:       .omp.lastprivate.done:1306// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]1307// CHECK1-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 01308// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 21309// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1310// CHECK1:       arraydestroy.body:1311// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1312// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11313// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1314// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]1315// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]1316// CHECK1:       arraydestroy.done17:1317// CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81318// CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 41319// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP28]])1320// CHECK1-NEXT:    ret void1321//1322//1323// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1324// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1325// CHECK1-NEXT:  entry:1326// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81327// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81328// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81329// CHECK1-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1330// CHECK1-NEXT:    ret void1331//1332//1333// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1334// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1335// CHECK1-NEXT:  entry:1336// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81337// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81338// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81339// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01340// CHECK1-NEXT:    store i32 0, ptr [[F]], align 41341// CHECK1-NEXT:    ret void1342//1343//1344// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev1345// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1346// CHECK1-NEXT:  entry:1347// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81348// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41349// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 41350// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81351// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41352// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41353// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41354// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41355// CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 41356// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 81357// CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])1358// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81359// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81360// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 01361// CHECK1-NEXT:    store i32 0, ptr [[A]], align 41362// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])1363// CHECK1-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 81364// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41365// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41366// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41367// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41368// CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 81369// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1370// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41371// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 11372// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1373// CHECK1:       cond.true:1374// CHECK1-NEXT:    br label [[COND_END:%.*]]1375// CHECK1:       cond.false:1376// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41377// CHECK1-NEXT:    br label [[COND_END]]1378// CHECK1:       cond.end:1379// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]1380// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41381// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41382// CHECK1-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 41383// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1384// CHECK1:       omp.inner.for.cond:1385// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41386// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41387// CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]1388// CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1389// CHECK1:       omp.inner.for.body:1390// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41391// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 11392// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1393// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP4]], align 81394// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 41395// CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 81396// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41397// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 11398// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP8]], align 41399// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1400// CHECK1:       omp.body.continue:1401// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1402// CHECK1:       omp.inner.for.inc:1403// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41404// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 11405// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 41406// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]1407// CHECK1:       omp.inner.for.end:1408// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1409// CHECK1:       omp.loop.exit:1410// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])1411// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])1412// CHECK1-NEXT:    ret void1413//1414//1415// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined1416// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {1417// CHECK1-NEXT:  entry:1418// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81419// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81420// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81421// CHECK1-NEXT:    [[A:%.*]] = alloca ptr, align 81422// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 81423// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41424// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41425// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41426// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41427// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41428// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41429// CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 41430// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 81431// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 41432// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81433// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81434// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81435// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81436// CHECK1-NEXT:    [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 01437// CHECK1-NEXT:    store ptr [[A1]], ptr [[A]], align 81438// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A]], align 81439// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81440// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41441// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41442// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41443// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41444// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 81445// CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 81446// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81447// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41448// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1449// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41450// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 11451// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1452// CHECK1:       cond.true:1453// CHECK1-NEXT:    br label [[COND_END:%.*]]1454// CHECK1:       cond.false:1455// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41456// CHECK1-NEXT:    br label [[COND_END]]1457// CHECK1:       cond.end:1458// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1459// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41460// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41461// CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41462// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1463// CHECK1:       omp.inner.for.cond:1464// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41465// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41466// CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1467// CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1468// CHECK1:       omp.inner.for.body:1469// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41470// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 11471// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1472// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 41473// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 81474// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41475// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 11476// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 41477// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1478// CHECK1:       omp.body.continue:1479// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1480// CHECK1:       omp.inner.for.inc:1481// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41482// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 11483// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 41484// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]1485// CHECK1:       omp.inner.for.end:1486// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1487// CHECK1:       omp.loop.exit:1488// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])1489// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41490// CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 01491// CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1492// CHECK1:       .omp.lastprivate.then:1493// CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 81494// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 41495// CHECK1-NEXT:    store i32 [[TMP17]], ptr [[TMP2]], align 41496// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1497// CHECK1:       .omp.lastprivate.done:1498// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])1499// CHECK1-NEXT:    ret void1500//1501//1502// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1503// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1504// CHECK1-NEXT:  entry:1505// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81506// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41507// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81508// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41509// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81510// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01511// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41512// CHECK1-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41513// CHECK1-NEXT:    ret void1514//1515//1516// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1517// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1518// CHECK1-NEXT:  entry:1519// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81520// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81521// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81522// CHECK1-NEXT:    ret void1523//1524//1525// CHECK3-LABEL: define {{[^@]+}}@main1526// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {1527// CHECK3-NEXT:  entry:1528// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41529// CHECK3-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 81530// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 81531// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 41532// CHECK3-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)1533// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 01534// CHECK3-NEXT:    store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 81535// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])1536// CHECK3-NEXT:    ret i32 01537//1538//1539// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi1540// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {1541// CHECK3-NEXT:  entry:1542// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81543// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 81544// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81545// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 81546// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81547// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81548// CHECK3-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])1549// CHECK3-NEXT:    ret void1550//1551//1552// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi1553// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1554// CHECK3-NEXT:  entry:1555// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81556// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 81557// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41558// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 41559// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81560// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41561// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41562// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41563// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41564// CHECK3-NEXT:    [[A3:%.*]] = alloca i32, align 41565// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 81566// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 81567// CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]])1568// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81569// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 81570// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81571// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01572// CHECK3-NEXT:    store i32 0, ptr [[A]], align 81573// CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21574// CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 81575// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161576// CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 01577// CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 81578// CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 31579// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 81580// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C]], align 81581// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])1582// CHECK3-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 81583// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41584// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41585// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41586// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41587// CHECK3-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 81588// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1589// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41590// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 11591// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1592// CHECK3:       cond.true:1593// CHECK3-NEXT:    br label [[COND_END:%.*]]1594// CHECK3:       cond.false:1595// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41596// CHECK3-NEXT:    br label [[COND_END]]1597// CHECK3:       cond.end:1598// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1599// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41600// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41601// CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41602// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1603// CHECK3:       omp.inner.for.cond:1604// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41605// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41606// CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1607// CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1608// CHECK3:       omp.inner.for.body:1609// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41610// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11611// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1612// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 81613// CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 41614// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 01615// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP9]], align 81616// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 11617// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 81618// CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 81619// CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE0_clEv(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])1620// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1621// CHECK3:       omp.body.continue:1622// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1623// CHECK3:       omp.inner.for.inc:1624// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41625// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 11626// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 41627// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1628// CHECK3:       omp.inner.for.end:1629// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1630// CHECK3:       omp.loop.exit:1631// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP0]])1632// CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]])1633// CHECK3-NEXT:    ret void1634//1635//1636// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined1637// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {1638// CHECK3-NEXT:  entry:1639// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81640// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81641// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81642// CHECK3-NEXT:    [[E:%.*]] = alloca ptr, align 81643// CHECK3-NEXT:    [[A:%.*]] = alloca ptr, align 81644// CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 41645// CHECK3-NEXT:    [[C:%.*]] = alloca ptr, align 81646// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 81647// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 81648// CHECK3-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 81649// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41650// CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 41651// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41652// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41653// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41654// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41655// CHECK3-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 11656// CHECK3-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 81657// CHECK3-NEXT:    [[A9:%.*]] = alloca i32, align 41658// CHECK3-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 81659// CHECK3-NEXT:    [[B11:%.*]] = alloca i32, align 41660// CHECK3-NEXT:    [[C12:%.*]] = alloca i32, align 41661// CHECK3-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 81662// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41663// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 81664// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81665// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81666// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81667// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81668// CHECK3-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 11669// CHECK3-NEXT:    store ptr [[E1]], ptr [[E]], align 81670// CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 01671// CHECK3-NEXT:    store ptr [[A2]], ptr [[A]], align 81672// CHECK3-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 31673// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 81674// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C]], align 81675// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 81676// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 81677// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 81678// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 81679// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 81680// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 81681// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41682// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41683// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41684// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41685// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 81686// CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)1687// CHECK3-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 81688// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81689// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41690// CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])1691// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 81692// CHECK3-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 81693// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 81694// CHECK3-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 81695// CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 81696// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1697// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41698// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 11699// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1700// CHECK3:       cond.true:1701// CHECK3-NEXT:    br label [[COND_END:%.*]]1702// CHECK3:       cond.false:1703// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41704// CHECK3-NEXT:    br label [[COND_END]]1705// CHECK3:       cond.end:1706// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1707// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41708// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41709// CHECK3-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41710// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1711// CHECK3:       omp.inner.for.cond:1712// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41713// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41714// CHECK3-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1715// CHECK3-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1716// CHECK3:       omp.inner.for.body:1717// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41718// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 11719// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1720// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 41721// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 01722// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP17]], align 81723// CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 11724// CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP10]], align 81725// CHECK3-NEXT:    store ptr [[TMP19]], ptr [[TMP18]], align 81726// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 21727// CHECK3-NEXT:    store ptr [[B11]], ptr [[TMP20]], align 81728// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 31729// CHECK3-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[_TMP13]], align 81730// CHECK3-NEXT:    store ptr [[TMP22]], ptr [[TMP21]], align 81731// CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])1732// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1733// CHECK3:       omp.body.continue:1734// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1735// CHECK3:       omp.inner.for.inc:1736// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41737// CHECK3-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP23]], 11738// CHECK3-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 41739// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1740// CHECK3:       omp.inner.for.end:1741// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1742// CHECK3:       omp.loop.exit:1743// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP7]])1744// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41745// CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01746// CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1747// CHECK3:       .omp.lastprivate.then:1748// CHECK3-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP10]], align 81749// CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 41750// CHECK3-NEXT:    store i32 [[TMP27]], ptr [[TMP8]], align 41751// CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[B11]], align 41752// CHECK3-NEXT:    store i32 [[TMP28]], ptr [[B]], align 41753// CHECK3-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 81754// CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 41755// CHECK3-NEXT:    store i32 [[TMP30]], ptr [[TMP9]], align 41756// CHECK3-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[_TMP8]], align 81757// CHECK3-NEXT:    [[TMP32:%.*]] = load [4 x i8], ptr [[TMP31]], align 11758// CHECK3-NEXT:    store [4 x i8] [[TMP32]], ptr [[TMP10]], align 11759// CHECK3-NEXT:    [[TMP33:%.*]] = load i32, ptr [[B11]], align 41760// CHECK3-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 21761// CHECK3-NEXT:    [[TMP34:%.*]] = trunc i32 [[TMP33]] to i81762// CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 81763// CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP34]], 151764// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161765// CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]1766// CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 81767// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1768// CHECK3:       .omp.lastprivate.done:1769// CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])1770// CHECK3-NEXT:    ret void1771//1772//1773// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv1774// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] align 2 {1775// CHECK3-NEXT:  entry:1776// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81777// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81778// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81779// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 01780// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 81781// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11782// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 81783// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41784// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 11785// CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 41786// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21787// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 81788// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41789// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -11790// CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP6]], align 41791// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31792// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81793// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41794// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 11795// CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 41796// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11797// CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 81798// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21799// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 81800// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31801// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 81802// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])1803// CHECK3-NEXT:    ret void1804//1805//1806// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv1807// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] align 2 {1808// CHECK3-NEXT:  entry:1809// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81810// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81811// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81812// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1:%.*]], ptr [[THIS1]], i32 0, i32 01813// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 81814// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[THIS1]], i32 0, i32 11815// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 81816// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41817// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP4]], -11818// CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP3]], align 41819// CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 21820// CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 81821// CHECK3-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 41822// CHECK3-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 41823// CHECK3-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i321824// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 11825// CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i81826// CHECK3-NEXT:    [[BF_LOAD2:%.*]] = load i8, ptr [[B]], align 81827// CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 151828// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -161829// CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]1830// CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 81831// CHECK3-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 41832// CHECK3-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 41833// CHECK3-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i321834// CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 31835// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[C]], align 81836// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41837// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 21838// CHECK3-NEXT:    store i32 [[MUL]], ptr [[TMP6]], align 41839// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[THIS1]], i32 0, i32 11840// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81841// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @_ZZN2SSC1ERiENKUlvE0_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP9]])1842// CHECK3-NEXT:    ret void1843//1844//1845// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined1846// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {1847// CHECK3-NEXT:  entry:1848// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81849// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81850// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81851// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81852// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 81853// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 81854// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 81855// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81856// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81857// CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 81858// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41859// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca i32, align 41860// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41861// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41862// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41863// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41864// CHECK3-NEXT:    [[A5:%.*]] = alloca i32, align 41865// CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81866// CHECK3-NEXT:    [[B7:%.*]] = alloca i32, align 41867// CHECK3-NEXT:    [[C8:%.*]] = alloca i32, align 41868// CHECK3-NEXT:    [[_TMP9:%.*]] = alloca ptr, align 81869// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 41870// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81871// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81872// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81873// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81874// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 81875// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 81876// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81877// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81878// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 81879// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 81880// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81881// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 81882// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81883// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP2]], align 81884// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81885// CHECK3-NEXT:    store ptr [[TMP5]], ptr [[_TMP3]], align 81886// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41887// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41888// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41889// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41890// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 81891// CHECK3-NEXT:    store ptr [[A5]], ptr [[_TMP6]], align 81892// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 81893// CHECK3-NEXT:    store ptr [[C8]], ptr [[_TMP9]], align 81894// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81895// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 41896// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1897// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41898// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 11899// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1900// CHECK3:       cond.true:1901// CHECK3-NEXT:    br label [[COND_END:%.*]]1902// CHECK3:       cond.false:1903// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41904// CHECK3-NEXT:    br label [[COND_END]]1905// CHECK3:       cond.end:1906// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1907// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41908// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41909// CHECK3-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41910// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1911// CHECK3:       omp.inner.for.cond:1912// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41913// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41914// CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1915// CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1916// CHECK3:       omp.inner.for.body:1917// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41918// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11919// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1920// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 41921// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 81922// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 41923// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 11924// CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP16]], align 41925// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B7]], align 41926// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -11927// CHECK3-NEXT:    store i32 [[DEC]], ptr [[B7]], align 41928// CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP9]], align 81929// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41930// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 11931// CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP19]], align 41932// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1933// CHECK3:       omp.body.continue:1934// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1935// CHECK3:       omp.inner.for.inc:1936// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41937// CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 11938// CHECK3-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 41939// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]1940// CHECK3:       omp.inner.for.end:1941// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1942// CHECK3:       omp.loop.exit:1943// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP9]])1944// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41945// CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 01946// CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1947// CHECK3:       .omp.lastprivate.then:1948// CHECK3-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[_TMP6]], align 81949// CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 41950// CHECK3-NEXT:    store i32 [[TMP25]], ptr [[TMP6]], align 41951// CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B7]], align 41952// CHECK3-NEXT:    store i32 [[TMP26]], ptr [[TMP2]], align 41953// CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP9]], align 81954// CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 41955// CHECK3-NEXT:    store i32 [[TMP28]], ptr [[TMP7]], align 41956// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1957// CHECK3:       .omp.lastprivate.done:1958// CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP9]])1959// CHECK3-NEXT:    ret void1960//1961//1962// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv.omp_outlined1963// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1964// CHECK3-NEXT:  entry:1965// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81966// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81967// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81968// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81969// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 81970// CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 41971// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81972// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41973// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 41974// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41975// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41976// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41977// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41978// CHECK3-NEXT:    [[B3:%.*]] = alloca i32, align 41979// CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 41980// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81981// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81982// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81983// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81984// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81985// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81986// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81987// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 81988// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 81989// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41990// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41991// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41992// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41993// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81994// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41995// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1996// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41997// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 11998// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1999// CHECK3:       cond.true:2000// CHECK3-NEXT:    br label [[COND_END:%.*]]2001// CHECK3:       cond.false:2002// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42003// CHECK3-NEXT:    br label [[COND_END]]2004// CHECK3:       cond.end:2005// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2006// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42007// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42008// CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42009// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2010// CHECK3:       omp.inner.for.cond:2011// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42012// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42013// CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2014// CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2015// CHECK3:       omp.inner.for.body:2016// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42017// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12018// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2019// CHECK3-NEXT:    store i32 [[ADD]], ptr [[B3]], align 42020// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP1]], align 82021// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 42022// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 12023// CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 42024// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[B3]], align 42025// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP13]], -12026// CHECK3-NEXT:    store i32 [[DEC]], ptr [[B3]], align 42027// CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 32028// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[C]], align 82029// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 42030// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP15]], 12031// CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP14]], align 42032// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2033// CHECK3:       omp.body.continue:2034// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2035// CHECK3:       omp.inner.for.inc:2036// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42037// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 12038// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42039// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]2040// CHECK3:       omp.inner.for.end:2041// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2042// CHECK3:       omp.loop.exit:2043// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])2044// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42045// CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 02046// CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2047// CHECK3:       .omp.lastprivate.then:2048// CHECK3-NEXT:    store i32 2, ptr [[B3]], align 42049// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B3]], align 42050// CHECK3-NEXT:    store i32 [[TMP19]], ptr [[B]], align 42051// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B3]], align 42052// CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 22053// CHECK3-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i82054// CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B7]], align 82055// CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 152056// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -162057// CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]2058// CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B7]], align 82059// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2060// CHECK3:       .omp.lastprivate.done:2061// CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP4]])2062// CHECK3-NEXT:    ret void2063//2064//2065// CHECK4-LABEL: define {{[^@]+}}@main2066// CHECK4-SAME: () #[[ATTR0:[0-9]+]] {2067// CHECK4-NEXT:  entry:2068// CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42069// CHECK4-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 82070// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, i32 }>, align 82071// CHECK4-NEXT:    store i32 0, ptr [[RETVAL]], align 42072// CHECK4-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)2073// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 02074// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 82075// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 12076// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82077// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 22078// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42079// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 32080// CHECK4-NEXT:    store ptr @__main_block_invoke, ptr [[BLOCK_INVOKE]], align 82081// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 42082// CHECK4-NEXT:    store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 82083// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 52084// CHECK4-NEXT:    [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 42085// CHECK4-NEXT:    store i32 [[TMP0]], ptr [[BLOCK_CAPTURED]], align 82086// CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32087// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 82088// CHECK4-NEXT:    call void [[TMP2]](ptr noundef [[BLOCK]])2089// CHECK4-NEXT:    ret i32 02090//2091//2092// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi2093// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {2094// CHECK4-NEXT:  entry:2095// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82096// CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82097// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82098// CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82099// CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82100// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 82101// CHECK4-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])2102// CHECK4-NEXT:    ret void2103//2104//2105// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke2106// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {2107// CHECK4-NEXT:  entry:2108// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82109// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82110// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82111// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82112// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @__main_block_invoke.omp_outlined, ptr @_ZZ4mainE5sivar)2113// CHECK4-NEXT:    ret void2114//2115//2116// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined2117// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {2118// CHECK4-NEXT:  entry:2119// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82120// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82121// CHECK4-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 82122// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82123// CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42124// CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32, align 42125// CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42126// CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42127// CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42128// CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42129// CHECK4-NEXT:    [[G:%.*]] = alloca i32, align 1282130// CHECK4-NEXT:    [[G1:%.*]] = alloca i32, align 42131// CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 82132// CHECK4-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 42133// CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 42134// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, align 1282135// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82136// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82137// CHECK4-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 82138// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 82139// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr @g1, align 82140// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82141// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42142// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42143// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42144// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42145// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr @g1, align 82146// CHECK4-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 82147// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82148// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42149// CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2150// CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42151// CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 12152// CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2153// CHECK4:       cond.true:2154// CHECK4-NEXT:    br label [[COND_END:%.*]]2155// CHECK4:       cond.false:2156// CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42157// CHECK4-NEXT:    br label [[COND_END]]2158// CHECK4:       cond.end:2159// CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2160// CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42161// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42162// CHECK4-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42163// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2164// CHECK4:       omp.inner.for.cond:2165// CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42166// CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42167// CHECK4-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2168// CHECK4-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2169// CHECK4:       omp.inner.for.body:2170// CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42171// CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12172// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2173// CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 42174// CHECK4-NEXT:    store i32 1, ptr [[G]], align 1282175// CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 82176// CHECK4-NEXT:    store volatile i32 1, ptr [[TMP11]], align 42177// CHECK4-NEXT:    store i32 2, ptr [[SIVAR3]], align 42178// CHECK4-NEXT:    store i32 1, ptr [[G]], align 1282179// CHECK4-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 82180// CHECK4-NEXT:    store volatile i32 1, ptr [[TMP12]], align 42181// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 02182// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 1282183// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 12184// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82185// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 22186// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42187// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 32188// CHECK4-NEXT:    store ptr @g1_block_invoke, ptr [[BLOCK_INVOKE]], align 162189// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 42190// CHECK4-NEXT:    store ptr @__block_descriptor_tmp, ptr [[BLOCK_DESCRIPTOR]], align 82191// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 82192// CHECK4-NEXT:    [[TMP13:%.*]] = load volatile i32, ptr [[G]], align 1282193// CHECK4-NEXT:    store volatile i32 [[TMP13]], ptr [[BLOCK_CAPTURED]], align 1282194// CHECK4-NEXT:    [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 52195// CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP2]], align 82196// CHECK4-NEXT:    store ptr [[TMP14]], ptr [[BLOCK_CAPTURED5]], align 322197// CHECK4-NEXT:    [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 62198// CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[SIVAR3]], align 42199// CHECK4-NEXT:    store i32 [[TMP15]], ptr [[BLOCK_CAPTURED6]], align 82200// CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32201// CHECK4-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 82202// CHECK4-NEXT:    call void [[TMP17]](ptr noundef [[BLOCK]])2203// CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2204// CHECK4:       omp.body.continue:2205// CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2206// CHECK4:       omp.inner.for.inc:2207// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42208// CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 12209// CHECK4-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 42210// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]2211// CHECK4:       omp.inner.for.end:2212// CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2213// CHECK4:       omp.loop.exit:2214// CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])2215// CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42216// CHECK4-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 02217// CHECK4-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2218// CHECK4:       .omp.lastprivate.then:2219// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[G]], align 1282220// CHECK4-NEXT:    store volatile i32 [[TMP21]], ptr @g, align 1282221// CHECK4-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[_TMP2]], align 82222// CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 42223// CHECK4-NEXT:    store volatile i32 [[TMP23]], ptr [[TMP2]], align 42224// CHECK4-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SIVAR3]], align 42225// CHECK4-NEXT:    store i32 [[TMP24]], ptr [[TMP0]], align 42226// CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2227// CHECK4:       .omp.lastprivate.done:2228// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]])2229// CHECK4-NEXT:    ret void2230//2231//2232// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke2233// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {2234// CHECK4-NEXT:  entry:2235// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82236// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82237// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82238// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82239// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 82240// CHECK4-NEXT:    store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 1282241// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 52242// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 322243// CHECK4-NEXT:    store i32 1, ptr [[TMP0]], align 42244// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62245// CHECK4-NEXT:    store i32 4, ptr [[BLOCK_CAPTURE_ADDR2]], align 82246// CHECK4-NEXT:    ret void2247//2248//2249// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi2250// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2251// CHECK4-NEXT:  entry:2252// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82253// CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82254// CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42255// CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 42256// CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 82257// CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42258// CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42259// CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42260// CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42261// CHECK4-NEXT:    [[A3:%.*]] = alloca i32, align 42262// CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 82263// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, align 82264// CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])2265// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82266// CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82267// CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82268// CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 02269// CHECK4-NEXT:    store i32 0, ptr [[A]], align 82270// CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 22271// CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 82272// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -162273// CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 02274// CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 82275// CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 32276// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 82277// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C]], align 82278// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])2279// CHECK4-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 82280// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42281// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42282// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42283// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42284// CHECK4-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 82285// CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2286// CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42287// CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 12288// CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2289// CHECK4:       cond.true:2290// CHECK4-NEXT:    br label [[COND_END:%.*]]2291// CHECK4:       cond.false:2292// CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42293// CHECK4-NEXT:    br label [[COND_END]]2294// CHECK4:       cond.end:2295// CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]2296// CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42297// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42298// CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 42299// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2300// CHECK4:       omp.inner.for.cond:2301// CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42302// CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42303// CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2304// CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2305// CHECK4:       omp.inner.for.body:2306// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42307// CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12308// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2309// CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 82310// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 42311// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 02312// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 82313// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 12314// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82315// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 22316// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42317// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 32318// CHECK4-NEXT:    store ptr @___ZN2SSC2ERi_block_invoke, ptr [[BLOCK_INVOKE]], align 82319// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 42320// CHECK4-NEXT:    store ptr @__block_descriptor_tmp.3, ptr [[BLOCK_DESCRIPTOR]], align 82321// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 52322// CHECK4-NEXT:    store ptr [[THIS1]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 82323// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 62324// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 82325// CHECK4-NEXT:    store ptr [[TMP9]], ptr [[BLOCK_CAPTURED]], align 82326// CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32327// CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 82328// CHECK4-NEXT:    call void [[TMP11]](ptr noundef [[BLOCK]])2329// CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2330// CHECK4:       omp.body.continue:2331// CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2332// CHECK4:       omp.inner.for.inc:2333// CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42334// CHECK4-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 12335// CHECK4-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42336// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]2337// CHECK4:       omp.inner.for.end:2338// CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2339// CHECK4:       omp.loop.exit:2340// CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])2341// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])2342// CHECK4-NEXT:    ret void2343//2344//2345// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined2346// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {2347// CHECK4-NEXT:  entry:2348// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82349// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82350// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82351// CHECK4-NEXT:    [[E:%.*]] = alloca ptr, align 82352// CHECK4-NEXT:    [[A:%.*]] = alloca ptr, align 82353// CHECK4-NEXT:    [[B:%.*]] = alloca i32, align 42354// CHECK4-NEXT:    [[C:%.*]] = alloca ptr, align 82355// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82356// CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 82357// CHECK4-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 82358// CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42359// CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 42360// CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42361// CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42362// CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42363// CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42364// CHECK4-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 12365// CHECK4-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 82366// CHECK4-NEXT:    [[A9:%.*]] = alloca i32, align 42367// CHECK4-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 82368// CHECK4-NEXT:    [[B11:%.*]] = alloca i32, align 42369// CHECK4-NEXT:    [[C12:%.*]] = alloca i32, align 42370// CHECK4-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 82371// CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 42372// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 82373// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82374// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82375// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82376// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82377// CHECK4-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 12378// CHECK4-NEXT:    store ptr [[E1]], ptr [[E]], align 82379// CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 02380// CHECK4-NEXT:    store ptr [[A2]], ptr [[A]], align 82381// CHECK4-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 32382// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 82383// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C]], align 82384// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 82385// CHECK4-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 82386// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 82387// CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 82388// CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 82389// CHECK4-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 82390// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42391// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42392// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42393// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42394// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 82395// CHECK4-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)2396// CHECK4-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 82397// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82398// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42399// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])2400// CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 82401// CHECK4-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 82402// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 82403// CHECK4-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 82404// CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 82405// CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2406// CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42407// CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 12408// CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2409// CHECK4:       cond.true:2410// CHECK4-NEXT:    br label [[COND_END:%.*]]2411// CHECK4:       cond.false:2412// CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42413// CHECK4-NEXT:    br label [[COND_END]]2414// CHECK4:       cond.end:2415// CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]2416// CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42417// CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42418// CHECK4-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 42419// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2420// CHECK4:       omp.inner.for.cond:2421// CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42422// CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42423// CHECK4-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]2424// CHECK4-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2425// CHECK4:       omp.inner.for.body:2426// CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42427// CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 12428// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2429// CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 42430// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 02431// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 82432// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 12433// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82434// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 22435// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42436// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 32437// CHECK4-NEXT:    store ptr @g1_block_invoke_2, ptr [[BLOCK_INVOKE]], align 82438// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 42439// CHECK4-NEXT:    store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 82440// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 52441// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 82442// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 62443// CHECK4-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 82444// CHECK4-NEXT:    store ptr [[TMP17]], ptr [[BLOCK_CAPTURED]], align 82445// CHECK4-NEXT:    [[BLOCK_CAPTURED15:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 82446// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B11]], align 42447// CHECK4-NEXT:    store i32 [[TMP18]], ptr [[BLOCK_CAPTURED15]], align 82448// CHECK4-NEXT:    [[BLOCK_CAPTURED16:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 72449// CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP13]], align 82450// CHECK4-NEXT:    store ptr [[TMP19]], ptr [[BLOCK_CAPTURED16]], align 82451// CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32452// CHECK4-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 82453// CHECK4-NEXT:    call void [[TMP21]](ptr noundef [[BLOCK]])2454// CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2455// CHECK4:       omp.body.continue:2456// CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2457// CHECK4:       omp.inner.for.inc:2458// CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42459// CHECK4-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP22]], 12460// CHECK4-NEXT:    store i32 [[ADD17]], ptr [[DOTOMP_IV]], align 42461// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]2462// CHECK4:       omp.inner.for.end:2463// CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2464// CHECK4:       omp.loop.exit:2465// CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])2466// CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42467// CHECK4-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 02468// CHECK4-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2469// CHECK4:       .omp.lastprivate.then:2470// CHECK4-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 82471// CHECK4-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42472// CHECK4-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 42473// CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 42474// CHECK4-NEXT:    store i32 [[TMP27]], ptr [[B]], align 42475// CHECK4-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 82476// CHECK4-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 42477// CHECK4-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 42478// CHECK4-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 82479// CHECK4-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 12480// CHECK4-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 12481// CHECK4-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 42482// CHECK4-NEXT:    [[B18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 22483// CHECK4-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i82484// CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B18]], align 82485// CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 152486// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -162487// CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]2488// CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B18]], align 82489// CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2490// CHECK4:       .omp.lastprivate.done:2491// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])2492// CHECK4-NEXT:    ret void2493//2494//2495// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_22496// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {2497// CHECK4-NEXT:  entry:2498// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82499// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82500// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82501// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82502// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 52503// CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 82504// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62505// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 82506// CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42507// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 12508// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 42509// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 82510// CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 82511// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -12512// CHECK4-NEXT:    store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 82513// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 72514// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 82515// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42516// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 12517// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 42518// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62519// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 82520// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 82521// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 72522// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 82523// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @g1_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])2524// CHECK4-NEXT:    ret void2525//2526//2527// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined2528// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {2529// CHECK4-NEXT:  entry:2530// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82531// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82532// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82533// CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82534// CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82535// CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82536// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82537// CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82538// CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 82539// CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 82540// CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42541// CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32, align 42542// CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42543// CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42544// CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42545// CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42546// CHECK4-NEXT:    [[A5:%.*]] = alloca i32, align 42547// CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82548// CHECK4-NEXT:    [[B7:%.*]] = alloca i32, align 42549// CHECK4-NEXT:    [[C8:%.*]] = alloca i32, align 42550// CHECK4-NEXT:    [[_TMP9:%.*]] = alloca ptr, align 82551// CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 42552// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82553// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82554// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82555// CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82556// CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82557// CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82558// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82559// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82560// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 82561// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 82562// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82563// CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 82564// CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 82565// CHECK4-NEXT:    store ptr [[TMP4]], ptr [[_TMP2]], align 82566// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 82567// CHECK4-NEXT:    store ptr [[TMP5]], ptr [[_TMP3]], align 82568// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42569// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42570// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42571// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42572// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 82573// CHECK4-NEXT:    store ptr [[A5]], ptr [[_TMP6]], align 82574// CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 82575// CHECK4-NEXT:    store ptr [[C8]], ptr [[_TMP9]], align 82576// CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82577// CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 42578// CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2579// CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42580// CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 12581// CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2582// CHECK4:       cond.true:2583// CHECK4-NEXT:    br label [[COND_END:%.*]]2584// CHECK4:       cond.false:2585// CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42586// CHECK4-NEXT:    br label [[COND_END]]2587// CHECK4:       cond.end:2588// CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]2589// CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42590// CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42591// CHECK4-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 42592// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2593// CHECK4:       omp.inner.for.cond:2594// CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42595// CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42596// CHECK4-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]2597// CHECK4-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2598// CHECK4:       omp.inner.for.body:2599// CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42600// CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 12601// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2602// CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 42603// CHECK4-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 82604// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 42605// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 12606// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP16]], align 42607// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B7]], align 42608// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -12609// CHECK4-NEXT:    store i32 [[DEC]], ptr [[B7]], align 42610// CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP9]], align 82611// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42612// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 12613// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP19]], align 42614// CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2615// CHECK4:       omp.body.continue:2616// CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2617// CHECK4:       omp.inner.for.inc:2618// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42619// CHECK4-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 12620// CHECK4-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 42621// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]2622// CHECK4:       omp.inner.for.end:2623// CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2624// CHECK4:       omp.loop.exit:2625// CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP9]])2626// CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42627// CHECK4-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 02628// CHECK4-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2629// CHECK4:       .omp.lastprivate.then:2630// CHECK4-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[_TMP6]], align 82631// CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 42632// CHECK4-NEXT:    store i32 [[TMP25]], ptr [[TMP6]], align 42633// CHECK4-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B7]], align 42634// CHECK4-NEXT:    store i32 [[TMP26]], ptr [[TMP2]], align 42635// CHECK4-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP9]], align 82636// CHECK4-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 42637// CHECK4-NEXT:    store i32 [[TMP28]], ptr [[TMP7]], align 42638// CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2639// CHECK4:       .omp.lastprivate.done:2640// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP9]])2641// CHECK4-NEXT:    ret void2642//2643//2644// CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke2645// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {2646// CHECK4-NEXT:  entry:2647// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82648// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82649// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82650// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82651// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 52652// CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 82653// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62654// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 82655// CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42656// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 12657// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 42658// CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS]], i32 0, i32 22659// CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 82660// CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 42661// CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 42662// CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i322663// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -12664// CHECK4-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i82665// CHECK4-NEXT:    [[BF_LOAD1:%.*]] = load i8, ptr [[B]], align 82666// CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 152667// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -162668// CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]2669// CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 82670// CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 42671// CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 42672// CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i322673// CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS]], i32 0, i32 32674// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 82675// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42676// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 12677// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 42678// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62679// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 82680// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @___ZN2SSC2ERi_block_invoke.omp_outlined, ptr [[THIS]], ptr [[TMP5]])2681// CHECK4-NEXT:    ret void2682//2683//2684// CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke.omp_outlined2685// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {2686// CHECK4-NEXT:  entry:2687// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82688// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82689// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82690// CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82691// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82692// CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82693// CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42694// CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 42695// CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 82696// CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42697// CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42698// CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42699// CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42700// CHECK4-NEXT:    [[C:%.*]] = alloca i32, align 42701// CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 82702// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82703// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82704// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82705// CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82706// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82707// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82708// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82709// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 82710// CHECK4-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 82711// CHECK4-NEXT:    store ptr [[_TMP2]], ptr [[_TMP3]], align 82712// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42713// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42714// CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42715// CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42716// CHECK4-NEXT:    store ptr [[C]], ptr [[_TMP4]], align 82717// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82718// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42719// CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2720// CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42721// CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 12722// CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2723// CHECK4:       cond.true:2724// CHECK4-NEXT:    br label [[COND_END:%.*]]2725// CHECK4:       cond.false:2726// CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42727// CHECK4-NEXT:    br label [[COND_END]]2728// CHECK4:       cond.end:2729// CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]2730// CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42731// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42732// CHECK4-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 42733// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2734// CHECK4:       omp.inner.for.cond:2735// CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42736// CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42737// CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2738// CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2739// CHECK4:       omp.inner.for.body:2740// CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42741// CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12742// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2743// CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 82744// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP11]], align 42745// CHECK4-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP1]], align 82746// CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 42747// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP13]], 12748// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP12]], align 42749// CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 22750// CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 82751// CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 42752// CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 42753// CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i322754// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -12755// CHECK4-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i82756// CHECK4-NEXT:    [[BF_LOAD6:%.*]] = load i8, ptr [[B]], align 82757// CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 152758// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -162759// CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]2760// CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 82761// CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 42762// CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 42763// CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i322764// CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP4]], align 82765// CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 42766// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 12767// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP15]], align 42768// CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2769// CHECK4:       omp.body.continue:2770// CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2771// CHECK4:       omp.inner.for.inc:2772// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42773// CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 12774// CHECK4-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 42775// CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]2776// CHECK4:       omp.inner.for.end:2777// CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2778// CHECK4:       omp.loop.exit:2779// CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])2780// CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])2781// CHECK4-NEXT:    ret void2782//2783//2784// CHECK5-LABEL: define {{[^@]+}}@main2785// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {2786// CHECK5-NEXT:  entry:2787// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42788// CHECK5-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 82789// CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42790// CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 42791// CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 42792// CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42793// CHECK5-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 42794// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 42795// CHECK5-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)2796// CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2797// CHECK5-NEXT:    store i32 0, ptr [[T_VAR]], align 42798// CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)2799// CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2800// CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 12801// CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2802// CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)2803// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 5, ptr @main.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[VAR]], ptr @_ZZ4mainE5sivar)2804// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.1)2805// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.2)2806// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.3)2807// CHECK5-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2808// CHECK5-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42809// CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]]2810// CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02811// CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 22812// CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2813// CHECK5:       arraydestroy.body:2814// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2815// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12816// CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2817// CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]2818// CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]2819// CHECK5:       arraydestroy.done1:2820// CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]2821// CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 42822// CHECK5-NEXT:    ret i32 [[TMP1]]2823//2824//2825// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi2826// CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {2827// CHECK5-NEXT:  entry:2828// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82829// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82830// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82831// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82832// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82833// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 82834// CHECK5-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])2835// CHECK5-NEXT:    ret void2836//2837//2838// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2839// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2840// CHECK5-NEXT:  entry:2841// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82842// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82843// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82844// CHECK5-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2845// CHECK5-NEXT:    ret void2846//2847//2848// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2849// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2850// CHECK5-NEXT:  entry:2851// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82852// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 42853// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82854// CHECK5-NEXT:    store float [[A]], ptr [[A_ADDR]], align 42855// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82856// CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42857// CHECK5-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2858// CHECK5-NEXT:    ret void2859//2860//2861// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined2862// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {2863// CHECK5-NEXT:  entry:2864// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82865// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82866// CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 82867// CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 82868// CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 82869// CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 82870// CHECK5-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 82871// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42872// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 42873// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42874// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42875// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42876// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42877// CHECK5-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 42878// CHECK5-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 42879// CHECK5-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 42880// CHECK5-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 42881// CHECK5-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 42882// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 42883// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82884// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82885// CHECK5-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82886// CHECK5-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 82887// CHECK5-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 82888// CHECK5-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 82889// CHECK5-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 82890// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82891// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 82892// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 82893// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 82894// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 82895// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42896// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 42897// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42898// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42899// CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 02900// CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 22901// CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]2902// CHECK5:       arrayctor.loop:2903// CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2904// CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2905// CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 12906// CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2907// CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2908// CHECK5:       arrayctor.cont:2909// CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])2910// CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82911// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42912// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2913// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42914// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 12915// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2916// CHECK5:       cond.true:2917// CHECK5-NEXT:    br label [[COND_END:%.*]]2918// CHECK5:       cond.false:2919// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42920// CHECK5-NEXT:    br label [[COND_END]]2921// CHECK5:       cond.end:2922// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]2923// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42924// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42925// CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42926// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2927// CHECK5:       omp.inner.for.cond:2928// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42929// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42930// CHECK5-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]2931// CHECK5-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2932// CHECK5:       omp.inner.for.cond.cleanup:2933// CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]2934// CHECK5:       omp.inner.for.body:2935// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42936// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 12937// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2938// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 42939// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 42940// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 42941// CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i642942// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i64 0, i64 [[IDXPROM]]2943// CHECK5-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 42944// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 42945// CHECK5-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i642946// CHECK5-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i64 0, i64 [[IDXPROM7]]2947// CHECK5-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])2948// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 42949// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SIVAR5]], align 42950// CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]2951// CHECK5-NEXT:    store i32 [[ADD9]], ptr [[SIVAR5]], align 42952// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2953// CHECK5:       omp.body.continue:2954// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2955// CHECK5:       omp.inner.for.inc:2956// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42957// CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 12958// CHECK5-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 42959// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]2960// CHECK5:       omp.inner.for.end:2961// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2962// CHECK5:       omp.loop.exit:2963// CHECK5-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82964// CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42965// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])2966// CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42967// CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 02968// CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]2969// CHECK5:       .omp.lastprivate.then:2970// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 42971// CHECK5-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 42972// CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC2]], i64 8, i1 false)2973// CHECK5-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 02974// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 22975// CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]2976// CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2977// CHECK5:       omp.arraycpy.body:2978// CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR3]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2979// CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2980// CHECK5-NEXT:    [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])2981// CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12982// CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12983// CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]2984// CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]2985// CHECK5:       omp.arraycpy.done13:2986// CHECK5-NEXT:    [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])2987// CHECK5-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SIVAR5]], align 42988// CHECK5-NEXT:    store i32 [[TMP25]], ptr [[TMP4]], align 42989// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]2990// CHECK5:       .omp.lastprivate.done:2991// CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]]2992// CHECK5-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 02993// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 22994// CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]2995// CHECK5:       arraydestroy.body:2996// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2997// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12998// CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]2999// CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]3000// CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]3001// CHECK5:       arraydestroy.done16:3002// CHECK5-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83003// CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 43004// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP28]])3005// CHECK5-NEXT:    ret void3006//3007//3008// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev3009// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3010// CHECK5-NEXT:  entry:3011// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83012// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83013// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83014// CHECK5-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]3015// CHECK5-NEXT:    ret void3016//3017//3018// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.13019// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {3020// CHECK5-NEXT:  entry:3021// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83022// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83023// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43024// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 43025// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43026// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43027// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43028// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43029// CHECK5-NEXT:    [[F:%.*]] = alloca float, align 43030// CHECK5-NEXT:    [[X:%.*]] = alloca double, align 83031// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43032// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83033// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83034// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43035// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43036// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43037// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43038// CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr @f, align 43039// CHECK5-NEXT:    store float [[TMP0]], ptr [[F]], align 43040// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83041// CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43042// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])3043// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3044// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43045// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 13046// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3047// CHECK5:       cond.true:3048// CHECK5-NEXT:    br label [[COND_END:%.*]]3049// CHECK5:       cond.false:3050// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43051// CHECK5-NEXT:    br label [[COND_END]]3052// CHECK5:       cond.end:3053// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3054// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43055// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43056// CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43057// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3058// CHECK5:       omp.inner.for.cond:3059// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43060// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43061// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3062// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3063// CHECK5:       omp.inner.for.body:3064// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43065// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13066// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3067// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 43068// CHECK5-NEXT:    [[TMP9:%.*]] = load double, ptr [[X]], align 83069// CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+003070// CHECK5-NEXT:    store double [[INC]], ptr [[X]], align 83071// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3072// CHECK5:       omp.body.continue:3073// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3074// CHECK5:       omp.inner.for.inc:3075// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43076// CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13077// CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43078// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3079// CHECK5:       omp.inner.for.end:3080// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3081// CHECK5:       omp.loop.exit:3082// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3083// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43084// CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03085// CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3086// CHECK5:       .omp.lastprivate.then:3087// CHECK5-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 83088// CHECK5-NEXT:    store double [[TMP13]], ptr @_ZN1A1xE, align 83089// CHECK5-NEXT:    [[TMP14:%.*]] = load float, ptr [[F]], align 43090// CHECK5-NEXT:    store float [[TMP14]], ptr @f, align 43091// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3092// CHECK5:       .omp.lastprivate.done:3093// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])3094// CHECK5-NEXT:    ret void3095//3096//3097// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.23098// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {3099// CHECK5-NEXT:  entry:3100// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83101// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83102// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43103// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 43104// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43105// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43106// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43107// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43108// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43109// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83110// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83111// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43112// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43113// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43114// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43115// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83116// CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 43117// CHECK5-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 4, ptr inttoptr (i64 3 to ptr))3118// CHECK5-NEXT:    [[TMP2:%.*]] = load float, ptr @f, align 43119// CHECK5-NEXT:    store float [[TMP2]], ptr [[DOTF__VOID_ADDR]], align 43120// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])3121// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3122// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43123// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 13124// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3125// CHECK5:       cond.true:3126// CHECK5-NEXT:    br label [[COND_END:%.*]]3127// CHECK5:       cond.false:3128// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43129// CHECK5-NEXT:    br label [[COND_END]]3130// CHECK5:       cond.end:3131// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3132// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43133// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43134// CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43135// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3136// CHECK5:       omp.inner.for.cond:3137// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43138// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43139// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3140// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3141// CHECK5:       omp.inner.for.cond.cleanup:3142// CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3143// CHECK5:       omp.inner.for.body:3144// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43145// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13146// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3147// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 43148// CHECK5-NEXT:    [[TMP9:%.*]] = load double, ptr @_ZN1A1xE, align 83149// CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+003150// CHECK5-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 83151// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3152// CHECK5:       omp.body.continue:3153// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3154// CHECK5:       omp.inner.for.inc:3155// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43156// CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13157// CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43158// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3159// CHECK5:       omp.inner.for.end:3160// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3161// CHECK5:       omp.loop.exit:3162// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])3163// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43164// CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03165// CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3166// CHECK5:       .omp.lastprivate.then:3167// CHECK5-NEXT:    [[TMP13:%.*]] = load float, ptr [[DOTF__VOID_ADDR]], align 43168// CHECK5-NEXT:    store float [[TMP13]], ptr @f, align 43169// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3170// CHECK5:       .omp.lastprivate.done:3171// CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTF__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))3172// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])3173// CHECK5-NEXT:    ret void3174//3175//3176// CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.33177// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {3178// CHECK5-NEXT:  entry:3179// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83180// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83181// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43182// CHECK5-NEXT:    [[TMP:%.*]] = alloca i8, align 13183// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43184// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43185// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43186// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43187// CHECK5-NEXT:    [[F:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 43188// CHECK5-NEXT:    [[CNT:%.*]] = alloca i8, align 13189// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83190// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83191// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43192// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43193// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43194// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43195// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83196// CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 43197// CHECK5-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 1, ptr inttoptr (i64 3 to ptr))3198// CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT_LASPRIVATE_CONDITIONAL]], ptr [[F]], i32 0, i32 13199// CHECK5-NEXT:    store i8 0, ptr [[TMP2]], align 43200// CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT_LASPRIVATE_CONDITIONAL]], ptr [[F]], i32 0, i32 03201// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3202// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43203// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13204// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3205// CHECK5:       cond.true:3206// CHECK5-NEXT:    br label [[COND_END:%.*]]3207// CHECK5:       cond.false:3208// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43209// CHECK5-NEXT:    br label [[COND_END]]3210// CHECK5:       cond.end:3211// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3212// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43213// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43214// CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43215// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3216// CHECK5:       omp.inner.for.cond:3217// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43218// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43219// CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3220// CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3221// CHECK5:       omp.inner.for.cond.cleanup:3222// CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3223// CHECK5:       omp.inner.for.body:3224// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43225// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13226// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3227// CHECK5-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i83228// CHECK5-NEXT:    store i8 [[CONV]], ptr [[DOTCNT__VOID_ADDR]], align 13229// CHECK5-NEXT:    [[TMP10:%.*]] = load double, ptr @_ZN1A1xE, align 83230// CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP10]], 1.000000e+003231// CHECK5-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 83232// CHECK5-NEXT:    store float 0.000000e+00, ptr [[TMP3]], align 43233// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43234// CHECK5-NEXT:    call void @__kmpc_critical(ptr @[[GLOB3]], i32 [[TMP1]], ptr @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)3235// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr @.{{pl_cond[.].+[.|,]}} align 43236// CHECK5-NEXT:    [[TMP13:%.*]] = icmp sle i32 [[TMP12]], [[TMP11]]3237// CHECK5-NEXT:    br i1 [[TMP13]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]3238// CHECK5:       lp_cond_then:3239// CHECK5-NEXT:    store i32 [[TMP11]], ptr @.{{pl_cond[.].+[.|,]}} align 43240// CHECK5-NEXT:    [[TMP14:%.*]] = load float, ptr [[TMP3]], align 43241// CHECK5-NEXT:    store float [[TMP14]], ptr @{{pl_cond[.].+[.|,]}} align 43242// CHECK5-NEXT:    br label [[LP_COND_EXIT]]3243// CHECK5:       lp_cond_exit:3244// CHECK5-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB3]], i32 [[TMP1]], ptr @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)3245// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3246// CHECK5:       omp.body.continue:3247// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3248// CHECK5:       omp.inner.for.inc:3249// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43250// CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP15]], 13251// CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43252// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3253// CHECK5:       omp.inner.for.end:3254// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3255// CHECK5:       omp.loop.exit:3256// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])3257// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43258// CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 03259// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])3260// CHECK5-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3261// CHECK5:       .omp.lastprivate.then:3262// CHECK5-NEXT:    store i8 2, ptr [[DOTCNT__VOID_ADDR]], align 13263// CHECK5-NEXT:    [[TMP18:%.*]] = load i8, ptr [[DOTCNT__VOID_ADDR]], align 13264// CHECK5-NEXT:    store i8 [[TMP18]], ptr @cnt, align 13265// CHECK5-NEXT:    [[TMP19:%.*]] = load float, ptr @{{pl_cond[.].+[.|,]}} align 43266// CHECK5-NEXT:    store float [[TMP19]], ptr [[TMP3]], align 43267// CHECK5-NEXT:    [[TMP20:%.*]] = load float, ptr [[TMP3]], align 43268// CHECK5-NEXT:    store float [[TMP20]], ptr @f, align 43269// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3270// CHECK5:       .omp.lastprivate.done:3271// CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTCNT__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))3272// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])3273// CHECK5-NEXT:    ret void3274//3275//3276// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v3277// CHECK5-SAME: () #[[ATTR1]] {3278// CHECK5-NEXT:  entry:3279// CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 43280// CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 43281// CHECK5-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 43282// CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 1283283// CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 1283284// CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 1283285// CHECK5-NEXT:    [[VAR:%.*]] = alloca ptr, align 1283286// CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])3287// CHECK5-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])3288// CHECK5-NEXT:    store i32 0, ptr [[T_VAR]], align 1283289// CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)3290// CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)3291// CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 13292// CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)3293// CHECK5-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 1283294// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 1283295// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP0]])3296// CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 43297// CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 03298// CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 23299// CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]3300// CHECK5:       arraydestroy.body:3301// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]3302// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -13303// CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]3304// CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]3305// CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]3306// CHECK5:       arraydestroy.done1:3307// CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]3308// CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[RETVAL]], align 43309// CHECK5-NEXT:    ret i32 [[TMP2]]3310//3311//3312// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi3313// CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3314// CHECK5-NEXT:  entry:3315// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83316// CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 83317// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43318// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 43319// CHECK5-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 83320// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43321// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43322// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43323// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43324// CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 43325// CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 83326// CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])3327// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83328// CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 83329// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83330// CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 03331// CHECK5-NEXT:    store i32 0, ptr [[A]], align 83332// CHECK5-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 23333// CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 83334// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -163335// CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 03336// CHECK5-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 83337// CHECK5-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 33338// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 83339// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[C]], align 83340// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])3341// CHECK5-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 83342// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43343// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43344// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43345// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43346// CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 83347// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3348// CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43349// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 13350// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3351// CHECK5:       cond.true:3352// CHECK5-NEXT:    br label [[COND_END:%.*]]3353// CHECK5:       cond.false:3354// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43355// CHECK5-NEXT:    br label [[COND_END]]3356// CHECK5:       cond.end:3357// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]3358// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43359// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43360// CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 43361// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3362// CHECK5:       omp.inner.for.cond:3363// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43364// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43365// CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]3366// CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3367// CHECK5:       omp.inner.for.body:3368// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43369// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 13370// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3371// CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 83372// CHECK5-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 43373// CHECK5-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 83374// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 43375// CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 13376// CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP9]], align 43377// CHECK5-NEXT:    [[B6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 23378// CHECK5-NEXT:    [[BF_LOAD7:%.*]] = load i8, ptr [[B6]], align 83379// CHECK5-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 43380// CHECK5-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 43381// CHECK5-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i323382// CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -13383// CHECK5-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i83384// CHECK5-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B6]], align 83385// CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 153386// CHECK5-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -163387// CHECK5-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]3388// CHECK5-NEXT:    store i8 [[BF_SET10]], ptr [[B6]], align 83389// CHECK5-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 43390// CHECK5-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 43391// CHECK5-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i323392// CHECK5-NEXT:    [[C11:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 33393// CHECK5-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[C11]], align 83394// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 43395// CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 13396// CHECK5-NEXT:    store i32 [[DIV]], ptr [[TMP12]], align 43397// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3398// CHECK5:       omp.body.continue:3399// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3400// CHECK5:       omp.inner.for.inc:3401// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43402// CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 13403// CHECK5-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 43404// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3405// CHECK5:       omp.inner.for.end:3406// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3407// CHECK5:       omp.loop.exit:3408// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])3409// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])3410// CHECK5-NEXT:    ret void3411//3412//3413// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined3414// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {3415// CHECK5-NEXT:  entry:3416// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83417// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83418// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83419// CHECK5-NEXT:    [[E:%.*]] = alloca ptr, align 83420// CHECK5-NEXT:    [[A:%.*]] = alloca ptr, align 83421// CHECK5-NEXT:    [[B:%.*]] = alloca i32, align 43422// CHECK5-NEXT:    [[C:%.*]] = alloca ptr, align 83423// CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 83424// CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 83425// CHECK5-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 83426// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43427// CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 43428// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43429// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43430// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43431// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43432// CHECK5-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 13433// CHECK5-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 83434// CHECK5-NEXT:    [[A9:%.*]] = alloca i32, align 43435// CHECK5-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 83436// CHECK5-NEXT:    [[B11:%.*]] = alloca i32, align 43437// CHECK5-NEXT:    [[C12:%.*]] = alloca i32, align 43438// CHECK5-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 83439// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43440// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83441// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83442// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83443// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83444// CHECK5-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 13445// CHECK5-NEXT:    store ptr [[E1]], ptr [[E]], align 83446// CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 03447// CHECK5-NEXT:    store ptr [[A2]], ptr [[A]], align 83448// CHECK5-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 33449// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 83450// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[C]], align 83451// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 83452// CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 83453// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 83454// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 83455// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 83456// CHECK5-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 83457// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43458// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43459// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43460// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43461// CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 83462// CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)3463// CHECK5-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 83464// CHECK5-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83465// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 43466// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])3467// CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 83468// CHECK5-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 83469// CHECK5-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 83470// CHECK5-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 83471// CHECK5-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 83472// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3473// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43474// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 13475// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3476// CHECK5:       cond.true:3477// CHECK5-NEXT:    br label [[COND_END:%.*]]3478// CHECK5:       cond.false:3479// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43480// CHECK5-NEXT:    br label [[COND_END]]3481// CHECK5:       cond.end:3482// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]3483// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43484// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43485// CHECK5-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 43486// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3487// CHECK5:       omp.inner.for.cond:3488// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43489// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43490// CHECK5-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]3491// CHECK5-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3492// CHECK5:       omp.inner.for.body:3493// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43494// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 13495// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3496// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 43497// CHECK5-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 83498// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 43499// CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP18]], 13500// CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP17]], align 43501// CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B11]], align 43502// CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP19]], -13503// CHECK5-NEXT:    store i32 [[DEC]], ptr [[B11]], align 43504// CHECK5-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[_TMP13]], align 83505// CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 43506// CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP21]], 13507// CHECK5-NEXT:    store i32 [[DIV]], ptr [[TMP20]], align 43508// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3509// CHECK5:       omp.body.continue:3510// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3511// CHECK5:       omp.inner.for.inc:3512// CHECK5-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43513// CHECK5-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP22]], 13514// CHECK5-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 43515// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3516// CHECK5:       omp.inner.for.end:3517// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3518// CHECK5:       omp.loop.exit:3519// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])3520// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43521// CHECK5-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 03522// CHECK5-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3523// CHECK5:       .omp.lastprivate.then:3524// CHECK5-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 83525// CHECK5-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 43526// CHECK5-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 43527// CHECK5-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 43528// CHECK5-NEXT:    store i32 [[TMP27]], ptr [[B]], align 43529// CHECK5-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 83530// CHECK5-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 43531// CHECK5-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 43532// CHECK5-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 83533// CHECK5-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 13534// CHECK5-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 13535// CHECK5-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 43536// CHECK5-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 23537// CHECK5-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i83538// CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 83539// CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 153540// CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -163541// CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]3542// CHECK5-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 83543// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3544// CHECK5:       .omp.lastprivate.done:3545// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])3546// CHECK5-NEXT:    ret void3547//3548//3549// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev3550// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3551// CHECK5-NEXT:  entry:3552// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83553// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83554// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83555// CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03556// CHECK5-NEXT:    store float 0.000000e+00, ptr [[F]], align 43557// CHECK5-NEXT:    ret void3558//3559//3560// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef3561// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3562// CHECK5-NEXT:  entry:3563// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83564// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 43565// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83566// CHECK5-NEXT:    store float [[A]], ptr [[A_ADDR]], align 43567// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83568// CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 03569// CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 43570// CHECK5-NEXT:    store float [[TMP0]], ptr [[F]], align 43571// CHECK5-NEXT:    ret void3572//3573//3574// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev3575// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3576// CHECK5-NEXT:  entry:3577// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83578// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83579// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83580// CHECK5-NEXT:    ret void3581//3582//3583// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev3584// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3585// CHECK5-NEXT:  entry:3586// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83587// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83588// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83589// CHECK5-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])3590// CHECK5-NEXT:    ret void3591//3592//3593// CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev3594// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3595// CHECK5-NEXT:  entry:3596// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83597// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83598// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83599// CHECK5-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])3600// CHECK5-NEXT:    ret void3601//3602//3603// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei3604// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3605// CHECK5-NEXT:  entry:3606// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83607// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43608// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83609// CHECK5-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43610// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83611// CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43612// CHECK5-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])3613// CHECK5-NEXT:    ret void3614//3615//3616// CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined3617// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {3618// CHECK5-NEXT:  entry:3619// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83620// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83621// CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 83622// CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 83623// CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 83624// CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 83625// CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 83626// CHECK5-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 83627// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43628// CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 43629// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43630// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43631// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43632// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43633// CHECK5-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 1283634// CHECK5-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 1283635// CHECK5-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 1283636// CHECK5-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 1283637// CHECK5-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 83638// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43639// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83640// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83641// CHECK5-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 83642// CHECK5-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 83643// CHECK5-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 83644// CHECK5-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 83645// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 83646// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83647// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 83648// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 83649// CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 83650// CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 83651// CHECK5-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 83652// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43653// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43654// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43655// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43656// CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 03657// CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 23658// CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]3659// CHECK5:       arrayctor.loop:3660// CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]3661// CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])3662// CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 13663// CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]3664// CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]3665// CHECK5:       arrayctor.cont:3666// CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 83667// CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])3668// CHECK5-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 83669// CHECK5-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83670// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 43671// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3672// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43673// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 13674// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3675// CHECK5:       cond.true:3676// CHECK5-NEXT:    br label [[COND_END:%.*]]3677// CHECK5:       cond.false:3678// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43679// CHECK5-NEXT:    br label [[COND_END]]3680// CHECK5:       cond.end:3681// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]3682// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43683// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43684// CHECK5-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 43685// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3686// CHECK5:       omp.inner.for.cond:3687// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43688// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43689// CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]3690// CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]3691// CHECK5:       omp.inner.for.cond.cleanup:3692// CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]3693// CHECK5:       omp.inner.for.body:3694// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43695// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 13696// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3697// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 43698// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 1283699// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 43700// CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i643701// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]3702// CHECK5-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 43703// CHECK5-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 83704// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 43705// CHECK5-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i643706// CHECK5-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]3707// CHECK5-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP16]])3708// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3709// CHECK5:       omp.body.continue:3710// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3711// CHECK5:       omp.inner.for.inc:3712// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43713// CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 13714// CHECK5-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 43715// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3716// CHECK5:       omp.inner.for.end:3717// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3718// CHECK5:       omp.loop.exit:3719// CHECK5-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83720// CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 43721// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])3722// CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43723// CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 03724// CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3725// CHECK5:       .omp.lastprivate.then:3726// CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 1283727// CHECK5-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 1283728// CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP1]], ptr align 128 [[VEC4]], i64 8, i1 false)3729// CHECK5-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 03730// CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 23731// CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]3732// CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]3733// CHECK5:       omp.arraycpy.body:3734// CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3735// CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]3736// CHECK5-NEXT:    [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])3737// CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 13738// CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 13739// CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]3740// CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]3741// CHECK5:       omp.arraycpy.done14:3742// CHECK5-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 83743// CHECK5-NEXT:    [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP25]])3744// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3745// CHECK5:       .omp.lastprivate.done:3746// CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]3747// CHECK5-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 03748// CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 23749// CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]3750// CHECK5:       arraydestroy.body:3751// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]3752// CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -13753// CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]3754// CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]3755// CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]3756// CHECK5:       arraydestroy.done17:3757// CHECK5-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83758// CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 43759// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP28]])3760// CHECK5-NEXT:    ret void3761//3762//3763// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev3764// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3765// CHECK5-NEXT:  entry:3766// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83767// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83768// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83769// CHECK5-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]3770// CHECK5-NEXT:    ret void3771//3772//3773// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev3774// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3775// CHECK5-NEXT:  entry:3776// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83777// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83778// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83779// CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03780// CHECK5-NEXT:    store i32 0, ptr [[F]], align 43781// CHECK5-NEXT:    ret void3782//3783//3784// CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev3785// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3786// CHECK5-NEXT:  entry:3787// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83788// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43789// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 43790// CHECK5-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 83791// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43792// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43793// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43794// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43795// CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 43796// CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 83797// CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])3798// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83799// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83800// CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 03801// CHECK5-NEXT:    store i32 0, ptr [[A]], align 43802// CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])3803// CHECK5-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 83804// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43805// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43806// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43807// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43808// CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 83809// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3810// CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43811// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 13812// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3813// CHECK5:       cond.true:3814// CHECK5-NEXT:    br label [[COND_END:%.*]]3815// CHECK5:       cond.false:3816// CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43817// CHECK5-NEXT:    br label [[COND_END]]3818// CHECK5:       cond.end:3819// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]3820// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43821// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43822// CHECK5-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 43823// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3824// CHECK5:       omp.inner.for.cond:3825// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43826// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43827// CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]3828// CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3829// CHECK5:       omp.inner.for.body:3830// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43831// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 13832// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3833// CHECK5-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP4]], align 83834// CHECK5-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 43835// CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 83836// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 43837// CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 13838// CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP8]], align 43839// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3840// CHECK5:       omp.body.continue:3841// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3842// CHECK5:       omp.inner.for.inc:3843// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43844// CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 13845// CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 43846// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3847// CHECK5:       omp.inner.for.end:3848// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3849// CHECK5:       omp.loop.exit:3850// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])3851// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])3852// CHECK5-NEXT:    ret void3853//3854//3855// CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined3856// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {3857// CHECK5-NEXT:  entry:3858// CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83859// CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83860// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83861// CHECK5-NEXT:    [[A:%.*]] = alloca ptr, align 83862// CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 83863// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43864// CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 43865// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43866// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43867// CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43868// CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43869// CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 43870// CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 83871// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 43872// CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83873// CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83874// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83875// CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83876// CHECK5-NEXT:    [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 03877// CHECK5-NEXT:    store ptr [[A1]], ptr [[A]], align 83878// CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A]], align 83879// CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 83880// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43881// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 43882// CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43883// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43884// CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 83885// CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 83886// CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83887// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43888// CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3889// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43890// CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 13891// CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3892// CHECK5:       cond.true:3893// CHECK5-NEXT:    br label [[COND_END:%.*]]3894// CHECK5:       cond.false:3895// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43896// CHECK5-NEXT:    br label [[COND_END]]3897// CHECK5:       cond.end:3898// CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]3899// CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43900// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43901// CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43902// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3903// CHECK5:       omp.inner.for.cond:3904// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43905// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43906// CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3907// CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3908// CHECK5:       omp.inner.for.body:3909// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43910// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13911// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3912// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 43913// CHECK5-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 83914// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 43915// CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 13916// CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 43917// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3918// CHECK5:       omp.body.continue:3919// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3920// CHECK5:       omp.inner.for.inc:3921// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43922// CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 13923// CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 43924// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]3925// CHECK5:       omp.inner.for.end:3926// CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3927// CHECK5:       omp.loop.exit:3928// CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])3929// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43930// CHECK5-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 03931// CHECK5-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]3932// CHECK5:       .omp.lastprivate.then:3933// CHECK5-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 83934// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 43935// CHECK5-NEXT:    store i32 [[TMP17]], ptr [[TMP2]], align 43936// CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]3937// CHECK5:       .omp.lastprivate.done:3938// CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])3939// CHECK5-NEXT:    ret void3940//3941//3942// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei3943// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3944// CHECK5-NEXT:  entry:3945// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83946// CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 43947// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83948// CHECK5-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 43949// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83950// CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 03951// CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 43952// CHECK5-NEXT:    store i32 [[TMP0]], ptr [[F]], align 43953// CHECK5-NEXT:    ret void3954//3955//3956// CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev3957// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {3958// CHECK5-NEXT:  entry:3959// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 83960// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 83961// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 83962// CHECK5-NEXT:    ret void3963//3964