1765 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK47 8// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s10// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"11// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// expected-no-diagnostics14#ifndef HEADER15#define HEADER16 17enum omp_allocator_handle_t {18 omp_null_allocator = 0,19 omp_default_mem_alloc = 1,20 omp_large_cap_mem_alloc = 2,21 omp_const_mem_alloc = 3,22 omp_high_bw_mem_alloc = 4,23 omp_low_lat_mem_alloc = 5,24 omp_cgroup_mem_alloc = 6,25 omp_pteam_mem_alloc = 7,26 omp_thread_mem_alloc = 8,27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__28};29 30template <class T>31struct S {32 T f;33 S(T a) : f(a) {}34 S() : f() {}35 S<T> &operator=(const S<T> &);36 operator T() { return T(); }37 ~S() {}38};39 40volatile int g = 1212;41volatile int &g1 = g;42float f;43char cnt;44 45struct SS {46 int a;47 int b : 4;48 int &c;49 SS(int &d) : a(0), b(0), c(d) {50#pragma omp parallel51#pragma omp for linear(a, b, c)52 for (int i = 0; i < 2; ++i)53#ifdef LAMBDA54 [&]() {55 ++this->a, --b, (this)->c /= 1;56#pragma omp parallel57#pragma omp for linear(a, b) linear(ref(c))58 for (int i = 0; i < 2; ++i)59 ++(this)->a, --b, this->c /= 1;60 }();61#elif defined(BLOCKS)62 ^{63 ++a;64 --this->b;65 (this)->c /= 1;66#pragma omp parallel67#pragma omp for linear(a, b) linear(uval(c))68 for (int i = 0; i < 2; ++i)69 ++(this)->a, --b, this->c /= 1;70 }();71#else72 ++this->a, --b, c /= 1;73#endif74 }75};76 77template <typename T>78struct SST {79 T a;80 SST() : a(T()) {81#pragma omp parallel82#pragma omp for linear(a)83 for (int i = 0; i < 2; ++i)84#ifdef LAMBDA85 [&]() {86 [&]() {87 ++this->a;88#pragma omp parallel89#pragma omp for linear(a)90 for (int i = 0; i < 2; ++i)91 ++(this)->a;92 }();93 }();94#elif defined(BLOCKS)95 ^{96 ^{97 ++a;98#pragma omp parallel99#pragma omp for linear(a)100 for (int i = 0; i < 2; ++i)101 ++(this)->a;102 }();103 }();104#else105 ++(this)->a;106#endif107 }108};109 110template <typename T>111T tmain() {112 S<T> test;113 SST<T> sst;114 T *pvar = &test.f;115 T &lvar = test.f;116#pragma omp parallel117#pragma omp for linear(pvar, lvar)118 for (int i = 0; i < 2; ++i) {119 ++pvar, ++lvar;120 }121 return T();122}123 124int main() {125 static int sivar;126 SS ss(sivar);127#ifdef LAMBDA128 [&]() {129#pragma omp parallel130#pragma omp for linear(g, g1:5)131 for (int i = 0; i < 2; ++i) {132 133 134 135 g += 5;136 g1 += 5;137 [&]() {138 g = 2;139 g1 = 2;140 }();141 }142 }();143 return 0;144#elif defined(BLOCKS)145 ^{146#pragma omp parallel147#pragma omp for linear(g, g1:5)148 for (int i = 0; i < 2; ++i) {149 g += 5;150 g1 += 5;151 g = 1;152 g1 = 5;153 ^{154 g = 2;155 g1 = 2;156 }();157 }158 }();159 return 0;160 161 162#else163 S<float> test;164 float *pvar = &test.f;165 long long lvar = 0;166#pragma omp parallel167#pragma omp for linear(pvar, lvar : 3) allocate(omp_low_lat_mem_alloc: lvar)168 for (int i = 0; i < 2; ++i) {169 pvar += 3, lvar += 3;170 }171 return tmain<int>();172#endif173}174 175 176 177// Check for default initialization.178 179 180 181 182 183// Check for default initialization.184 185#endif186 187// CHECK1-LABEL: define {{[^@]+}}@main188// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {189// CHECK1-NEXT: entry:190// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4191// CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8192// CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4193// CHECK1-NEXT: [[PVAR:%.*]] = alloca ptr, align 8194// CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8195// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4196// CHECK1-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)197// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])198// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TEST]], i32 0, i32 0199// CHECK1-NEXT: store ptr [[F]], ptr [[PVAR]], align 8200// CHECK1-NEXT: store i64 0, ptr [[LVAR]], align 8201// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @main.omp_outlined, ptr [[PVAR]], ptr [[LVAR]])202// CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()203// CHECK1-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4204// CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]]205// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4206// CHECK1-NEXT: ret i32 [[TMP0]]207//208//209// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi210// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {211// CHECK1-NEXT: entry:212// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8213// CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8214// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8215// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8216// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8217// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8218// CHECK1-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])219// CHECK1-NEXT: ret void220//221//222// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev223// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {224// CHECK1-NEXT: entry:225// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8226// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8227// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8228// CHECK1-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])229// CHECK1-NEXT: ret void230//231//232// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined233// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {234// CHECK1-NEXT: entry:235// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8236// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca ptr, align 8238// CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca ptr, align 8239// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4240// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4241// CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca ptr, align 8242// CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8243// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4244// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4245// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4246// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4247// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4248// CHECK1-NEXT: [[PVAR2:%.*]] = alloca ptr, align 8249// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8250// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8251// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8252// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8253// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8254// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8255// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8256// CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTLINEAR_START]], align 8257// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP1]], align 8258// CHECK1-NEXT: store i64 [[TMP3]], ptr [[DOTLINEAR_START1]], align 8259// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4260// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4261// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4262// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4263// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8264// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4265// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]])266// CHECK1-NEXT: [[DOTLVAR__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP5]], i64 8, ptr inttoptr (i64 5 to ptr))267// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)268// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4269// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1270// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]271// CHECK1: cond.true:272// CHECK1-NEXT: br label [[COND_END:%.*]]273// CHECK1: cond.false:274// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4275// CHECK1-NEXT: br label [[COND_END]]276// CHECK1: cond.end:277// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]278// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4279// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4280// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4281// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]282// CHECK1: omp.inner.for.cond:283// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4284// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4285// CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]286// CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]287// CHECK1: omp.inner.for.cond.cleanup:288// CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]289// CHECK1: omp.inner.for.body:290// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4291// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1292// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]293// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4294// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTLINEAR_START]], align 8295// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4296// CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP13]], 3297// CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL4]] to i64298// CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDX_EXT]]299// CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[PVAR2]], align 8300// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTLINEAR_START1]], align 8301// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4302// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], 3303// CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL5]] to i64304// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP14]], [[CONV]]305// CHECK1-NEXT: store i64 [[ADD6]], ptr [[DOTLVAR__VOID_ADDR]], align 8306// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[PVAR2]], align 8307// CHECK1-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 3308// CHECK1-NEXT: store ptr [[ADD_PTR7]], ptr [[PVAR2]], align 8309// CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTLVAR__VOID_ADDR]], align 8310// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP17]], 3311// CHECK1-NEXT: store i64 [[ADD8]], ptr [[DOTLVAR__VOID_ADDR]], align 8312// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]313// CHECK1: omp.body.continue:314// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]315// CHECK1: omp.inner.for.inc:316// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4317// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1318// CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4319// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]320// CHECK1: omp.inner.for.end:321// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]322// CHECK1: omp.loop.exit:323// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])324// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4325// CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0326// CHECK1-NEXT: br i1 [[TMP20]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]327// CHECK1: .omp.linear.pu:328// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[PVAR2]], align 8329// CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP0]], align 8330// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTLVAR__VOID_ADDR]], align 8331// CHECK1-NEXT: store i64 [[TMP22]], ptr [[TMP1]], align 8332// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]333// CHECK1: .omp.linear.pu.done:334// CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP5]], ptr [[DOTLVAR__VOID_ADDR]], ptr inttoptr (i64 5 to ptr))335// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])336// CHECK1-NEXT: ret void337//338//339// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v340// CHECK1-SAME: () #[[ATTR1]] {341// CHECK1-NEXT: entry:342// CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4343// CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4344// CHECK1-NEXT: [[PVAR:%.*]] = alloca ptr, align 8345// CHECK1-NEXT: [[LVAR:%.*]] = alloca ptr, align 8346// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])347// CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])348// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TEST]], i32 0, i32 0349// CHECK1-NEXT: store ptr [[F]], ptr [[PVAR]], align 8350// CHECK1-NEXT: [[F1:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TEST]], i32 0, i32 0351// CHECK1-NEXT: store ptr [[F1]], ptr [[LVAR]], align 8352// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LVAR]], align 8353// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[PVAR]], ptr [[TMP0]])354// CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]355// CHECK1-NEXT: ret i32 0356//357//358// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev359// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {360// CHECK1-NEXT: entry:361// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8362// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8363// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8364// CHECK1-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]365// CHECK1-NEXT: ret void366//367//368// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi369// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {370// CHECK1-NEXT: entry:371// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8372// CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8373// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8374// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8375// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8376// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0377// CHECK1-NEXT: store i32 0, ptr [[A]], align 8378// CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1379// CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4380// CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16381// CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0382// CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4383// CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2384// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8385// CHECK1-NEXT: store ptr [[TMP0]], ptr [[C]], align 8386// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])387// CHECK1-NEXT: ret void388//389//390// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined391// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {392// CHECK1-NEXT: entry:393// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8394// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8395// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8396// CHECK1-NEXT: [[A:%.*]] = alloca ptr, align 8397// CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4398// CHECK1-NEXT: [[C:%.*]] = alloca ptr, align 8399// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8400// CHECK1-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8401// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4402// CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4403// CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4404// CHECK1-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4405// CHECK1-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4406// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4407// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4408// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4409// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4410// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4411// CHECK1-NEXT: [[A7:%.*]] = alloca i32, align 4412// CHECK1-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8413// CHECK1-NEXT: [[B9:%.*]] = alloca i32, align 4414// CHECK1-NEXT: [[C10:%.*]] = alloca i32, align 4415// CHECK1-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8416// CHECK1-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8417// CHECK1-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8418// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8419// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8420// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8421// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8422// CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0423// CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8424// CHECK1-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2425// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8426// CHECK1-NEXT: store ptr [[TMP1]], ptr [[C]], align 8427// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8428// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8429// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8430// CHECK1-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8431// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8432// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4433// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4434// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4435// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4436// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8437// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4438// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4439// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4440// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4441// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4442// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4443// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8444// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4445// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])446// CHECK1-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8447// CHECK1-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8448// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)449// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4450// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1451// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]452// CHECK1: cond.true:453// CHECK1-NEXT: br label [[COND_END:%.*]]454// CHECK1: cond.false:455// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4456// CHECK1-NEXT: br label [[COND_END]]457// CHECK1: cond.end:458// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]459// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4460// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4461// CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4462// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]463// CHECK1: omp.inner.for.cond:464// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4465// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4466// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]467// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]468// CHECK1: omp.inner.for.body:469// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4470// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1471// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]472// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4473// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4474// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4475// CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1476// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]477// CHECK1-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4478// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4479// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4480// CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1481// CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]482// CHECK1-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4483// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4484// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4485// CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1486// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]487// CHECK1-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4488// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8489// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4490// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1491// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP23]], align 4492// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[B9]], align 4493// CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1494// CHECK1-NEXT: store i32 [[DEC]], ptr [[B9]], align 4495// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP11]], align 8496// CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4497// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1498// CHECK1-NEXT: store i32 [[DIV]], ptr [[TMP26]], align 4499// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]500// CHECK1: omp.body.continue:501// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]502// CHECK1: omp.inner.for.inc:503// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4504// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP28]], 1505// CHECK1-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4506// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]507// CHECK1: omp.inner.for.end:508// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]509// CHECK1: omp.loop.exit:510// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])511// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4512// CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0513// CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]514// CHECK1: .omp.linear.pu:515// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8516// CHECK1-NEXT: store ptr [[TMP31]], ptr [[_TMP20]], align 8517// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 4518// CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP20]], align 8519// CHECK1-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 4520// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 4521// CHECK1-NEXT: store i32 [[TMP34]], ptr [[B]], align 4522// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8523// CHECK1-NEXT: store ptr [[TMP35]], ptr [[_TMP21]], align 8524// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 4525// CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP21]], align 8526// CHECK1-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 4527// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 4528// CHECK1-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1529// CHECK1-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8530// CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B22]], align 4531// CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15532// CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16533// CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]534// CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B22]], align 4535// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]536// CHECK1: .omp.linear.pu.done:537// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])538// CHECK1-NEXT: ret void539//540//541// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev542// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {543// CHECK1-NEXT: entry:544// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8545// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8546// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8547// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0548// CHECK1-NEXT: store float 0.000000e+00, ptr [[F]], align 4549// CHECK1-NEXT: ret void550//551//552// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev553// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {554// CHECK1-NEXT: entry:555// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8556// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8557// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8558// CHECK1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])559// CHECK1-NEXT: ret void560//561//562// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev563// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {564// CHECK1-NEXT: entry:565// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8566// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8567// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8568// CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])569// CHECK1-NEXT: ret void570//571//572// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined573// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {574// CHECK1-NEXT: entry:575// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8576// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8577// CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca ptr, align 8578// CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca ptr, align 8579// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8580// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8581// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4582// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4583// CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca ptr, align 8584// CHECK1-NEXT: [[DOTLINEAR_START3:%.*]] = alloca i32, align 4585// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4586// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4587// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4588// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4589// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4590// CHECK1-NEXT: [[PVAR4:%.*]] = alloca ptr, align 8591// CHECK1-NEXT: [[LVAR5:%.*]] = alloca i32, align 4592// CHECK1-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8593// CHECK1-NEXT: [[_TMP12:%.*]] = alloca ptr, align 8594// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8595// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8596// CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8597// CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8598// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8599// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8600// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8601// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8602// CHECK1-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8603// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP0]], align 8604// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTLINEAR_START]], align 8605// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8606// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4607// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START3]], align 4608// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4609// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4610// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4611// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4612// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8613// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4614// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])615// CHECK1-NEXT: store ptr [[LVAR5]], ptr [[_TMP6]], align 8616// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)617// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4618// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1619// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]620// CHECK1: cond.true:621// CHECK1-NEXT: br label [[COND_END:%.*]]622// CHECK1: cond.false:623// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4624// CHECK1-NEXT: br label [[COND_END]]625// CHECK1: cond.end:626// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]627// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4628// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4629// CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4630// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]631// CHECK1: omp.inner.for.cond:632// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4633// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4634// CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]635// CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]636// CHECK1: omp.inner.for.body:637// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4638// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1639// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]640// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4641// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLINEAR_START]], align 8642// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4643// CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP15]], 1644// CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL8]] to i64645// CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i64 [[IDX_EXT]]646// CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[PVAR4]], align 8647// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTLINEAR_START3]], align 4648// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4649// CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], 1650// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], [[MUL9]]651// CHECK1-NEXT: store i32 [[ADD10]], ptr [[LVAR5]], align 4652// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[PVAR4]], align 8653// CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP18]], i32 1654// CHECK1-NEXT: store ptr [[INCDEC_PTR]], ptr [[PVAR4]], align 8655// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP6]], align 8656// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4657// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1658// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP19]], align 4659// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]660// CHECK1: omp.body.continue:661// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]662// CHECK1: omp.inner.for.inc:663// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4664// CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1665// CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4666// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]667// CHECK1: omp.inner.for.end:668// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]669// CHECK1: omp.loop.exit:670// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP7]])671// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4672// CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0673// CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]674// CHECK1: .omp.linear.pu:675// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[PVAR4]], align 8676// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP0]], align 8677// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP1]], align 8678// CHECK1-NEXT: store ptr [[TMP25]], ptr [[_TMP12]], align 8679// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[LVAR5]], align 4680// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP12]], align 8681// CHECK1-NEXT: store i32 [[TMP26]], ptr [[TMP27]], align 4682// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]683// CHECK1: .omp.linear.pu.done:684// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])685// CHECK1-NEXT: ret void686//687//688// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev689// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {690// CHECK1-NEXT: entry:691// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8692// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8693// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8694// CHECK1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]695// CHECK1-NEXT: ret void696//697//698// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev699// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {700// CHECK1-NEXT: entry:701// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8702// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8703// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8704// CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0705// CHECK1-NEXT: store i32 0, ptr [[F]], align 4706// CHECK1-NEXT: ret void707//708//709// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev710// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {711// CHECK1-NEXT: entry:712// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8713// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8714// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8715// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0716// CHECK1-NEXT: store i32 0, ptr [[A]], align 4717// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])718// CHECK1-NEXT: ret void719//720//721// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined722// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {723// CHECK1-NEXT: entry:724// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8725// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8726// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8727// CHECK1-NEXT: [[A:%.*]] = alloca ptr, align 8728// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8729// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4730// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4731// CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4732// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4733// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4734// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4735// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4736// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4737// CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4738// CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8739// CHECK1-NEXT: [[_TMP9:%.*]] = alloca ptr, align 8740// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8741// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8742// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8743// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8744// CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 0745// CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8746// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8747// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8748// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8749// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4750// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTLINEAR_START]], align 4751// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4752// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4753// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4754// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4755// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8756// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4757// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])758// CHECK1-NEXT: store ptr [[A3]], ptr [[_TMP4]], align 8759// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)760// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4761// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1762// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]763// CHECK1: cond.true:764// CHECK1-NEXT: br label [[COND_END:%.*]]765// CHECK1: cond.false:766// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4767// CHECK1-NEXT: br label [[COND_END]]768// CHECK1: cond.end:769// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]770// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4771// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4772// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4773// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]774// CHECK1: omp.inner.for.cond:775// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4776// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4777// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]778// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]779// CHECK1: omp.inner.for.body:780// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4781// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1782// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]783// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4784// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4785// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4786// CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1787// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]]788// CHECK1-NEXT: store i32 [[ADD7]], ptr [[A3]], align 4789// CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 8790// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4791// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1792// CHECK1-NEXT: store i32 [[INC]], ptr [[TMP14]], align 4793// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]794// CHECK1: omp.body.continue:795// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]796// CHECK1: omp.inner.for.inc:797// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4798// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1799// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4800// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]801// CHECK1: omp.inner.for.end:802// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]803// CHECK1: omp.loop.exit:804// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])805// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4806// CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0807// CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]808// CHECK1: .omp.linear.pu:809// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP]], align 8810// CHECK1-NEXT: store ptr [[TMP19]], ptr [[_TMP9]], align 8811// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[A3]], align 4812// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP9]], align 8813// CHECK1-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4814// CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]815// CHECK1: .omp.linear.pu.done:816// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])817// CHECK1-NEXT: ret void818//819//820// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev821// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {822// CHECK1-NEXT: entry:823// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8824// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8825// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8826// CHECK1-NEXT: ret void827//828//829// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev830// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {831// CHECK1-NEXT: entry:832// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8833// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8834// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8835// CHECK1-NEXT: ret void836//837//838// CHECK3-LABEL: define {{[^@]+}}@main839// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {840// CHECK3-NEXT: entry:841// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4842// CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8843// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1844// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4845// CHECK3-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)846// CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])847// CHECK3-NEXT: ret i32 0848//849//850// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi851// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {852// CHECK3-NEXT: entry:853// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8854// CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8855// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8856// CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8857// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8858// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8859// CHECK3-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])860// CHECK3-NEXT: ret void861//862//863// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi864// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {865// CHECK3-NEXT: entry:866// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8867// CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8868// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8869// CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8870// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8871// CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0872// CHECK3-NEXT: store i32 0, ptr [[A]], align 8873// CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1874// CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4875// CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16876// CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0877// CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4878// CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2879// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8880// CHECK3-NEXT: store ptr [[TMP0]], ptr [[C]], align 8881// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])882// CHECK3-NEXT: ret void883//884//885// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined886// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {887// CHECK3-NEXT: entry:888// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8889// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8890// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8891// CHECK3-NEXT: [[A:%.*]] = alloca ptr, align 8892// CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4893// CHECK3-NEXT: [[C:%.*]] = alloca ptr, align 8894// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 8895// CHECK3-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8896// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4897// CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4898// CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4899// CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4900// CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4901// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4902// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4903// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4904// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4905// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4906// CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4907// CHECK3-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8908// CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4909// CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4910// CHECK3-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8911// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8912// CHECK3-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8913// CHECK3-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8914// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8915// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8916// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8917// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8918// CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0919// CHECK3-NEXT: store ptr [[A1]], ptr [[A]], align 8920// CHECK3-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2921// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8922// CHECK3-NEXT: store ptr [[TMP1]], ptr [[C]], align 8923// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8924// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8925// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8926// CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8927// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8928// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4929// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4930// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4931// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4932// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8933// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4934// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4935// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4936// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4937// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4938// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4939// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8940// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4941// CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP10]])942// CHECK3-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8943// CHECK3-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8944// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)945// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4946// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1947// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]948// CHECK3: cond.true:949// CHECK3-NEXT: br label [[COND_END:%.*]]950// CHECK3: cond.false:951// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4952// CHECK3-NEXT: br label [[COND_END]]953// CHECK3: cond.end:954// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]955// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4956// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4957// CHECK3-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4958// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]959// CHECK3: omp.inner.for.cond:960// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4961// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4962// CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]963// CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]964// CHECK3: omp.inner.for.body:965// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4966// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1967// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]968// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4969// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4970// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4971// CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1972// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]973// CHECK3-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4974// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4975// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4976// CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1977// CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]978// CHECK3-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4979// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4980// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4981// CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1982// CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]983// CHECK3-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4984// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0985// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP23]], align 8986// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1987// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8988// CHECK3-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8989// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2990// CHECK3-NEXT: store ptr [[B9]], ptr [[TMP26]], align 8991// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3992// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8993// CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 8994// CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])995// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]996// CHECK3: omp.body.continue:997// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]998// CHECK3: omp.inner.for.inc:999// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41000// CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP29]], 11001// CHECK3-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 41002// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1003// CHECK3: omp.inner.for.end:1004// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1005// CHECK3: omp.loop.exit:1006// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])1007// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41008// CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 01009// CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1010// CHECK3: .omp.linear.pu:1011// CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP]], align 81012// CHECK3-NEXT: store ptr [[TMP32]], ptr [[_TMP20]], align 81013// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[A7]], align 41014// CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[_TMP20]], align 81015// CHECK3-NEXT: store i32 [[TMP33]], ptr [[TMP34]], align 41016// CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[B9]], align 41017// CHECK3-NEXT: store i32 [[TMP35]], ptr [[B]], align 41018// CHECK3-NEXT: [[TMP36:%.*]] = load ptr, ptr [[_TMP3]], align 81019// CHECK3-NEXT: store ptr [[TMP36]], ptr [[_TMP21]], align 81020// CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[C10]], align 41021// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[_TMP21]], align 81022// CHECK3-NEXT: store i32 [[TMP37]], ptr [[TMP38]], align 41023// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[B]], align 41024// CHECK3-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 11025// CHECK3-NEXT: [[TMP40:%.*]] = trunc i32 [[TMP39]] to i81026// CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B22]], align 41027// CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP40]], 151028// CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161029// CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]1030// CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B22]], align 41031// CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1032// CHECK3: .omp.linear.pu.done:1033// CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])1034// CHECK3-NEXT: ret void1035//1036//1037// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv1038// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] align 2 {1039// CHECK3-NEXT: entry:1040// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81041// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81042// CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81043// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 01044// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 81045// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11046// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 81047// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41048// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 11049// CHECK3-NEXT: store i32 [[INC]], ptr [[TMP3]], align 41050// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21051// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 81052// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41053// CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -11054// CHECK3-NEXT: store i32 [[DEC]], ptr [[TMP6]], align 41055// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31056// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81057// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41058// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 11059// CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP9]], align 41060// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11061// CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 81062// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21063// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 81064// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31065// CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 81066// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])1067// CHECK3-NEXT: ret void1068//1069//1070// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined1071// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {1072// CHECK3-NEXT: entry:1073// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81074// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81075// CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81076// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81077// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 81078// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 81079// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 81080// CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 81081// CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 81082// CHECK3-NEXT: [[_TMP3:%.*]] = alloca ptr, align 81083// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41084// CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 41085// CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41086// CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 41087// CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 41088// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41089// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41090// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41091// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41092// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 41093// CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 41094// CHECK3-NEXT: [[_TMP8:%.*]] = alloca ptr, align 81095// CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 41096// CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 41097// CHECK3-NEXT: [[_TMP11:%.*]] = alloca ptr, align 81098// CHECK3-NEXT: [[_TMP20:%.*]] = alloca ptr, align 81099// CHECK3-NEXT: [[_TMP21:%.*]] = alloca ptr, align 81100// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81101// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81102// CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81103// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81104// CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 81105// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 81106// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81107// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81108// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 81109// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 81110// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 81111// CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 81112// CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81113// CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 81114// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81115// CHECK3-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 81116// CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 81117// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41118// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 41119// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 41120// CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 41121// CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 81122// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41123// CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 41124// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41125// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41126// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41127// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41128// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81129// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41130// CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])1131// CHECK3-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 81132// CHECK3-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 81133// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1134// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41135// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 11136// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1137// CHECK3: cond.true:1138// CHECK3-NEXT: br label [[COND_END:%.*]]1139// CHECK3: cond.false:1140// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41141// CHECK3-NEXT: br label [[COND_END]]1142// CHECK3: cond.end:1143// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]1144// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41145// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41146// CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 41147// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1148// CHECK3: omp.inner.for.cond:1149// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41150// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41151// CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]1152// CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1153// CHECK3: omp.inner.for.body:1154// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41155// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 11156// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1157// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 41158// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 41159// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41160// CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 11161// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]]1162// CHECK3-NEXT: store i32 [[ADD14]], ptr [[A7]], align 41163// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 41164// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41165// CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 11166// CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]]1167// CHECK3-NEXT: store i32 [[ADD16]], ptr [[B9]], align 41168// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 41169// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41170// CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 11171// CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]1172// CHECK3-NEXT: store i32 [[ADD18]], ptr [[C10]], align 41173// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 81174// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 41175// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 11176// CHECK3-NEXT: store i32 [[INC]], ptr [[TMP25]], align 41177// CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 41178// CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -11179// CHECK3-NEXT: store i32 [[DEC]], ptr [[B9]], align 41180// CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 81181// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 41182// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 11183// CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 41184// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1185// CHECK3: omp.body.continue:1186// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1187// CHECK3: omp.inner.for.inc:1188// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41189// CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 11190// CHECK3-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 41191// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]1192// CHECK3: omp.inner.for.end:1193// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1194// CHECK3: omp.loop.exit:1195// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP12]])1196// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41197// CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01198// CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1199// CHECK3: .omp.linear.pu:1200// CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 81201// CHECK3-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 81202// CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 41203// CHECK3-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 81204// CHECK3-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 41205// CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 41206// CHECK3-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 41207// CHECK3-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 81208// CHECK3-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 81209// CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 41210// CHECK3-NEXT: [[TMP39:%.*]] = load ptr, ptr [[_TMP21]], align 81211// CHECK3-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 41212// CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1213// CHECK3: .omp.linear.pu.done:1214// CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])1215// CHECK3-NEXT: ret void1216//1217//1218// CHECK4-LABEL: define {{[^@]+}}@main1219// CHECK4-SAME: () #[[ATTR1:[0-9]+]] {1220// CHECK4-NEXT: entry:1221// CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 41222// CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 81223// CHECK4-NEXT: store i32 0, ptr [[RETVAL]], align 41224// CHECK4-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)1225// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds nuw ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 81226// CHECK4-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)1227// CHECK4-NEXT: ret i32 01228//1229//1230// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi1231// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 {1232// CHECK4-NEXT: entry:1233// CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81234// CHECK4-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 81235// CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81236// CHECK4-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 81237// CHECK4-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81238// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81239// CHECK4-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])1240// CHECK4-NEXT: ret void1241//1242//1243// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke1244// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3:[0-9]+]] {1245// CHECK4-NEXT: entry:1246// CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 81247// CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 81248// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 81249// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 81250// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @__main_block_invoke.omp_outlined)1251// CHECK4-NEXT: ret void1252//1253//1254// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined1255// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] {1256// CHECK4-NEXT: entry:1257// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81258// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81259// CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 81260// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41261// CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 41262// CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41263// CHECK4-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 41264// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41265// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41266// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41267// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41268// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 41269// CHECK4-NEXT: [[G:%.*]] = alloca i32, align 41270// CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 41271// CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 81272// CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, align 81273// CHECK4-NEXT: [[_TMP13:%.*]] = alloca ptr, align 81274// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81275// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81276// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr @g1, align 81277// CHECK4-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 81278// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr @g, align 41279// CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 41280// CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr @g, align 41281// CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START2]], align 41282// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41283// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41284// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41285// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41286// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81287// CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41288// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]])1289// CHECK4-NEXT: store ptr [[G1]], ptr [[_TMP3]], align 81290// CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1291// CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41292// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 11293// CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1294// CHECK4: cond.true:1295// CHECK4-NEXT: br label [[COND_END:%.*]]1296// CHECK4: cond.false:1297// CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41298// CHECK4-NEXT: br label [[COND_END]]1299// CHECK4: cond.end:1300// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1301// CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41302// CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41303// CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41304// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1305// CHECK4: omp.inner.for.cond:1306// CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41307// CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41308// CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1309// CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1310// CHECK4: omp.inner.for.body:1311// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41312// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 11313// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1314// CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 41315// CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 41316// CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41317// CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 51318// CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]]1319// CHECK4-NEXT: store i32 [[ADD6]], ptr [[G]], align 41320// CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTLINEAR_START2]], align 41321// CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41322// CHECK4-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 51323// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]]1324// CHECK4-NEXT: store i32 [[ADD8]], ptr [[G1]], align 41325// CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[G]], align 41326// CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 51327// CHECK4-NEXT: store i32 [[ADD9]], ptr [[G]], align 41328// CHECK4-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP3]], align 81329// CHECK4-NEXT: [[TMP17:%.*]] = load volatile i32, ptr [[TMP16]], align 41330// CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 51331// CHECK4-NEXT: store volatile i32 [[ADD10]], ptr [[TMP16]], align 41332// CHECK4-NEXT: store i32 1, ptr [[G]], align 41333// CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP3]], align 81334// CHECK4-NEXT: store volatile i32 5, ptr [[TMP18]], align 41335// CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 01336// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 81337// CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 11338// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 81339// CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 21340// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 41341// CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 31342// CHECK4-NEXT: store ptr @g1_block_invoke, ptr [[BLOCK_INVOKE]], align 81343// CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 41344// CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 81345// CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 61346// CHECK4-NEXT: [[TMP19:%.*]] = load volatile i32, ptr [[G]], align 41347// CHECK4-NEXT: store volatile i32 [[TMP19]], ptr [[BLOCK_CAPTURED]], align 81348// CHECK4-NEXT: [[BLOCK_CAPTURED11:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 51349// CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP3]], align 81350// CHECK4-NEXT: store ptr [[TMP20]], ptr [[BLOCK_CAPTURED11]], align 81351// CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 31352// CHECK4-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 81353// CHECK4-NEXT: call void [[TMP22]](ptr noundef [[BLOCK]])1354// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1355// CHECK4: omp.body.continue:1356// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1357// CHECK4: omp.inner.for.inc:1358// CHECK4-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41359// CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP23]], 11360// CHECK4-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 41361// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]1362// CHECK4: omp.inner.for.end:1363// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1364// CHECK4: omp.loop.exit:1365// CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1366// CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41367// CHECK4-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 01368// CHECK4-NEXT: br i1 [[TMP25]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1369// CHECK4: .omp.linear.pu:1370// CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[G]], align 41371// CHECK4-NEXT: store i32 [[TMP26]], ptr @g, align 41372// CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr @g1, align 81373// CHECK4-NEXT: store ptr [[TMP27]], ptr [[_TMP13]], align 81374// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[G1]], align 41375// CHECK4-NEXT: [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 81376// CHECK4-NEXT: store volatile i32 [[TMP28]], ptr [[TMP29]], align 41377// CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1378// CHECK4: .omp.linear.pu.done:1379// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP4]])1380// CHECK4-NEXT: ret void1381//1382//1383// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke1384// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3]] {1385// CHECK4-NEXT: entry:1386// CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 81387// CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 81388// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 81389// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 81390// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 61391// CHECK4-NEXT: store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 81392// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 51393// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 81394// CHECK4-NEXT: store i32 2, ptr [[TMP0]], align 41395// CHECK4-NEXT: ret void1396//1397//1398// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi1399// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] align 2 {1400// CHECK4-NEXT: entry:1401// CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81402// CHECK4-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 81403// CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81404// CHECK4-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 81405// CHECK4-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81406// CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01407// CHECK4-NEXT: store i32 0, ptr [[A]], align 81408// CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 11409// CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 41410// CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161411// CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 01412// CHECK4-NEXT: store i8 [[BF_SET]], ptr [[B]], align 41413// CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21414// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81415// CHECK4-NEXT: store ptr [[TMP0]], ptr [[C]], align 81416// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])1417// CHECK4-NEXT: ret void1418//1419//1420// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined1421// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR4]] {1422// CHECK4-NEXT: entry:1423// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81424// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81425// CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81426// CHECK4-NEXT: [[A:%.*]] = alloca ptr, align 81427// CHECK4-NEXT: [[B:%.*]] = alloca i32, align 41428// CHECK4-NEXT: [[C:%.*]] = alloca ptr, align 81429// CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 81430// CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 81431// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41432// CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 41433// CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41434// CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 41435// CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 41436// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41437// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41438// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41439// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41440// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 41441// CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 41442// CHECK4-NEXT: [[_TMP8:%.*]] = alloca ptr, align 81443// CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 41444// CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 41445// CHECK4-NEXT: [[_TMP11:%.*]] = alloca ptr, align 81446// CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 81447// CHECK4-NEXT: [[_TMP22:%.*]] = alloca ptr, align 81448// CHECK4-NEXT: [[_TMP23:%.*]] = alloca ptr, align 81449// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81450// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81451// CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81452// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81453// CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 01454// CHECK4-NEXT: store ptr [[A1]], ptr [[A]], align 81455// CHECK4-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 21456// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 81457// CHECK4-NEXT: store ptr [[TMP1]], ptr [[C]], align 81458// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 81459// CHECK4-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 81460// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 81461// CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 81462// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81463// CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41464// CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 41465// CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 41466// CHECK4-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 41467// CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 81468// CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41469// CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 41470// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41471// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41472// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41473// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41474// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81475// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41476// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])1477// CHECK4-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 81478// CHECK4-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 81479// CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1480// CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41481// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 11482// CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1483// CHECK4: cond.true:1484// CHECK4-NEXT: br label [[COND_END:%.*]]1485// CHECK4: cond.false:1486// CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41487// CHECK4-NEXT: br label [[COND_END]]1488// CHECK4: cond.end:1489// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1490// CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41491// CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41492// CHECK4-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41493// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1494// CHECK4: omp.inner.for.cond:1495// CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41496// CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41497// CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1498// CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1499// CHECK4: omp.inner.for.body:1500// CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41501// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 11502// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1503// CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 41504// CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 41505// CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41506// CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 11507// CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]1508// CHECK4-NEXT: store i32 [[ADD14]], ptr [[A7]], align 41509// CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 41510// CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41511// CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 11512// CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]1513// CHECK4-NEXT: store i32 [[ADD16]], ptr [[B9]], align 41514// CHECK4-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 41515// CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41516// CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 11517// CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]1518// CHECK4-NEXT: store i32 [[ADD18]], ptr [[C10]], align 41519// CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 01520// CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 81521// CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 11522// CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 81523// CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 21524// CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 41525// CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 31526// CHECK4-NEXT: store ptr @g1_block_invoke_2, ptr [[BLOCK_INVOKE]], align 81527// CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 41528// CHECK4-NEXT: store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 81529// CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 51530// CHECK4-NEXT: store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 81531// CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 61532// CHECK4-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 81533// CHECK4-NEXT: store ptr [[TMP23]], ptr [[BLOCK_CAPTURED]], align 81534// CHECK4-NEXT: [[BLOCK_CAPTURED19:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 81535// CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[B9]], align 41536// CHECK4-NEXT: store i32 [[TMP24]], ptr [[BLOCK_CAPTURED19]], align 81537// CHECK4-NEXT: [[BLOCK_CAPTURED20:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 71538// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP11]], align 81539// CHECK4-NEXT: store ptr [[TMP25]], ptr [[BLOCK_CAPTURED20]], align 81540// CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 31541// CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 81542// CHECK4-NEXT: call void [[TMP27]](ptr noundef [[BLOCK]])1543// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1544// CHECK4: omp.body.continue:1545// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1546// CHECK4: omp.inner.for.inc:1547// CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41548// CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP28]], 11549// CHECK4-NEXT: store i32 [[ADD21]], ptr [[DOTOMP_IV]], align 41550// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]1551// CHECK4: omp.inner.for.end:1552// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1553// CHECK4: omp.loop.exit:1554// CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])1555// CHECK4-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41556// CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 01557// CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1558// CHECK4: .omp.linear.pu:1559// CHECK4-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 81560// CHECK4-NEXT: store ptr [[TMP31]], ptr [[_TMP22]], align 81561// CHECK4-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 41562// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP22]], align 81563// CHECK4-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 41564// CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 41565// CHECK4-NEXT: store i32 [[TMP34]], ptr [[B]], align 41566// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 81567// CHECK4-NEXT: store ptr [[TMP35]], ptr [[_TMP23]], align 81568// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 41569// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP23]], align 81570// CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 41571// CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 41572// CHECK4-NEXT: [[B24:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 11573// CHECK4-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i81574// CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B24]], align 41575// CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 151576// CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161577// CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]1578// CHECK4-NEXT: store i8 [[BF_SET]], ptr [[B24]], align 41579// CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1580// CHECK4: .omp.linear.pu.done:1581// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])1582// CHECK4-NEXT: ret void1583//1584//1585// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_21586// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3]] {1587// CHECK4-NEXT: entry:1588// CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 81589// CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 81590// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 81591// CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 81592// CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 51593// CHECK4-NEXT: [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 81594// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 61595// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 81596// CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41597// CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 11598// CHECK4-NEXT: store i32 [[INC]], ptr [[TMP0]], align 41599// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 81600// CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 81601// CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -11602// CHECK4-NEXT: store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 81603// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 71604// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 81605// CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41606// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 11607// CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP3]], align 41608// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 61609// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 81610// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 81611// CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 71612// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 81613// CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @g1_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])1614// CHECK4-NEXT: ret void1615//1616//1617// CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined1618// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR4]] {1619// CHECK4-NEXT: entry:1620// CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81621// CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81622// CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81623// CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81624// CHECK4-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 81625// CHECK4-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 81626// CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 81627// CHECK4-NEXT: [[_TMP1:%.*]] = alloca ptr, align 81628// CHECK4-NEXT: [[_TMP2:%.*]] = alloca ptr, align 81629// CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 81630// CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41631// CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 41632// CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 41633// CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 41634// CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 41635// CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41636// CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41637// CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41638// CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41639// CHECK4-NEXT: [[I:%.*]] = alloca i32, align 41640// CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 41641// CHECK4-NEXT: [[_TMP8:%.*]] = alloca ptr, align 81642// CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 41643// CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 41644// CHECK4-NEXT: [[_TMP11:%.*]] = alloca ptr, align 81645// CHECK4-NEXT: [[_TMP20:%.*]] = alloca ptr, align 81646// CHECK4-NEXT: [[_TMP21:%.*]] = alloca ptr, align 81647// CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81648// CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81649// CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81650// CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81651// CHECK4-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 81652// CHECK4-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 81653// CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81654// CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81655// CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 81656// CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 81657// CHECK4-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 81658// CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 81659// CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81660// CHECK4-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 81661// CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81662// CHECK4-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 81663// CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 81664// CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41665// CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 41666// CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 41667// CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 41668// CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 81669// CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41670// CHECK4-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 41671// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41672// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41673// CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41674// CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41675// CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81676// CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41677// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])1678// CHECK4-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 81679// CHECK4-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 81680// CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1681// CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41682// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 11683// CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1684// CHECK4: cond.true:1685// CHECK4-NEXT: br label [[COND_END:%.*]]1686// CHECK4: cond.false:1687// CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41688// CHECK4-NEXT: br label [[COND_END]]1689// CHECK4: cond.end:1690// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]1691// CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41692// CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41693// CHECK4-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 41694// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1695// CHECK4: omp.inner.for.cond:1696// CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41697// CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41698// CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]1699// CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1700// CHECK4: omp.inner.for.body:1701// CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41702// CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 11703// CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1704// CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 41705// CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 41706// CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41707// CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 11708// CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]]1709// CHECK4-NEXT: store i32 [[ADD14]], ptr [[A7]], align 41710// CHECK4-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 41711// CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41712// CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 11713// CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]]1714// CHECK4-NEXT: store i32 [[ADD16]], ptr [[B9]], align 41715// CHECK4-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 41716// CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41717// CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 11718// CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]1719// CHECK4-NEXT: store i32 [[ADD18]], ptr [[C10]], align 41720// CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 81721// CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 41722// CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 11723// CHECK4-NEXT: store i32 [[INC]], ptr [[TMP25]], align 41724// CHECK4-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 41725// CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -11726// CHECK4-NEXT: store i32 [[DEC]], ptr [[B9]], align 41727// CHECK4-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 81728// CHECK4-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 41729// CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 11730// CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 41731// CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1732// CHECK4: omp.body.continue:1733// CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1734// CHECK4: omp.inner.for.inc:1735// CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41736// CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 11737// CHECK4-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 41738// CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]1739// CHECK4: omp.inner.for.end:1740// CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1741// CHECK4: omp.loop.exit:1742// CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP12]])1743// CHECK4-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41744// CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01745// CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]1746// CHECK4: .omp.linear.pu:1747// CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 81748// CHECK4-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 81749// CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 41750// CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 81751// CHECK4-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 41752// CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 41753// CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 41754// CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 81755// CHECK4-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 81756// CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 41757// CHECK4-NEXT: [[C22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 21758// CHECK4-NEXT: [[TMP39:%.*]] = load ptr, ptr [[C22]], align 81759// CHECK4-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 41760// CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]1761// CHECK4: .omp.linear.pu.done:1762// CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])1763// CHECK4-NEXT: ret void1764//1765