165 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s3// expected-no-diagnostics4 5#ifndef HEADER6#define HEADER7 8 9extern "C" void workshareloop_unsigned_auto(float *a, float *b, float *c, float *d) {10#pragma omp for schedule(auto)11 for (unsigned i = 33; i < 32000000; i += 7) {12 a[i] = b[i] * c[i] * d[i];13 }14}15 16#endif // HEADER17 18 19 20 21 22// CHECK-LABEL: define {{[^@]+}}@workshareloop_unsigned_auto23// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {24// CHECK-NEXT: entry:25// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 826// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 827// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 828// CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 829// CHECK-NEXT: [[I:%.*]] = alloca i32, align 430// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 831// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 432// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 433// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 434// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 435// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 436// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 437// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 838// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 839// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 840// CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 841// CHECK-NEXT: store i32 33, ptr [[I]], align 442// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 043// CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 844// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 045// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 446// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 447// CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])48// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 449// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]50// CHECK: omp_loop.preheader:51// CHECK-NEXT: store i32 1, ptr [[P_LOWERBOUND]], align 452// CHECK-NEXT: store i32 [[DOTCOUNT]], ptr [[P_UPPERBOUND]], align 453// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 454// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])55// CHECK-NEXT: call void @__kmpc_dispatch_init_4u(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 1073741862, i32 1, i32 [[DOTCOUNT]], i32 1, i32 1)56// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER_OUTER_COND:%.*]]57// CHECK: omp_loop.header:58// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ [[LB:%.*]], [[OMP_LOOP_PREHEADER_OUTER_COND]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]59// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]60// CHECK: omp_loop.cond:61// CHECK-NEXT: [[UB:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 462// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[UB]]63// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_PREHEADER_OUTER_COND]]64// CHECK: omp_loop.body:65// CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[OMP_LOOP_IV]], ptr [[AGG_CAPTURED1]])66// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 867// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 468// CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP4]] to i6469// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP3]], i64 [[IDXPROM]]70// CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[ARRAYIDX]], align 471// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[C_ADDR]], align 872// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 473// CHECK-NEXT: [[IDXPROM2:%.*]] = zext i32 [[TMP7]] to i6474// CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP6]], i64 [[IDXPROM2]]75// CHECK-NEXT: [[TMP8:%.*]] = load float, ptr [[ARRAYIDX3]], align 476// CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP5]], [[TMP8]]77// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[D_ADDR]], align 878// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 479// CHECK-NEXT: [[IDXPROM4:%.*]] = zext i32 [[TMP10]] to i6480// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP9]], i64 [[IDXPROM4]]81// CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX5]], align 482// CHECK-NEXT: [[MUL6:%.*]] = fmul float [[MUL]], [[TMP11]]83// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[A_ADDR]], align 884// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 485// CHECK-NEXT: [[IDXPROM7:%.*]] = zext i32 [[TMP13]] to i6486// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw float, ptr [[TMP12]], i64 [[IDXPROM7]]87// CHECK-NEXT: store float [[MUL6]], ptr [[ARRAYIDX8]], align 488// CHECK-NEXT: br label [[OMP_LOOP_INC]]89// CHECK: omp_loop.inc:90// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 191// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]92// CHECK: omp_loop.exit:93// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM9:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])94// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[OMP_GLOBAL_THREAD_NUM9]])95// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]96// CHECK: omp_loop.after:97// CHECK-NEXT: ret void98// CHECK: omp_loop.preheader.outer.cond:99// CHECK-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4u(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]])100// CHECK-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0101// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 4102// CHECK-NEXT: [[LB]] = sub i32 [[TMP16]], 1103// CHECK-NEXT: br i1 [[TMP15]], label [[OMP_LOOP_HEADER]], label [[OMP_LOOP_EXIT:%.*]]104//105//106// CHECK-LABEL: define {{[^@]+}}@__captured_stmt107// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] {108// CHECK-NEXT: entry:109// CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 8110// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8111// CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 4112// CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 4113// CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 4114// CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 8115// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8116// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8117// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 0118// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8119// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4120// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4121// CHECK-NEXT: store i32 32000000, ptr [[DOTSTOP]], align 4122// CHECK-NEXT: store i32 7, ptr [[DOTSTEP]], align 4123// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4124// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4125// CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]126// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]127// CHECK: cond.true:128// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4129// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4130// CHECK-NEXT: [[SUB:%.*]] = sub i32 [[TMP6]], [[TMP7]]131// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4132// CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1133// CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]134// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4135// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]136// CHECK-NEXT: br label [[COND_END:%.*]]137// CHECK: cond.false:138// CHECK-NEXT: br label [[COND_END]]139// CHECK: cond.end:140// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]141// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8142// CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4143// CHECK-NEXT: ret void144//145//146// CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1147// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] {148// CHECK-NEXT: entry:149// CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8150// CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4151// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8152// CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8153// CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4154// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8155// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8156// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0157// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4158// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4159// CHECK-NEXT: [[MUL:%.*]] = mul i32 7, [[TMP3]]160// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]161// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8162// CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4163// CHECK-NEXT: ret void164//165