199 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s3// expected-no-diagnostics4 5#ifndef HEADER6#define HEADER7 8 9extern "C" void workshareloop_unsigned_static_chunked(float *a, float *b, float *c, float *d) {10#pragma omp for schedule(static, 5)11 for (unsigned i = 33; i < 32000000; i += 7) {12 a[i] = b[i] * c[i] * d[i];13 }14}15 16#endif // HEADER17 18 19 20 21 22// CHECK-LABEL: define {{[^@]+}}@workshareloop_unsigned_static_chunked23// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {24// CHECK-NEXT: entry:25// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 826// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 827// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 828// CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 829// CHECK-NEXT: [[I:%.*]] = alloca i32, align 430// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 831// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 432// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 433// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 434// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 435// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 436// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 437// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 838// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 839// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 840// CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 841// CHECK-NEXT: store i32 33, ptr [[I]], align 442// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 043// CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 844// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 045// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 446// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 447// CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])48// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 449// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]50// CHECK: omp_loop.preheader:51// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 452// CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[DOTCOUNT]], 153// CHECK-NEXT: store i32 [[TMP3]], ptr [[P_UPPERBOUND]], align 454// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 455// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])56// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 33, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 5)57// CHECK-NEXT: [[OMP_FIRSTCHUNK_LB:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 458// CHECK-NEXT: [[OMP_FIRSTCHUNK_UB:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 459// CHECK-NEXT: [[TMP4:%.*]] = add i32 [[OMP_FIRSTCHUNK_UB]], 160// CHECK-NEXT: [[OMP_CHUNK_RANGE:%.*]] = sub i32 [[TMP4]], [[OMP_FIRSTCHUNK_LB]]61// CHECK-NEXT: [[OMP_DISPATCH_STRIDE:%.*]] = load i32, ptr [[P_STRIDE]], align 462// CHECK-NEXT: [[TMP5:%.*]] = sub nuw i32 [[DOTCOUNT]], [[OMP_FIRSTCHUNK_LB]]63// CHECK-NEXT: [[TMP6:%.*]] = icmp ule i32 [[DOTCOUNT]], [[OMP_FIRSTCHUNK_LB]]64// CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[TMP5]], 165// CHECK-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP7]], [[OMP_DISPATCH_STRIDE]]66// CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], 167// CHECK-NEXT: [[TMP10:%.*]] = icmp ule i32 [[TMP5]], [[OMP_DISPATCH_STRIDE]]68// CHECK-NEXT: [[TMP11:%.*]] = select i1 [[TMP10]], i32 1, i32 [[TMP9]]69// CHECK-NEXT: [[OMP_DISPATCH_TRIPCOUNT:%.*]] = select i1 [[TMP6]], i32 0, i32 [[TMP11]]70// CHECK-NEXT: br label [[OMP_DISPATCH_PREHEADER:%.*]]71// CHECK: omp_dispatch.preheader:72// CHECK-NEXT: br label [[OMP_DISPATCH_HEADER:%.*]]73// CHECK: omp_dispatch.header:74// CHECK-NEXT: [[OMP_DISPATCH_IV:%.*]] = phi i32 [ 0, [[OMP_DISPATCH_PREHEADER]] ], [ [[OMP_DISPATCH_NEXT:%.*]], [[OMP_DISPATCH_INC:%.*]] ]75// CHECK-NEXT: br label [[OMP_DISPATCH_COND:%.*]]76// CHECK: omp_dispatch.cond:77// CHECK-NEXT: [[OMP_DISPATCH_CMP:%.*]] = icmp ult i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_TRIPCOUNT]]78// CHECK-NEXT: br i1 [[OMP_DISPATCH_CMP]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_EXIT:%.*]]79// CHECK: omp_dispatch.body:80// CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[OMP_DISPATCH_IV]], [[OMP_DISPATCH_STRIDE]]81// CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], [[OMP_FIRSTCHUNK_LB]]82// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER9:%.*]]83// CHECK: omp_dispatch.inc:84// CHECK-NEXT: [[OMP_DISPATCH_NEXT]] = add nuw i32 [[OMP_DISPATCH_IV]], 185// CHECK-NEXT: br label [[OMP_DISPATCH_HEADER]]86// CHECK: omp_dispatch.exit:87// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])88// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM10:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])89// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[OMP_GLOBAL_THREAD_NUM10]])90// CHECK-NEXT: br label [[OMP_DISPATCH_AFTER:%.*]]91// CHECK: omp_dispatch.after:92// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]93// CHECK: omp_loop.preheader9:94// CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], [[OMP_CHUNK_RANGE]]95// CHECK-NEXT: [[OMP_CHUNK_IS_LAST:%.*]] = icmp uge i32 [[TMP14]], [[DOTCOUNT]]96// CHECK-NEXT: [[TMP15:%.*]] = sub i32 [[DOTCOUNT]], [[TMP13]]97// CHECK-NEXT: [[OMP_CHUNK_TRIPCOUNT:%.*]] = select i1 [[OMP_CHUNK_IS_LAST]], i32 [[TMP15]], i32 [[OMP_CHUNK_RANGE]]98// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]99// CHECK: omp_loop.header:100// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER9]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]101// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]102// CHECK: omp_loop.cond:103// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[OMP_CHUNK_TRIPCOUNT]]104// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]105// CHECK: omp_loop.body:106// CHECK-NEXT: [[TMP16:%.*]] = add i32 [[OMP_LOOP_IV]], [[TMP13]]107// CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[TMP16]], ptr [[AGG_CAPTURED1]])108// CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[B_ADDR]], align 8109// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4110// CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP18]] to i64111// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw float, ptr [[TMP17]], i64 [[IDXPROM]]112// CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX]], align 4113// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[C_ADDR]], align 8114// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4115// CHECK-NEXT: [[IDXPROM2:%.*]] = zext i32 [[TMP21]] to i64116// CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds nuw float, ptr [[TMP20]], i64 [[IDXPROM2]]117// CHECK-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX3]], align 4118// CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP19]], [[TMP22]]119// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[D_ADDR]], align 8120// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4121// CHECK-NEXT: [[IDXPROM4:%.*]] = zext i32 [[TMP24]] to i64122// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw float, ptr [[TMP23]], i64 [[IDXPROM4]]123// CHECK-NEXT: [[TMP25:%.*]] = load float, ptr [[ARRAYIDX5]], align 4124// CHECK-NEXT: [[MUL6:%.*]] = fmul float [[MUL]], [[TMP25]]125// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[A_ADDR]], align 8126// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[I]], align 4127// CHECK-NEXT: [[IDXPROM7:%.*]] = zext i32 [[TMP27]] to i64128// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw float, ptr [[TMP26]], i64 [[IDXPROM7]]129// CHECK-NEXT: store float [[MUL6]], ptr [[ARRAYIDX8]], align 4130// CHECK-NEXT: br label [[OMP_LOOP_INC]]131// CHECK: omp_loop.inc:132// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1133// CHECK-NEXT: br label [[OMP_LOOP_HEADER]]134// CHECK: omp_loop.exit:135// CHECK-NEXT: br label [[OMP_DISPATCH_INC]]136// CHECK: omp_loop.after:137// CHECK-NEXT: ret void138//139//140// CHECK-LABEL: define {{[^@]+}}@__captured_stmt141// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] {142// CHECK-NEXT: entry:143// CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 8144// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8145// CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 4146// CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 4147// CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 4148// CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 8149// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8150// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8151// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 0152// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8153// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4154// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4155// CHECK-NEXT: store i32 32000000, ptr [[DOTSTOP]], align 4156// CHECK-NEXT: store i32 7, ptr [[DOTSTEP]], align 4157// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4158// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4159// CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]160// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]161// CHECK: cond.true:162// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4163// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4164// CHECK-NEXT: [[SUB:%.*]] = sub i32 [[TMP6]], [[TMP7]]165// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4166// CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1167// CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]168// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4169// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]170// CHECK-NEXT: br label [[COND_END:%.*]]171// CHECK: cond.false:172// CHECK-NEXT: br label [[COND_END]]173// CHECK: cond.end:174// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]175// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8176// CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4177// CHECK-NEXT: ret void178//179//180// CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1181// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] {182// CHECK-NEXT: entry:183// CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8184// CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4185// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8186// CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8187// CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4188// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8189// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8190// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0191// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4192// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4193// CHECK-NEXT: [[MUL:%.*]] = mul i32 7, [[TMP3]]194// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]195// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8196// CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4197// CHECK-NEXT: ret void198//199