146 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -x c -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s3// expected-no-diagnostics4 5#ifndef HEADER6#define HEADER7 8void unroll_full(float *a, float *b, float *c, float *d) {9#pragma omp unroll full10 for (int i = 0; i < 2; i++) {11 a[i] = b[i] * c[i] * d[i];12 }13}14 15#endif // HEADER16 17 18 19 20 21// CHECK-LABEL: define {{[^@]+}}@unroll_full22// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {23// CHECK-NEXT: entry:24// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 825// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 826// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 827// CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 828// CHECK-NEXT: [[I:%.*]] = alloca i32, align 429// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 830// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 431// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 432// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 833// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 834// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 835// CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 836// CHECK-NEXT: store i32 0, ptr [[I]], align 437// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 038// CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 839// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 040// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 441// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 442// CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])43// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 444// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]45// CHECK: omp_loop.preheader:46// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]47// CHECK: omp_loop.header:48// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]49// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]50// CHECK: omp_loop.cond:51// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]]52// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]53// CHECK: omp_loop.body:54// CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[OMP_LOOP_IV]], ptr [[AGG_CAPTURED1]])55// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 856// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 457// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i6458// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 [[IDXPROM]]59// CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[ARRAYIDX]], align 460// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[C_ADDR]], align 861// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 462// CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP7]] to i6463// CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 [[IDXPROM2]]64// CHECK-NEXT: [[TMP8:%.*]] = load float, ptr [[ARRAYIDX3]], align 465// CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP5]], [[TMP8]]66// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[D_ADDR]], align 867// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 468// CHECK-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP10]] to i6469// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP9]], i64 [[IDXPROM4]]70// CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX5]], align 471// CHECK-NEXT: [[MUL6:%.*]] = fmul float [[MUL]], [[TMP11]]72// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[A_ADDR]], align 873// CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 474// CHECK-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP13]] to i6475// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM7]]76// CHECK-NEXT: store float [[MUL6]], ptr [[ARRAYIDX8]], align 477// CHECK-NEXT: br label [[OMP_LOOP_INC]]78// CHECK: omp_loop.inc:79// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 180// CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]81// CHECK: omp_loop.exit:82// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]83// CHECK: omp_loop.after:84// CHECK-NEXT: ret void85//86//87// CHECK-LABEL: define {{[^@]+}}@__captured_stmt88// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {89// CHECK-NEXT: entry:90// CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 891// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 892// CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 493// CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 494// CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 495// CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 896// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 897// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 898// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 099// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8100// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4101// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4102// CHECK-NEXT: store i32 2, ptr [[DOTSTOP]], align 4103// CHECK-NEXT: store i32 1, ptr [[DOTSTEP]], align 4104// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4105// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4106// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]]107// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]108// CHECK: cond.true:109// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4110// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4111// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], [[TMP7]]112// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4113// CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1114// CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]115// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4116// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]117// CHECK-NEXT: br label [[COND_END:%.*]]118// CHECK: cond.false:119// CHECK-NEXT: br label [[COND_END]]120// CHECK: cond.end:121// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]122// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8123// CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4124// CHECK-NEXT: ret void125//126//127// CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1128// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {129// CHECK-NEXT: entry:130// CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8131// CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4132// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8133// CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8134// CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4135// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8136// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8137// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0138// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4139// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4140// CHECK-NEXT: [[MUL:%.*]] = mul i32 1, [[TMP3]]141// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]142// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8143// CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4144// CHECK-NEXT: ret void145//146