226 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -x c -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s3// expected-no-diagnostics4 5// REQUIRES: x86-registered-target6 7// TODO: The unroll-factor heuristic might be able to use the information that the trip count is constant, but currently is not able to determine that.8 9#ifndef HEADER10#define HEADER11 12double sind(double);13 14 15void unroll_partial_heuristic_constant_for(float *a, float *b, float *c, float *d, float *e, float offset) {16#pragma omp for17#pragma omp unroll partial18 for (int i = 0; i < 128; i++) {19 a[i] += sind(b[i]) * c[i] * d[i] * e[i] + offset;20 }21}22 23#endif // HEADER24 25 26 27 28 29// CHECK-LABEL: define {{[^@]+}}@unroll_partial_heuristic_constant_for30// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]], ptr noundef [[E:%.*]], float noundef [[OFFSET:%.*]]) #[[ATTR0:[0-9]+]] {31// CHECK-NEXT: entry:32// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 833// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 834// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 835// CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 836// CHECK-NEXT: [[E_ADDR:%.*]] = alloca ptr, align 837// CHECK-NEXT: [[OFFSET_ADDR:%.*]] = alloca float, align 438// CHECK-NEXT: [[I:%.*]] = alloca i32, align 439// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 840// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 441// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 442// CHECK-NEXT: [[P_LASTITER:%.*]] = alloca i32, align 443// CHECK-NEXT: [[P_LOWERBOUND:%.*]] = alloca i32, align 444// CHECK-NEXT: [[P_UPPERBOUND:%.*]] = alloca i32, align 445// CHECK-NEXT: [[P_STRIDE:%.*]] = alloca i32, align 446// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 847// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 848// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 849// CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 850// CHECK-NEXT: store ptr [[E]], ptr [[E_ADDR]], align 851// CHECK-NEXT: store float [[OFFSET]], ptr [[OFFSET_ADDR]], align 452// CHECK-NEXT: store i32 0, ptr [[I]], align 453// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 054// CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 855// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 056// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 457// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 458// CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])59// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 460// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]61// CHECK: omp_loop.preheader:62// CHECK-NEXT: [[TMP3:%.*]] = udiv i32 [[DOTCOUNT]], 463// CHECK-NEXT: [[TMP4:%.*]] = urem i32 [[DOTCOUNT]], 464// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 065// CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i3266// CHECK-NEXT: [[OMP_FLOOR0_TRIPCOUNT:%.*]] = add nuw i32 [[TMP3]], [[TMP6]]67// CHECK-NEXT: br label [[OMP_FLOOR0_PREHEADER:%.*]]68// CHECK: omp_floor0.preheader:69// CHECK-NEXT: store i32 0, ptr [[P_LOWERBOUND]], align 470// CHECK-NEXT: [[TMP7:%.*]] = sub i32 [[OMP_FLOOR0_TRIPCOUNT]], 171// CHECK-NEXT: store i32 [[TMP7]], ptr [[P_UPPERBOUND]], align 472// CHECK-NEXT: store i32 1, ptr [[P_STRIDE]], align 473// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])74// CHECK-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]], i32 34, ptr [[P_LASTITER]], ptr [[P_LOWERBOUND]], ptr [[P_UPPERBOUND]], ptr [[P_STRIDE]], i32 1, i32 0)75// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[P_LOWERBOUND]], align 476// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[P_UPPERBOUND]], align 477// CHECK-NEXT: [[TMP10:%.*]] = sub i32 [[TMP9]], [[TMP8]]78// CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 179// CHECK-NEXT: br label [[OMP_FLOOR0_HEADER:%.*]]80// CHECK: omp_floor0.header:81// CHECK-NEXT: [[OMP_FLOOR0_IV:%.*]] = phi i32 [ 0, [[OMP_FLOOR0_PREHEADER]] ], [ [[OMP_FLOOR0_NEXT:%.*]], [[OMP_FLOOR0_INC:%.*]] ]82// CHECK-NEXT: br label [[OMP_FLOOR0_COND:%.*]]83// CHECK: omp_floor0.cond:84// CHECK-NEXT: [[OMP_FLOOR0_CMP:%.*]] = icmp ult i32 [[OMP_FLOOR0_IV]], [[TMP11]]85// CHECK-NEXT: br i1 [[OMP_FLOOR0_CMP]], label [[OMP_FLOOR0_BODY:%.*]], label [[OMP_FLOOR0_EXIT:%.*]]86// CHECK: omp_floor0.body:87// CHECK-NEXT: [[TMP12:%.*]] = add i32 [[OMP_FLOOR0_IV]], [[TMP8]]88// CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], [[TMP3]]89// CHECK-NEXT: [[TMP14:%.*]] = select i1 [[TMP13]], i32 [[TMP4]], i32 490// CHECK-NEXT: br label [[OMP_TILE0_PREHEADER:%.*]]91// CHECK: omp_tile0.preheader:92// CHECK-NEXT: br label [[OMP_TILE0_HEADER:%.*]]93// CHECK: omp_tile0.header:94// CHECK-NEXT: [[OMP_TILE0_IV:%.*]] = phi i32 [ 0, [[OMP_TILE0_PREHEADER]] ], [ [[OMP_TILE0_NEXT:%.*]], [[OMP_TILE0_INC:%.*]] ]95// CHECK-NEXT: br label [[OMP_TILE0_COND:%.*]]96// CHECK: omp_tile0.cond:97// CHECK-NEXT: [[OMP_TILE0_CMP:%.*]] = icmp ult i32 [[OMP_TILE0_IV]], [[TMP14]]98// CHECK-NEXT: br i1 [[OMP_TILE0_CMP]], label [[OMP_TILE0_BODY:%.*]], label [[OMP_TILE0_EXIT:%.*]]99// CHECK: omp_tile0.body:100// CHECK-NEXT: [[TMP15:%.*]] = mul nuw i32 4, [[TMP12]]101// CHECK-NEXT: [[TMP16:%.*]] = add nuw i32 [[TMP15]], [[OMP_TILE0_IV]]102// CHECK-NEXT: br label [[OMP_LOOP_BODY:%.*]]103// CHECK: omp_loop.body:104// CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[TMP16]], ptr [[AGG_CAPTURED1]])105// CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[B_ADDR]], align 8106// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4107// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64108// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i64 [[IDXPROM]]109// CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX]], align 4110// CHECK-NEXT: [[CONV:%.*]] = fpext float [[TMP19]] to double111// CHECK-NEXT: [[CALL:%.*]] = call double @sind(double noundef [[CONV]])112// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[C_ADDR]], align 8113// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4114// CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP21]] to i64115// CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i64 [[IDXPROM2]]116// CHECK-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX3]], align 4117// CHECK-NEXT: [[CONV4:%.*]] = fpext float [[TMP22]] to double118// CHECK-NEXT: [[MUL:%.*]] = fmul double [[CALL]], [[CONV4]]119// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[D_ADDR]], align 8120// CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4121// CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP24]] to i64122// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP23]], i64 [[IDXPROM5]]123// CHECK-NEXT: [[TMP25:%.*]] = load float, ptr [[ARRAYIDX6]], align 4124// CHECK-NEXT: [[CONV7:%.*]] = fpext float [[TMP25]] to double125// CHECK-NEXT: [[MUL8:%.*]] = fmul double [[MUL]], [[CONV7]]126// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[E_ADDR]], align 8127// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[I]], align 4128// CHECK-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP27]] to i64129// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[TMP26]], i64 [[IDXPROM9]]130// CHECK-NEXT: [[TMP28:%.*]] = load float, ptr [[ARRAYIDX10]], align 4131// CHECK-NEXT: [[CONV11:%.*]] = fpext float [[TMP28]] to double132// CHECK-NEXT: [[MUL12:%.*]] = fmul double [[MUL8]], [[CONV11]]133// CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[OFFSET_ADDR]], align 4134// CHECK-NEXT: [[CONV13:%.*]] = fpext float [[TMP29]] to double135// CHECK-NEXT: [[ADD:%.*]] = fadd double [[MUL12]], [[CONV13]]136// CHECK-NEXT: [[TMP30:%.*]] = load ptr, ptr [[A_ADDR]], align 8137// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[I]], align 4138// CHECK-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP31]] to i64139// CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds float, ptr [[TMP30]], i64 [[IDXPROM14]]140// CHECK-NEXT: [[TMP32:%.*]] = load float, ptr [[ARRAYIDX15]], align 4141// CHECK-NEXT: [[CONV16:%.*]] = fpext float [[TMP32]] to double142// CHECK-NEXT: [[ADD17:%.*]] = fadd double [[CONV16]], [[ADD]]143// CHECK-NEXT: [[CONV18:%.*]] = fptrunc double [[ADD17]] to float144// CHECK-NEXT: store float [[CONV18]], ptr [[ARRAYIDX15]], align 4145// CHECK-NEXT: br label [[OMP_TILE0_INC]]146// CHECK: omp_tile0.inc:147// CHECK-NEXT: [[OMP_TILE0_NEXT]] = add nuw i32 [[OMP_TILE0_IV]], 1148// CHECK-NEXT: br label [[OMP_TILE0_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]149// CHECK: omp_tile0.exit:150// CHECK-NEXT: br label [[OMP_TILE0_AFTER:%.*]]151// CHECK: omp_tile0.after:152// CHECK-NEXT: br label [[OMP_FLOOR0_INC]]153// CHECK: omp_floor0.inc:154// CHECK-NEXT: [[OMP_FLOOR0_NEXT]] = add nuw i32 [[OMP_FLOOR0_IV]], 1155// CHECK-NEXT: br label [[OMP_FLOOR0_HEADER]]156// CHECK: omp_floor0.exit:157// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[OMP_GLOBAL_THREAD_NUM]])158// CHECK-NEXT: [[OMP_GLOBAL_THREAD_NUM19:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])159// CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[OMP_GLOBAL_THREAD_NUM19]])160// CHECK-NEXT: br label [[OMP_FLOOR0_AFTER:%.*]]161// CHECK: omp_floor0.after:162// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]163// CHECK: omp_loop.after:164// CHECK-NEXT: ret void165//166//167// CHECK-LABEL: define {{[^@]+}}@__captured_stmt168// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {169// CHECK-NEXT: entry:170// CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 8171// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8172// CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 4173// CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 4174// CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 4175// CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 8176// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8177// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8178// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 0179// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8180// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4181// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4182// CHECK-NEXT: store i32 128, ptr [[DOTSTOP]], align 4183// CHECK-NEXT: store i32 1, ptr [[DOTSTEP]], align 4184// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4185// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4186// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]]187// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]188// CHECK: cond.true:189// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4190// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4191// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], [[TMP7]]192// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4193// CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1194// CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]195// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4196// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]197// CHECK-NEXT: br label [[COND_END:%.*]]198// CHECK: cond.false:199// CHECK-NEXT: br label [[COND_END]]200// CHECK: cond.end:201// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]202// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8203// CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4204// CHECK-NEXT: ret void205//206//207// CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1208// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {209// CHECK-NEXT: entry:210// CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8211// CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4212// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8213// CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8214// CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4215// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8216// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8217// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0218// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4219// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4220// CHECK-NEXT: [[MUL:%.*]] = mul i32 1, [[TMP3]]221// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]222// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8223// CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4224// CHECK-NEXT: ret void225//226