179 lines · c
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -x c -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s3// expected-no-diagnostics4 5#ifndef HEADER6#define HEADER7 8void unroll_unroll_partial_heuristic(float *a, float *b, float *c, float *d) {9#pragma omp unroll partial10#pragma omp unroll partial11 for (int i = 0; i < 2; i++) {12 a[i] = b[i] * c[i] * d[i];13 }14}15 16#endif // HEADER17 18 19 20 21 22// CHECK-LABEL: define {{[^@]+}}@unroll_unroll_partial_heuristic23// CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {24// CHECK-NEXT: entry:25// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 826// CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 827// CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 828// CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 829// CHECK-NEXT: [[I:%.*]] = alloca i32, align 430// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 831// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 432// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 433// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 834// CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 835// CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 836// CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 837// CHECK-NEXT: store i32 0, ptr [[I]], align 438// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 039// CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 840// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 041// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 442// CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 443// CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])44// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 445// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]46// CHECK: omp_loop.preheader:47// CHECK-NEXT: [[TMP3:%.*]] = udiv i32 [[DOTCOUNT]], 848// CHECK-NEXT: [[TMP4:%.*]] = urem i32 [[DOTCOUNT]], 849// CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 050// CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i3251// CHECK-NEXT: [[OMP_FLOOR0_TRIPCOUNT:%.*]] = add nuw i32 [[TMP3]], [[TMP6]]52// CHECK-NEXT: br label [[OMP_FLOOR0_PREHEADER:%.*]]53// CHECK: omp_floor0.preheader:54// CHECK-NEXT: br label [[OMP_FLOOR0_HEADER:%.*]]55// CHECK: omp_floor0.header:56// CHECK-NEXT: [[OMP_FLOOR0_IV:%.*]] = phi i32 [ 0, [[OMP_FLOOR0_PREHEADER]] ], [ [[OMP_FLOOR0_NEXT:%.*]], [[OMP_FLOOR0_INC:%.*]] ]57// CHECK-NEXT: br label [[OMP_FLOOR0_COND:%.*]]58// CHECK: omp_floor0.cond:59// CHECK-NEXT: [[OMP_FLOOR0_CMP:%.*]] = icmp ult i32 [[OMP_FLOOR0_IV]], [[OMP_FLOOR0_TRIPCOUNT]]60// CHECK-NEXT: br i1 [[OMP_FLOOR0_CMP]], label [[OMP_FLOOR0_BODY:%.*]], label [[OMP_FLOOR0_EXIT:%.*]]61// CHECK: omp_floor0.body:62// CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[OMP_FLOOR0_IV]], [[TMP3]]63// CHECK-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 [[TMP4]], i32 864// CHECK-NEXT: br label [[OMP_TILE0_PREHEADER:%.*]]65// CHECK: omp_tile0.preheader:66// CHECK-NEXT: br label [[OMP_TILE0_HEADER:%.*]]67// CHECK: omp_tile0.header:68// CHECK-NEXT: [[OMP_TILE0_IV:%.*]] = phi i32 [ 0, [[OMP_TILE0_PREHEADER]] ], [ [[OMP_TILE0_NEXT:%.*]], [[OMP_TILE0_INC:%.*]] ]69// CHECK-NEXT: br label [[OMP_TILE0_COND:%.*]]70// CHECK: omp_tile0.cond:71// CHECK-NEXT: [[OMP_TILE0_CMP:%.*]] = icmp ult i32 [[OMP_TILE0_IV]], [[TMP8]]72// CHECK-NEXT: br i1 [[OMP_TILE0_CMP]], label [[OMP_TILE0_BODY:%.*]], label [[OMP_TILE0_EXIT:%.*]]73// CHECK: omp_tile0.body:74// CHECK-NEXT: [[TMP9:%.*]] = mul nuw i32 8, [[OMP_FLOOR0_IV]]75// CHECK-NEXT: [[TMP10:%.*]] = add nuw i32 [[TMP9]], [[OMP_TILE0_IV]]76// CHECK-NEXT: br label [[OMP_LOOP_BODY:%.*]]77// CHECK: omp_loop.body:78// CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[TMP10]], ptr [[AGG_CAPTURED1]])79// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[B_ADDR]], align 880// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 481// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i6482// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP11]], i64 [[IDXPROM]]83// CHECK-NEXT: [[TMP13:%.*]] = load float, ptr [[ARRAYIDX]], align 484// CHECK-NEXT: [[TMP14:%.*]] = load ptr, ptr [[C_ADDR]], align 885// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 486// CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP15]] to i6487// CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i64 [[IDXPROM2]]88// CHECK-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX3]], align 489// CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP13]], [[TMP16]]90// CHECK-NEXT: [[TMP17:%.*]] = load ptr, ptr [[D_ADDR]], align 891// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 492// CHECK-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP18]] to i6493// CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i64 [[IDXPROM4]]94// CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX5]], align 495// CHECK-NEXT: [[MUL6:%.*]] = fmul float [[MUL]], [[TMP19]]96// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[A_ADDR]], align 897// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 498// CHECK-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP21]] to i6499// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i64 [[IDXPROM7]]100// CHECK-NEXT: store float [[MUL6]], ptr [[ARRAYIDX8]], align 4101// CHECK-NEXT: br label [[OMP_TILE0_INC]]102// CHECK: omp_tile0.inc:103// CHECK-NEXT: [[OMP_TILE0_NEXT]] = add nuw i32 [[OMP_TILE0_IV]], 1104// CHECK-NEXT: br label [[OMP_TILE0_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]105// CHECK: omp_tile0.exit:106// CHECK-NEXT: br label [[OMP_TILE0_AFTER:%.*]]107// CHECK: omp_tile0.after:108// CHECK-NEXT: br label [[OMP_FLOOR0_INC]]109// CHECK: omp_floor0.inc:110// CHECK-NEXT: [[OMP_FLOOR0_NEXT]] = add nuw i32 [[OMP_FLOOR0_IV]], 1111// CHECK-NEXT: br label [[OMP_FLOOR0_HEADER]], !llvm.loop [[LOOP6:![0-9]+]]112// CHECK: omp_floor0.exit:113// CHECK-NEXT: br label [[OMP_FLOOR0_AFTER:%.*]]114// CHECK: omp_floor0.after:115// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]116// CHECK: omp_loop.after:117// CHECK-NEXT: ret void118//119//120// CHECK-LABEL: define {{[^@]+}}@__captured_stmt121// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {122// CHECK-NEXT: entry:123// CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 8124// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8125// CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 4126// CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 4127// CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 4128// CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 8129// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8130// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8131// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 0132// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8133// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4134// CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4135// CHECK-NEXT: store i32 2, ptr [[DOTSTOP]], align 4136// CHECK-NEXT: store i32 1, ptr [[DOTSTEP]], align 4137// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4138// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4139// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]]140// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]141// CHECK: cond.true:142// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4143// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4144// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], [[TMP7]]145// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4146// CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1147// CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]148// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4149// CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]150// CHECK-NEXT: br label [[COND_END:%.*]]151// CHECK: cond.false:152// CHECK-NEXT: br label [[COND_END]]153// CHECK: cond.end:154// CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]155// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8156// CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4157// CHECK-NEXT: ret void158//159//160// CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1161// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {162// CHECK-NEXT: entry:163// CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8164// CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4165// CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8166// CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8167// CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4168// CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8169// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8170// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0171// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4172// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4173// CHECK-NEXT: [[MUL:%.*]] = mul i32 1, [[TMP3]]174// CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]175// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8176// CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4177// CHECK-NEXT: ret void178//179