3807 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// Test target codegen - host bc file has to be created first.3// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc4// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -fopenmp-optimistic-collapse -o - | FileCheck %s --check-prefix=CHECK26// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc7// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK38// RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK39 10// expected-no-diagnostics11#ifndef HEADER12#define HEADER13 14#define N 100015#define M 1016 17template<typename tx>18tx ftemplate(int n) {19 tx a[N];20 short aa[N];21 tx b[10];22 tx c[M][M];23 tx f = n;24 tx l;25 int k;26 tx *v;27 28#pragma omp target teams loop map(tofrom: aa) num_teams(M) thread_limit(64)29 for(int i = 0; i < n; i++) {30 aa[i] += 1;31 }32 33#pragma omp target teams loop map(tofrom:a, aa, b) if(target: n>40)34 for(int i = 0; i < 10; i++) {35 b[i] += 1;36 }37 38#pragma omp target teams loop collapse(2) firstprivate(f) private(k)39 for(int i = 0; i < M; i++) {40 for(int j = 0; j < M; j++) {41 k = M;42 c[i][j] = i + j * f + k;43 }44 }45 46#pragma omp target teams loop collapse(2)47 for(int i = 0; i < n; i++) {48 for(int j = 0; j < n; j++) {49 c[i][j] = i + j;50 }51 }52 53#pragma omp target teams loop map(a, v[:N])54 for(int i = 0; i < n; i++)55 a[i] = v[i];56 return a[0];57}58 59int bar(int n){60 int a = 0;61 62 a += ftemplate<int>(n);63 64 return a;65}66 67#endif68// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l2869// CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {70// CHECK1-NEXT: entry:71// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 872// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 873// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 874// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 875// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 476// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 477// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 878// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 879// CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 880// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 881// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])82// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -183// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]84// CHECK1: user_code.entry:85// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])86// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 487// CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 488// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 889// CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 490// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 491// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]92// CHECK1-NEXT: call void @__kmpc_target_deinit()93// CHECK1-NEXT: ret void94// CHECK1: worker.exit:95// CHECK1-NEXT: ret void96//97//98// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined99// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {100// CHECK1-NEXT: entry:101// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8102// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8103// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8104// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8105// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4106// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4107// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4108// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4109// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4110// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4111// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4112// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4113// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4114// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4115// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8116// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8117// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8118// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8119// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8120// CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8121// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8122// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4123// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4124// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4125// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0126// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1127// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1128// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4129// CHECK1-NEXT: store i32 0, ptr [[I]], align 4130// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4131// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]132// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]133// CHECK1: omp.precond.then:134// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4135// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4136// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4137// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4138// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4139// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()140// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8141// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4142// CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])143// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4144// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4145// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]146// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]147// CHECK1: cond.true:148// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4149// CHECK1-NEXT: br label [[COND_END:%.*]]150// CHECK1: cond.false:151// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4152// CHECK1-NEXT: br label [[COND_END]]153// CHECK1: cond.end:154// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]155// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4156// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4157// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4158// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]159// CHECK1: omp.inner.for.cond:160// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4161// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4162// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1163// CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]164// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]165// CHECK1: omp.inner.for.body:166// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4167// CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64168// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4169// CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64170// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4171// CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 4172// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8173// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0174// CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to ptr175// CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 8176// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1177// CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to ptr178// CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 8179// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2180// CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to ptr181// CHECK1-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8182// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3183// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP26]], align 8184// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8185// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4186// CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)187// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]188// CHECK1: omp.inner.for.inc:189// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4190// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4191// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]192// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4193// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4194// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4195// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]196// CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 4197// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4198// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4199// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]200// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 4201// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4202// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4203// CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]204// CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]205// CHECK1: cond.true10:206// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4207// CHECK1-NEXT: br label [[COND_END12:%.*]]208// CHECK1: cond.false11:209// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4210// CHECK1-NEXT: br label [[COND_END12]]211// CHECK1: cond.end12:212// CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]213// CHECK1-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 4214// CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4215// CHECK1-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 4216// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]217// CHECK1: omp.inner.for.end:218// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]219// CHECK1: omp.loop.exit:220// CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8221// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4222// CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])223// CHECK1-NEXT: br label [[OMP_PRECOND_END]]224// CHECK1: omp.precond.end:225// CHECK1-NEXT: ret void226//227//228// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined229// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {230// CHECK1-NEXT: entry:231// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8232// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8233// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8234// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8235// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8236// CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4238// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4239// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4240// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4241// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4242// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4243// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4244// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4245// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4246// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4247// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8248// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8249// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8250// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8251// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8252// CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8253// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8254// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4255// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4256// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4257// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0258// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1259// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1260// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4261// CHECK1-NEXT: store i32 0, ptr [[I]], align 4262// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4263// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]264// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]265// CHECK1: omp.precond.then:266// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4267// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4268// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4269// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8270// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32271// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8272// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32273// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4274// CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4275// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4276// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4277// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8278// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4279// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)280// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4281// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4282// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]283// CHECK1: omp.inner.for.cond:284// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4285// CHECK1-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i64286// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8287// CHECK1-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]288// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]289// CHECK1: omp.inner.for.body:290// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4291// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1292// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]293// CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 4294// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I4]], align 4295// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64296// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]297// CHECK1-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 2298// CHECK1-NEXT: [[CONV7:%.*]] = sext i16 [[TMP14]] to i32299// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[CONV7]], 1300// CHECK1-NEXT: [[CONV9:%.*]] = trunc i32 [[ADD8]] to i16301// CHECK1-NEXT: store i16 [[CONV9]], ptr [[ARRAYIDX]], align 2302// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]303// CHECK1: omp.body.continue:304// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]305// CHECK1: omp.inner.for.inc:306// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4307// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4308// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]309// CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4310// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]311// CHECK1: omp.inner.for.end:312// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]313// CHECK1: omp.loop.exit:314// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8315// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4316// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])317// CHECK1-NEXT: br label [[OMP_PRECOND_END]]318// CHECK1: omp.precond.end:319// CHECK1-NEXT: ret void320//321//322// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33323// CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {324// CHECK1-NEXT: entry:325// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8326// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8327// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8328// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8329// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4330// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4331// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8332// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8333// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8334// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8335// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])336// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1337// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]338// CHECK1: user_code.entry:339// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])340// CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1341// CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i1342// CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8343// CHECK1-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1344// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8345// CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4346// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4347// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]348// CHECK1-NEXT: call void @__kmpc_target_deinit()349// CHECK1-NEXT: ret void350// CHECK1: worker.exit:351// CHECK1-NEXT: ret void352//353//354// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined355// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {356// CHECK1-NEXT: entry:357// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8358// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8359// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8360// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8361// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4362// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4363// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4364// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4365// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4366// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4367// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4368// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 8369// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8370// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8371// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8372// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8373// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8374// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4375// CHECK1-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 4376// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4377// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4378// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()379// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8380// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4381// CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])382// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4383// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9384// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]385// CHECK1: cond.true:386// CHECK1-NEXT: br label [[COND_END:%.*]]387// CHECK1: cond.false:388// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4389// CHECK1-NEXT: br label [[COND_END]]390// CHECK1: cond.end:391// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]392// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4393// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4394// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4395// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]396// CHECK1: omp.inner.for.cond:397// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4398// CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10399// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]400// CHECK1: omp.inner.for.body:401// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4402// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64403// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4404// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64405// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0406// CHECK1-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to ptr407// CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8408// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1409// CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to ptr410// CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8411// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2412// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 8413// CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3)414// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]415// CHECK1: omp.inner.for.inc:416// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4417// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4418// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]419// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4420// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4421// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4422// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]423// CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 4424// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4425// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4426// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]427// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 4428// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4429// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9430// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]431// CHECK1: cond.true5:432// CHECK1-NEXT: br label [[COND_END7:%.*]]433// CHECK1: cond.false6:434// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4435// CHECK1-NEXT: br label [[COND_END7]]436// CHECK1: cond.end7:437// CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]438// CHECK1-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 4439// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4440// CHECK1-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 4441// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]442// CHECK1: omp.inner.for.end:443// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]444// CHECK1: omp.loop.exit:445// CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])446// CHECK1-NEXT: ret void447//448//449// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined450// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {451// CHECK1-NEXT: entry:452// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8453// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8454// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8455// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8456// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8457// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4458// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4459// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4460// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4461// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4462// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4463// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4464// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8465// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8466// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8467// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8468// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8469// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8470// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4471// CHECK1-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4472// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8473// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32474// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8475// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32476// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4477// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4478// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4479// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4480// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8481// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4482// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)483// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4484// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4485// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]486// CHECK1: omp.inner.for.cond:487// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4488// CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64489// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8490// CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]491// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]492// CHECK1: omp.inner.for.body:493// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4494// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1495// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]496// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4497// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4498// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64499// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]500// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 4501// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1502// CHECK1-NEXT: store i32 [[ADD3]], ptr [[ARRAYIDX]], align 4503// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]504// CHECK1: omp.body.continue:505// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]506// CHECK1: omp.inner.for.inc:507// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4508// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4509// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]510// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4511// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]512// CHECK1: omp.inner.for.end:513// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]514// CHECK1: omp.loop.exit:515// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])516// CHECK1-NEXT: ret void517//518//519// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38520// CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR4]] {521// CHECK1-NEXT: entry:522// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8523// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8524// CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8525// CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8526// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4527// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4528// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8529// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8530// CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8531// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8532// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])533// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1534// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]535// CHECK1: user_code.entry:536// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])537// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 4538// CHECK1-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 4539// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[F_CASTED]], align 8540// CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4541// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4542// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]543// CHECK1-NEXT: call void @__kmpc_target_deinit()544// CHECK1-NEXT: ret void545// CHECK1: worker.exit:546// CHECK1-NEXT: ret void547//548//549// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined550// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {551// CHECK1-NEXT: entry:552// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8553// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8554// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8555// CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8556// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4557// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4558// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4559// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4560// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4561// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4562// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4563// CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4564// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4565// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4566// CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8567// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8568// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8569// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8570// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8571// CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8572// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8573// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 4574// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 4575// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4576// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4577// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()578// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8579// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4580// CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])581// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4582// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99583// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]584// CHECK1: cond.true:585// CHECK1-NEXT: br label [[COND_END:%.*]]586// CHECK1: cond.false:587// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4588// CHECK1-NEXT: br label [[COND_END]]589// CHECK1: cond.end:590// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]591// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4592// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4593// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4594// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]595// CHECK1: omp.inner.for.cond:596// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4597// CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100598// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]599// CHECK1: omp.inner.for.body:600// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4601// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64602// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4603// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64604// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[F_ADDR]], align 4605// CHECK1-NEXT: store i32 [[TMP11]], ptr [[F_CASTED]], align 4606// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[F_CASTED]], align 8607// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0608// CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to ptr609// CHECK1-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8610// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1611// CHECK1-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to ptr612// CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 8613// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2614// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP17]], align 8615// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3616// CHECK1-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP12]] to ptr617// CHECK1-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 8618// CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)619// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]620// CHECK1: omp.inner.for.inc:621// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4622// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4623// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]624// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4625// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4626// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4627// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]628// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 4629// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4630// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4631// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]632// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 4633// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4634// CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99635// CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]636// CHECK1: cond.true6:637// CHECK1-NEXT: br label [[COND_END8:%.*]]638// CHECK1: cond.false7:639// CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4640// CHECK1-NEXT: br label [[COND_END8]]641// CHECK1: cond.end8:642// CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]643// CHECK1-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 4644// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4645// CHECK1-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_IV]], align 4646// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]647// CHECK1: omp.inner.for.end:648// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]649// CHECK1: omp.loop.exit:650// CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])651// CHECK1-NEXT: ret void652//653//654// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined655// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {656// CHECK1-NEXT: entry:657// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8658// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8659// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8660// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8661// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8662// CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8663// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4664// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4665// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4666// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4667// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4668// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4669// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4670// CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4671// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4672// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4673// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8674// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8675// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8676// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8677// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8678// CHECK1-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 8679// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8680// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4681// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4682// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8683// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32684// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8685// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32686// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4687// CHECK1-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4688// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4689// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4690// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8691// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4692// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)693// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4694// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4695// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]696// CHECK1: omp.inner.for.cond:697// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4698// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64699// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8700// CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]]701// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]702// CHECK1: omp.inner.for.body:703// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4704// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10705// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1706// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]707// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4708// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4709// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4710// CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP10]], 10711// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 10712// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL5]]713// CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1714// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]715// CHECK1-NEXT: store i32 [[ADD7]], ptr [[J]], align 4716// CHECK1-NEXT: store i32 10, ptr [[K]], align 4717// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4718// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4719// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 4720// CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]721// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], [[MUL8]]722// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 4723// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD9]], [[TMP14]]724// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4725// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64726// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]727// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 4728// CHECK1-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP16]] to i64729// CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM11]]730// CHECK1-NEXT: store i32 [[ADD10]], ptr [[ARRAYIDX12]], align 4731// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]732// CHECK1: omp.body.continue:733// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]734// CHECK1: omp.inner.for.inc:735// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4736// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4737// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]738// CHECK1-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 4739// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]740// CHECK1: omp.inner.for.end:741// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]742// CHECK1: omp.loop.exit:743// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])744// CHECK1-NEXT: ret void745//746//747// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46748// CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {749// CHECK1-NEXT: entry:750// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8751// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8752// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8753// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8754// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4755// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4756// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8757// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8758// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8759// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8760// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])761// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1762// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]763// CHECK1: user_code.entry:764// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])765// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4766// CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4767// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8768// CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 4769// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 4770// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]771// CHECK1-NEXT: call void @__kmpc_target_deinit()772// CHECK1-NEXT: ret void773// CHECK1: worker.exit:774// CHECK1-NEXT: ret void775//776//777// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined778// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {779// CHECK1-NEXT: entry:780// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8781// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8782// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8783// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8784// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8785// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4786// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4787// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4788// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4789// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8790// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4791// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4792// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8793// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8794// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8795// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4796// CHECK1-NEXT: [[I9:%.*]] = alloca i32, align 4797// CHECK1-NEXT: [[J10:%.*]] = alloca i32, align 4798// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8799// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 8800// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8801// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8802// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8803// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8804// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8805// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4806// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4807// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4808// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4809// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4810// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0811// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1812// CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64813// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4814// CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0815// CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1816// CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64817// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]818// CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1819// CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8820// CHECK1-NEXT: store i32 0, ptr [[I]], align 4821// CHECK1-NEXT: store i32 0, ptr [[J]], align 4822// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4823// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]824// CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]825// CHECK1: land.lhs.true:826// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4827// CHECK1-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]828// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]829// CHECK1: omp.precond.then:830// CHECK1-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 8831// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8832// CHECK1-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 8833// CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8834// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4835// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()836// CHECK1-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64837// CHECK1-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8838// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4839// CHECK1-NEXT: call void @__kmpc_distribute_static_init_8(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])840// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8841// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8842// CHECK1-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]843// CHECK1-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]844// CHECK1: cond.true:845// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8846// CHECK1-NEXT: br label [[COND_END:%.*]]847// CHECK1: cond.false:848// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8849// CHECK1-NEXT: br label [[COND_END]]850// CHECK1: cond.end:851// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]852// CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8853// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8854// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 8855// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]856// CHECK1: omp.inner.for.cond:857// CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8858// CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8859// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1860// CHECK1-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]861// CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]862// CHECK1: omp.inner.for.body:863// CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8864// CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8865// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4866// CHECK1-NEXT: store i32 [[TMP19]], ptr [[N_CASTED]], align 4867// CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8868// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0869// CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP17]] to ptr870// CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 8871// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 1872// CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to ptr873// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 8874// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 2875// CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to ptr876// CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 8877// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 3878// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 8879// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8880// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4881// CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)882// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]883// CHECK1: omp.inner.for.inc:884// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8885// CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8886// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP30]], [[TMP31]]887// CHECK1-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 8888// CHECK1-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8889// CHECK1-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8890// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]891// CHECK1-NEXT: store i64 [[ADD15]], ptr [[DOTOMP_COMB_LB]], align 8892// CHECK1-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8893// CHECK1-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8894// CHECK1-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]895// CHECK1-NEXT: store i64 [[ADD16]], ptr [[DOTOMP_COMB_UB]], align 8896// CHECK1-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8897// CHECK1-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8898// CHECK1-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP36]], [[TMP37]]899// CHECK1-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]900// CHECK1: cond.true18:901// CHECK1-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8902// CHECK1-NEXT: br label [[COND_END20:%.*]]903// CHECK1: cond.false19:904// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8905// CHECK1-NEXT: br label [[COND_END20]]906// CHECK1: cond.end20:907// CHECK1-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP38]], [[COND_TRUE18]] ], [ [[TMP39]], [[COND_FALSE19]] ]908// CHECK1-NEXT: store i64 [[COND21]], ptr [[DOTOMP_COMB_UB]], align 8909// CHECK1-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8910// CHECK1-NEXT: store i64 [[TMP40]], ptr [[DOTOMP_IV]], align 8911// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]912// CHECK1: omp.inner.for.end:913// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]914// CHECK1: omp.loop.exit:915// CHECK1-NEXT: [[TMP41:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8916// CHECK1-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP41]], align 4917// CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP42]])918// CHECK1-NEXT: br label [[OMP_PRECOND_END]]919// CHECK1: omp.precond.end:920// CHECK1-NEXT: ret void921//922//923// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined924// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {925// CHECK1-NEXT: entry:926// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8927// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8928// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8929// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8930// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8931// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8932// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8933// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4934// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4935// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4936// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4937// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8938// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4939// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4940// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8941// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8942// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8943// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4944// CHECK1-NEXT: [[I9:%.*]] = alloca i32, align 4945// CHECK1-NEXT: [[J10:%.*]] = alloca i32, align 4946// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8947// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8948// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8949// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8950// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8951// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8952// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8953// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4954// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4955// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4956// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 4957// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4958// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0959// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1960// CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64961// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4962// CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0963// CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1964// CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64965// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]966// CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1967// CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8968// CHECK1-NEXT: store i32 0, ptr [[I]], align 4969// CHECK1-NEXT: store i32 0, ptr [[J]], align 4970// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4971// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]972// CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]973// CHECK1: land.lhs.true:974// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4975// CHECK1-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]976// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]977// CHECK1: omp.precond.then:978// CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8979// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8980// CHECK1-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_UB]], align 8981// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8982// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8983// CHECK1-NEXT: store i64 [[TMP8]], ptr [[DOTOMP_LB]], align 8984// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8985// CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8986// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4987// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8988// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4989// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)990// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8991// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTOMP_IV]], align 8992// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]993// CHECK1: omp.inner.for.cond:994// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8995// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8996// CHECK1-NEXT: [[CMP11:%.*]] = icmp ule i64 [[TMP13]], [[TMP14]]997// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]998// CHECK1: omp.inner.for.body:999// CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81000// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41001// CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP16]], 01002// CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 11003// CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]1004// CHECK1-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i641005// CHECK1-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP15]], [[CONV15]]1006// CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 11007// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]1008// CHECK1-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i321009// CHECK1-NEXT: store i32 [[CONV18]], ptr [[I9]], align 41010// CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81011// CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81012// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41013// CHECK1-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP19]], 01014// CHECK1-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 11015// CHECK1-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]1016// CHECK1-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i641017// CHECK1-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP18]], [[CONV22]]1018// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41019// CHECK1-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP20]], 01020// CHECK1-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 11021// CHECK1-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]1022// CHECK1-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i641023// CHECK1-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]1024// CHECK1-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP17]], [[MUL28]]1025// CHECK1-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 11026// CHECK1-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]1027// CHECK1-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i321028// CHECK1-NEXT: store i32 [[CONV32]], ptr [[J10]], align 41029// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I9]], align 41030// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[J10]], align 41031// CHECK1-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]1032// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[I9]], align 41033// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i641034// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]1035// CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[J10]], align 41036// CHECK1-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP24]] to i641037// CHECK1-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM34]]1038// CHECK1-NEXT: store i32 [[ADD33]], ptr [[ARRAYIDX35]], align 41039// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1040// CHECK1: omp.body.continue:1041// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1042// CHECK1: omp.inner.for.inc:1043// CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81044// CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 81045// CHECK1-NEXT: [[ADD36:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]1046// CHECK1-NEXT: store i64 [[ADD36]], ptr [[DOTOMP_IV]], align 81047// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1048// CHECK1: omp.inner.for.end:1049// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1050// CHECK1: omp.loop.exit:1051// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81052// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 41053// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])1054// CHECK1-NEXT: br label [[OMP_PRECOND_END]]1055// CHECK1: omp.precond.end:1056// CHECK1-NEXT: ret void1057//1058//1059// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l531060// CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {1061// CHECK1-NEXT: entry:1062// CHECK1-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 81063// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81064// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81065// CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 81066// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81067// CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 41068// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 41069// CHECK1-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 81070// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81071// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81072// CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 81073// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81074// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])1075// CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -11076// CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]1077// CHECK1: user_code.entry:1078// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])1079// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 41080// CHECK1-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 41081// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 81082// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 81083// CHECK1-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 41084// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 41085// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]1086// CHECK1-NEXT: call void @__kmpc_target_deinit()1087// CHECK1-NEXT: ret void1088// CHECK1: worker.exit:1089// CHECK1-NEXT: ret void1090//1091//1092// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined1093// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {1094// CHECK1-NEXT: entry:1095// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81096// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81097// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81098// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81099// CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 81100// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41101// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41102// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41103// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41104// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41105// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41106// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41107// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41108// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41109// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 41110// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81111// CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 81112// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81113// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81114// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81115// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81116// CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 81117// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81118// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41119// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41120// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41121// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01122// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11123// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11124// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41125// CHECK1-NEXT: store i32 0, ptr [[I]], align 41126// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41127// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]1128// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1129// CHECK1: omp.precond.then:1130// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41131// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41132// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 41133// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41134// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41135// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()1136// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81137// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41138// CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])1139// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41140// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41141// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]1142// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1143// CHECK1: cond.true:1144// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41145// CHECK1-NEXT: br label [[COND_END:%.*]]1146// CHECK1: cond.false:1147// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41148// CHECK1-NEXT: br label [[COND_END]]1149// CHECK1: cond.end:1150// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1151// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41152// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41153// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41154// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1155// CHECK1: omp.inner.for.cond:1156// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41157// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41158// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 11159// CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]1160// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1161// CHECK1: omp.inner.for.body:1162// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41163// CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i641164// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41165// CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i641166// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 41167// CHECK1-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 41168// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 81169// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[V_ADDR]], align 81170// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 01171// CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to ptr1172// CHECK1-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 81173// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 11174// CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to ptr1175// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 81176// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 21177// CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to ptr1178// CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 81179// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 31180// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 81181// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 41182// CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP28]], align 81183// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81184// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 41185// CHECK1-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 5)1186// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1187// CHECK1: omp.inner.for.inc:1188// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41189// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41190// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]1191// CHECK1-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 41192// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41193// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41194// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]1195// CHECK1-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 41196// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41197// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41198// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]1199// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 41200// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41201// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41202// CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]1203// CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]1204// CHECK1: cond.true10:1205// CHECK1-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41206// CHECK1-NEXT: br label [[COND_END12:%.*]]1207// CHECK1: cond.false11:1208// CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41209// CHECK1-NEXT: br label [[COND_END12]]1210// CHECK1: cond.end12:1211// CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE10]] ], [ [[TMP40]], [[COND_FALSE11]] ]1212// CHECK1-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 41213// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41214// CHECK1-NEXT: store i32 [[TMP41]], ptr [[DOTOMP_IV]], align 41215// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1216// CHECK1: omp.inner.for.end:1217// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1218// CHECK1: omp.loop.exit:1219// CHECK1-NEXT: [[TMP42:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81220// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP42]], align 41221// CHECK1-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP43]])1222// CHECK1-NEXT: br label [[OMP_PRECOND_END]]1223// CHECK1: omp.precond.end:1224// CHECK1-NEXT: ret void1225//1226//1227// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined1228// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {1229// CHECK1-NEXT: entry:1230// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81231// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81232// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81233// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81234// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81235// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81236// CHECK1-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 81237// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41238// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41239// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41240// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41241// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41242// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41243// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41244// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41245// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41246// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 41247// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81248// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81249// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81250// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81251// CHECK1-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81252// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81253// CHECK1-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 81254// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81255// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41256// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41257// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41258// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01259// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11260// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11261// CHECK1-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41262// CHECK1-NEXT: store i32 0, ptr [[I]], align 41263// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41264// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]1265// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1266// CHECK1: omp.precond.then:1267// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41268// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41269// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 41270// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81271// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i321272// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81273// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i321274// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41275// CHECK1-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 41276// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41277// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41278// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81279// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41280// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1281// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41282// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41283// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1284// CHECK1: omp.inner.for.cond:1285// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41286// CHECK1-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i641287// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81288// CHECK1-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]1289// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1290// CHECK1: omp.inner.for.body:1291// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41292// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 11293// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1294// CHECK1-NEXT: store i32 [[ADD]], ptr [[I4]], align 41295// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 81296// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I4]], align 41297// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i641298// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 [[IDXPROM]]1299// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 41300// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I4]], align 41301// CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP16]] to i641302// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM7]]1303// CHECK1-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX8]], align 41304// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1305// CHECK1: omp.body.continue:1306// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1307// CHECK1: omp.inner.for.inc:1308// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41309// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41310// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]1311// CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 41312// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1313// CHECK1: omp.inner.for.end:1314// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1315// CHECK1: omp.loop.exit:1316// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81317// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41318// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])1319// CHECK1-NEXT: br label [[OMP_PRECOND_END]]1320// CHECK1: omp.precond.end:1321// CHECK1-NEXT: ret void1322//1323//1324// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l281325// CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {1326// CHECK2-NEXT: entry:1327// CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 81328// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81329// CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 81330// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81331// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 41332// CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 41333// CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 81334// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81335// CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 81336// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 81337// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])1338// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -11339// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]1340// CHECK2: user_code.entry:1341// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])1342// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 41343// CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 41344// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 81345// CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 41346// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 41347// CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]1348// CHECK2-NEXT: call void @__kmpc_target_deinit()1349// CHECK2-NEXT: ret void1350// CHECK2: worker.exit:1351// CHECK2-NEXT: ret void1352//1353//1354// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined1355// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {1356// CHECK2-NEXT: entry:1357// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81358// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81359// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81360// CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 81361// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41362// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41363// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41364// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41365// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41366// CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41367// CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41368// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41369// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41370// CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 41371// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 81372// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 81373// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81374// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81375// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81376// CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 81377// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 81378// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41379// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41380// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41381// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01382// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11383// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11384// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41385// CHECK2-NEXT: store i32 0, ptr [[I]], align 41386// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41387// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]1388// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1389// CHECK2: omp.precond.then:1390// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41391// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41392// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 41393// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41394// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41395// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()1396// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81397// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 41398// CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])1399// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41400// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41401// CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]1402// CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1403// CHECK2: cond.true:1404// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41405// CHECK2-NEXT: br label [[COND_END:%.*]]1406// CHECK2: cond.false:1407// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41408// CHECK2-NEXT: br label [[COND_END]]1409// CHECK2: cond.end:1410// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]1411// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41412// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41413// CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 41414// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1415// CHECK2: omp.inner.for.cond:1416// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41417// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41418// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 11419// CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]1420// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1421// CHECK2: omp.inner.for.body:1422// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41423// CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i641424// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41425// CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i641426// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 41427// CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 41428// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 81429// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 01430// CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to ptr1431// CHECK2-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 81432// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 11433// CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to ptr1434// CHECK2-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 81435// CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 21436// CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to ptr1437// CHECK2-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 81438// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 31439// CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP26]], align 81440// CHECK2-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81441// CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 41442// CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)1443// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1444// CHECK2: omp.inner.for.inc:1445// CHECK2-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41446// CHECK2-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41447// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]1448// CHECK2-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 41449// CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41450// CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41451// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]1452// CHECK2-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 41453// CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41454// CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41455// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]1456// CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 41457// CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41458// CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41459// CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]1460// CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]1461// CHECK2: cond.true10:1462// CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41463// CHECK2-NEXT: br label [[COND_END12:%.*]]1464// CHECK2: cond.false11:1465// CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41466// CHECK2-NEXT: br label [[COND_END12]]1467// CHECK2: cond.end12:1468// CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]1469// CHECK2-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 41470// CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41471// CHECK2-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 41472// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1473// CHECK2: omp.inner.for.end:1474// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1475// CHECK2: omp.loop.exit:1476// CHECK2-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81477// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 41478// CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])1479// CHECK2-NEXT: br label [[OMP_PRECOND_END]]1480// CHECK2: omp.precond.end:1481// CHECK2-NEXT: ret void1482//1483//1484// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined1485// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {1486// CHECK2-NEXT: entry:1487// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81488// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81489// CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81490// CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81491// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 81492// CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 81493// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41494// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41495// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41496// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41497// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41498// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41499// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41500// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41501// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41502// CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 41503// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81504// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81505// CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81506// CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81507// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 81508// CHECK2-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 81509// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 81510// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 41511// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41512// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41513// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 01514// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 11515// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11516// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41517// CHECK2-NEXT: store i32 0, ptr [[I]], align 41518// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41519// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]1520// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1521// CHECK2: omp.precond.then:1522// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41523// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41524// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 41525// CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81526// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i321527// CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81528// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i321529// CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41530// CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 41531// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41532// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41533// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81534// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41535// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1536// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41537// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 41538// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1539// CHECK2: omp.inner.for.cond:1540// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41541// CHECK2-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i641542// CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81543// CHECK2-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]1544// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1545// CHECK2: omp.inner.for.body:1546// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41547// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 11548// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1549// CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 41550// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[I4]], align 41551// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i641552// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]1553// CHECK2-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 21554// CHECK2-NEXT: [[CONV7:%.*]] = sext i16 [[TMP14]] to i321555// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[CONV7]], 11556// CHECK2-NEXT: [[CONV9:%.*]] = trunc i32 [[ADD8]] to i161557// CHECK2-NEXT: store i16 [[CONV9]], ptr [[ARRAYIDX]], align 21558// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1559// CHECK2: omp.body.continue:1560// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1561// CHECK2: omp.inner.for.inc:1562// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41563// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41564// CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]1565// CHECK2-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 41566// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1567// CHECK2: omp.inner.for.end:1568// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1569// CHECK2: omp.loop.exit:1570// CHECK2-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81571// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41572// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])1573// CHECK2-NEXT: br label [[OMP_PRECOND_END]]1574// CHECK2: omp.precond.end:1575// CHECK2-NEXT: ret void1576//1577//1578// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l331579// CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {1580// CHECK2-NEXT: entry:1581// CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 81582// CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 81583// CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 81584// CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 81585// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 41586// CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 41587// CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 81588// CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 81589// CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 81590// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 81591// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])1592// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -11593// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]1594// CHECK2: user_code.entry:1595// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])1596// CHECK2-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 11597// CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i11598// CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i81599// CHECK2-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 11600// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 81601// CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 41602// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 41603// CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]1604// CHECK2-NEXT: call void @__kmpc_target_deinit()1605// CHECK2-NEXT: ret void1606// CHECK2: worker.exit:1607// CHECK2-NEXT: ret void1608//1609//1610// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined1611// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {1612// CHECK2-NEXT: entry:1613// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81614// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81615// CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 81616// CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 81617// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41618// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41619// CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41620// CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41621// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41622// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41623// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41624// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 81625// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81626// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81627// CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 81628// CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 81629// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 81630// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41631// CHECK2-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 41632// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41633// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41634// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()1635// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81636// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41637// CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])1638// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41639// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 91640// CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1641// CHECK2: cond.true:1642// CHECK2-NEXT: br label [[COND_END:%.*]]1643// CHECK2: cond.false:1644// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41645// CHECK2-NEXT: br label [[COND_END]]1646// CHECK2: cond.end:1647// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1648// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41649// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41650// CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41651// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1652// CHECK2: omp.inner.for.cond:1653// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41654// CHECK2-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 101655// CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1656// CHECK2: omp.inner.for.body:1657// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41658// CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i641659// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41660// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i641661// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 01662// CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to ptr1663// CHECK2-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 81664// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 11665// CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to ptr1666// CHECK2-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 81667// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 21668// CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 81669// CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 3)1670// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1671// CHECK2: omp.inner.for.inc:1672// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41673// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41674// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]1675// CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41676// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41677// CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41678// CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1679// CHECK2-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 41680// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41681// CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41682// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1683// CHECK2-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 41684// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41685// CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 91686// CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]1687// CHECK2: cond.true5:1688// CHECK2-NEXT: br label [[COND_END7:%.*]]1689// CHECK2: cond.false6:1690// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41691// CHECK2-NEXT: br label [[COND_END7]]1692// CHECK2: cond.end7:1693// CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]1694// CHECK2-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 41695// CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41696// CHECK2-NEXT: store i32 [[TMP24]], ptr [[DOTOMP_IV]], align 41697// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1698// CHECK2: omp.inner.for.end:1699// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1700// CHECK2: omp.loop.exit:1701// CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])1702// CHECK2-NEXT: ret void1703//1704//1705// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined1706// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {1707// CHECK2-NEXT: entry:1708// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81709// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81710// CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81711// CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81712// CHECK2-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 81713// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41714// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41715// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41716// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41717// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41718// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41719// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41720// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81721// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81722// CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81723// CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81724// CHECK2-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 81725// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 81726// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41727// CHECK2-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 41728// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81729// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i321730// CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81731// CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i321732// CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41733// CHECK2-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 41734// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41735// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41736// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81737// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41738// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1739// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41740// CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41741// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1742// CHECK2: omp.inner.for.cond:1743// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41744// CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i641745// CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81746// CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]1747// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1748// CHECK2: omp.inner.for.body:1749// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41750// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11751// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1752// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 41753// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 41754// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i641755// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]1756// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 41757// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 11758// CHECK2-NEXT: store i32 [[ADD3]], ptr [[ARRAYIDX]], align 41759// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1760// CHECK2: omp.body.continue:1761// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1762// CHECK2: omp.inner.for.inc:1763// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41764// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41765// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]1766// CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41767// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1768// CHECK2: omp.inner.for.end:1769// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1770// CHECK2: omp.loop.exit:1771// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])1772// CHECK2-NEXT: ret void1773//1774//1775// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l381776// CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR4]] {1777// CHECK2-NEXT: entry:1778// CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 81779// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 81780// CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 81781// CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 81782// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 41783// CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 41784// CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 81785// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 81786// CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 81787// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 81788// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])1789// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -11790// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]1791// CHECK2: user_code.entry:1792// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])1793// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 41794// CHECK2-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 41795// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[F_CASTED]], align 81796// CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 41797// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 41798// CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i64 [[TMP4]]) #[[ATTR2]]1799// CHECK2-NEXT: call void @__kmpc_target_deinit()1800// CHECK2-NEXT: ret void1801// CHECK2: worker.exit:1802// CHECK2-NEXT: ret void1803//1804//1805// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined1806// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {1807// CHECK2-NEXT: entry:1808// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81809// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81810// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 81811// CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 81812// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41813// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41814// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 41815// CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41816// CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41817// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41818// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41819// CHECK2-NEXT: [[K:%.*]] = alloca i32, align 41820// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41821// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 41822// CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 81823// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 81824// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81825// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81826// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 81827// CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 81828// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 81829// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 41830// CHECK2-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 41831// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41832// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41833// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()1834// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81835// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41836// CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])1837// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41838// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 991839// CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1840// CHECK2: cond.true:1841// CHECK2-NEXT: br label [[COND_END:%.*]]1842// CHECK2: cond.false:1843// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41844// CHECK2-NEXT: br label [[COND_END]]1845// CHECK2: cond.end:1846// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1847// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41848// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41849// CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41850// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1851// CHECK2: omp.inner.for.cond:1852// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41853// CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 1001854// CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1855// CHECK2: omp.inner.for.body:1856// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41857// CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i641858// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41859// CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i641860// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[F_ADDR]], align 41861// CHECK2-NEXT: store i32 [[TMP11]], ptr [[F_CASTED]], align 41862// CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[F_CASTED]], align 81863// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 01864// CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to ptr1865// CHECK2-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 81866// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 11867// CHECK2-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to ptr1868// CHECK2-NEXT: store ptr [[TMP16]], ptr [[TMP15]], align 81869// CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 21870// CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP17]], align 81871// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 31872// CHECK2-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP12]] to ptr1873// CHECK2-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 81874// CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)1875// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1876// CHECK2: omp.inner.for.inc:1877// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41878// CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41879// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1880// CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41881// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41882// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41883// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]1884// CHECK2-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 41885// CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41886// CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41887// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]1888// CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 41889// CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41890// CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 991891// CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]1892// CHECK2: cond.true6:1893// CHECK2-NEXT: br label [[COND_END8:%.*]]1894// CHECK2: cond.false7:1895// CHECK2-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41896// CHECK2-NEXT: br label [[COND_END8]]1897// CHECK2: cond.end8:1898// CHECK2-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]1899// CHECK2-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 41900// CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41901// CHECK2-NEXT: store i32 [[TMP28]], ptr [[DOTOMP_IV]], align 41902// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1903// CHECK2: omp.inner.for.end:1904// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1905// CHECK2: omp.loop.exit:1906// CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])1907// CHECK2-NEXT: ret void1908//1909//1910// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined1911// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {1912// CHECK2-NEXT: entry:1913// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81914// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81915// CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81916// CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81917// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 81918// CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 81919// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41920// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41921// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 41922// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41923// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41924// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41925// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41926// CHECK2-NEXT: [[K:%.*]] = alloca i32, align 41927// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41928// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 41929// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81930// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81931// CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81932// CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81933// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 81934// CHECK2-NEXT: store i64 [[F]], ptr [[F_ADDR]], align 81935// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 81936// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41937// CHECK2-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 41938// CHECK2-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81939// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i321940// CHECK2-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81941// CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i321942// CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41943// CHECK2-NEXT: store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41944// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41945// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41946// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81947// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41948// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1949// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41950// CHECK2-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41951// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1952// CHECK2: omp.inner.for.cond:1953// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41954// CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i641955// CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81956// CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]]1957// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1958// CHECK2: omp.inner.for.body:1959// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41960// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 101961// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 11962// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1963// CHECK2-NEXT: store i32 [[ADD]], ptr [[I]], align 41964// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41965// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41966// CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP10]], 101967// CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 101968// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL5]]1969// CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 11970// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]1971// CHECK2-NEXT: store i32 [[ADD7]], ptr [[J]], align 41972// CHECK2-NEXT: store i32 10, ptr [[K]], align 41973// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 41974// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 41975// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 41976// CHECK2-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]1977// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP11]], [[MUL8]]1978// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 41979// CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD9]], [[TMP14]]1980// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 41981// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i641982// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]1983// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 41984// CHECK2-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP16]] to i641985// CHECK2-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM11]]1986// CHECK2-NEXT: store i32 [[ADD10]], ptr [[ARRAYIDX12]], align 41987// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1988// CHECK2: omp.body.continue:1989// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1990// CHECK2: omp.inner.for.inc:1991// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41992// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41993// CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]1994// CHECK2-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_IV]], align 41995// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1996// CHECK2: omp.inner.for.end:1997// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1998// CHECK2: omp.loop.exit:1999// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])2000// CHECK2-NEXT: ret void2001//2002//2003// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l462004// CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {2005// CHECK2-NEXT: entry:2006// CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 82007// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82008// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 82009// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 82010// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 42011// CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 42012// CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 82013// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82014// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 82015// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 82016// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])2017// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -12018// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]2019// CHECK2: user_code.entry:2020// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])2021// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 42022// CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 42023// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 82024// CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 42025// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 42026// CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]2027// CHECK2-NEXT: call void @__kmpc_target_deinit()2028// CHECK2-NEXT: ret void2029// CHECK2: worker.exit:2030// CHECK2-NEXT: ret void2031//2032//2033// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined2034// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {2035// CHECK2-NEXT: entry:2036// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82037// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82038// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82039// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 82040// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42041// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 42042// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 42043// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42044// CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 42045// CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 42046// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 42047// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 42048// CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42049// CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42050// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42051// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42052// CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 42053// CHECK2-NEXT: [[J9:%.*]] = alloca i32, align 42054// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 82055// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 82056// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82057// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82058// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82059// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 82060// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 82061// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42062// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42063// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42064// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 42065// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42066// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02067// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12068// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42069// CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 02070// CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 12071// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]2072// CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 12073// CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_3]], align 42074// CHECK2-NEXT: store i32 0, ptr [[I]], align 42075// CHECK2-NEXT: store i32 0, ptr [[J]], align 42076// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42077// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2078// CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]2079// CHECK2: land.lhs.true:2080// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42081// CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]2082// CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]2083// CHECK2: omp.precond.then:2084// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42085// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42086// CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 42087// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42088// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42089// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()2090// CHECK2-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82091// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 42092// CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])2093// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42094// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42095// CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]2096// CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2097// CHECK2: cond.true:2098// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42099// CHECK2-NEXT: br label [[COND_END:%.*]]2100// CHECK2: cond.false:2101// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42102// CHECK2-NEXT: br label [[COND_END]]2103// CHECK2: cond.end:2104// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]2105// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42106// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42107// CHECK2-NEXT: store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 42108// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2109// CHECK2: omp.inner.for.cond:2110// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42111// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42112// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 12113// CHECK2-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]2114// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2115// CHECK2: omp.inner.for.body:2116// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42117// CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i642118// CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42119// CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i642120// CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[N_ADDR]], align 42121// CHECK2-NEXT: store i32 [[TMP21]], ptr [[N_CASTED]], align 42122// CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[N_CASTED]], align 82123// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 02124// CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to ptr2125// CHECK2-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 82126// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 12127// CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to ptr2128// CHECK2-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 82129// CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 22130// CHECK2-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP22]] to ptr2131// CHECK2-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 82132// CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 32133// CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP29]], align 82134// CHECK2-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82135// CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 42136// CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 4)2137// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2138// CHECK2: omp.inner.for.inc:2139// CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42140// CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42141// CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]2142// CHECK2-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 42143// CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42144// CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42145// CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]2146// CHECK2-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_COMB_LB]], align 42147// CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42148// CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42149// CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]2150// CHECK2-NEXT: store i32 [[ADD14]], ptr [[DOTOMP_COMB_UB]], align 42151// CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42152// CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42153// CHECK2-NEXT: [[CMP15:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]2154// CHECK2-NEXT: br i1 [[CMP15]], label [[COND_TRUE16:%.*]], label [[COND_FALSE17:%.*]]2155// CHECK2: cond.true16:2156// CHECK2-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42157// CHECK2-NEXT: br label [[COND_END18:%.*]]2158// CHECK2: cond.false17:2159// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42160// CHECK2-NEXT: br label [[COND_END18]]2161// CHECK2: cond.end18:2162// CHECK2-NEXT: [[COND19:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE16]] ], [ [[TMP41]], [[COND_FALSE17]] ]2163// CHECK2-NEXT: store i32 [[COND19]], ptr [[DOTOMP_COMB_UB]], align 42164// CHECK2-NEXT: [[TMP42:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42165// CHECK2-NEXT: store i32 [[TMP42]], ptr [[DOTOMP_IV]], align 42166// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]2167// CHECK2: omp.inner.for.end:2168// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2169// CHECK2: omp.loop.exit:2170// CHECK2-NEXT: [[TMP43:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82171// CHECK2-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 42172// CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP44]])2173// CHECK2-NEXT: br label [[OMP_PRECOND_END]]2174// CHECK2: omp.precond.end:2175// CHECK2-NEXT: ret void2176//2177//2178// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined2179// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {2180// CHECK2-NEXT: entry:2181// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82182// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82183// CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82184// CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82185// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82186// CHECK2-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 82187// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42188// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 42189// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 42190// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42191// CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 42192// CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 42193// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 42194// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 42195// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42196// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42197// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42198// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42199// CHECK2-NEXT: [[I9:%.*]] = alloca i32, align 42200// CHECK2-NEXT: [[J10:%.*]] = alloca i32, align 42201// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82202// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82203// CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82204// CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82205// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82206// CHECK2-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 82207// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 82208// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42209// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42210// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42211// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 42212// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42213// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02214// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12215// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42216// CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 02217// CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 12218// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]2219// CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 12220// CHECK2-NEXT: store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_3]], align 42221// CHECK2-NEXT: store i32 0, ptr [[I]], align 42222// CHECK2-NEXT: store i32 0, ptr [[J]], align 42223// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42224// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]2225// CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]2226// CHECK2: land.lhs.true:2227// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42228// CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]2229// CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]2230// CHECK2: omp.precond.then:2231// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42232// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 42233// CHECK2-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 42234// CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82235// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i322236// CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82237// CHECK2-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP9]] to i322238// CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42239// CHECK2-NEXT: store i32 [[CONV8]], ptr [[DOTOMP_UB]], align 42240// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42241// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42242// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82243// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 42244// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2245// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42246// CHECK2-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 42247// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2248// CHECK2: omp.inner.for.cond:2249// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42250// CHECK2-NEXT: [[CONV11:%.*]] = sext i32 [[TMP13]] to i642251// CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82252// CHECK2-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP14]]2253// CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2254// CHECK2: omp.inner.for.body:2255// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42256// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42257// CHECK2-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP16]], 02258// CHECK2-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 12259// CHECK2-NEXT: [[MUL15:%.*]] = mul nsw i32 1, [[DIV14]]2260// CHECK2-NEXT: [[DIV16:%.*]] = sdiv i32 [[TMP15]], [[MUL15]]2261// CHECK2-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 12262// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL17]]2263// CHECK2-NEXT: store i32 [[ADD]], ptr [[I9]], align 42264// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42265// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42266// CHECK2-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42267// CHECK2-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP19]], 02268// CHECK2-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 12269// CHECK2-NEXT: [[MUL20:%.*]] = mul nsw i32 1, [[DIV19]]2270// CHECK2-NEXT: [[DIV21:%.*]] = sdiv i32 [[TMP18]], [[MUL20]]2271// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42272// CHECK2-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP20]], 02273// CHECK2-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 12274// CHECK2-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]2275// CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i32 [[DIV21]], [[MUL24]]2276// CHECK2-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP17]], [[MUL25]]2277// CHECK2-NEXT: [[MUL27:%.*]] = mul nsw i32 [[SUB26]], 12278// CHECK2-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]2279// CHECK2-NEXT: store i32 [[ADD28]], ptr [[J10]], align 42280// CHECK2-NEXT: [[TMP21:%.*]] = load i32, ptr [[I9]], align 42281// CHECK2-NEXT: [[TMP22:%.*]] = load i32, ptr [[J10]], align 42282// CHECK2-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]2283// CHECK2-NEXT: [[TMP23:%.*]] = load i32, ptr [[I9]], align 42284// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i642285// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2286// CHECK2-NEXT: [[TMP24:%.*]] = load i32, ptr [[J10]], align 42287// CHECK2-NEXT: [[IDXPROM30:%.*]] = sext i32 [[TMP24]] to i642288// CHECK2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM30]]2289// CHECK2-NEXT: store i32 [[ADD29]], ptr [[ARRAYIDX31]], align 42290// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2291// CHECK2: omp.body.continue:2292// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2293// CHECK2: omp.inner.for.inc:2294// CHECK2-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42295// CHECK2-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42296// CHECK2-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]2297// CHECK2-NEXT: store i32 [[ADD32]], ptr [[DOTOMP_IV]], align 42298// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]2299// CHECK2: omp.inner.for.end:2300// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2301// CHECK2: omp.loop.exit:2302// CHECK2-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82303// CHECK2-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 42304// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])2305// CHECK2-NEXT: br label [[OMP_PRECOND_END]]2306// CHECK2: omp.precond.end:2307// CHECK2-NEXT: ret void2308//2309//2310// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l532311// CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {2312// CHECK2-NEXT: entry:2313// CHECK2-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 82314// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82315// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82316// CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 82317// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 82318// CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 42319// CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 42320// CHECK2-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 82321// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82322// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82323// CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 82324// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82325// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])2326// CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -12327// CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]2328// CHECK2: user_code.entry:2329// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])2330// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 42331// CHECK2-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 42332// CHECK2-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 82333// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 82334// CHECK2-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 42335// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 42336// CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i64 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]2337// CHECK2-NEXT: call void @__kmpc_target_deinit()2338// CHECK2-NEXT: ret void2339// CHECK2: worker.exit:2340// CHECK2-NEXT: ret void2341//2342//2343// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined2344// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {2345// CHECK2-NEXT: entry:2346// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82347// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82348// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82349// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82350// CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 82351// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42352// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 42353// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42354// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42355// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 42356// CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42357// CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42358// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42359// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42360// CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 42361// CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 82362// CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 82363// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82364// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82365// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82366// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82367// CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 82368// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82369// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42370// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42371// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42372// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 02373// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12374// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12375// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42376// CHECK2-NEXT: store i32 0, ptr [[I]], align 42377// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42378// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]2379// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2380// CHECK2: omp.precond.then:2381// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42382// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42383// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 42384// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42385// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42386// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()2387// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82388// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42389// CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])2390// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42391// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42392// CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]2393// CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2394// CHECK2: cond.true:2395// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42396// CHECK2-NEXT: br label [[COND_END:%.*]]2397// CHECK2: cond.false:2398// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42399// CHECK2-NEXT: br label [[COND_END]]2400// CHECK2: cond.end:2401// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]2402// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42403// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42404// CHECK2-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 42405// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2406// CHECK2: omp.inner.for.cond:2407// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42408// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42409// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 12410// CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]2411// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2412// CHECK2: omp.inner.for.body:2413// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42414// CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i642415// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42416// CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i642417// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 42418// CHECK2-NEXT: store i32 [[TMP18]], ptr [[N_CASTED]], align 42419// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 82420// CHECK2-NEXT: [[TMP20:%.*]] = load ptr, ptr [[V_ADDR]], align 82421// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 02422// CHECK2-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to ptr2423// CHECK2-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 82424// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 12425// CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to ptr2426// CHECK2-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 82427// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 22428// CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to ptr2429// CHECK2-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 82430// CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 32431// CHECK2-NEXT: store ptr [[TMP0]], ptr [[TMP27]], align 82432// CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 42433// CHECK2-NEXT: store ptr [[TMP20]], ptr [[TMP28]], align 82434// CHECK2-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82435// CHECK2-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 42436// CHECK2-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i64 5)2437// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2438// CHECK2: omp.inner.for.inc:2439// CHECK2-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42440// CHECK2-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42441// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]2442// CHECK2-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42443// CHECK2-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42444// CHECK2-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42445// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]2446// CHECK2-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 42447// CHECK2-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42448// CHECK2-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42449// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]2450// CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 42451// CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42452// CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42453// CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]2454// CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]2455// CHECK2: cond.true10:2456// CHECK2-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42457// CHECK2-NEXT: br label [[COND_END12:%.*]]2458// CHECK2: cond.false11:2459// CHECK2-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42460// CHECK2-NEXT: br label [[COND_END12]]2461// CHECK2: cond.end12:2462// CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE10]] ], [ [[TMP40]], [[COND_FALSE11]] ]2463// CHECK2-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 42464// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42465// CHECK2-NEXT: store i32 [[TMP41]], ptr [[DOTOMP_IV]], align 42466// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]2467// CHECK2: omp.inner.for.end:2468// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2469// CHECK2: omp.loop.exit:2470// CHECK2-NEXT: [[TMP42:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82471// CHECK2-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP42]], align 42472// CHECK2-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP43]])2473// CHECK2-NEXT: br label [[OMP_PRECOND_END]]2474// CHECK2: omp.precond.end:2475// CHECK2-NEXT: ret void2476//2477//2478// CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined2479// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {2480// CHECK2-NEXT: entry:2481// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82482// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82483// CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 82484// CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 82485// CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 82486// CHECK2-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82487// CHECK2-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 82488// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42489// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 42490// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42491// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42492// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 42493// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42494// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42495// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42496// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42497// CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 42498// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82499// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82500// CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 82501// CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 82502// CHECK2-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 82503// CHECK2-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82504// CHECK2-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 82505// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82506// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42507// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42508// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42509// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 02510// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12511// CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12512// CHECK2-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42513// CHECK2-NEXT: store i32 0, ptr [[I]], align 42514// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42515// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]2516// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2517// CHECK2: omp.precond.then:2518// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42519// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42520// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 42521// CHECK2-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 82522// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i322523// CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82524// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i322525// CHECK2-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 42526// CHECK2-NEXT: store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 42527// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42528// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42529// CHECK2-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82530// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42531// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2532// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42533// CHECK2-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42534// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2535// CHECK2: omp.inner.for.cond:2536// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42537// CHECK2-NEXT: [[CONV5:%.*]] = sext i32 [[TMP10]] to i642538// CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 82539// CHECK2-NEXT: [[CMP6:%.*]] = icmp ule i64 [[CONV5]], [[TMP11]]2540// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2541// CHECK2: omp.inner.for.body:2542// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42543// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 12544// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2545// CHECK2-NEXT: store i32 [[ADD]], ptr [[I4]], align 42546// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 82547// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[I4]], align 42548// CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i642549// CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i64 [[IDXPROM]]2550// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 42551// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I4]], align 42552// CHECK2-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP16]] to i642553// CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM7]]2554// CHECK2-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX8]], align 42555// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2556// CHECK2: omp.body.continue:2557// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2558// CHECK2: omp.inner.for.inc:2559// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42560// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42561// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]2562// CHECK2-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 42563// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]2564// CHECK2: omp.inner.for.end:2565// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2566// CHECK2: omp.loop.exit:2567// CHECK2-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82568// CHECK2-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42569// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])2570// CHECK2-NEXT: br label [[OMP_PRECOND_END]]2571// CHECK2: omp.precond.end:2572// CHECK2-NEXT: ret void2573//2574//2575// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l282576// CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR0:[0-9]+]] {2577// CHECK3-NEXT: entry:2578// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 42579// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42580// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 42581// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 42582// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 42583// CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 42584// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 42585// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42586// CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 42587// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 42588// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_kernel_environment, ptr [[DYN_PTR]])2589// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -12590// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]2591// CHECK3: user_code.entry:2592// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])2593// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 42594// CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 42595// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 42596// CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 42597// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 42598// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]]) #[[ATTR2:[0-9]+]]2599// CHECK3-NEXT: call void @__kmpc_target_deinit()2600// CHECK3-NEXT: ret void2601// CHECK3: worker.exit:2602// CHECK3-NEXT: ret void2603//2604//2605// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined2606// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1:[0-9]+]] {2607// CHECK3-NEXT: entry:2608// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42609// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42610// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42611// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 42612// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42613// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42614// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42615// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42616// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42617// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42618// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42619// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42620// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42621// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 42622// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 42623// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 42624// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42625// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42626// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42627// CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 42628// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 42629// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42630// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42631// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42632// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 02633// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12634// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12635// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42636// CHECK3-NEXT: store i32 0, ptr [[I]], align 42637// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42638// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]2639// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2640// CHECK3: omp.precond.then:2641// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42642// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42643// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 42644// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42645// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42646// CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()2647// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42648// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42649// CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])2650// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42651// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42652// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]2653// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2654// CHECK3: cond.true:2655// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42656// CHECK3-NEXT: br label [[COND_END:%.*]]2657// CHECK3: cond.false:2658// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42659// CHECK3-NEXT: br label [[COND_END]]2660// CHECK3: cond.end:2661// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]2662// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42663// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42664// CHECK3-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 42665// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2666// CHECK3: omp.inner.for.cond:2667// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42668// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42669// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 12670// CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]2671// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2672// CHECK3: omp.inner.for.body:2673// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42674// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42675// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 42676// CHECK3-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 42677// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 42678// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 02679// CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to ptr2680// CHECK3-NEXT: store ptr [[TMP19]], ptr [[TMP18]], align 42681// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 12682// CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to ptr2683// CHECK3-NEXT: store ptr [[TMP21]], ptr [[TMP20]], align 42684// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 22685// CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to ptr2686// CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP22]], align 42687// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 32688// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP24]], align 42689// CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42690// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42691// CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP26]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)2692// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2693// CHECK3: omp.inner.for.inc:2694// CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42695// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42696// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]2697// CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 42698// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42699// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42700// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]2701// CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 42702// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42703// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42704// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]2705// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 42706// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42707// CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42708// CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP33]], [[TMP34]]2709// CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]2710// CHECK3: cond.true10:2711// CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42712// CHECK3-NEXT: br label [[COND_END12:%.*]]2713// CHECK3: cond.false11:2714// CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42715// CHECK3-NEXT: br label [[COND_END12]]2716// CHECK3: cond.end12:2717// CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP35]], [[COND_TRUE10]] ], [ [[TMP36]], [[COND_FALSE11]] ]2718// CHECK3-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 42719// CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42720// CHECK3-NEXT: store i32 [[TMP37]], ptr [[DOTOMP_IV]], align 42721// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]2722// CHECK3: omp.inner.for.end:2723// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2724// CHECK3: omp.loop.exit:2725// CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42726// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 42727// CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP39]])2728// CHECK3-NEXT: br label [[OMP_PRECOND_END]]2729// CHECK3: omp.precond.end:2730// CHECK3-NEXT: ret void2731//2732//2733// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28_omp_outlined_omp_outlined2734// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {2735// CHECK3-NEXT: entry:2736// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42737// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42738// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42739// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42740// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42741// CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 42742// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42743// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42744// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42745// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42746// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42747// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42748// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42749// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42750// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42751// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 42752// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42753// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42754// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42755// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42756// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42757// CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 42758// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 42759// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 42760// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 42761// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42762// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 02763// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 12764// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12765// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42766// CHECK3-NEXT: store i32 0, ptr [[I]], align 42767// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42768// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]2769// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2770// CHECK3: omp.precond.then:2771// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42772// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42773// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 42774// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42775// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42776// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 42777// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 42778// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42779// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42780// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42781// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42782// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2783// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42784// CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 42785// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2786// CHECK3: omp.inner.for.cond:2787// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42788// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42789// CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]2790// CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2791// CHECK3: omp.inner.for.body:2792// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42793// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 12794// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2795// CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 42796// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I3]], align 42797// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], ptr [[TMP0]], i32 0, i32 [[TMP13]]2798// CHECK3-NEXT: [[TMP14:%.*]] = load i16, ptr [[ARRAYIDX]], align 22799// CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i322800// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 12801// CHECK3-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i162802// CHECK3-NEXT: store i16 [[CONV6]], ptr [[ARRAYIDX]], align 22803// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2804// CHECK3: omp.body.continue:2805// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2806// CHECK3: omp.inner.for.inc:2807// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42808// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42809// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]2810// CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 42811// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]2812// CHECK3: omp.inner.for.end:2813// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2814// CHECK3: omp.loop.exit:2815// CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42816// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 42817// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP18]])2818// CHECK3-NEXT: br label [[OMP_PRECOND_END]]2819// CHECK3: omp.precond.end:2820// CHECK3-NEXT: ret void2821//2822//2823// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l332824// CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR4:[0-9]+]] {2825// CHECK3-NEXT: entry:2826// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 42827// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 42828// CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 42829// CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 42830// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 42831// CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 42832// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 42833// CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 42834// CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 42835// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 42836// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_kernel_environment, ptr [[DYN_PTR]])2837// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -12838// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]2839// CHECK3: user_code.entry:2840// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])2841// CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 12842// CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP3]] to i12843// CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i82844// CHECK3-NEXT: store i8 [[FROMBOOL]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 12845// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 42846// CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 42847// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 42848// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i32 [[TMP4]]) #[[ATTR2]]2849// CHECK3-NEXT: call void @__kmpc_target_deinit()2850// CHECK3-NEXT: ret void2851// CHECK3: worker.exit:2852// CHECK3-NEXT: ret void2853//2854//2855// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined2856// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {2857// CHECK3-NEXT: entry:2858// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42859// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42860// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 42861// CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 42862// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42863// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42864// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 42865// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 42866// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42867// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42868// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42869// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x ptr], align 42870// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42871// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42872// CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 42873// CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 42874// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 42875// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 42876// CHECK3-NEXT: store i32 9, ptr [[DOTOMP_COMB_UB]], align 42877// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42878// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42879// CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()2880// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42881// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42882// CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])2883// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42884// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92885// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2886// CHECK3: cond.true:2887// CHECK3-NEXT: br label [[COND_END:%.*]]2888// CHECK3: cond.false:2889// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42890// CHECK3-NEXT: br label [[COND_END]]2891// CHECK3: cond.end:2892// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2893// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 42894// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42895// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42896// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2897// CHECK3: omp.inner.for.cond:2898// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42899// CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 102900// CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2901// CHECK3: omp.inner.for.body:2902// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42903// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42904// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 02905// CHECK3-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to ptr2906// CHECK3-NEXT: store ptr [[TMP10]], ptr [[TMP9]], align 42907// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 12908// CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to ptr2909// CHECK3-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 42910// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 22911// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP13]], align 42912// CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 3)2913// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2914// CHECK3: omp.inner.for.inc:2915// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42916// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42917// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]2918// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 42919// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42920// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42921// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]2922// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_COMB_LB]], align 42923// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42924// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42925// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]2926// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_UB]], align 42927// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42928// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 92929// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]2930// CHECK3: cond.true5:2931// CHECK3-NEXT: br label [[COND_END7:%.*]]2932// CHECK3: cond.false6:2933// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 42934// CHECK3-NEXT: br label [[COND_END7]]2935// CHECK3: cond.end7:2936// CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ]2937// CHECK3-NEXT: store i32 [[COND8]], ptr [[DOTOMP_COMB_UB]], align 42938// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 42939// CHECK3-NEXT: store i32 [[TMP22]], ptr [[DOTOMP_IV]], align 42940// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]2941// CHECK3: omp.inner.for.end:2942// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2943// CHECK3: omp.loop.exit:2944// CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])2945// CHECK3-NEXT: ret void2946//2947//2948// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l33_omp_outlined_omp_outlined2949// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {2950// CHECK3-NEXT: entry:2951// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42952// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42953// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 42954// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 42955// CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 42956// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42957// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 42958// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42959// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42960// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42961// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42962// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 42963// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42964// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42965// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 42966// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 42967// CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 42968// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 42969// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42970// CHECK3-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 42971// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 42972// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42973// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 42974// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 42975// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42976// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42977// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42978// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42979// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2980// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42981// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42982// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2983// CHECK3: omp.inner.for.cond:2984// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42985// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 42986// CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]2987// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2988// CHECK3: omp.inner.for.body:2989// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42990// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12991// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2992// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 42993// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 42994// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]2995// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX]], align 42996// CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 12997// CHECK3-NEXT: store i32 [[ADD1]], ptr [[ARRAYIDX]], align 42998// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2999// CHECK3: omp.body.continue:3000// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3001// CHECK3: omp.inner.for.inc:3002// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43003// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43004// CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]3005// CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 43006// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3007// CHECK3: omp.inner.for.end:3008// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3009// CHECK3: omp.loop.exit:3010// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])3011// CHECK3-NEXT: ret void3012//3013//3014// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l383015// CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR4]] {3016// CHECK3-NEXT: entry:3017// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 43018// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43019// CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 43020// CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 43021// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 43022// CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 43023// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 43024// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43025// CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 43026// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43027// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_kernel_environment, ptr [[DYN_PTR]])3028// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -13029// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]3030// CHECK3: user_code.entry:3031// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])3032// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[F_ADDR]], align 43033// CHECK3-NEXT: store i32 [[TMP3]], ptr [[F_CASTED]], align 43034// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[F_CASTED]], align 43035// CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 43036// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 43037// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], ptr [[TMP0]], i32 [[TMP4]]) #[[ATTR2]]3038// CHECK3-NEXT: call void @__kmpc_target_deinit()3039// CHECK3-NEXT: ret void3040// CHECK3: worker.exit:3041// CHECK3-NEXT: ret void3042//3043//3044// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined3045// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {3046// CHECK3-NEXT: entry:3047// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43048// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43049// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43050// CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 43051// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43052// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43053// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 43054// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43055// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43056// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43057// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43058// CHECK3-NEXT: [[K:%.*]] = alloca i32, align 43059// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43060// CHECK3-NEXT: [[J:%.*]] = alloca i32, align 43061// CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 43062// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 43063// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43064// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43065// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43066// CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 43067// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43068// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43069// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 43070// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43071// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43072// CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()3073// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43074// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43075// CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])3076// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43077// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 993078// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3079// CHECK3: cond.true:3080// CHECK3-NEXT: br label [[COND_END:%.*]]3081// CHECK3: cond.false:3082// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43083// CHECK3-NEXT: br label [[COND_END]]3084// CHECK3: cond.end:3085// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3086// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43087// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43088// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43089// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3090// CHECK3: omp.inner.for.cond:3091// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43092// CHECK3-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 1003093// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3094// CHECK3: omp.inner.for.body:3095// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43096// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43097// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[F_ADDR]], align 43098// CHECK3-NEXT: store i32 [[TMP9]], ptr [[F_CASTED]], align 43099// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[F_CASTED]], align 43100// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 03101// CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to ptr3102// CHECK3-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 43103// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 13104// CHECK3-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to ptr3105// CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 43106// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 23107// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP15]], align 43108// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 33109// CHECK3-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP10]] to ptr3110// CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 43111// CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)3112// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3113// CHECK3: omp.inner.for.inc:3114// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43115// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43116// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]3117// CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 43118// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43119// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43120// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]3121// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_COMB_LB]], align 43122// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43123// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43124// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]3125// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_COMB_UB]], align 43126// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43127// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP24]], 993128// CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]3129// CHECK3: cond.true6:3130// CHECK3-NEXT: br label [[COND_END8:%.*]]3131// CHECK3: cond.false7:3132// CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43133// CHECK3-NEXT: br label [[COND_END8]]3134// CHECK3: cond.end8:3135// CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP25]], [[COND_FALSE7]] ]3136// CHECK3-NEXT: store i32 [[COND9]], ptr [[DOTOMP_COMB_UB]], align 43137// CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43138// CHECK3-NEXT: store i32 [[TMP26]], ptr [[DOTOMP_IV]], align 43139// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3140// CHECK3: omp.inner.for.end:3141// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3142// CHECK3: omp.loop.exit:3143// CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP2]])3144// CHECK3-NEXT: ret void3145//3146//3147// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l38_omp_outlined_omp_outlined3148// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {3149// CHECK3-NEXT: entry:3150// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43151// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43152// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43153// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43154// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43155// CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 43156// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43157// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43158// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 43159// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43160// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43161// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43162// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43163// CHECK3-NEXT: [[K:%.*]] = alloca i32, align 43164// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43165// CHECK3-NEXT: [[J:%.*]] = alloca i32, align 43166// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43167// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43168// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43169// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43170// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43171// CHECK3-NEXT: store i32 [[F]], ptr [[F_ADDR]], align 43172// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43173// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43174// CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 43175// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43176// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43177// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 43178// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 43179// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43180// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43181// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43182// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 43183// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3184// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43185// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43186// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3187// CHECK3: omp.inner.for.cond:3188// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43189// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43190// CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]3191// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3192// CHECK3: omp.inner.for.body:3193// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43194// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 103195// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 13196// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3197// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 43198// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43199// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43200// CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 103201// CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 103202// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]3203// CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 13204// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]3205// CHECK3-NEXT: store i32 [[ADD5]], ptr [[J]], align 43206// CHECK3-NEXT: store i32 10, ptr [[K]], align 43207// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43208// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 43209// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[F_ADDR]], align 43210// CHECK3-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]3211// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]3212// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[K]], align 43213// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]3214// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 43215// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP15]]3216// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[J]], align 43217// CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP16]]3218// CHECK3-NEXT: store i32 [[ADD8]], ptr [[ARRAYIDX9]], align 43219// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3220// CHECK3: omp.body.continue:3221// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3222// CHECK3: omp.inner.for.inc:3223// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43224// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43225// CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]3226// CHECK3-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 43227// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3228// CHECK3: omp.inner.for.end:3229// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3230// CHECK3: omp.loop.exit:3231// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])3232// CHECK3-NEXT: ret void3233//3234//3235// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l463236// CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR4]] {3237// CHECK3-NEXT: entry:3238// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 43239// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43240// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43241// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 43242// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 43243// CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 43244// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 43245// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43246// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43247// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43248// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_kernel_environment, ptr [[DYN_PTR]])3249// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -13250// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]3251// CHECK3: user_code.entry:3252// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])3253// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 43254// CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 43255// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 43256// CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 43257// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 43258// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]]) #[[ATTR2]]3259// CHECK3-NEXT: call void @__kmpc_target_deinit()3260// CHECK3-NEXT: ret void3261// CHECK3: worker.exit:3262// CHECK3-NEXT: ret void3263//3264//3265// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined3266// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {3267// CHECK3-NEXT: entry:3268// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43269// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43270// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43271// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43272// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 83273// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43274// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 43275// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43276// CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 43277// CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 83278// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43279// CHECK3-NEXT: [[J:%.*]] = alloca i32, align 43280// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 83281// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 83282// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 83283// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43284// CHECK3-NEXT: [[I9:%.*]] = alloca i32, align 43285// CHECK3-NEXT: [[J10:%.*]] = alloca i32, align 43286// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 43287// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x ptr], align 43288// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43289// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43290// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43291// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43292// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43293// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 43294// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 43295// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 43296// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 43297// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43298// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 03299// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13300// CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i643301// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43302// CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 03303// CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 13304// CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i643305// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]3306// CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 13307// CHECK3-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 83308// CHECK3-NEXT: store i32 0, ptr [[I]], align 43309// CHECK3-NEXT: store i32 0, ptr [[J]], align 43310// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43311// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]3312// CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]3313// CHECK3: land.lhs.true:3314// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43315// CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]3316// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]3317// CHECK3: omp.precond.then:3318// CHECK3-NEXT: store i64 0, ptr [[DOTOMP_COMB_LB]], align 83319// CHECK3-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83320// CHECK3-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_COMB_UB]], align 83321// CHECK3-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 83322// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43323// CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()3324// CHECK3-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i643325// CHECK3-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43326// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 43327// CHECK3-NEXT: call void @__kmpc_distribute_static_init_8(ptr @[[GLOB2]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])3328// CHECK3-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83329// CHECK3-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83330// CHECK3-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]3331// CHECK3-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3332// CHECK3: cond.true:3333// CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83334// CHECK3-NEXT: br label [[COND_END:%.*]]3335// CHECK3: cond.false:3336// CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83337// CHECK3-NEXT: br label [[COND_END]]3338// CHECK3: cond.end:3339// CHECK3-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]3340// CHECK3-NEXT: store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 83341// CHECK3-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 83342// CHECK3-NEXT: store i64 [[TMP14]], ptr [[DOTOMP_IV]], align 83343// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3344// CHECK3: omp.inner.for.cond:3345// CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83346// CHECK3-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83347// CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 13348// CHECK3-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]3349// CHECK3-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3350// CHECK3: omp.inner.for.body:3351// CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 83352// CHECK3-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i323353// CHECK3-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83354// CHECK3-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i323355// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[N_ADDR]], align 43356// CHECK3-NEXT: store i32 [[TMP21]], ptr [[N_CASTED]], align 43357// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[N_CASTED]], align 43358// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 03359// CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to ptr3360// CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 43361// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 13362// CHECK3-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to ptr3363// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP25]], align 43364// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 23365// CHECK3-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to ptr3366// CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 43367// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 33368// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP29]], align 43369// CHECK3-NEXT: [[TMP30:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43370// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 43371// CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 4)3372// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3373// CHECK3: omp.inner.for.inc:3374// CHECK3-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83375// CHECK3-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 83376// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]3377// CHECK3-NEXT: store i64 [[ADD14]], ptr [[DOTOMP_IV]], align 83378// CHECK3-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 83379// CHECK3-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 83380// CHECK3-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]3381// CHECK3-NEXT: store i64 [[ADD15]], ptr [[DOTOMP_COMB_LB]], align 83382// CHECK3-NEXT: [[TMP36:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83383// CHECK3-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 83384// CHECK3-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]3385// CHECK3-NEXT: store i64 [[ADD16]], ptr [[DOTOMP_COMB_UB]], align 83386// CHECK3-NEXT: [[TMP38:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83387// CHECK3-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83388// CHECK3-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP38]], [[TMP39]]3389// CHECK3-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]3390// CHECK3: cond.true18:3391// CHECK3-NEXT: [[TMP40:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83392// CHECK3-NEXT: br label [[COND_END20:%.*]]3393// CHECK3: cond.false19:3394// CHECK3-NEXT: [[TMP41:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 83395// CHECK3-NEXT: br label [[COND_END20]]3396// CHECK3: cond.end20:3397// CHECK3-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP40]], [[COND_TRUE18]] ], [ [[TMP41]], [[COND_FALSE19]] ]3398// CHECK3-NEXT: store i64 [[COND21]], ptr [[DOTOMP_COMB_UB]], align 83399// CHECK3-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 83400// CHECK3-NEXT: store i64 [[TMP42]], ptr [[DOTOMP_IV]], align 83401// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3402// CHECK3: omp.inner.for.end:3403// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3404// CHECK3: omp.loop.exit:3405// CHECK3-NEXT: [[TMP43:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43406// CHECK3-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 43407// CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP44]])3408// CHECK3-NEXT: br label [[OMP_PRECOND_END]]3409// CHECK3: omp.precond.end:3410// CHECK3-NEXT: ret void3411//3412//3413// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l46_omp_outlined_omp_outlined3414// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {3415// CHECK3-NEXT: entry:3416// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43417// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43418// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43419// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43420// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43421// CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 43422// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 83423// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43424// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 43425// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43426// CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 43427// CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 83428// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43429// CHECK3-NEXT: [[J:%.*]] = alloca i32, align 43430// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 83431// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 83432// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 83433// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43434// CHECK3-NEXT: [[I11:%.*]] = alloca i32, align 43435// CHECK3-NEXT: [[J12:%.*]] = alloca i32, align 43436// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43437// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43438// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43439// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43440// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43441// CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 43442// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 43443// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 43444// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 43445// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 43446// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_2]], align 43447// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43448// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 03449// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13450// CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i643451// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43452// CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 03453// CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 13454// CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i643455// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]3456// CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 13457// CHECK3-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 83458// CHECK3-NEXT: store i32 0, ptr [[I]], align 43459// CHECK3-NEXT: store i32 0, ptr [[J]], align 43460// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43461// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]3462// CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]3463// CHECK3: land.lhs.true:3464// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43465// CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]3466// CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]3467// CHECK3: omp.precond.then:3468// CHECK3-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 83469// CHECK3-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 83470// CHECK3-NEXT: store i64 [[TMP7]], ptr [[DOTOMP_UB]], align 83471// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43472// CHECK3-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i643473// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43474// CHECK3-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i643475// CHECK3-NEXT: store i64 [[CONV9]], ptr [[DOTOMP_LB]], align 83476// CHECK3-NEXT: store i64 [[CONV10]], ptr [[DOTOMP_UB]], align 83477// CHECK3-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 83478// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43479// CHECK3-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43480// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 43481// CHECK3-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB3]], i32 [[TMP11]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)3482// CHECK3-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_LB]], align 83483// CHECK3-NEXT: store i64 [[TMP12]], ptr [[DOTOMP_IV]], align 83484// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3485// CHECK3: omp.inner.for.cond:3486// CHECK3-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83487// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43488// CHECK3-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i643489// CHECK3-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]3490// CHECK3-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3491// CHECK3: omp.inner.for.body:3492// CHECK3-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83493// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43494// CHECK3-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 03495// CHECK3-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 13496// CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]3497// CHECK3-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i643498// CHECK3-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]3499// CHECK3-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 13500// CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]3501// CHECK3-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i323502// CHECK3-NEXT: store i32 [[CONV21]], ptr [[I11]], align 43503// CHECK3-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83504// CHECK3-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83505// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43506// CHECK3-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 03507// CHECK3-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 13508// CHECK3-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]3509// CHECK3-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i643510// CHECK3-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]3511// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 43512// CHECK3-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 03513// CHECK3-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 13514// CHECK3-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]3515// CHECK3-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i643516// CHECK3-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]3517// CHECK3-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]3518// CHECK3-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 13519// CHECK3-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]3520// CHECK3-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i323521// CHECK3-NEXT: store i32 [[CONV35]], ptr [[J12]], align 43522// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I11]], align 43523// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[J12]], align 43524// CHECK3-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]3525// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[I11]], align 43526// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP23]]3527// CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[J12]], align 43528// CHECK3-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP24]]3529// CHECK3-NEXT: store i32 [[ADD36]], ptr [[ARRAYIDX37]], align 43530// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3531// CHECK3: omp.body.continue:3532// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3533// CHECK3: omp.inner.for.inc:3534// CHECK3-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 83535// CHECK3-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 83536// CHECK3-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]3537// CHECK3-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 83538// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3539// CHECK3: omp.inner.for.end:3540// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3541// CHECK3: omp.loop.exit:3542// CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43543// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 43544// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP28]])3545// CHECK3-NEXT: br label [[OMP_PRECOND_END]]3546// CHECK3: omp.precond.end:3547// CHECK3-NEXT: ret void3548//3549//3550// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l533551// CHECK3-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR4]] {3552// CHECK3-NEXT: entry:3553// CHECK3-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 43554// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43555// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43556// CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 43557// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 43558// CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 43559// CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 43560// CHECK3-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 43561// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43562// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43563// CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 43564// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43565// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_kernel_environment, ptr [[DYN_PTR]])3566// CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -13567// CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]3568// CHECK3: user_code.entry:3569// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])3570// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 43571// CHECK3-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 43572// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 43573// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[V_ADDR]], align 43574// CHECK3-NEXT: store i32 0, ptr [[DOTZERO_ADDR]], align 43575// CHECK3-NEXT: store i32 [[TMP2]], ptr [[DOTTHREADID_TEMP_]], align 43576// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]], i32 [[TMP4]], ptr [[TMP0]], ptr [[TMP5]]) #[[ATTR2]]3577// CHECK3-NEXT: call void @__kmpc_target_deinit()3578// CHECK3-NEXT: ret void3579// CHECK3: worker.exit:3580// CHECK3-NEXT: ret void3581//3582//3583// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined3584// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {3585// CHECK3-NEXT: entry:3586// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43587// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43588// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43589// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43590// CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 43591// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43592// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43593// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43594// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43595// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43596// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 43597// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 43598// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43599// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43600// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 43601// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 43602// CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x ptr], align 43603// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43604// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43605// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43606// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43607// CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 43608// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43609// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 43610// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 43611// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43612// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 03613// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13614// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13615// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43616// CHECK3-NEXT: store i32 0, ptr [[I]], align 43617// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43618// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]3619// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]3620// CHECK3: omp.precond.then:3621// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 43622// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43623// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 43624// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43625// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43626// CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()3627// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43628// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 43629// CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2]], i32 [[TMP6]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])3630// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43631// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43632// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]3633// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3634// CHECK3: cond.true:3635// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43636// CHECK3-NEXT: br label [[COND_END:%.*]]3637// CHECK3: cond.false:3638// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43639// CHECK3-NEXT: br label [[COND_END]]3640// CHECK3: cond.end:3641// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]3642// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 43643// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43644// CHECK3-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 43645// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3646// CHECK3: omp.inner.for.cond:3647// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43648// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43649// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 13650// CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]3651// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3652// CHECK3: omp.inner.for.body:3653// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43654// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43655// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 43656// CHECK3-NEXT: store i32 [[TMP16]], ptr [[N_CASTED]], align 43657// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 43658// CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[V_ADDR]], align 43659// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 03660// CHECK3-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to ptr3661// CHECK3-NEXT: store ptr [[TMP20]], ptr [[TMP19]], align 43662// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 13663// CHECK3-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to ptr3664// CHECK3-NEXT: store ptr [[TMP22]], ptr [[TMP21]], align 43665// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 23666// CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to ptr3667// CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP23]], align 43668// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 33669// CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP25]], align 43670// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 43671// CHECK3-NEXT: store ptr [[TMP18]], ptr [[TMP26]], align 43672// CHECK3-NEXT: [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43673// CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 43674// CHECK3-NEXT: call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP28]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined, ptr null, ptr [[CAPTURED_VARS_ADDRS]], i32 5)3675// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3676// CHECK3: omp.inner.for.inc:3677// CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43678// CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43679// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]3680// CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 43681// CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43682// CHECK3-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43683// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]3684// CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_COMB_LB]], align 43685// CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43686// CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43687// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]3688// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_COMB_UB]], align 43689// CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43690// CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43691// CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]3692// CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]3693// CHECK3: cond.true10:3694// CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43695// CHECK3-NEXT: br label [[COND_END12:%.*]]3696// CHECK3: cond.false11:3697// CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 43698// CHECK3-NEXT: br label [[COND_END12]]3699// CHECK3: cond.end12:3700// CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]3701// CHECK3-NEXT: store i32 [[COND13]], ptr [[DOTOMP_COMB_UB]], align 43702// CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 43703// CHECK3-NEXT: store i32 [[TMP39]], ptr [[DOTOMP_IV]], align 43704// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3705// CHECK3: omp.inner.for.end:3706// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3707// CHECK3: omp.loop.exit:3708// CHECK3-NEXT: [[TMP40:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43709// CHECK3-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 43710// CHECK3-NEXT: call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP41]])3711// CHECK3-NEXT: br label [[OMP_PRECOND_END]]3712// CHECK3: omp.precond.end:3713// CHECK3-NEXT: ret void3714//3715//3716// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l53_omp_outlined_omp_outlined3717// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[V:%.*]]) #[[ATTR1]] {3718// CHECK3-NEXT: entry:3719// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43720// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43721// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 43722// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 43723// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 43724// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 43725// CHECK3-NEXT: [[V_ADDR:%.*]] = alloca ptr, align 43726// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43727// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 43728// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43729// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43730// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 43731// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43732// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43733// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43734// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43735// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 43736// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43737// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43738// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 43739// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 43740// CHECK3-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 43741// CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 43742// CHECK3-NEXT: store ptr [[V]], ptr [[V_ADDR]], align 43743// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43744// CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 43745// CHECK3-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 43746// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43747// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 03748// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 13749// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13750// CHECK3-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43751// CHECK3-NEXT: store i32 0, ptr [[I]], align 43752// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43753// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]3754// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]3755// CHECK3: omp.precond.then:3756// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43757// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43758// CHECK3-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 43759// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 43760// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43761// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 43762// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 43763// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43764// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43765// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43766// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43767// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3768// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43769// CHECK3-NEXT: store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 43770// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3771// CHECK3: omp.inner.for.cond:3772// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43773// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 43774// CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]3775// CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3776// CHECK3: omp.inner.for.body:3777// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43778// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 13779// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3780// CHECK3-NEXT: store i32 [[ADD]], ptr [[I3]], align 43781// CHECK3-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V_ADDR]], align 43782// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I3]], align 43783// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 [[TMP14]]3784// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX]], align 43785// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 43786// CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]3787// CHECK3-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX5]], align 43788// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3789// CHECK3: omp.body.continue:3790// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3791// CHECK3: omp.inner.for.inc:3792// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43793// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43794// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]3795// CHECK3-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 43796// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]3797// CHECK3: omp.inner.for.end:3798// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3799// CHECK3: omp.loop.exit:3800// CHECK3-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43801// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 43802// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP20]])3803// CHECK3-NEXT: br label [[OMP_PRECOND_END]]3804// CHECK3: omp.precond.end:3805// CHECK3-NEXT: ret void3806//3807