843 lines · cpp
1// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=OMP45 --check-prefix=CHECK2// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s3// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s4// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG5 6// RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=OMP50 --check-prefix=CHECK7// RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s9// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -DOMP5 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG10 11// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s12// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s13// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s14// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s15 16// RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s17// RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s19// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -DOMP5 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s20// expected-no-diagnostics21// SIMD-ONLY0-NOT: {{__kmpc|__tgt}}22#ifndef HEADER23#define HEADER24 25long long get_val() { extern void mayThrow(); mayThrow(); return 0; }26double *g_ptr;27 28// CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}})29void simple(float *a, float *b, float *c, float *d) {30// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(31// CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val32// CHECK-NEXT: store i64 [[K0]], ptr [[K_VAR:%[^,]+]]33// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(34// CHECK: store i32 12, ptr [[LIN_VAR:%[^,]+]]35// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(36// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(37// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(38// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(39// CHECK: store i32 -1, ptr [[A:%.+]],40// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(41// CHECK: store i32 -1, ptr [[R:%[^,]+]],42// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(43 #pragma omp parallel for simd44// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)45// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],46// CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 547// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]48// CHECK: [[TRUE]]:49// CHECK: br label %[[SWITCH:[^,]+]]50// CHECK: [[FALSE]]:51// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],52// CHECK: br label %[[SWITCH]]53// CHECK: [[SWITCH]]:54// CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]55// CHECK: store i32 [[UP]], ptr [[UB]],56// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],57// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],58 59// CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]]60// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]61// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]62// CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]63 for (int i = 3; i < 32; i += 5) {64// CHECK: [[SIMPLE_LOOP1_BODY]]:65// Start of body: calculate i from IV:66// CHECK: [[IV1_1:%.+]] = load i32, ptr [[OMP_IV]]67// CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 568// CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]69// CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]]70// ... loop body ...71// End of body: store into a[i]:72// CHECK: store float [[RESULT:%.+]], ptr73 a[i] = b[i] * c[i] * d[i];74// CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]]75// CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 176// CHECK-NEXT: store i32 [[ADD1_2]], ptr [[OMP_IV]]77// br label %{{.+}}, !llvm.loop !{{.+}}78 }79// CHECK: [[SIMPLE_LOOP1_END]]:80// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})81 82 long long k = get_val();83 84 #pragma omp parallel for simd linear(k : 3) schedule(dynamic)85// CHECK: [[K0LOAD:%.+]] = load i64, ptr [[K_VAR:%[^,]+]]86// CHECK-NEXT: store i64 [[K0LOAD]], ptr [[LIN0:%[^,]+]]87 88// CHECK: call void @__kmpc_dispatch_init_4(ptr {{.+}}, i32 %{{.+}}, i32 {{35|1073741859}}, i32 0, i32 8, i32 1, i32 1)89// CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(ptr {{.+}}, i32 %{{.+}}, ptr %{{.+}}, ptr [[LB:%.+]], ptr [[UB:%.+]], ptr %{{.+}})90// CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 091// CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]92// CHECK: [[CONT]]:93// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],94// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV2:%[^,]+]],95 96// CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group97// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]{{.*}}!llvm.access.group98// CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]99// CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]100 for (int i = 10; i > 1; i--) {101// CHECK: [[SIMPLE_LOOP2_BODY]]:102// Start of body: calculate i from IV:103// CHECK: [[IV2_0:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group104// FIXME: It is interesting, why the following "mul 1" was not constant folded?105// CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1106// CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]107// CHECK-NEXT: store i32 [[LC_I_1]], ptr {{.+}}, !llvm.access.group108//109// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, ptr [[LIN0]]{{.*}}!llvm.access.group110// CHECK-NEXT: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group111// CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3112// CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64113// CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]114// Update of the privatized version of linear variable!115// CHECK-NEXT: store i64 [[LIN_ADD1]], ptr [[K_PRIVATIZED:%[^,]+]]116 a[k]++;117 k = k + 3;118// CHECK: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group119// CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1120// CHECK-NEXT: store i32 [[ADD2_2]], ptr [[OMP_IV2]]{{.*}}!llvm.access.group121// br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]122 }123// CHECK: [[SIMPLE_LOOP2_END]]:124//125// Update linear vars after loop, as the loop was operating on a private version.126// CHECK: [[LIN0_2:%.+]] = load i64, ptr [[K_PRIVATIZED]]127// CHECK-NEXT: store i64 [[LIN0_2]], ptr %{{.+}}128 129 int lin = 12;130 #pragma omp parallel for simd linear(lin : get_val()), linear(g_ptr)131 132// CHECK: alloca i32,133// Init linear private var.134// CHECK: [[LIN_VAR:%.+]] = load ptr, ptr %lin135// CHECK: [[LIN_LOAD:%.+]] = load i32, ptr [[LIN_VAR]]136// CHECK-NEXT: store i32 [[LIN_LOAD]], ptr [[LIN_START:%[^,]+]]137// Remember linear step.138// CHECK: [[CALL_VAL:%.+]] = invoke139// CHECK: store i64 [[CALL_VAL]], ptr [[LIN_STEP:%[^,]+]]140 141// CHECK: [[GLIN_LOAD:%.+]] = load ptr, ptr [[GLIN_VAR:%.+]],142// CHECK-NEXT: store ptr [[GLIN_LOAD]], ptr [[GLIN_START:%[^,]+]]143 144// CHECK: call void @__kmpc_for_static_init_8u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)145// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],146// CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3147// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]148// CHECK: [[TRUE]]:149// CHECK: br label %[[SWITCH:[^,]+]]150// CHECK: [[FALSE]]:151// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],152// CHECK: br label %[[SWITCH]]153// CHECK: [[SWITCH]]:154// CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]155// CHECK: store i64 [[UP]], ptr [[UB]],156// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],157// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV3:%[^,]+]],158 159// CHECK: [[IV3:%.+]] = load i64, ptr [[OMP_IV3]]160// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]]161// CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]162// CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]163 for (unsigned long long it = 2000; it >= 600; it-=400) {164// CHECK: [[SIMPLE_LOOP3_BODY]]:165// Start of body: calculate it from IV:166// CHECK: [[IV3_0:%.+]] = load i64, ptr [[OMP_IV3]]167// CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400168// CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]169// CHECK-NEXT: store i64 [[LC_IT_2]], ptr {{.+}}170//171// Linear start and step are used to calculate current value of the linear variable.172// CHECK: [[LINSTART:.+]] = load i32, ptr [[LIN_START]]173// CHECK: [[LINSTEP:.+]] = load i64, ptr [[LIN_STEP]]174// CHECK-NOT: store i32 {{.+}}, ptr [[LIN_VAR]]175// CHECK: store i32 {{.+}}, ptr [[LIN_PRIV:%[^,]+]],176// CHECK: [[GLINSTART:.+]] = load ptr, ptr [[GLIN_START]]177// CHECK-NEXT: [[IV3_1:%.+]] = load i64, ptr [[OMP_IV3]]178// CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1179// CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]180// CHECK-NEXT: store ptr [[GEP]], ptr [[G_PTR_CUR:%[^,]+]]181 *g_ptr++ = 0.0;182// CHECK: [[GEP_VAL:%.+]] = load ptr, ptr [[G_PTR_CUR]]183// CHECK: store double{{.*}}[[GEP_VAL]]184 a[it + lin]++;185// CHECK: [[FLT_INC:%.+]] = fadd float186// CHECK-NEXT: store float [[FLT_INC]],187// CHECK: [[IV3_2:%.+]] = load i64, ptr [[OMP_IV3]]188// CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1189// CHECK-NEXT: store i64 [[ADD3_2]], ptr [[OMP_IV3]]190 }191// CHECK: [[SIMPLE_LOOP3_END]]:192// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})193//194// Linear start and step are used to calculate final value of the linear variables.195// CHECK: [[LIN:%.+]] = load i32, ptr [[LIN_PRIV]]196// CHECK: store i32 [[LIN]], ptr [[LIN_VAR]],197// CHECK: [[GLIN:%.+]] = load ptr, ptr [[G_PTR_CUR]]198// CHECK: store ptr [[GLIN]], ptr [[GLIN_VAR]],199 200 #pragma omp parallel for simd201// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)202// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],203// CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3204// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]205// CHECK: [[TRUE]]:206// CHECK: br label %[[SWITCH:[^,]+]]207// CHECK: [[FALSE]]:208// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],209// CHECK: br label %[[SWITCH]]210// CHECK: [[SWITCH]]:211// CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]212// CHECK: store i32 [[UP]], ptr [[UB]],213// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],214// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV4:%[^,]+]],215 216// CHECK: [[IV4:%.+]] = load i32, ptr [[OMP_IV4]]217// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]218// CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]219// CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]220 for (short it = 6; it <= 20; it-=-4) {221// CHECK: [[SIMPLE_LOOP4_BODY]]:222// Start of body: calculate it from IV:223// CHECK: [[IV4_0:%.+]] = load i32, ptr [[OMP_IV4]]224// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4225// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]226// CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16227// CHECK-NEXT: store i16 [[LC_IT_3]], ptr228 229// CHECK: [[IV4_2:%.+]] = load i32, ptr [[OMP_IV4]]230// CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1231// CHECK-NEXT: store i32 [[ADD4_2]], ptr [[OMP_IV4]]232 }233// CHECK: [[SIMPLE_LOOP4_END]]:234// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})235 236 #pragma omp parallel for simd237// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)238// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],239// CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25240// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]241// CHECK: [[TRUE]]:242// CHECK: br label %[[SWITCH:[^,]+]]243// CHECK: [[FALSE]]:244// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],245// CHECK: br label %[[SWITCH]]246// CHECK: [[SWITCH]]:247// CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]248// CHECK: store i32 [[UP]], ptr [[UB]],249// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],250// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV5:%[^,]+]],251 252// CHECK: [[IV5:%.+]] = load i32, ptr [[OMP_IV5]]253// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]254// CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]255// CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]256 for (unsigned char it = 'z'; it >= 'a'; it+=-1) {257// CHECK: [[SIMPLE_LOOP5_BODY]]:258// Start of body: calculate it from IV:259// CHECK: [[IV5_0:%.+]] = load i32, ptr [[OMP_IV5]]260// CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1261// CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]262// CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8263// CHECK-NEXT: store i8 [[LC_IT_2]], ptr {{.+}},264 265// CHECK: [[IV5_2:%.+]] = load i32, ptr [[OMP_IV5]]266// CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1267// CHECK-NEXT: store i32 [[ADD5_2]], ptr [[OMP_IV5]]268 }269// CHECK: [[SIMPLE_LOOP5_END]]:270// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})271 272// CHECK-NOT: mul i32 %{{.+}}, 10273 #pragma omp parallel for simd274 for (unsigned i=100; i<10; i+=10) {275 }276 277 int A;278 {279 A = -1;280 #pragma omp parallel for simd lastprivate(A)281// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)282// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],283// CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6284// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]285// CHECK: [[TRUE]]:286// CHECK: br label %[[SWITCH:[^,]+]]287// CHECK: [[FALSE]]:288// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],289// CHECK: br label %[[SWITCH]]290// CHECK: [[SWITCH]]:291// CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]292// CHECK: store i64 [[UP]], ptr [[UB]],293// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],294// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV7:%[^,]+]],295 296// CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]297// CHECK: [[SIMD_LOOP7_COND]]:298// CHECK-NEXT: [[IV7:%.+]] = load i64, ptr [[OMP_IV7]]299// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]300// CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]301// CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]302 for (long long i = -10; i < 10; i += 3) {303// CHECK: [[SIMPLE_LOOP7_BODY]]:304// Start of body: calculate i from IV:305// CHECK: [[IV7_0:%.+]] = load i64, ptr [[OMP_IV7]]306// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3307// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]308// CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]],309// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]]310// CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32311// CHECK-NEXT: store i32 [[CONV]], ptr [[A_PRIV:%[^,]+]],312 A = i;313// CHECK: [[IV7_2:%.+]] = load i64, ptr [[OMP_IV7]]314// CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1315// CHECK-NEXT: store i64 [[ADD7_2]], ptr [[OMP_IV7]]316 }317// CHECK: [[SIMPLE_LOOP7_END]]:318// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})319// CHECK: load i32, ptr320// CHECK: icmp ne i32 %{{.+}}, 0321// CHECK: br i1 %{{.+}}, label322// CHECK: [[A_PRIV_VAL:%.+]] = load i32, ptr [[A_PRIV]],323// CHECK-NEXT: store i32 [[A_PRIV_VAL]], ptr %{{.+}},324// CHECK-NEXT: br label325 }326 int R;327 {328 R = -1;329// CHECK: store i32 1, ptr [[R_PRIV:%[^,]+]],330 #pragma omp parallel for simd reduction(*:R)331// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)332// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],333// CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6334// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]335// CHECK: [[TRUE]]:336// CHECK: br label %[[SWITCH:[^,]+]]337// CHECK: [[FALSE]]:338// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],339// CHECK: br label %[[SWITCH]]340// CHECK: [[SWITCH]]:341// CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]342// CHECK: store i64 [[UP]], ptr [[UB]],343// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],344// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV8:%[^,]+]],345 346// CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]347// CHECK: [[SIMD_LOOP8_COND]]:348// CHECK-NEXT: [[IV8:%.+]] = load i64, ptr [[OMP_IV8]]349// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]350// CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]351// CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]352 for (long long i = -10; i < 10; i += 3) {353// CHECK: [[SIMPLE_LOOP8_BODY]]:354// Start of body: calculate i from IV:355// CHECK: [[IV8_0:%.+]] = load i64, ptr [[OMP_IV8]]356// CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3357// CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]358// CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]],359// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]]360// CHECK: store i32 %{{.+}}, ptr [[R_PRIV]],361 R *= i;362// CHECK: [[IV8_2:%.+]] = load i64, ptr [[OMP_IV8]]363// CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1364// CHECK-NEXT: store i64 [[ADD8_2]], ptr [[OMP_IV8]]365 }366// CHECK: [[SIMPLE_LOOP8_END]]:367// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})368// CHECK: call i32 @__kmpc_reduce_nowait(369// CHECK: [[R_PRIV_VAL:%.+]] = load i32, ptr [[R_PRIV]],370// CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]371// CHECK-NEXT: store i32 [[RED]], ptr %{{.+}},372// CHECK-NEXT: call void @__kmpc_end_reduce_nowait(373 }374}375 376template <class T, unsigned K> T tfoo(T a) { return a + K; }377 378template <typename T, unsigned N>379int templ1(T a, T *z) {380 #pragma omp parallel for simd collapse(N)381 for (int i = 0; i < N * 2; i++) {382 for (long long j = 0; j < (N + N + N + N); j += 2) {383 z[i + j] = a + tfoo<T, N>(i + j);384 }385 }386 return 0;387}388 389// Instatiation templ1<float,2>390// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float noundef {{.+}}, ptr noundef {{.+}})391// CHECK: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(392void inst_templ1() {393 float a;394 float z[100];395 templ1<float,2> (a, z);396}397 398// OMP50: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)399// OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]],400// OMP50: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15401// OMP50: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]402// OMP50: [[TRUE]]:403// OMP50: br label %[[SWITCH:[^,]+]]404// OMP50: [[FALSE]]:405// OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]],406// OMP50: br label %[[SWITCH]]407// OMP50: [[SWITCH]]:408// OMP50: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]409// OMP50: store i64 [[UP]], ptr [[UB]],410// OMP50: [[LB_VAL:%.+]] = load i64, ptr [[LB]],411// OMP50: store i64 [[LB_VAL]], ptr [[T1_OMP_IV:%[^,]+]],412 413// ...414// OMP50: [[IV:%.+]] = load i64, ptr [[T1_OMP_IV]]415// OMP50-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]416// OMP50-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]417// OMP50-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]418// OMP50: [[T1_BODY]]:419// Loop counters i and j updates:420// OMP50: [[IV1:%.+]] = load i64, ptr [[T1_OMP_IV]]421// OMP50-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4422// OMP50-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1423// OMP50-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]424// OMP50-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32425// OMP50-NEXT: store i32 [[I_2]], ptr426// OMP50: [[IV2:%.+]] = load i64, ptr [[T1_OMP_IV]]427// OMP50: [[IV2_1:%.+]] = load i64, ptr [[T1_OMP_IV]]428// OMP50-NEXT: [[DIV_1:%.+]] = sdiv i64 [[IV2_1]], 4429// OMP50-NEXT: [[MUL_1:%.+]] = mul nsw i64 [[DIV_1]], 4430// OMP50-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_1]]431// OMP50-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2432// OMP50-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]433// OMP50-NEXT: store i64 [[J_2_ADD0]], ptr434// simd.for.inc:435// OMP50: [[IV3:%.+]] = load i64, ptr [[T1_OMP_IV]]436// OMP50-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1437// OMP50-NEXT: store i64 [[INC]], ptr438// OMP50-NEXT: br label {{%.+}}439// OMP50: [[T1_END]]:440// OMP50: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})441// OMP50: ret void442//443 444typedef int MyIdx;445 446class IterDouble {447 double *Ptr;448public:449 IterDouble operator++ () const {450 IterDouble n;451 n.Ptr = Ptr + 1;452 return n;453 }454 bool operator < (const IterDouble &that) const {455 return Ptr < that.Ptr;456 }457 double & operator *() const {458 return *Ptr;459 }460 MyIdx operator - (const IterDouble &that) const {461 return (MyIdx) (Ptr - that.Ptr);462 }463 IterDouble operator + (int Delta) {464 IterDouble re;465 re.Ptr = Ptr + Delta;466 return re;467 }468 469 ///~IterDouble() {}470};471 472// CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}473void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {474//475// Calculate number of iterations before the loop body.476// CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}477// CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1478// CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1479// CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1480// CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1481// CHECK-NEXT: store i32 [[DIFF5]], ptr [[OMP_LAST_IT:%[^,]+]]{{.+}}482 #pragma omp parallel for simd483 484// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)485// CHECK-DAG: [[UB_VAL:%.+]] = load i32, ptr [[UB]],486// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]],487// CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]488// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]489// CHECK: [[TRUE]]:490// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]],491// CHECK: br label %[[SWITCH:[^,]+]]492// CHECK: [[FALSE]]:493// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],494// CHECK: br label %[[SWITCH]]495// CHECK: [[SWITCH]]:496// CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]497// CHECK: store i32 [[UP]], ptr [[UB]],498// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],499// CHECK: store i32 [[LB_VAL]], ptr [[IT_OMP_IV:%[^,]+]],500 501// CHECK: [[IV:%.+]] = load i32, ptr [[IT_OMP_IV]]502// CHECK-NEXT: [[UB_VAL:%.+]] = load i32, ptr [[UB]]503// CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]504// CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]505 for (IterDouble i = ia; i < ib; ++i) {506// CHECK: [[IT_BODY]]:507// Start of body: calculate i from index:508// CHECK: [[IV1:%.+]] = load i32, ptr [[IT_OMP_IV]]509// Call of operator+ (i, IV).510// CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}511// ... loop body ...512 *i = *ic * 0.5;513// Float multiply and save result.514// CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01515// CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}516// CHECK: store double [[MULR:%.+]], ptr [[RESULT_ADDR:%.+]]517 ++ic;518//519// CHECK: [[IV2:%.+]] = load i32, ptr [[IT_OMP_IV]]520// CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1521// CHECK-NEXT: store i32 [[ADD2]], ptr [[IT_OMP_IV]]522// br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]523 }524// CHECK: [[IT_END]]:525// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})526// CHECK: ret void527}528 529 530// CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}531void collapsed(float *a, float *b, float *c, float *d) {532 int i; // outer loop counter533 unsigned j; // middle loop couter, leads to unsigned icmp in loop header.534 // k declared in the loop init below535 short l; // inner loop counter536// CHECK: call void @__kmpc_for_static_init_4u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)537// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],538// CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119539// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]540// CHECK: [[TRUE]]:541// CHECK: br label %[[SWITCH:[^,]+]]542// CHECK: [[FALSE]]:543// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],544// CHECK: br label %[[SWITCH]]545// CHECK: [[SWITCH]]:546// CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]547// CHECK: store i32 [[UP]], ptr [[UB]],548// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],549// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],550//551 #pragma omp parallel for simd collapse(4)552 553// CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]]554// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]555// CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]556// CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]557 for (i = 1; i < 3; i++) // 2 iterations558 for (j = 2u; j < 5u; j++) //3 iterations559 for (int k = 3; k <= 6; k++) // 4 iterations560 for (l = 4; l < 9; ++l) // 5 iterations561 {562// CHECK: [[COLL1_BODY]]:563// Start of body: calculate i from index:564// CHECK: [[IV1:%.+]] = load i32, ptr [[OMP_IV]]565// Calculation of the loop counters values.566// CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60567// CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1568// CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]569// CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]]570 571// CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]]572// CHECK: [[IV1_2_1:%.+]] = load i32, ptr [[OMP_IV]]573// CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2_1]], 60574// CHECK-NEXT: [[MUL_1:%.+]] = mul i32 [[CALC_J_1]], 60575// CHECK-NEXT: [[SUB_3:%.+]] = sub i32 [[IV1_2]], [[MUL_1]]576// CHECK-NEXT: [[CALC_J_2:%.+]] = udiv i32 [[SUB_3]], 20577// CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1578// CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]579// CHECK-NEXT: store i32 [[CALC_J_3]], ptr [[LC_J:.+]]580 581// CHECK: [[IV1_3:%.+]] = load i32, ptr [[OMP_IV]]582// CHECK: [[IV1_3_1:%.+]] = load i32, ptr [[OMP_IV]]583// CHECK-NEXT: [[DIV_1:%.+]] = udiv i32 [[IV1_3_1]], 60584// CHECK-NEXT: [[MUL_2:%.+]] = mul i32 [[DIV_1]], 60585// CHECK-NEXT: [[ADD_3:%.+]] = sub i32 [[IV1_3]], [[MUL_2]]586 587// CHECK: [[IV1_4:%.+]] = load i32, ptr [[OMP_IV]]588// CHECK: [[IV1_4_1:%.+]] = load i32, ptr [[OMP_IV]]589// CHECK-NEXT: [[DIV_2:%.+]] = udiv i32 [[IV1_4_1]], 60590// CHECK-NEXT: [[MUL_3:%.+]] = mul i32 [[DIV_2]], 60591// CHECK-NEXT: [[SUB_6:%.+]] = sub i32 [[IV1_4]], [[MUL_3]]592// CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[SUB_6]], 20593// CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 20594// CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[ADD_3]], [[MUL_4]]595// CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 5596// CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 1597// CHECK-NEXT: [[ADD_6:%.+]] = add i32 3, [[MUL_5]]598// CHECK-NEXT: store i32 [[ADD_6]], ptr [[LC_K:.+]]599 600// CHECK: [[IV1_5:%.+]] = load i32, ptr [[OMP_IV]]601// CHECK: [[IV1_5_1:%.+]] = load i32, ptr [[OMP_IV]]602// CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[IV1_5_1]], 60603// CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 60604// CHECK-NEXT: [[ADD_7:%.+]] = sub i32 [[IV1_5]], [[MUL_6]]605 606// CHECK: [[IV1_6:%.+]] = load i32, ptr [[OMP_IV]]607// CHECK: [[IV1_6_1:%.+]] = load i32, ptr [[OMP_IV]]608// CHECK-NEXT: [[DIV_6:%.+]] = udiv i32 [[IV1_6_1]], 60609// CHECK-NEXT: [[MUL_7:%.+]] = mul i32 [[DIV_6]], 60610// CHECK-NEXT: [[SUB_10:%.+]] = sub i32 [[IV1_6]], [[MUL_7]]611// CHECK-NEXT: [[DIV_7:%.+]] = udiv i32 [[SUB_10]], 20612// CHECK-NEXT: [[MUL_8:%.+]] = mul i32 [[DIV_7]], 20613// CHECK-NEXT: [[ADD_9:%.+]] = sub i32 [[ADD_7]], [[MUL_8]]614 615// CHECK: [[IV1_7:%.+]] = load i32, ptr [[OMP_IV]]616// CHECK: [[IV1_7_1:%.+]] = load i32, ptr [[OMP_IV]]617// CHECK-NEXT: [[DIV_8:%.+]] = udiv i32 [[IV1_7_1]], 60618// CHECK-NEXT: [[MUL_9:%.+]] = mul i32 [[DIV_8]], 60619// CHECK-NEXT: [[ADD_10:%.+]] = sub i32 [[IV1_7]], [[MUL_9]]620 621// CHECK: [[IV1_8:%.+]] = load i32, ptr [[OMP_IV]]622// CHECK: [[IV1_8_1:%.+]] = load i32, ptr [[OMP_IV]]623// CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[IV1_8_1]], 60624// CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 60625// CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[IV1_8]], [[MUL_4]]626// CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 20627// CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 20628// CHECK-NEXT: [[SUB_8:%.+]] = sub i32 [[ADD_10]], [[MUL_5]]629// CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[SUB_8]], 5630// CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 5631// CHECK-NEXT: [[SUB_9:%.+]] = sub i32 [[ADD_9]], [[MUL_6]]632// CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[SUB_9]], 1633// CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[MUL_6]]634// CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16635// CHECK-NEXT: store i16 [[CALC_L_3]], ptr [[LC_L:.+]]636// ... loop body ...637// End of body: store into a[i]:638// CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]]639 float res = b[j] * c[k];640 a[i] = res * d[l];641// CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV]]642// CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1643// CHECK-NEXT: store i32 [[ADD2]], ptr [[OMP_IV]]644// br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]645// CHECK: [[COLL1_END]]:646 }647// i,j,l are updated; k is not updated.648// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})649// CHECK: store i32 3, ptr [[I:%[^,]+]]650// CHECK: store i32 5, ptr [[I:%[^,]+]]651// CHECK: store i16 9, ptr [[I:%[^,]+]]652// CHECK: ret void653}654 655extern char foo();656extern double globalfloat;657 658// CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}659void widened(float *a, float *b, float *c, float *d) {660 int i; // outer loop counter661 short j; // inner loop counter662 globalfloat = 1.0;663 int localint = 1;664// CHECK: store double {{.+}}, ptr [[GLOBALFLOAT:@.+]]665// Counter is widened to 64 bits.666// CHECK: [[MUL:%.+]] = mul nsw i64 2, %{{.+}}667// CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1668// CHECK-NEXT: store i64 [[SUB]], ptr [[OMP_LAST_IT:%[^,]+]],669// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)670// CHECK-DAG: [[UB_VAL:%.+]] = load i64, ptr [[UB]],671// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]],672// CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]673// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]674// CHECK: [[TRUE]]:675// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]],676// CHECK: br label %[[SWITCH:[^,]+]]677// CHECK: [[FALSE]]:678// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],679// CHECK: br label %[[SWITCH]]680// CHECK: [[SWITCH]]:681// CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]682// CHECK: store i64 [[UP]], ptr [[UB]],683// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],684// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],685//686 #pragma omp parallel for simd collapse(2) private(globalfloat, localint)687 688// CHECK: [[IV:%.+]] = load i64, ptr [[OMP_IV]]689// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]]690// CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]691// CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]692 for (i = 1; i < 3; i++) // 2 iterations693 for (j = 0; j < foo(); j++) // foo() iterations694 {695// CHECK: [[WIDE1_BODY]]:696// Start of body: calculate i from index:697// CHECK: [[IV1:%.+]] = load i64, ptr [[OMP_IV]]698// Calculation of the loop counters values...699// CHECK: store i32 {{[^,]+}}, ptr [[LC_I:.+]]700// CHECK: [[IV1_2:%.+]] = load i64, ptr [[OMP_IV]]701// CHECK: store i16 {{[^,]+}}, ptr [[LC_J:.+]]702// ... loop body ...703//704// Here we expect store into private double var, not global705// CHECK-NOT: store double {{.+}}, ptr [[GLOBALFLOAT]]706 globalfloat = (float)j/i;707 float res = b[j] * c[j];708// Store into a[i]:709// CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]]710 a[i] = res * d[i];711// Then there's a store into private var localint:712// CHECK: store i32 {{.+}}, ptr [[LOCALINT:%[^,]+]]713 localint = (int)j;714// CHECK: [[IV2:%.+]] = load i64, ptr [[OMP_IV]]715// CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1716// CHECK-NEXT: store i64 [[ADD2]], ptr [[OMP_IV]]717//718// br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]719// CHECK: [[WIDE1_END]]:720 }721// i,j are updated.722// CHECK: store i32 3, ptr [[I:%[^,]+]]723// CHECK: store i16724//725// Here we expect store into original localint, not its privatized version.726// CHECK-NOT: store i32 {{.+}}, ptr [[LOCALINT]]727 localint = (int)j;728// CHECK: ret void729}730 731// CHECK-LABEL: if_clause732void if_clause(int a) {733 #pragma omp parallel for simd if(a) schedule(static, 1)734for (int i = 0; i < 10; ++i);735}736// CHECK: call void @__kmpc_for_static_init_4(737// OMP50: [[COND:%.+]] = trunc i8 %{{.+}} to i1738// OMP50: br i1 [[COND]], label {{%?}}[[THEN:.+]], label {{%?}}[[ELSE:.+]]739 740// OMP50: [[THEN]]:741// OMP45: br label {{.+}}, !llvm.loop ![[VECT:.+]]742// OMP50: br label {{.+}}, !llvm.loop ![[VECT:.+]]743// OMP50: [[ELSE]]:744// OMP50: br label {{.+}}, !llvm.loop ![[NOVECT:.+]]745// CHECK: call void @__kmpc_for_static_fini(746 747// OMP45: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)748// OMP45: [[UB_VAL:%.+]] = load i64, ptr [[UB]],749// OMP45: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15750// OMP45: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]751// OMP45: [[TRUE]]:752// OMP45: br label %[[SWITCH:[^,]+]]753// OMP45: [[FALSE]]:754// OMP45: [[UB_VAL:%.+]] = load i64, ptr [[UB]],755// OMP45: br label %[[SWITCH]]756// OMP45: [[SWITCH]]:757// OMP45: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]758// OMP45: store i64 [[UP]], ptr [[UB]],759// OMP45: [[LB_VAL:%.+]] = load i64, ptr [[LB]],760// OMP45: store i64 [[LB_VAL]], ptr [[T1_OMP_IV:%[^,]+]],761 762// ...763// OMP45: [[IV:%.+]] = load i64, ptr [[T1_OMP_IV]]764// OMP45-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]765// OMP45-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]766// OMP45-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]767// OMP45: [[T1_BODY]]:768// Loop counters i and j updates:769// OMP45: [[IV1:%.+]] = load i64, ptr [[T1_OMP_IV]]770// OMP45-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4771// OMP45-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1772// OMP45-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]773// OMP45-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32774// OMP45-NEXT: store i32 [[I_2]], ptr775// OMP45: [[IV2:%.+]] = load i64, ptr [[T1_OMP_IV]]776// OMP45: [[IV2_1:%.+]] = load i64, ptr [[T1_OMP_IV]]777// OMP45-NEXT: [[DIV_1:%.+]] = sdiv i64 [[IV2_1]], 4778// OMP45-NEXT: [[MUL_1:%.+]] = mul nsw i64 [[DIV_1]], 4779// OMP45-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_1]]780// OMP45-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2781// OMP45-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]782// OMP45-NEXT: store i64 [[J_2_ADD0]], ptr783// simd.for.inc:784// OMP45: [[IV3:%.+]] = load i64, ptr [[T1_OMP_IV]]785// OMP45-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1786// OMP45-NEXT: store i64 [[INC]], ptr787// OMP45-NEXT: br label {{%.+}}788// OMP45: [[T1_END]]:789// OMP45: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})790// OMP45: ret void791 792// OMP50-LABEL: parallel_simd_atomic793// OMP50: call i32 @__kmpc_global_thread_num794// OMP50: call void @__kmpc_push_num_threads795// OMP50: call void {{.*}} @__kmpc_fork_call796// OMP50-LABEL: define internal void @_Z20parallel_simd_atomici.omp_outlined797// OMP50: call void @__kmpc_for_static_init_4798// OMP50: omp.inner.for.body:799// OMP50: %{{[0-9]+}} = atomicrmw add ptr %{{[0-9]+}}, i32 1 monotonic, align 4, !llvm.access.group !{{[0-9]+}}800 801// OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false}802// OMP45-DAG: ![[VECT]] = distinct !{![[VECT]], ![[PA:.+]], ![[VM:.+]]}803// OMP45-DAG: ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}804// OMP45-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}805// OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false}806// OMP50-DAG: ![[VECT]] = distinct !{![[VECT]], ![[PA:.+]], ![[VM:.+]]}807// OMP50-DAG ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}808// OMP50-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}809// OMP50-DAG: ![[NOVECT]] = distinct !{![[NOVECT]], ![[NOVM:.+]]}810// OMP50-DAG: ![[NOVM]] = !{!"llvm.loop.vectorize.enable", i1 false}811 812// TERM_DEBUG-LABEL: bar813int bar() { extern void mayThrow(); mayThrow(); return 0; };814 815// TERM_DEBUG-LABEL: parallel_simd816void parallel_simd(float *a) {817#pragma omp parallel for simd818 // TERM_DEBUG-NOT: __kmpc_global_thread_num819 // TERM_DEBUG: invoke noundef i32 {{.*}}bar{{.*}}()820 // TERM_DEBUG: unwind label %[[TERM_LPAD:[a-zA-Z0-9\.]+]],821 // TERM_DEBUG-NOT: __kmpc_global_thread_num822 // TERM_DEBUG: [[TERM_LPAD]]823 // TERM_DEBUG: call void @__clang_call_terminate824 // TERM_DEBUG: unreachable825 for (unsigned i = 131071; i <= 2147483647; i += 127)826 a[i] += bar();827}828// TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],829// TERM_DEBUG-NOT: line: 0,830 831#ifdef OMP5832void parallel_simd_atomic(int a) {833#pragma omp parallel for simd shared(a) num_threads(10)834 for (int i = 0; i < 100; i++) {835 #pragma omp atomic update836 a += 1;837 }838}839#endif // OMP5840 841#endif // HEADER842 843