668 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6#ifdef CK17///==========================================================================///8// RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK19// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s10// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK111 12// RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s14// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16 17void foo() { extern void mayThrow(); mayThrow(); }18 19void parallel_master() {20#pragma omp parallel master21 foo();22}23 24 25 26#endif27 28#ifdef CK229///==========================================================================///30// RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK531// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s32// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK533 34// RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"35// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s36// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"37 38 39void parallel_master_private() {40 int a;41#pragma omp parallel master private(a)42 a++;43}44 45 46 47#endif48 49#ifdef CK350///==========================================================================///51// RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK952// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s53// RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK954 55// RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"56// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s57// RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"58 59 60void parallel_master_private() {61 int a;62#pragma omp parallel master default(shared)63 a++;64}65 66 67 68#endif69 70#ifdef CK3171///==========================================================================///72// RUN: %clang_cc1 -DCK31 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1373// RUN: %clang_cc1 -DCK31 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s74// RUN: %clang_cc1 -DCK31 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1375 76// RUN: %clang_cc1 -DCK31 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"77// RUN: %clang_cc1 -DCK31 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s78// RUN: %clang_cc1 -DCK31 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"79 80 81void parallel_master_default_firstprivate() {82 int a;83#pragma omp parallel master default(firstprivate)84 a++;85}86 87 88 89 90 91#endif92 93#ifdef CK3294///==========================================================================///95// RUN: %clang_cc1 -DCK32 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1796// RUN: %clang_cc1 -DCK32 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s97// RUN: %clang_cc1 -DCK32 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1798 99// RUN: %clang_cc1 -DCK32 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"100// RUN: %clang_cc1 -DCK32 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s101// RUN: %clang_cc1 -DCK32 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"102 103struct St {104 int a, b;105 static int y;106 St() : a(0), b(0) {}107 ~St() {}108};109int St::y = 0;110 111void parallel_master_default_firstprivate() {112 St a = St();113 static int y = 0;114#pragma omp parallel master default(firstprivate)115 {116 a.a += 1;117 a.b += 1;118 y++;119 a.y++;120 }121}122 123 124 125 126 127 128 129 130#endif131 132#ifdef CK4133///==========================================================================///134// RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK21135// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s136// RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21137 138// RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"139// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s140// RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"141 142 143void parallel_master_firstprivate() {144 int a;145#pragma omp parallel master firstprivate(a)146 a++;147}148 149 150 151#endif152 153#ifdef CK5154///==========================================================================///155// RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK25156// RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s157// RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25158 159// RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"160// RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s161// RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"162 163// RUN: %clang_cc1 -DCK5 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29164// RUN: %clang_cc1 -DCK5 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s165 166// RUN: %clang_cc1 -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s167 168 169int a;170#pragma omp threadprivate(a)171 172void parallel_master_copyin() {173#pragma omp parallel master copyin(a)174 a++;175}176 177 178 179 180 181 182// TLC-CHECK-DAG: [[INC:%.+]] = add nsw i32 [[TEN]], 1183// TLC-CHECK-DAG: store i32 [[INC]], ptr [[TEN]]184 185#endif186#ifdef CK6187///==========================================================================///188// RUN: %clang_cc1 -DCK6 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s189 190// RUN: %clang_cc1 -DCK6 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s191 192 193void parallel_master_reduction() {194 int g;195#pragma omp parallel master reduction(+:g)196 g = 1;197}198 199 200 201 202 203// switch204 205// case 1:206 207// case 2:208 209#endif210#ifdef CK7211///==========================================================================///212// RUN: %clang_cc1 -DCK7 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s213 214// RUN: %clang_cc1 -DCK7 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s215 216 217void parallel_master_if() {218#pragma omp parallel master if (parallel: false)219 parallel_master_if();220}221 222 223 224#endif225#ifdef CK8226///==========================================================================///227// RUN: %clang_cc1 -DCK8 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s228 229// RUN: %clang_cc1 -DCK8 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s230 231typedef __INTPTR_TYPE__ intptr_t;232 233 234void foo();235 236struct S {237 intptr_t a, b, c;238 S(intptr_t a) : a(a) {}239 operator char() { return a; }240 ~S() {}241};242 243template <typename T>244T tmain() {245#pragma omp parallel master proc_bind(master)246 foo();247 return T();248}249 250int main() {251#pragma omp parallel master proc_bind(spread)252 foo();253#pragma omp parallel master proc_bind(close)254 foo();255 return tmain<int>();256}257 258 259 260 261#endif262#ifdef CK9263///==========================================================================///264// RUN: %clang_cc1 -DCK9 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s265 266// RUN: %clang_cc1 -DCK9 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s267typedef void **omp_allocator_handle_t;268extern const omp_allocator_handle_t omp_null_allocator;269extern const omp_allocator_handle_t omp_default_mem_alloc;270extern const omp_allocator_handle_t omp_large_cap_mem_alloc;271extern const omp_allocator_handle_t omp_const_mem_alloc;272extern const omp_allocator_handle_t omp_high_bw_mem_alloc;273extern const omp_allocator_handle_t omp_low_lat_mem_alloc;274extern const omp_allocator_handle_t omp_cgroup_mem_alloc;275extern const omp_allocator_handle_t omp_pteam_mem_alloc;276extern const omp_allocator_handle_t omp_thread_mem_alloc;277 278void parallel_master_allocate() {279 int a;280 omp_allocator_handle_t myalloc = nullptr;281#pragma omp parallel master firstprivate(a) allocate(myalloc:a)282 a++;283}284 285 286#endif287#endif288// CHECK1-LABEL: define {{[^@]+}}@_Z3foov289// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {290// CHECK1-NEXT: entry:291// CHECK1-NEXT: call void @_Z8mayThrowv()292// CHECK1-NEXT: ret void293//294//295// CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv296// CHECK1-SAME: () #[[ATTR2:[0-9]+]] {297// CHECK1-NEXT: entry:298// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z15parallel_masterv.omp_outlined)299// CHECK1-NEXT: ret void300//301//302// CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv.omp_outlined303// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality ptr @__gxx_personality_v0 {304// CHECK1-NEXT: entry:305// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8306// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8307// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8308// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8309// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8310// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4311// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])312// CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0313// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]314// CHECK1: omp_if.then:315// CHECK1-NEXT: invoke void @_Z3foov()316// CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]317// CHECK1: invoke.cont:318// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])319// CHECK1-NEXT: br label [[OMP_IF_END]]320// CHECK1: omp_if.end:321// CHECK1-NEXT: ret void322// CHECK1: terminate.lpad:323// CHECK1-NEXT: [[TMP4:%.*]] = landingpad { ptr, i32 }324// CHECK1-NEXT: catch ptr null325// CHECK1-NEXT: [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0326// CHECK1-NEXT: call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6:[0-9]+]]327// CHECK1-NEXT: unreachable328//329//330// CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate331// CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {332// CHECK1-NEXT: [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR4:[0-9]+]]333// CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR6]]334// CHECK1-NEXT: unreachable335//336//337// CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev338// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {339// CHECK5-NEXT: entry:340// CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4341// CHECK5-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z23parallel_master_privatev.omp_outlined)342// CHECK5-NEXT: ret void343//344//345// CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev.omp_outlined346// CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {347// CHECK5-NEXT: entry:348// CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8349// CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8350// CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4351// CHECK5-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8352// CHECK5-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8353// CHECK5-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8354// CHECK5-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4355// CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])356// CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0357// CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]358// CHECK5: omp_if.then:359// CHECK5-NEXT: [[TMP4:%.*]] = load i32, ptr [[A]], align 4360// CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1361// CHECK5-NEXT: store i32 [[INC]], ptr [[A]], align 4362// CHECK5-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])363// CHECK5-NEXT: br label [[OMP_IF_END]]364// CHECK5: omp_if.end:365// CHECK5-NEXT: ret void366//367//368// CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev369// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {370// CHECK9-NEXT: entry:371// CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4372// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z23parallel_master_privatev.omp_outlined, ptr [[A]])373// CHECK9-NEXT: ret void374//375//376// CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev.omp_outlined377// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {378// CHECK9-NEXT: entry:379// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8380// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8381// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8382// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8383// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8384// CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8385// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8386// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8387// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4388// CHECK9-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])389// CHECK9-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0390// CHECK9-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]391// CHECK9: omp_if.then:392// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4393// CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1394// CHECK9-NEXT: store i32 [[INC]], ptr [[TMP0]], align 4395// CHECK9-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])396// CHECK9-NEXT: br label [[OMP_IF_END]]397// CHECK9: omp_if.end:398// CHECK9-NEXT: ret void399//400//401// CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev402// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {403// CHECK13-NEXT: entry:404// CHECK13-NEXT: [[A:%.*]] = alloca i32, align 4405// CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8406// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4407// CHECK13-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4408// CHECK13-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8409// CHECK13-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z36parallel_master_default_firstprivatev.omp_outlined, i64 [[TMP1]])410// CHECK13-NEXT: ret void411//412//413// CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev.omp_outlined414// CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {415// CHECK13-NEXT: entry:416// CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8417// CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8418// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8419// CHECK13-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8420// CHECK13-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8421// CHECK13-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8422// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8423// CHECK13-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4424// CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])425// CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0426// CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]427// CHECK13: omp_if.then:428// CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4429// CHECK13-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1430// CHECK13-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4431// CHECK13-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])432// CHECK13-NEXT: br label [[OMP_IF_END]]433// CHECK13: omp_if.end:434// CHECK13-NEXT: ret void435//436//437// CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev438// CHECK17-SAME: () #[[ATTR0:[0-9]+]] {439// CHECK17-NEXT: entry:440// CHECK17-NEXT: [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4441// CHECK17-NEXT: [[Y_CASTED:%.*]] = alloca i64, align 8442// CHECK17-NEXT: [[Y_CASTED1:%.*]] = alloca i64, align 8443// CHECK17-NEXT: call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A]])444// CHECK17-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZZ36parallel_master_default_firstprivatevE1y, align 4445// CHECK17-NEXT: store i32 [[TMP0]], ptr [[Y_CASTED]], align 4446// CHECK17-NEXT: [[TMP1:%.*]] = load i64, ptr [[Y_CASTED]], align 8447// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr @_ZN2St1yE, align 4448// CHECK17-NEXT: store i32 [[TMP2]], ptr [[Y_CASTED1]], align 4449// CHECK17-NEXT: [[TMP3:%.*]] = load i64, ptr [[Y_CASTED1]], align 8450// CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 3, ptr @_Z36parallel_master_default_firstprivatev.omp_outlined, ptr [[A]], i64 [[TMP1]], i64 [[TMP3]])451// CHECK17-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR3:[0-9]+]]452// CHECK17-NEXT: ret void453//454//455// CHECK17-LABEL: define {{[^@]+}}@_ZN2StC1Ev456// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {457// CHECK17-NEXT: entry:458// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8459// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8460// CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8461// CHECK17-NEXT: call void @_ZN2StC2Ev(ptr noundef nonnull align 4 dereferenceable(8) [[THIS1]])462// CHECK17-NEXT: ret void463//464//465// CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev.omp_outlined466// CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]], i64 noundef [[Y1:%.*]]) #[[ATTR1:[0-9]+]] {467// CHECK17-NEXT: entry:468// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8469// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8470// CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8471// CHECK17-NEXT: [[Y_ADDR:%.*]] = alloca i64, align 8472// CHECK17-NEXT: [[Y_ADDR2:%.*]] = alloca i64, align 8473// CHECK17-NEXT: [[A3:%.*]] = alloca [[STRUCT_ST:%.*]], align 4474// CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8475// CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8476// CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8477// CHECK17-NEXT: store i64 [[Y]], ptr [[Y_ADDR]], align 8478// CHECK17-NEXT: store i64 [[Y1]], ptr [[Y_ADDR2]], align 8479// CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8480// CHECK17-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[A3]], ptr align 4 [[TMP0]], i64 8, i1 false)481// CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8482// CHECK17-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4483// CHECK17-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])484// CHECK17-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0485// CHECK17-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]486// CHECK17: omp_if.then:487// CHECK17-NEXT: [[A4:%.*]] = getelementptr inbounds nuw [[STRUCT_ST]], ptr [[A3]], i32 0, i32 0488// CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[A4]], align 4489// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], 1490// CHECK17-NEXT: store i32 [[ADD]], ptr [[A4]], align 4491// CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_ST]], ptr [[A3]], i32 0, i32 1492// CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4493// CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1494// CHECK17-NEXT: store i32 [[ADD5]], ptr [[B]], align 4495// CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[Y_ADDR]], align 4496// CHECK17-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1497// CHECK17-NEXT: store i32 [[INC]], ptr [[Y_ADDR]], align 4498// CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr @_ZN2St1yE, align 4499// CHECK17-NEXT: [[INC6:%.*]] = add nsw i32 [[TMP8]], 1500// CHECK17-NEXT: store i32 [[INC6]], ptr @_ZN2St1yE, align 4501// CHECK17-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])502// CHECK17-NEXT: br label [[OMP_IF_END]]503// CHECK17: omp_if.end:504// CHECK17-NEXT: call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A3]]) #[[ATTR3]]505// CHECK17-NEXT: ret void506//507//508// CHECK17-LABEL: define {{[^@]+}}@_ZN2StD1Ev509// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat align 2 {510// CHECK17-NEXT: entry:511// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8512// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8513// CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8514// CHECK17-NEXT: call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR3]]515// CHECK17-NEXT: ret void516//517//518// CHECK17-LABEL: define {{[^@]+}}@_ZN2StC2Ev519// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 {520// CHECK17-NEXT: entry:521// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8522// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8523// CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8524// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_ST:%.*]], ptr [[THIS1]], i32 0, i32 0525// CHECK17-NEXT: store i32 0, ptr [[A]], align 4526// CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_ST]], ptr [[THIS1]], i32 0, i32 1527// CHECK17-NEXT: store i32 0, ptr [[B]], align 4528// CHECK17-NEXT: ret void529//530//531// CHECK17-LABEL: define {{[^@]+}}@_ZN2StD2Ev532// CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat align 2 {533// CHECK17-NEXT: entry:534// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8535// CHECK17-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8536// CHECK17-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8537// CHECK17-NEXT: ret void538//539//540// CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev541// CHECK21-SAME: () #[[ATTR0:[0-9]+]] {542// CHECK21-NEXT: entry:543// CHECK21-NEXT: [[A:%.*]] = alloca i32, align 4544// CHECK21-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8545// CHECK21-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4546// CHECK21-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4547// CHECK21-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8548// CHECK21-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z28parallel_master_firstprivatev.omp_outlined, i64 [[TMP1]])549// CHECK21-NEXT: ret void550//551//552// CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev.omp_outlined553// CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {554// CHECK21-NEXT: entry:555// CHECK21-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8556// CHECK21-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8557// CHECK21-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8558// CHECK21-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8559// CHECK21-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8560// CHECK21-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8561// CHECK21-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8562// CHECK21-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4563// CHECK21-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])564// CHECK21-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0565// CHECK21-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]566// CHECK21: omp_if.then:567// CHECK21-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4568// CHECK21-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1569// CHECK21-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4570// CHECK21-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])571// CHECK21-NEXT: br label [[OMP_IF_END]]572// CHECK21: omp_if.end:573// CHECK21-NEXT: ret void574//575//576// CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv577// CHECK25-SAME: () #[[ATTR0:[0-9]+]] {578// CHECK25-NEXT: entry:579// CHECK25-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z22parallel_master_copyinv.omp_outlined)580// CHECK25-NEXT: ret void581//582//583// CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv.omp_outlined584// CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {585// CHECK25-NEXT: entry:586// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8587// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8588// CHECK25-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8589// CHECK25-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8590// CHECK25-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8591// CHECK25-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4592// CHECK25-NEXT: [[TMP2:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP1]], ptr @a, i64 4, ptr @a.cache.)593// CHECK25-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP2]] to i64594// CHECK25-NEXT: [[TMP4:%.*]] = icmp ne i64 ptrtoint (ptr @a to i64), [[TMP3]]595// CHECK25-NEXT: br i1 [[TMP4]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]596// CHECK25: copyin.not.master:597// CHECK25-NEXT: [[TMP5:%.*]] = load i32, ptr @a, align 4598// CHECK25-NEXT: store i32 [[TMP5]], ptr [[TMP2]], align 4599// CHECK25-NEXT: br label [[COPYIN_NOT_MASTER_END]]600// CHECK25: copyin.not.master.end:601// CHECK25-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]])602// CHECK25-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])603// CHECK25-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0604// CHECK25-NEXT: br i1 [[TMP7]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]605// CHECK25: omp_if.then:606// CHECK25-NEXT: [[TMP8:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP1]], ptr @a, i64 4, ptr @a.cache.)607// CHECK25-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4608// CHECK25-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1609// CHECK25-NEXT: store i32 [[INC]], ptr [[TMP8]], align 4610// CHECK25-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])611// CHECK25-NEXT: br label [[OMP_IF_END]]612// CHECK25: omp_if.end:613// CHECK25-NEXT: ret void614//615//616// CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv617// CHECK29-SAME: () #[[ATTR0:[0-9]+]] {618// CHECK29-NEXT: entry:619// CHECK29-NEXT: [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)620// CHECK29-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z22parallel_master_copyinv.omp_outlined, ptr [[TMP0]])621// CHECK29-NEXT: ret void622//623//624// CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv.omp_outlined625// CHECK29-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {626// CHECK29-NEXT: entry:627// CHECK29-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8628// CHECK29-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8629// CHECK29-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8630// CHECK29-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8631// CHECK29-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8632// CHECK29-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8633// CHECK29-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8634// CHECK29-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)635// CHECK29-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64636// CHECK29-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64637// CHECK29-NEXT: [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]638// CHECK29-NEXT: br i1 [[TMP4]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]639// CHECK29: copyin.not.master:640// CHECK29-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4641// CHECK29-NEXT: store i32 [[TMP5]], ptr [[TMP1]], align 4642// CHECK29-NEXT: br label [[COPYIN_NOT_MASTER_END]]643// CHECK29: copyin.not.master.end:644// CHECK29-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8645// CHECK29-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4646// CHECK29-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]])647// CHECK29-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8648// CHECK29-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4649// CHECK29-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB2]], i32 [[TMP9]])650// CHECK29-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0651// CHECK29-NEXT: br i1 [[TMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]652// CHECK29: omp_if.then:653// CHECK29-NEXT: [[TMP12:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)654// CHECK29-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4655// CHECK29-NEXT: [[INC:%.*]] = add nsw i32 [[TMP13]], 1656// CHECK29-NEXT: store i32 [[INC]], ptr [[TMP12]], align 4657// CHECK29-NEXT: call void @__kmpc_end_master(ptr @[[GLOB2]], i32 [[TMP9]])658// CHECK29-NEXT: br label [[OMP_IF_END]]659// CHECK29: omp_if.end:660// CHECK29-NEXT: ret void661//662//663// CHECK29-LABEL: define {{[^@]+}}@_ZTW1a664// CHECK29-SAME: () #[[ATTR5:[0-9]+]] comdat {665// CHECK29-NEXT: [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)666// CHECK29-NEXT: ret ptr [[TMP1]]667//668