939 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 6// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -x c++ -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"7// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// expected-no-diagnostics10#ifndef HEADER11#define HEADER12 13int main(int argc, char **argv) {14 15 16 17 18#pragma omp parallel master taskloop priority(argc)19 for (int i = 0; i < 10; ++i)20 ;21 22 23 24#pragma omp parallel master taskloop nogroup grainsize(argc)25 for (int i = 0; i < 10; ++i)26 ;27 28 29 int i;30#pragma omp parallel master taskloop if(argc) shared(argc, argv) collapse(2) num_tasks(argc)31 for (i = 0; i < argc; ++i)32 for (int j = argc; j < argv[argc][argc]; ++j)33 ;34#pragma omp parallel master taskloop35 for (int i = 0; i < 10; ++i) {36#pragma omp cancel taskgroup37#pragma omp cancellation point taskgroup38 }39}40 41struct S {42 int a;43 S(int c) {44 45#pragma omp parallel master taskloop shared(c) num_tasks(4) final(c)46 for (a = 0; a < c; ++a)47 ;48 }49} s(1);50 51 52#endif53// CHECK1-LABEL: define {{[^@]+}}@main54// CHECK1-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {55// CHECK1-NEXT: entry:56// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 457// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 458// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 859// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 460// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 861// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 462// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 863// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 464// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i8, align 165// CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 466// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED5:%.*]] = alloca i64, align 867// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED7:%.*]] = alloca i64, align 868// CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 469// CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 470// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])71// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 472// CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 473// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 874// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 475// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 476// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 477// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 478// CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 879// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @main.omp_outlined, i64 [[TMP3]])80// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARGC_ADDR]], align 481// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_1]], align 482// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 483// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 484// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 885// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 1, ptr @main.omp_outlined.1, i64 [[TMP6]])86// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARGC_ADDR]], align 487// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 088// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i889// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_3]], align 190// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARGC_ADDR]], align 491// CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTCAPTURE_EXPR_4]], align 492// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 193// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i194// CHECK1-NEXT: [[STOREDV6:%.*]] = zext i1 [[LOADEDV]] to i895// CHECK1-NEXT: store i8 [[STOREDV6]], ptr [[DOTCAPTURE_EXPR__CASTED5]], align 196// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED5]], align 897// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 498// CHECK1-NEXT: store i32 [[TMP11]], ptr [[DOTCAPTURE_EXPR__CASTED7]], align 499// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED7]], align 8100// CHECK1-NEXT: [[TMP13:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_3]], align 1101// CHECK1-NEXT: [[LOADEDV8:%.*]] = trunc i8 [[TMP13]] to i1102// CHECK1-NEXT: br i1 [[LOADEDV8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]103// CHECK1: omp_if.then:104// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @main.omp_outlined.4, ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]])105// CHECK1-NEXT: br label [[OMP_IF_END:%.*]]106// CHECK1: omp_if.else:107// CHECK1-NEXT: call void @__kmpc_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])108// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTTHREADID_TEMP_]], align 4109// CHECK1-NEXT: store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4110// CHECK1-NEXT: call void @main.omp_outlined.4(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTBOUND_ZERO_ADDR]], ptr [[ARGC_ADDR]], ptr [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) #[[ATTR2:[0-9]+]]111// CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(ptr @[[GLOB1]], i32 [[TMP0]])112// CHECK1-NEXT: br label [[OMP_IF_END]]113// CHECK1: omp_if.end:114// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 0, ptr @main.omp_outlined.7)115// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[RETVAL]], align 4116// CHECK1-NEXT: ret i32 [[TMP14]]117//118//119// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined120// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] {121// CHECK1-NEXT: entry:122// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8123// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8124// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8125// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1126// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4127// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8128// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8129// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8130// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8131// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4132// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])133// CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0134// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]135// CHECK1: omp_if.then:136// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])137// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4138// CHECK1-NEXT: [[TMP5:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, ptr @.omp_task_entry.)139// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP5]], i32 0, i32 0140// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP6]], i32 0, i32 4141// CHECK1-NEXT: store i32 [[TMP4]], ptr [[TMP7]], align 8142// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 5143// CHECK1-NEXT: store i64 0, ptr [[TMP8]], align 8144// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 6145// CHECK1-NEXT: store i64 9, ptr [[TMP9]], align 8146// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 7147// CHECK1-NEXT: store i64 1, ptr [[TMP10]], align 8148// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 9149// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP11]], i8 0, i64 8, i1 false)150// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP10]], align 8151// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[TMP5]], i32 1, ptr [[TMP8]], ptr [[TMP9]], i64 [[TMP12]], i32 1, i32 0, i64 0, ptr null)152// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])153// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])154// CHECK1-NEXT: br label [[OMP_IF_END]]155// CHECK1: omp_if.end:156// CHECK1-NEXT: ret void157//158//159// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.160// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {161// CHECK1-NEXT: entry:162// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4163// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8164// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8165// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8166// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8167// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8168// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8169// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8170// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4171// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8172// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8173// CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4174// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4175// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4176// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8177// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4178// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8179// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4180// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8181// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0182// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2183// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0184// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8185// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5186// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8187// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6188// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8189// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7190// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8191// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8192// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8193// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9194// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8195// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])196// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])197// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])198// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])199// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])200// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]201// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]202// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]203// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]204// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]205// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]206// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]207// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]208// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]209// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]210// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]211// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]212// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]213// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32214// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]215// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]216// CHECK1: omp.inner.for.cond.i:217// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]218// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64219// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]220// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]221// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]222// CHECK1: omp.inner.for.body.i:223// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]224// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META14]]225// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]226// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1227// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]228// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]229// CHECK1: .omp_outlined..exit:230// CHECK1-NEXT: ret i32 0231//232//233// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1234// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {235// CHECK1-NEXT: entry:236// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8237// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8238// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8239// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1240// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4241// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8242// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8243// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8244// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8245// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4246// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])247// CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0248// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]249// CHECK1: omp_if.then:250// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4251// CHECK1-NEXT: [[TMP5:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, ptr @.omp_task_entry..3)252// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], ptr [[TMP5]], i32 0, i32 0253// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP6]], i32 0, i32 5254// CHECK1-NEXT: store i64 0, ptr [[TMP7]], align 8255// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 6256// CHECK1-NEXT: store i64 9, ptr [[TMP8]], align 8257// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 7258// CHECK1-NEXT: store i64 1, ptr [[TMP9]], align 8259// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP6]], i32 0, i32 9260// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP10]], i8 0, i64 8, i1 false)261// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP9]], align 8262// CHECK1-NEXT: [[TMP12:%.*]] = zext i32 [[TMP4]] to i64263// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[TMP5]], i32 1, ptr [[TMP7]], ptr [[TMP8]], i64 [[TMP11]], i32 1, i32 1, i64 [[TMP12]], ptr null)264// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])265// CHECK1-NEXT: br label [[OMP_IF_END]]266// CHECK1: omp_if.end:267// CHECK1-NEXT: ret void268//269//270// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..3271// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {272// CHECK1-NEXT: entry:273// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4274// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8275// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8276// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8277// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8278// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8279// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8280// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8281// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4282// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8283// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8284// CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4285// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4286// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4287// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8288// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4289// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8290// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4291// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8292// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], ptr [[TMP3]], i32 0, i32 0293// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2294// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0295// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8296// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5297// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8298// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6299// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8300// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7301// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8302// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8303// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8304// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9305// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8306// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])307// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])308// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])309// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])310// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])311// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META28:![0-9]+]]312// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META28]]313// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META28]]314// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META28]]315// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META28]]316// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]317// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]318// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META28]]319// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META28]]320// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META28]]321// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]322// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]323// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]324// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32325// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]326// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]327// CHECK1: omp.inner.for.cond.i:328// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]329// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64330// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]331// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]332// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__2_EXIT:%.*]]333// CHECK1: omp.inner.for.body.i:334// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]335// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META28]]336// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]337// CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP23]], 1338// CHECK1-NEXT: store i32 [[ADD2_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]339// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]340// CHECK1: .omp_outlined..2.exit:341// CHECK1-NEXT: ret i32 0342//343//344// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.4345// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] {346// CHECK1-NEXT: entry:347// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8348// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8349// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca ptr, align 8350// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8351// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8352// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8353// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8354// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4355// CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32, align 4356// CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4357// CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4358// CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4359// CHECK1-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i64, align 8360// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8361// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8362// CHECK1-NEXT: store ptr [[ARGC]], ptr [[ARGC_ADDR]], align 8363// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8364// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8365// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8366// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARGC_ADDR]], align 8367// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8368// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8369// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4370// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])371// CHECK1-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0372// CHECK1-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]373// CHECK1: omp_if.then:374// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[AGG_CAPTURED]], i32 0, i32 0375// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP6]], align 8376// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[AGG_CAPTURED]], i32 0, i32 1377// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8378// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4379// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])380// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP0]], align 4381// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_4]], align 4382// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP0]], align 4383// CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR_5]], align 4384// CHECK1-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP1]], align 8385// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4386// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64387// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP11]], i64 [[IDXPROM]]388// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8389// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4390// CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP14]] to i64391// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i8, ptr [[TMP13]], i64 [[IDXPROM7]]392// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[ARRAYIDX8]], align 1393// CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP15]] to i32394// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTCAPTURE_EXPR_6]], align 4395// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4396// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP16]], 0397// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1398// CHECK1-NEXT: [[CONV10:%.*]] = sext i32 [[DIV]] to i64399// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_6]], align 4400// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_5]], align 4401// CHECK1-NEXT: [[SUB11:%.*]] = sub i32 [[TMP17]], [[TMP18]]402// CHECK1-NEXT: [[SUB12:%.*]] = sub i32 [[SUB11]], 1403// CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB12]], 1404// CHECK1-NEXT: [[DIV13:%.*]] = udiv i32 [[ADD]], 1405// CHECK1-NEXT: [[CONV14:%.*]] = zext i32 [[DIV13]] to i64406// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV10]], [[CONV14]]407// CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i64 [[MUL]], 1408// CHECK1-NEXT: store i64 [[SUB15]], ptr [[DOTCAPTURE_EXPR_9]], align 8409// CHECK1-NEXT: [[TMP19:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i64 80, i64 16, ptr @.omp_task_entry..6)410// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], ptr [[TMP19]], i32 0, i32 0411// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP20]], i32 0, i32 0412// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8413// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP22]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)414// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1415// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP23]] to i1416// CHECK1-NEXT: [[TMP24:%.*]] = sext i1 [[LOADEDV]] to i32417// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP20]], i32 0, i32 5418// CHECK1-NEXT: store i64 0, ptr [[TMP25]], align 8419// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP20]], i32 0, i32 6420// CHECK1-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_9]], align 8421// CHECK1-NEXT: store i64 [[TMP27]], ptr [[TMP26]], align 8422// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP20]], i32 0, i32 7423// CHECK1-NEXT: store i64 1, ptr [[TMP28]], align 8424// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP20]], i32 0, i32 9425// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP29]], i8 0, i64 8, i1 false)426// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[TMP28]], align 8427// CHECK1-NEXT: [[TMP31:%.*]] = zext i32 [[TMP8]] to i64428// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP3]], ptr [[TMP19]], i32 [[TMP24]], ptr [[TMP25]], ptr [[TMP26]], i64 [[TMP30]], i32 1, i32 2, i64 [[TMP31]], ptr null)429// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])430// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP3]])431// CHECK1-NEXT: br label [[OMP_IF_END]]432// CHECK1: omp_if.end:433// CHECK1-NEXT: ret void434//435//436// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..6437// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {438// CHECK1-NEXT: entry:439// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4440// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8441// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8442// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8443// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8444// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8445// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8446// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8447// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4448// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8449// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8450// CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4451// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4452// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4453// CHECK1-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8454// CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4455// CHECK1-NEXT: [[J_I:%.*]] = alloca i32, align 4456// CHECK1-NEXT: [[I14_I:%.*]] = alloca i32, align 4457// CHECK1-NEXT: [[J15_I:%.*]] = alloca i32, align 4458// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8459// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4460// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8461// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4462// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8463// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4464// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8465// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], ptr [[TMP3]], i32 0, i32 0466// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2467// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0468// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8469// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5470// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8471// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6472// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8473// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7474// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8475// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8476// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8477// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9478// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8479// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]])480// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META32:![0-9]+]])481// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META34:![0-9]+]])482// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]])483// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META38:![0-9]+]])484// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META40:![0-9]+]]485// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META40]]486// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META40]]487// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META40]]488// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META40]]489// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META40]]490// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META40]]491// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META40]]492// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META40]]493// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META40]]494// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META40]]495// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META40]]496// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8497// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4498// CHECK1-NEXT: store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]499// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP18]], align 8500// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4501// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]502// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2:%.*]], ptr [[TMP18]], i32 0, i32 1503// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP23]], align 8504// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[TMP24]], align 8505// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP18]], align 8506// CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4507// CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP27]] to i64508// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds ptr, ptr [[TMP25]], i64 [[IDXPROM_I]]509// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[ARRAYIDX_I]], align 8510// CHECK1-NEXT: [[TMP29:%.*]] = load ptr, ptr [[TMP18]], align 8511// CHECK1-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4512// CHECK1-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP30]] to i64513// CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, ptr [[TMP28]], i64 [[IDXPROM4_I]]514// CHECK1-NEXT: [[TMP31:%.*]] = load i8, ptr [[ARRAYIDX5_I]], align 1515// CHECK1-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP31]] to i32516// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]517// CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]518// CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64519// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]520// CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]521// CHECK1-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP33]], [[TMP34]]522// CHECK1-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1523// CHECK1-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64524// CHECK1-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]]525// CHECK1-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1526// CHECK1-NEXT: store i64 [[SUB12_I]], ptr [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias [[META40]]527// CHECK1-NEXT: store i32 0, ptr [[I_I]], align 4, !noalias [[META40]]528// CHECK1-NEXT: [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]529// CHECK1-NEXT: store i32 [[TMP35]], ptr [[J_I]], align 4, !noalias [[META40]]530// CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META40]]531// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP36]]532// CHECK1-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT:%.*]]533// CHECK1: land.lhs.true.i:534// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]535// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]536// CHECK1-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]]537// CHECK1-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__5_EXIT]]538// CHECK1: taskloop.if.then.i:539// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META40]]540// CHECK1-NEXT: store i64 [[TMP39]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]541// CHECK1-NEXT: [[TMP40:%.*]] = load ptr, ptr [[TMP18]], align 8542// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_2]], ptr [[TMP18]], i32 0, i32 1543// CHECK1-NEXT: [[TMP42:%.*]] = load ptr, ptr [[TMP41]], align 8544// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]545// CHECK1: omp.inner.for.cond.i:546// CHECK1-NEXT: [[TMP43:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]547// CHECK1-NEXT: [[TMP44:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META40]]548// CHECK1-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP43]], [[TMP44]]549// CHECK1-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]550// CHECK1: omp.inner.for.body.i:551// CHECK1-NEXT: [[TMP45:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]552// CHECK1-NEXT: [[TMP46:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]553// CHECK1-NEXT: [[TMP47:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]554// CHECK1-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP46]], [[TMP47]]555// CHECK1-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1556// CHECK1-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64557// CHECK1-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP45]], [[CONV22_I]]558// CHECK1-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32559// CHECK1-NEXT: store i32 [[CONV26_I]], ptr [[I14_I]], align 4, !noalias [[META40]]560// CHECK1-NEXT: [[TMP48:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]561// CHECK1-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP48]] to i64562// CHECK1-NEXT: [[TMP49:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]563// CHECK1-NEXT: [[TMP50:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]564// CHECK1-NEXT: [[TMP51:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]565// CHECK1-NEXT: [[TMP52:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]566// CHECK1-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP51]], [[TMP52]]567// CHECK1-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1568// CHECK1-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64569// CHECK1-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP50]], [[CONV33_I]]570// CHECK1-NEXT: [[TMP53:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias [[META40]]571// CHECK1-NEXT: [[TMP54:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META40]]572// CHECK1-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP53]], [[TMP54]]573// CHECK1-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1574// CHECK1-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64575// CHECK1-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]]576// CHECK1-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP49]], [[MUL41_I]]577// CHECK1-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]]578// CHECK1-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32579// CHECK1-NEXT: store i32 [[CONV45_I]], ptr [[J15_I]], align 4, !noalias [[META40]]580// CHECK1-NEXT: [[TMP55:%.*]] = load i64, ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]581// CHECK1-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP55]], 1582// CHECK1-NEXT: store i64 [[ADD46_I]], ptr [[DOTOMP_IV_I]], align 8, !noalias [[META40]]583// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]584// CHECK1: omp.inner.for.end.i:585// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__5_EXIT]]586// CHECK1: .omp_outlined..5.exit:587// CHECK1-NEXT: ret i32 0588//589//590// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.7591// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {592// CHECK1-NEXT: entry:593// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8594// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8595// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 1596// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4597// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8598// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8599// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8600// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4601// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])602// CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0603// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]604// CHECK1: omp_if.then:605// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])606// CHECK1-NEXT: [[TMP4:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, ptr @.omp_task_entry..9)607// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], ptr [[TMP4]], i32 0, i32 0608// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 5609// CHECK1-NEXT: store i64 0, ptr [[TMP6]], align 8610// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 6611// CHECK1-NEXT: store i64 9, ptr [[TMP7]], align 8612// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 7613// CHECK1-NEXT: store i64 1, ptr [[TMP8]], align 8614// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 9615// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 8, i1 false)616// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP8]], align 8617// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[TMP4]], i32 1, ptr [[TMP6]], ptr [[TMP7]], i64 [[TMP10]], i32 1, i32 0, i64 0, ptr null)618// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])619// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])620// CHECK1-NEXT: br label [[OMP_IF_END]]621// CHECK1: omp_if.end:622// CHECK1-NEXT: ret void623//624//625// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..9626// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {627// CHECK1-NEXT: entry:628// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4629// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8630// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8631// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8632// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8633// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8634// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8635// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8636// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4637// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8638// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8639// CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4640// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4641// CHECK1-NEXT: [[CLEANUP_DEST_SLOT_I:%.*]] = alloca i32, align 4642// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4643// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8644// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4645// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8646// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4647// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8648// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], ptr [[TMP3]], i32 0, i32 0649// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2650// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0651// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8652// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5653// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8654// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6655// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8656// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7657// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8658// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8659// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8660// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9661// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8662// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]])663// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META44:![0-9]+]])664// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META46:![0-9]+]])665// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META48:![0-9]+]])666// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META50:![0-9]+]])667// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52:![0-9]+]]668// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META52]]669// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META52]]670// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META52]]671// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META52]]672// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META52]]673// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META52]]674// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META52]]675// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META52]]676// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META52]]677// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META52]]678// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META52]]679// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META52]]680// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP19]] to i32681// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]682// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]683// CHECK1: omp.inner.for.cond.i:684// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]685// CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP20]] to i64686// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META52]]687// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP21]]688// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]689// CHECK1: omp.inner.for.body.i:690// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]691// CHECK1-NEXT: store i32 [[TMP22]], ptr [[I_I]], align 4, !noalias [[META52]]692// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52]]693// CHECK1-NEXT: [[TMP24:%.*]] = call i32 @__kmpc_cancel(ptr @[[GLOB1]], i32 [[TMP23]], i32 4)694// CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0695// CHECK1-NEXT: br i1 [[TMP25]], label [[DOTCANCEL_EXIT_I:%.*]], label [[DOTCANCEL_CONTINUE_I:%.*]]696// CHECK1: .cancel.exit.i:697// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]698// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT:%.*]]699// CHECK1: .cancel.continue.i:700// CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META52]]701// CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_cancellationpoint(ptr @[[GLOB1]], i32 [[TMP26]], i32 4)702// CHECK1-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0703// CHECK1-NEXT: br i1 [[TMP28]], label [[DOTCANCEL_EXIT2_I:%.*]], label [[DOTCANCEL_CONTINUE3_I:%.*]]704// CHECK1: .cancel.exit2.i:705// CHECK1-NEXT: store i32 1, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]706// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT]]707// CHECK1: .cancel.continue3.i:708// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]709// CHECK1-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP29]], 1710// CHECK1-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META52]]711// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]712// CHECK1: omp.inner.for.end.i:713// CHECK1-NEXT: store i32 0, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]714// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__8_EXIT]]715// CHECK1: .omp_outlined..8.exit:716// CHECK1-NEXT: [[CLEANUP_DEST_I:%.*]] = load i32, ptr [[CLEANUP_DEST_SLOT_I]], align 4, !noalias [[META52]]717// CHECK1-NEXT: ret i32 0718//719//720// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init721// CHECK1-SAME: () #[[ATTR7:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" {722// CHECK1-NEXT: entry:723// CHECK1-NEXT: call void @_ZN1SC1Ei(ptr noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1)724// CHECK1-NEXT: ret void725//726//727// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ei728// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 {729// CHECK1-NEXT: entry:730// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8731// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4732// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8733// CHECK1-NEXT: store i32 [[C]], ptr [[C_ADDR]], align 4734// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8735// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[C_ADDR]], align 4736// CHECK1-NEXT: call void @_ZN1SC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])737// CHECK1-NEXT: ret void738//739//740// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei741// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 {742// CHECK1-NEXT: entry:743// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8744// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4745// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1746// CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8747// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8748// CHECK1-NEXT: store i32 [[C]], ptr [[C_ADDR]], align 4749// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8750// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[C_ADDR]], align 4751// CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0752// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8753// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1754// CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1755// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1756// CHECK1-NEXT: [[STOREDV2:%.*]] = zext i1 [[LOADEDV]] to i8757// CHECK1-NEXT: store i8 [[STOREDV2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1758// CHECK1-NEXT: [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8759// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 3, ptr @_ZN1SC2Ei.omp_outlined, ptr [[THIS1]], ptr [[C_ADDR]], i64 [[TMP2]])760// CHECK1-NEXT: ret void761//762//763// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei.omp_outlined764// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {765// CHECK1-NEXT: entry:766// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8767// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8768// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8769// CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8770// CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8771// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8772// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4773// CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8774// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4775// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4776// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8777// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8778// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8779// CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8780// CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8781// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8782// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C_ADDR]], align 8783// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8784// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4785// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP3]])786// CHECK1-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0787// CHECK1-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]788// CHECK1: omp_if.then:789// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6]], ptr [[AGG_CAPTURED]], i32 0, i32 0790// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP6]], align 8791// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6]], ptr [[AGG_CAPTURED]], i32 0, i32 1792// CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8793// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])794// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1795// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i1796// CHECK1-NEXT: store ptr [[TMP]], ptr [[_TMP1]], align 8797// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP1]], align 4798// CHECK1-NEXT: store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR_2]], align 4799// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4800// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0801// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1802// CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1803// CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_3]], align 4804// CHECK1-NEXT: [[TMP11:%.*]] = select i1 [[LOADEDV]], i32 2, i32 0805// CHECK1-NEXT: [[TMP12:%.*]] = or i32 [[TMP11]], 1806// CHECK1-NEXT: [[TMP13:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP3]], i32 [[TMP12]], i64 80, i64 16, ptr @.omp_task_entry..11)807// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_7:%.*]], ptr [[TMP13]], i32 0, i32 0808// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP14]], i32 0, i32 0809// CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8810// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP16]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)811// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP14]], i32 0, i32 5812// CHECK1-NEXT: store i64 0, ptr [[TMP17]], align 8813// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP14]], i32 0, i32 6814// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4815// CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[TMP19]] to i64816// CHECK1-NEXT: store i64 [[CONV]], ptr [[TMP18]], align 8817// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP14]], i32 0, i32 7818// CHECK1-NEXT: store i64 1, ptr [[TMP20]], align 8819// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP14]], i32 0, i32 9820// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP21]], i8 0, i64 8, i1 false)821// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[TMP20]], align 8822// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP3]], ptr [[TMP13]], i32 1, ptr [[TMP17]], ptr [[TMP18]], i64 [[TMP22]], i32 1, i32 2, i64 4, ptr null)823// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP3]])824// CHECK1-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP3]])825// CHECK1-NEXT: br label [[OMP_IF_END]]826// CHECK1: omp_if.end:827// CHECK1-NEXT: ret void828//829//830// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..11831// CHECK1-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR4]] {832// CHECK1-NEXT: entry:833// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4834// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8835// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8836// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8837// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8838// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8839// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8840// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8841// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4842// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8843// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8844// CHECK1-NEXT: [[TMP_I:%.*]] = alloca i32, align 4845// CHECK1-NEXT: [[TMP1_I:%.*]] = alloca ptr, align 8846// CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4847// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4848// CHECK1-NEXT: [[A_I:%.*]] = alloca i32, align 4849// CHECK1-NEXT: [[TMP4_I:%.*]] = alloca ptr, align 8850// CHECK1-NEXT: [[A5_I:%.*]] = alloca i32, align 4851// CHECK1-NEXT: [[TMP6_I:%.*]] = alloca ptr, align 8852// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4853// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4854// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8855// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4856// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8857// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4858// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8859// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_7:%.*]], ptr [[TMP3]], i32 0, i32 0860// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2861// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0862// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8863// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5864// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8865// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6866// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8867// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7868// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[TMP12]], align 8869// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8870// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 8871// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9872// CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8873// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META53:![0-9]+]])874// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]])875// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]])876// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]])877// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]])878// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META64:![0-9]+]]879// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META64]]880// CHECK1-NEXT: store ptr null, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META64]]881// CHECK1-NEXT: store ptr null, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META64]]882// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META64]]883// CHECK1-NEXT: store i64 [[TMP9]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META64]]884// CHECK1-NEXT: store i64 [[TMP11]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META64]]885// CHECK1-NEXT: store i64 [[TMP13]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META64]]886// CHECK1-NEXT: store i32 [[TMP15]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META64]]887// CHECK1-NEXT: store ptr [[TMP17]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META64]]888// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]889// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META64]]890// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8891// CHECK1-NEXT: store ptr [[TMP_I]], ptr [[TMP1_I]], align 8, !noalias [[META64]]892// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6:%.*]], ptr [[TMP18]], i32 0, i32 1893// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8894// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4895// CHECK1-NEXT: store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]896// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]897// CHECK1-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP23]], 1898// CHECK1-NEXT: store i32 [[SUB3_I]], ptr [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias [[META64]]899// CHECK1-NEXT: store ptr [[A_I]], ptr [[TMP4_I]], align 8, !noalias [[META64]]900// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[TMP4_I]], align 8, !noalias [[META64]]901// CHECK1-NEXT: store i32 0, ptr [[TMP24]], align 4902// CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__I]], align 4, !noalias [[META64]]903// CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP25]]904// CHECK1-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__10_EXIT:%.*]]905// CHECK1: taskloop.if.then.i:906// CHECK1-NEXT: store ptr [[A5_I]], ptr [[TMP6_I]], align 8, !noalias [[META64]]907// CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META64]]908// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32909// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]910// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_6]], ptr [[TMP18]], i32 0, i32 1911// CHECK1-NEXT: [[TMP28:%.*]] = load ptr, ptr [[TMP27]], align 8912// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]913// CHECK1: omp.inner.for.cond.i:914// CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]915// CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP29]] to i64916// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META64]]917// CHECK1-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP30]]918// CHECK1-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]]919// CHECK1: omp.inner.for.body.i:920// CHECK1-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]921// CHECK1-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP6_I]], align 8, !noalias [[META64]]922// CHECK1-NEXT: store i32 [[TMP31]], ptr [[TMP32]], align 4923// CHECK1-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]924// CHECK1-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP33]], 1925// CHECK1-NEXT: store i32 [[ADD9_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META64]]926// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]927// CHECK1: omp.inner.for.end.i:928// CHECK1-NEXT: br label [[DOTOMP_OUTLINED__10_EXIT]]929// CHECK1: .omp_outlined..10.exit:930// CHECK1-NEXT: ret i32 0931//932//933// CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_codegen.cpp934// CHECK1-SAME: () #[[ATTR7]] section "__TEXT,__StaticInit,regular,pure_instructions" {935// CHECK1-NEXT: entry:936// CHECK1-NEXT: call void @__cxx_global_var_init()937// CHECK1-NEXT: ret void938//939