2255 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s3// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s5// RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=LAMBDA %s6// RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=BLOCKS %s7// RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=ARRAY %s8 9// RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s10// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s11// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s12// RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY2 %s13// RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY3 %s14// RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY4 %s15// expected-no-diagnostics16 17#ifndef ARRAY18#ifndef HEADER19#define HEADER20 21template <class T>22struct S {23 T f;24 S(T a) : f(a) {}25 S() : f() {}26 S(const S &s, T t = T()) : f(s.f + t) {}27 operator T() { return T(); }28 ~S() {}29};30 31volatile double g;32 33template <typename T>34T tmain() {35 S<T> ttt;36 S<T> test(ttt);37 T t_var __attribute__((aligned(128))) = T();38 T vec[] = {1, 2};39 S<T> s_arr[] = {1, 2};40 S<T> var(3);41#pragma omp parallel master taskloop firstprivate(t_var, vec, s_arr, s_arr, var, var)42 for (int i = 0; i < 10; ++i) {43 vec[0] = t_var;44 s_arr[0] = var;45 }46 return T();47}48 49int main() {50 static int sivar;51#ifdef LAMBDA52 [&]() {53 54 55#pragma omp parallel master taskloop firstprivate(g, sivar)56 for (int i = 0; i < 10; ++i) {57 58 g = 1;59 sivar = 11;60 [&]() {61 g = 2;62 sivar = 22;63 }();64 }65 }();66 return 0;67#elif defined(BLOCKS)68 ^{69 70#pragma omp parallel master taskloop firstprivate(g, sivar)71 for (int i = 0; i < 10; ++i) {72 73 g = 1;74 sivar = 11;75 ^{76 g = 2;77 sivar = 22;78 }();79 }80 }();81 return 0;82#else83 S<double> ttt;84 S<double> test(ttt);85 int t_var = 0;86 int vec[] = {1, 2};87 S<double> s_arr[] = {1, 2};88 S<double> var(3);89#pragma omp parallel master taskloop firstprivate(var, t_var, s_arr, vec, s_arr, var, sivar)90 for (int i = 0; i < 10; ++i) {91 vec[0] = t_var;92 s_arr[0] = var;93 sivar = 33;94 }95 return tmain<int>();96#endif97}98 99 100 101// Store original variables in capture struct.102 103// Allocate task.104// Returns struct kmp_task_t {105// [[KMP_TASK_T]] task_data;106// [[KMP_TASK_MAIN_TY]] privates;107// };108 109// Fill kmp_task_t->shareds by copying from original capture argument.110 111// Initialize kmp_task_t->privates with default values (no init for simple types, default constructors for classes).112// Also copy address of private copy to the corresponding shareds reference.113 114// Constructors for s_arr and var.115// s_arr;116 117// var;118 119// t_var;120 121// vec;122 123// sivar;124 125// Provide pointer to destructor function, which will destroy private variables at the end of the task.126 127// Start task.128 129 130 131 132 133 134// Privates actually are used.135 136 137 138 139 140 141 142 143// Store original variables in capture struct.144 145// Allocate task.146// Returns struct kmp_task_t {147// [[KMP_TASK_T_TY]] task_data;148// [[KMP_TASK_TMAIN_TY]] privates;149// };150 151// Fill kmp_task_t->shareds by copying from original capture argument.152 153// Initialize kmp_task_t->privates with default values (no init for simple types, default constructors for classes).154 155// t_var;156 157// vec;158 159// Constructors for s_arr and var.160// a_arr;161 162// var;163 164// Provide pointer to destructor function, which will destroy private variables at the end of the task.165 166// Start task.167 168 169 170// Privates actually are used.171 172 173 174 175 176 177#endif178#else179struct St {180 int a, b;181 St() : a(0), b(0) {}182 St(const St &) {}183 ~St() {}184};185 186void array_func(int n, float a[n], St s[2]) {187#pragma omp parallel master taskloop firstprivate(a, s)188 for (int i = 0; i < 10; ++i)189 ;190}191#endif192 193// CHECK-LABEL: define {{[^@]+}}@main194// CHECK-SAME: () #[[ATTR0:[0-9]+]] {195// CHECK-NEXT: entry:196// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4197// CHECK-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 8198// CHECK-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 8199// CHECK-NEXT: [[T_VAR:%.*]] = alloca i32, align 4200// CHECK-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4201// CHECK-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 16202// CHECK-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 8203// CHECK-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8204// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4205// CHECK-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])206// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)207// CHECK-NEXT: store i32 0, ptr [[T_VAR]], align 4208// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)209// CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[S_ARR]], double noundef 1.000000e+00)210// CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1211// CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)212// CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)213// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4214// CHECK-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4215// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8216// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 4, ptr @main.omp_outlined, ptr [[VEC]], i64 [[TMP1]], ptr [[S_ARR]], ptr [[VAR]])217// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()218// CHECK-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4219// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR4:[0-9]+]]220// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0221// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2222// CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]223// CHECK: arraydestroy.body:224// CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]225// CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1226// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]227// CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]228// CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]229// CHECK: arraydestroy.done1:230// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR4]]231// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR4]]232// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[RETVAL]], align 4233// CHECK-NEXT: ret i32 [[TMP3]]234//235//236// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev237// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {238// CHECK-NEXT: entry:239// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8240// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8241// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8242// CHECK-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])243// CHECK-NEXT: ret void244//245//246// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d247// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {248// CHECK-NEXT: entry:249// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8250// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8251// CHECK-NEXT: [[T_ADDR:%.*]] = alloca double, align 8252// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8253// CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8254// CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8255// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8256// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8257// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 8258// CHECK-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])259// CHECK-NEXT: ret void260//261//262// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed263// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {264// CHECK-NEXT: entry:265// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8266// CHECK-NEXT: [[A_ADDR:%.*]] = alloca double, align 8267// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8268// CHECK-NEXT: store double [[A]], ptr [[A_ADDR]], align 8269// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8270// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8271// CHECK-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])272// CHECK-NEXT: ret void273//274//275// CHECK-LABEL: define {{[^@]+}}@main.omp_outlined276// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {277// CHECK-NEXT: entry:278// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8279// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8280// CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8281// CHECK-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8282// CHECK-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8283// CHECK-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8284// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8285// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4286// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8287// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8288// CHECK-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8289// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8290// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8291// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8292// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8293// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8294// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8295// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8296// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4297// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])298// CHECK-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0299// CHECK-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]300// CHECK: omp_if.then:301// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0302// CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8303// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1304// CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8305// CHECK-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])306// CHECK-NEXT: [[TMP9:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP4]], i32 9, i64 120, i64 16, ptr @.omp_task_entry.)307// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP9]], i32 0, i32 0308// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP10]], i32 0, i32 0309// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8310// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP12]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)311// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP9]], i32 0, i32 1312// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP13]], i32 0, i32 0313// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP14]], i32 0, i32 0314// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2315// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP15]]316// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]317// CHECK: omp.arraycpy.body:318// CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]319// CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]320// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_SRCELEMENTPAST]], double noundef 0.000000e+00)321// CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1322// CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1323// CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]324// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]]325// CHECK: omp.arraycpy.done1:326// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 1327// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP16]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP2]], double noundef 0.000000e+00)328// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 2329// CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4330// CHECK-NEXT: store i32 [[TMP18]], ptr [[TMP17]], align 8331// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 3332// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP19]], ptr align 4 [[TMP0]], i64 8, i1 false)333// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 4334// CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4335// CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP20]], align 4336// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 3337// CHECK-NEXT: store ptr @.omp_task_destructor., ptr [[TMP22]], align 8338// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 5339// CHECK-NEXT: store i64 0, ptr [[TMP23]], align 8340// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 6341// CHECK-NEXT: store i64 9, ptr [[TMP24]], align 8342// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 7343// CHECK-NEXT: store i64 1, ptr [[TMP25]], align 8344// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 9345// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP26]], i8 0, i64 8, i1 false)346// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[TMP25]], align 8347// CHECK-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP4]], ptr [[TMP9]], i32 1, ptr [[TMP23]], ptr [[TMP24]], i64 [[TMP27]], i32 1, i32 0, i64 0, ptr @.omp_task_dup.)348// CHECK-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])349// CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP4]])350// CHECK-NEXT: br label [[OMP_IF_END]]351// CHECK: omp_if.end:352// CHECK-NEXT: ret void353//354//355// CHECK-LABEL: define {{[^@]+}}@.omp_task_privates_map.356// CHECK-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]], ptr noalias noundef [[TMP3:%.*]], ptr noalias noundef [[TMP4:%.*]], ptr noalias noundef [[TMP5:%.*]]) #[[ATTR6:[0-9]+]] {357// CHECK-NEXT: entry:358// CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8359// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8360// CHECK-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8361// CHECK-NEXT: [[DOTADDR3:%.*]] = alloca ptr, align 8362// CHECK-NEXT: [[DOTADDR4:%.*]] = alloca ptr, align 8363// CHECK-NEXT: [[DOTADDR5:%.*]] = alloca ptr, align 8364// CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8365// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8366// CHECK-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8367// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTADDR3]], align 8368// CHECK-NEXT: store ptr [[TMP4]], ptr [[DOTADDR4]], align 8369// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTADDR5]], align 8370// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 8371// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP6]], i32 0, i32 0372// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTADDR3]], align 8373// CHECK-NEXT: store ptr [[TMP7]], ptr [[TMP8]], align 8374// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 1375// CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTADDR1]], align 8376// CHECK-NEXT: store ptr [[TMP9]], ptr [[TMP10]], align 8377// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 2378// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTADDR2]], align 8379// CHECK-NEXT: store ptr [[TMP11]], ptr [[TMP12]], align 8380// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 3381// CHECK-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTADDR4]], align 8382// CHECK-NEXT: store ptr [[TMP13]], ptr [[TMP14]], align 8383// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 4384// CHECK-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTADDR5]], align 8385// CHECK-NEXT: store ptr [[TMP15]], ptr [[TMP16]], align 8386// CHECK-NEXT: ret void387//388//389// CHECK-LABEL: define {{[^@]+}}@.omp_task_entry.390// CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {391// CHECK-NEXT: entry:392// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4393// CHECK-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8394// CHECK-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8395// CHECK-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8396// CHECK-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8397// CHECK-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8398// CHECK-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8399// CHECK-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8400// CHECK-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4401// CHECK-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8402// CHECK-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8403// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8404// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8405// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca ptr, align 8406// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca ptr, align 8407// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR4_I:%.*]] = alloca ptr, align 8408// CHECK-NEXT: [[I_I:%.*]] = alloca i32, align 4409// CHECK-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4410// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4411// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8412// CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4413// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8414// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4415// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8416// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0417// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2418// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0419// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8420// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1421// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5422// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8423// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6424// CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8425// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7426// CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8427// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8428// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8429// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9430// CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8431// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])432// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])433// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])434// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])435// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])436// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]437// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]438// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]439// CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]440// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]441// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]442// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]443// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]444// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]445// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]446// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]447// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]448// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]449// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]450// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]451// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]452// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]453// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META14]]454// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META14]]455// CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias [[META14]]456// CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]457// CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32458// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]459// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]460// CHECK: omp.inner.for.cond.i:461// CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]462// CHECK-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP28]] to i64463// CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]464// CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP29]]465// CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]466// CHECK: omp.inner.for.body.i:467// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]468// CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias [[META14]]469// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP23]], align 4470// CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP25]], align 4471// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP24]], ptr align 8 [[TMP22]], i64 8, i1 false)472// CHECK-NEXT: store i32 33, ptr [[TMP26]], align 4473// CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]474// CHECK-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP32]], 1475// CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]476// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]]477// CHECK: .omp_outlined..exit:478// CHECK-NEXT: ret i32 0479//480//481// CHECK-LABEL: define {{[^@]+}}@.omp_task_dup.482// CHECK-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {483// CHECK-NEXT: entry:484// CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8485// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8486// CHECK-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4487// CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8488// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8489// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTADDR2]], align 4490// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8491// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8492// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP4]], i32 0, i32 0493// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 0494// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8495// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1496// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP8]], i32 0, i32 0497// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP7]], i32 0, i32 0498// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8499// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP9]], i32 0, i32 0500// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2501// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]502// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE3:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]503// CHECK: omp.arraycpy.body:504// CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]505// CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]506// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_SRCELEMENTPAST]], double noundef 0.000000e+00)507// CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1508// CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1509// CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]]510// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE3]], label [[OMP_ARRAYCPY_BODY]]511// CHECK: omp.arraycpy.done3:512// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP8]], i32 0, i32 1513// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP7]], i32 0, i32 1514// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8515// CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP13]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP15]], double noundef 0.000000e+00)516// CHECK-NEXT: ret void517//518//519// CHECK-LABEL: define {{[^@]+}}@.omp_task_destructor.520// CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {521// CHECK-NEXT: entry:522// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4523// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4524// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8525// CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4526// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8527// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR1]], align 8528// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP2]], i32 0, i32 1529// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0530// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1531// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TMP5]]) #[[ATTR4]]532// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP4]], i32 0, i32 0533// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2534// CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]535// CHECK: arraydestroy.body:536// CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]537// CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1538// CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]539// CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]540// CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]541// CHECK: arraydestroy.done2:542// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[RETVAL]], align 4543// CHECK-NEXT: ret i32 [[TMP7]]544//545//546// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev547// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {548// CHECK-NEXT: entry:549// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8550// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8551// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8552// CHECK-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR4]]553// CHECK-NEXT: ret void554//555//556// CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v557// CHECK-SAME: () #[[ATTR1]] {558// CHECK-NEXT: entry:559// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4560// CHECK-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4561// CHECK-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 4562// CHECK-NEXT: [[T_VAR:%.*]] = alloca i32, align 128563// CHECK-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4564// CHECK-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4565// CHECK-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4566// CHECK-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8567// CHECK-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])568// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)569// CHECK-NEXT: store i32 0, ptr [[T_VAR]], align 128570// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)571// CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)572// CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1573// CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)574// CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)575// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 128576// CHECK-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4577// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8578// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[VEC]], i64 [[TMP1]], ptr [[S_ARR]], ptr [[VAR]])579// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4580// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]581// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0582// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2583// CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]584// CHECK: arraydestroy.body:585// CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]586// CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1587// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]588// CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]589// CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]590// CHECK: arraydestroy.done1:591// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]592// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR4]]593// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[RETVAL]], align 4594// CHECK-NEXT: ret i32 [[TMP3]]595//596//597// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev598// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {599// CHECK-NEXT: entry:600// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8601// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8602// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8603// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0604// CHECK-NEXT: store double 0.000000e+00, ptr [[F]], align 8605// CHECK-NEXT: ret void606//607//608// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d609// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {610// CHECK-NEXT: entry:611// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8612// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8613// CHECK-NEXT: [[T_ADDR:%.*]] = alloca double, align 8614// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8615// CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8616// CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8617// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8618// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0619// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8620// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0621// CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8622// CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8623// CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]624// CHECK-NEXT: store double [[ADD]], ptr [[F]], align 8625// CHECK-NEXT: ret void626//627//628// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed629// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {630// CHECK-NEXT: entry:631// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8632// CHECK-NEXT: [[A_ADDR:%.*]] = alloca double, align 8633// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8634// CHECK-NEXT: store double [[A]], ptr [[A_ADDR]], align 8635// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8636// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0637// CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8638// CHECK-NEXT: store double [[TMP0]], ptr [[F]], align 8639// CHECK-NEXT: ret void640//641//642// CHECK-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev643// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {644// CHECK-NEXT: entry:645// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8646// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8647// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8648// CHECK-NEXT: ret void649//650//651// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev652// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {653// CHECK-NEXT: entry:654// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8655// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8656// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8657// CHECK-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])658// CHECK-NEXT: ret void659//660//661// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i662// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {663// CHECK-NEXT: entry:664// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8665// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8666// CHECK-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4667// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8668// CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8669// CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4670// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8671// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8672// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 4673// CHECK-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])674// CHECK-NEXT: ret void675//676//677// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei678// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {679// CHECK-NEXT: entry:680// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8681// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4682// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8683// CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4684// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8685// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4686// CHECK-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])687// CHECK-NEXT: ret void688//689//690// CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined691// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {692// CHECK-NEXT: entry:693// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8694// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8695// CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8696// CHECK-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8697// CHECK-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8698// CHECK-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8699// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8700// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4701// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8702// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8703// CHECK-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8704// CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8705// CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8706// CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8707// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8708// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8709// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8710// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8711// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4712// CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])713// CHECK-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0714// CHECK-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]715// CHECK: omp_if.then:716// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[AGG_CAPTURED]], i32 0, i32 0717// CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8718// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[AGG_CAPTURED]], i32 0, i32 1719// CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8720// CHECK-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])721// CHECK-NEXT: [[TMP9:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP4]], i32 9, i64 256, i64 16, ptr @.omp_task_entry..3)722// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP9]], i32 0, i32 0723// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP10]], i32 0, i32 0724// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 128725// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP12]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)726// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP9]], i32 0, i32 2727// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP13]], i32 0, i32 0728// CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4729// CHECK-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 128730// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 1731// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP16]], ptr align 4 [[TMP0]], i64 8, i1 false)732// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 2733// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP17]], i32 0, i32 0734// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2735// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP18]]736// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]737// CHECK: omp.arraycpy.body:738// CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]739// CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]740// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 noundef 0)741// CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1742// CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1743// CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP18]]744// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]]745// CHECK: omp.arraycpy.done1:746// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 3747// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP19]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], i32 noundef 0)748// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 3749// CHECK-NEXT: store ptr @.omp_task_destructor..5, ptr [[TMP20]], align 8750// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 5751// CHECK-NEXT: store i64 0, ptr [[TMP21]], align 8752// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 6753// CHECK-NEXT: store i64 9, ptr [[TMP22]], align 16754// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 7755// CHECK-NEXT: store i64 1, ptr [[TMP23]], align 8756// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 9757// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 8, i1 false)758// CHECK-NEXT: [[TMP25:%.*]] = load i64, ptr [[TMP23]], align 8759// CHECK-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP4]], ptr [[TMP9]], i32 1, ptr [[TMP21]], ptr [[TMP22]], i64 [[TMP25]], i32 1, i32 0, i64 0, ptr @.omp_task_dup..4)760// CHECK-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])761// CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP4]])762// CHECK-NEXT: br label [[OMP_IF_END]]763// CHECK: omp_if.end:764// CHECK-NEXT: ret void765//766//767// CHECK-LABEL: define {{[^@]+}}@.omp_task_privates_map..2768// CHECK-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]], ptr noalias noundef [[TMP3:%.*]], ptr noalias noundef [[TMP4:%.*]]) #[[ATTR6]] {769// CHECK-NEXT: entry:770// CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8771// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8772// CHECK-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8773// CHECK-NEXT: [[DOTADDR3:%.*]] = alloca ptr, align 8774// CHECK-NEXT: [[DOTADDR4:%.*]] = alloca ptr, align 8775// CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8776// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8777// CHECK-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8778// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTADDR3]], align 8779// CHECK-NEXT: store ptr [[TMP4]], ptr [[DOTADDR4]], align 8780// CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR]], align 8781// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP5]], i32 0, i32 0782// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR1]], align 8783// CHECK-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8784// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 1785// CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTADDR2]], align 8786// CHECK-NEXT: store ptr [[TMP8]], ptr [[TMP9]], align 8787// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 2788// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTADDR3]], align 8789// CHECK-NEXT: store ptr [[TMP10]], ptr [[TMP11]], align 8790// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 3791// CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTADDR4]], align 8792// CHECK-NEXT: store ptr [[TMP12]], ptr [[TMP13]], align 8793// CHECK-NEXT: ret void794//795//796// CHECK-LABEL: define {{[^@]+}}@.omp_task_entry..3797// CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {798// CHECK-NEXT: entry:799// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4800// CHECK-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8801// CHECK-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8802// CHECK-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8803// CHECK-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8804// CHECK-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8805// CHECK-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8806// CHECK-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8807// CHECK-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4808// CHECK-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8809// CHECK-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8810// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8811// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8812// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca ptr, align 8813// CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca ptr, align 8814// CHECK-NEXT: [[I_I:%.*]] = alloca i32, align 4815// CHECK-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4816// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4817// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8818// CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4819// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8820// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4821// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8822// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP3]], i32 0, i32 0823// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2824// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0825// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128826// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP3]], i32 0, i32 2827// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5828// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8829// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6830// CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 16831// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7832// CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8833// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8834// CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 64835// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9836// CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8837// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])838// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])839// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])840// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])841// CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])842// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META28:![0-9]+]]843// CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META28]]844// CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META28]]845// CHECK-NEXT: store ptr @.omp_task_privates_map..2, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META28]]846// CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META28]]847// CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]848// CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]849// CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META28]]850// CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META28]]851// CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META28]]852// CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]853// CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META28]]854// CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META28]]855// CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META28]]856// CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]857// CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META28]]858// CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META28]]859// CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias [[META28]]860// CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias [[META28]]861// CHECK-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META28]]862// CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32863// CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]864// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]865// CHECK: omp.inner.for.cond.i:866// CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]867// CHECK-NEXT: [[CONV4_I:%.*]] = sext i32 [[TMP27]] to i64868// CHECK-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META28]]869// CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV4_I]], [[TMP28]]870// CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]871// CHECK: omp.inner.for.body.i:872// CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]873// CHECK-NEXT: store i32 [[TMP29]], ptr [[I_I]], align 4, !noalias [[META28]]874// CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP22]], align 128875// CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP23]], align 4876// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP24]], ptr align 4 [[TMP25]], i64 4, i1 false)877// CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]878// CHECK-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP31]], 1879// CHECK-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META28]]880// CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]]881// CHECK: .omp_outlined..1.exit:882// CHECK-NEXT: ret i32 0883//884//885// CHECK-LABEL: define {{[^@]+}}@.omp_task_dup..4886// CHECK-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {887// CHECK-NEXT: entry:888// CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8889// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8890// CHECK-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4891// CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8892// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8893// CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTADDR2]], align 4894// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8895// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8896// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP4]], i32 0, i32 0897// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 0898// CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128899// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP3]], i32 0, i32 2900// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP8]], i32 0, i32 2901// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1:%.*]], ptr [[TMP7]], i32 0, i32 0902// CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8903// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP9]], i32 0, i32 0904// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2905// CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]906// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE3:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]907// CHECK: omp.arraycpy.body:908// CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]909// CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]910// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 noundef 0)911// CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1912// CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1913// CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]]914// CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE3]], label [[OMP_ARRAYCPY_BODY]]915// CHECK: omp.arraycpy.done3:916// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP8]], i32 0, i32 3917// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON_1]], ptr [[TMP7]], i32 0, i32 1918// CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8919// CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]], i32 noundef 0)920// CHECK-NEXT: ret void921//922//923// CHECK-LABEL: define {{[^@]+}}@.omp_task_destructor..5924// CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {925// CHECK-NEXT: entry:926// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4927// CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4928// CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8929// CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4930// CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8931// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR1]], align 8932// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP2]], i32 0, i32 2933// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP3]], i32 0, i32 2934// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP3]], i32 0, i32 3935// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]]) #[[ATTR4]]936// CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP4]], i32 0, i32 0937// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2938// CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]939// CHECK: arraydestroy.body:940// CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]941// CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1942// CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]943// CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]944// CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]945// CHECK: arraydestroy.done2:946// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[RETVAL]], align 4947// CHECK-NEXT: ret i32 [[TMP7]]948//949//950// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev951// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {952// CHECK-NEXT: entry:953// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8954// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8955// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8956// CHECK-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]957// CHECK-NEXT: ret void958//959//960// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev961// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {962// CHECK-NEXT: entry:963// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8964// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8965// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8966// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0967// CHECK-NEXT: store i32 0, ptr [[F]], align 4968// CHECK-NEXT: ret void969//970//971// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i972// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {973// CHECK-NEXT: entry:974// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8975// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8976// CHECK-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4977// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8978// CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8979// CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4980// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8981// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0982// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8983// CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0984// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4985// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4986// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]987// CHECK-NEXT: store i32 [[ADD]], ptr [[F]], align 4988// CHECK-NEXT: ret void989//990//991// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei992// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {993// CHECK-NEXT: entry:994// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8995// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4996// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8997// CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4998// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8999// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01000// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41001// CHECK-NEXT: store i32 [[TMP0]], ptr [[F]], align 41002// CHECK-NEXT: ret void1003//1004//1005// CHECK-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1006// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1007// CHECK-NEXT: entry:1008// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81009// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81010// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81011// CHECK-NEXT: ret void1012//1013//1014// LAMBDA-LABEL: define {{[^@]+}}@main1015// LAMBDA-SAME: () #[[ATTR0:[0-9]+]] {1016// LAMBDA-NEXT: entry:1017// LAMBDA-NEXT: [[RETVAL:%.*]] = alloca i32, align 41018// LAMBDA-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 11019// LAMBDA-NEXT: store i32 0, ptr [[RETVAL]], align 41020// LAMBDA-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])1021// LAMBDA-NEXT: ret i32 01022//1023//1024// LAMBDA-LABEL: define {{[^@]+}}@.omp_task_privates_map.1025// LAMBDA-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {1026// LAMBDA-NEXT: entry:1027// LAMBDA-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81028// LAMBDA-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81029// LAMBDA-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 81030// LAMBDA-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81031// LAMBDA-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81032// LAMBDA-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 81033// LAMBDA-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 81034// LAMBDA-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 01035// LAMBDA-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 81036// LAMBDA-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 81037// LAMBDA-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 11038// LAMBDA-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 81039// LAMBDA-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 81040// LAMBDA-NEXT: ret void1041//1042//1043// LAMBDA-LABEL: define {{[^@]+}}@.omp_task_entry.1044// LAMBDA-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {1045// LAMBDA-NEXT: entry:1046// LAMBDA-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 41047// LAMBDA-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 81048// LAMBDA-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 81049// LAMBDA-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 81050// LAMBDA-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 81051// LAMBDA-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 81052// LAMBDA-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 81053// LAMBDA-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 81054// LAMBDA-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 41055// LAMBDA-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 81056// LAMBDA-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 81057// LAMBDA-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 81058// LAMBDA-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 81059// LAMBDA-NEXT: [[I_I:%.*]] = alloca i32, align 41060// LAMBDA-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 41061// LAMBDA-NEXT: [[REF_TMP_I:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 81062// LAMBDA-NEXT: [[DOTADDR:%.*]] = alloca i32, align 41063// LAMBDA-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81064// LAMBDA-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 41065// LAMBDA-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81066// LAMBDA-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 41067// LAMBDA-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81068// LAMBDA-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 01069// LAMBDA-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 21070// LAMBDA-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 01071// LAMBDA-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81072// LAMBDA-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 11073// LAMBDA-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 51074// LAMBDA-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 81075// LAMBDA-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 61076// LAMBDA-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 81077// LAMBDA-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 71078// LAMBDA-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 81079// LAMBDA-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 81080// LAMBDA-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 81081// LAMBDA-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 91082// LAMBDA-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 81083// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])1084// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])1085// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])1086// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])1087// LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])1088// LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]1089// LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]1090// LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1091// LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1092// LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]1093// LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1094// LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1095// LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]1096// LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]1097// LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]1098// LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1099// LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1100// LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1101// LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1102// LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]1103// LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]1104// LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]1105// LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1106// LAMBDA-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i321107// LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1108// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]1109// LAMBDA: omp.inner.for.cond.i:1110// LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1111// LAMBDA-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i641112// LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1113// LAMBDA-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]1114// LAMBDA-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]1115// LAMBDA: omp.inner.for.body.i:1116// LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1117// LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META14]]1118// LAMBDA-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 81119// LAMBDA-NEXT: store i32 11, ptr [[TMP23]], align 41120// LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias [[META14]]1121// LAMBDA-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 11122// LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias [[META14]]1123// LAMBDA-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]])1124// LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1125// LAMBDA-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 11126// LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1127// LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I]]1128// LAMBDA: .omp_outlined..exit:1129// LAMBDA-NEXT: ret i32 01130//1131//1132// BLOCKS-LABEL: define {{[^@]+}}@main1133// BLOCKS-SAME: () #[[ATTR1:[0-9]+]] {1134// BLOCKS-NEXT: entry:1135// BLOCKS-NEXT: [[RETVAL:%.*]] = alloca i32, align 41136// BLOCKS-NEXT: store i32 0, ptr [[RETVAL]], align 41137// BLOCKS-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds nuw ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 81138// BLOCKS-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)1139// BLOCKS-NEXT: ret i32 01140//1141//1142// BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke1143// BLOCKS-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {1144// BLOCKS-NEXT: entry:1145// BLOCKS-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 81146// BLOCKS-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 81147// BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 81148// BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 81149// BLOCKS-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @__main_block_invoke.omp_outlined)1150// BLOCKS-NEXT: ret void1151//1152//1153// BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined1154// BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {1155// BLOCKS-NEXT: entry:1156// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81157// BLOCKS-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81158// BLOCKS-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 11159// BLOCKS-NEXT: [[TMP:%.*]] = alloca i32, align 41160// BLOCKS-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81161// BLOCKS-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81162// BLOCKS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81163// BLOCKS-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41164// BLOCKS-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])1165// BLOCKS-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 01166// BLOCKS-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]1167// BLOCKS: omp_if.then:1168// BLOCKS-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])1169// BLOCKS-NEXT: [[TMP4:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i64 96, i64 1, ptr @.omp_task_entry.)1170// BLOCKS-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP4]], i32 0, i32 01171// BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP4]], i32 0, i32 11172// BLOCKS-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP6]], i32 0, i32 01173// BLOCKS-NEXT: [[TMP8:%.*]] = load volatile double, ptr @g, align 81174// BLOCKS-NEXT: store volatile double [[TMP8]], ptr [[TMP7]], align 81175// BLOCKS-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 11176// BLOCKS-NEXT: [[TMP10:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 41177// BLOCKS-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 81178// BLOCKS-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 51179// BLOCKS-NEXT: store i64 0, ptr [[TMP11]], align 81180// BLOCKS-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 61181// BLOCKS-NEXT: store i64 9, ptr [[TMP12]], align 81182// BLOCKS-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 71183// BLOCKS-NEXT: store i64 1, ptr [[TMP13]], align 81184// BLOCKS-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 91185// BLOCKS-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP14]], i8 0, i64 8, i1 false)1186// BLOCKS-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP13]], align 81187// BLOCKS-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[TMP4]], i32 1, ptr [[TMP11]], ptr [[TMP12]], i64 [[TMP15]], i32 1, i32 0, i64 0, ptr null)1188// BLOCKS-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])1189// BLOCKS-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])1190// BLOCKS-NEXT: br label [[OMP_IF_END]]1191// BLOCKS: omp_if.end:1192// BLOCKS-NEXT: ret void1193//1194//1195// BLOCKS-LABEL: define {{[^@]+}}@_block_invoke1196// BLOCKS-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {1197// BLOCKS-NEXT: entry:1198// BLOCKS-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 81199// BLOCKS-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 81200// BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 81201// BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 81202// BLOCKS-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 51203// BLOCKS-NEXT: store double 2.000000e+00, ptr [[BLOCK_CAPTURE_ADDR]], align 81204// BLOCKS-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 61205// BLOCKS-NEXT: store i32 22, ptr [[BLOCK_CAPTURE_ADDR1]], align 81206// BLOCKS-NEXT: ret void1207//1208//1209// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_privates_map.1210// BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {1211// BLOCKS-NEXT: entry:1212// BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81213// BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81214// BLOCKS-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 81215// BLOCKS-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81216// BLOCKS-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81217// BLOCKS-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 81218// BLOCKS-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 81219// BLOCKS-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 01220// BLOCKS-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 81221// BLOCKS-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 81222// BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 11223// BLOCKS-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 81224// BLOCKS-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 81225// BLOCKS-NEXT: ret void1226//1227//1228// BLOCKS-LABEL: define {{[^@]+}}@.omp_task_entry.1229// BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {1230// BLOCKS-NEXT: entry:1231// BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 41232// BLOCKS-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 81233// BLOCKS-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 81234// BLOCKS-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 81235// BLOCKS-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 81236// BLOCKS-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 81237// BLOCKS-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 81238// BLOCKS-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 81239// BLOCKS-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 41240// BLOCKS-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 81241// BLOCKS-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 81242// BLOCKS-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 81243// BLOCKS-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 81244// BLOCKS-NEXT: [[I_I:%.*]] = alloca i32, align 41245// BLOCKS-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 41246// BLOCKS-NEXT: [[BLOCK_I:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, double, i32 }>, align 81247// BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca i32, align 41248// BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81249// BLOCKS-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 41250// BLOCKS-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81251// BLOCKS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 41252// BLOCKS-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81253// BLOCKS-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 01254// BLOCKS-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 21255// BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 01256// BLOCKS-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81257// BLOCKS-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 11258// BLOCKS-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 51259// BLOCKS-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 81260// BLOCKS-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 61261// BLOCKS-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 81262// BLOCKS-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 71263// BLOCKS-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 81264// BLOCKS-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 81265// BLOCKS-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 81266// BLOCKS-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 91267// BLOCKS-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 81268// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])1269// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])1270// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])1271// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])1272// BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])1273// BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]1274// BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]1275// BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1276// BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1277// BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]1278// BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1279// BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1280// BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]1281// BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]1282// BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]1283// BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1284// BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1285// BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1286// BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1287// BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]1288// BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]1289// BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]1290// BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1291// BLOCKS-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i321292// BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1293// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]1294// BLOCKS: omp.inner.for.cond.i:1295// BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1296// BLOCKS-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i641297// BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1298// BLOCKS-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]1299// BLOCKS-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]1300// BLOCKS: omp.inner.for.body.i:1301// BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1302// BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias [[META14]]1303// BLOCKS-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 81304// BLOCKS-NEXT: store i32 11, ptr [[TMP23]], align 41305// BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias [[META14]]1306// BLOCKS-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 11307// BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias [[META14]]1308// BLOCKS-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 21309// BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias [[META14]]1310// BLOCKS-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 31311// BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias [[META14]]1312// BLOCKS-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 41313// BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias [[META14]]1314// BLOCKS-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 51315// BLOCKS-NEXT: [[TMP28:%.*]] = load volatile double, ptr [[TMP22]], align 81316// BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias [[META14]]1317// BLOCKS-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 61318// BLOCKS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 41319// BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias [[META14]]1320// BLOCKS-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 31321// BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias [[META14]]1322// BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR4]]1323// BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1324// BLOCKS-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP32]], 11325// BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1326// BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I]]1327// BLOCKS: .omp_outlined..exit:1328// BLOCKS-NEXT: ret i32 01329//1330//1331// ARRAY-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St1332// ARRAY-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR0:[0-9]+]] {1333// ARRAY-NEXT: entry:1334// ARRAY-NEXT: [[N_ADDR:%.*]] = alloca i32, align 41335// ARRAY-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81336// ARRAY-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81337// ARRAY-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 41338// ARRAY-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81339// ARRAY-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81340// ARRAY-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 41341// ARRAY-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i641342// ARRAY-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 81343// ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[S_ADDR]], align 81344// ARRAY-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 3, ptr @_Z10array_funciPfP2St.omp_outlined, i64 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]])1345// ARRAY-NEXT: ret void1346//1347//1348// ARRAY-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St.omp_outlined1349// ARRAY-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR1:[0-9]+]] {1350// ARRAY-NEXT: entry:1351// ARRAY-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81352// ARRAY-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81353// ARRAY-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 81354// ARRAY-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 81355// ARRAY-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81356// ARRAY-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 81357// ARRAY-NEXT: [[TMP:%.*]] = alloca i32, align 41358// ARRAY-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81359// ARRAY-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81360// ARRAY-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 81361// ARRAY-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 81362// ARRAY-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81363// ARRAY-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81364// ARRAY-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81365// ARRAY-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41366// ARRAY-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])1367// ARRAY-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 01368// ARRAY-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]1369// ARRAY: omp_if.then:1370// ARRAY-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 01371// ARRAY-NEXT: store i64 [[TMP0]], ptr [[TMP5]], align 81372// ARRAY-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP2]])1373// ARRAY-NEXT: [[TMP6:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i64 96, i64 8, ptr @.omp_task_entry.)1374// ARRAY-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP6]], i32 0, i32 01375// ARRAY-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP7]], i32 0, i32 01376// ARRAY-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81377// ARRAY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP9]], ptr align 8 [[AGG_CAPTURED]], i64 8, i1 false)1378// ARRAY-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP6]], i32 0, i32 11379// ARRAY-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP10]], i32 0, i32 01380// ARRAY-NEXT: [[TMP12:%.*]] = load ptr, ptr [[A_ADDR]], align 81381// ARRAY-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 81382// ARRAY-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP10]], i32 0, i32 11383// ARRAY-NEXT: [[TMP14:%.*]] = load ptr, ptr [[S_ADDR]], align 81384// ARRAY-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 81385// ARRAY-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 51386// ARRAY-NEXT: store i64 0, ptr [[TMP15]], align 81387// ARRAY-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 61388// ARRAY-NEXT: store i64 9, ptr [[TMP16]], align 81389// ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 71390// ARRAY-NEXT: store i64 1, ptr [[TMP17]], align 81391// ARRAY-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 91392// ARRAY-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP18]], i8 0, i64 8, i1 false)1393// ARRAY-NEXT: [[TMP19:%.*]] = load i64, ptr [[TMP17]], align 81394// ARRAY-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP2]], ptr [[TMP6]], i32 1, ptr [[TMP15]], ptr [[TMP16]], i64 [[TMP19]], i32 1, i32 0, i64 0, ptr null)1395// ARRAY-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP2]])1396// ARRAY-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])1397// ARRAY-NEXT: br label [[OMP_IF_END]]1398// ARRAY: omp_if.end:1399// ARRAY-NEXT: ret void1400//1401//1402// ARRAY-LABEL: define {{[^@]+}}@.omp_task_privates_map.1403// ARRAY-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR4:[0-9]+]] {1404// ARRAY-NEXT: entry:1405// ARRAY-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81406// ARRAY-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81407// ARRAY-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 81408// ARRAY-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81409// ARRAY-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81410// ARRAY-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 81411// ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 81412// ARRAY-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 01413// ARRAY-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 81414// ARRAY-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 81415// ARRAY-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 11416// ARRAY-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 81417// ARRAY-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 81418// ARRAY-NEXT: ret void1419//1420//1421// ARRAY-LABEL: define {{[^@]+}}@.omp_task_entry.1422// ARRAY-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {1423// ARRAY-NEXT: entry:1424// ARRAY-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 41425// ARRAY-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 81426// ARRAY-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 81427// ARRAY-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 81428// ARRAY-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 81429// ARRAY-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 81430// ARRAY-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 81431// ARRAY-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 81432// ARRAY-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 41433// ARRAY-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 81434// ARRAY-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 81435// ARRAY-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 81436// ARRAY-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 81437// ARRAY-NEXT: [[I_I:%.*]] = alloca i32, align 41438// ARRAY-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 41439// ARRAY-NEXT: [[DOTADDR:%.*]] = alloca i32, align 41440// ARRAY-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81441// ARRAY-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 41442// ARRAY-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81443// ARRAY-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 41444// ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81445// ARRAY-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 01446// ARRAY-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 21447// ARRAY-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 01448// ARRAY-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81449// ARRAY-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 11450// ARRAY-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 51451// ARRAY-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 81452// ARRAY-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 61453// ARRAY-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 81454// ARRAY-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 71455// ARRAY-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 81456// ARRAY-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 81457// ARRAY-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 81458// ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 91459// ARRAY-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 81460// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])1461// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])1462// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])1463// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])1464// ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])1465// ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]1466// ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]1467// ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1468// ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1469// ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]1470// ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1471// ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1472// ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]1473// ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]1474// ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]1475// ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1476// ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]1477// ARRAY-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 81478// ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]1479// ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]1480// ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]1481// ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]1482// ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]1483// ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]1484// ARRAY-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP25]] to i321485// ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1486// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]1487// ARRAY: omp.inner.for.cond.i:1488// ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1489// ARRAY-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP26]] to i641490// ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]1491// ARRAY-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP27]]1492// ARRAY-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]1493// ARRAY: omp.inner.for.body.i:1494// ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1495// ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias [[META14]]1496// ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1497// ARRAY-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 11498// ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]1499// ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I]]1500// ARRAY: .omp_outlined..exit:1501// ARRAY-NEXT: ret i32 01502//1503//1504// SIMD-ONLY0-LABEL: define {{[^@]+}}@main1505// SIMD-ONLY0-SAME: () #[[ATTR0:[0-9]+]] {1506// SIMD-ONLY0-NEXT: entry:1507// SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 41508// SIMD-ONLY0-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 81509// SIMD-ONLY0-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 81510// SIMD-ONLY0-NEXT: [[T_VAR:%.*]] = alloca i32, align 41511// SIMD-ONLY0-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41512// SIMD-ONLY0-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 161513// SIMD-ONLY0-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 81514// SIMD-ONLY0-NEXT: [[I:%.*]] = alloca i32, align 41515// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 41516// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])1517// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)1518// SIMD-ONLY0-NEXT: store i32 0, ptr [[T_VAR]], align 41519// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1520// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[S_ARR]], double noundef 1.000000e+00)1521// SIMD-ONLY0-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11522// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)1523// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)1524// SIMD-ONLY0-NEXT: store i32 0, ptr [[I]], align 41525// SIMD-ONLY0-NEXT: br label [[FOR_COND:%.*]]1526// SIMD-ONLY0: for.cond:1527// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 41528// SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 101529// SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1530// SIMD-ONLY0: for.body:1531// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41532// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 01533// SIMD-ONLY0-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 41534// SIMD-ONLY0-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 01535// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX1]], ptr align 8 [[VAR]], i64 8, i1 false)1536// SIMD-ONLY0-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 41537// SIMD-ONLY0-NEXT: br label [[FOR_INC:%.*]]1538// SIMD-ONLY0: for.inc:1539// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 41540// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 11541// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 41542// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]1543// SIMD-ONLY0: for.end:1544// SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1545// SIMD-ONLY0-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41546// SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR3:[0-9]+]]1547// SIMD-ONLY0-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01548// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21549// SIMD-ONLY0-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1550// SIMD-ONLY0: arraydestroy.body:1551// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1552// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11553// SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1554// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1555// SIMD-ONLY0-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1556// SIMD-ONLY0: arraydestroy.done2:1557// SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR3]]1558// SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR3]]1559// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 41560// SIMD-ONLY0-NEXT: ret i32 [[TMP4]]1561//1562//1563// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev1564// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {1565// SIMD-ONLY0-NEXT: entry:1566// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81567// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81568// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81569// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])1570// SIMD-ONLY0-NEXT: ret void1571//1572//1573// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d1574// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1575// SIMD-ONLY0-NEXT: entry:1576// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81577// SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81578// SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca double, align 81579// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81580// SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81581// SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 81582// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81583// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 81584// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 81585// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])1586// SIMD-ONLY0-NEXT: ret void1587//1588//1589// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed1590// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1591// SIMD-ONLY0-NEXT: entry:1592// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81593// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca double, align 81594// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81595// SIMD-ONLY0-NEXT: store double [[A]], ptr [[A_ADDR]], align 81596// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81597// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 81598// SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])1599// SIMD-ONLY0-NEXT: ret void1600//1601//1602// SIMD-ONLY0-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1603// SIMD-ONLY0-SAME: () #[[ATTR1]] {1604// SIMD-ONLY0-NEXT: entry:1605// SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 41606// SIMD-ONLY0-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41607// SIMD-ONLY0-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 41608// SIMD-ONLY0-NEXT: [[T_VAR:%.*]] = alloca i32, align 1281609// SIMD-ONLY0-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41610// SIMD-ONLY0-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41611// SIMD-ONLY0-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 41612// SIMD-ONLY0-NEXT: [[I:%.*]] = alloca i32, align 41613// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])1614// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)1615// SIMD-ONLY0-NEXT: store i32 0, ptr [[T_VAR]], align 1281616// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)1617// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1618// SIMD-ONLY0-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 11619// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1620// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)1621// SIMD-ONLY0-NEXT: store i32 0, ptr [[I]], align 41622// SIMD-ONLY0-NEXT: br label [[FOR_COND:%.*]]1623// SIMD-ONLY0: for.cond:1624// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 41625// SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 101626// SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1627// SIMD-ONLY0: for.body:1628// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 1281629// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 01630// SIMD-ONLY0-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 41631// SIMD-ONLY0-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 01632// SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i64 4, i1 false)1633// SIMD-ONLY0-NEXT: br label [[FOR_INC:%.*]]1634// SIMD-ONLY0: for.inc:1635// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 41636// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 11637// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 41638// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1639// SIMD-ONLY0: for.end:1640// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 41641// SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR3]]1642// SIMD-ONLY0-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01643// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21644// SIMD-ONLY0-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1645// SIMD-ONLY0: arraydestroy.body:1646// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1647// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11648// SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1649// SIMD-ONLY0-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1650// SIMD-ONLY0-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1651// SIMD-ONLY0: arraydestroy.done2:1652// SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]1653// SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR3]]1654// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 41655// SIMD-ONLY0-NEXT: ret i32 [[TMP4]]1656//1657//1658// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev1659// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1660// SIMD-ONLY0-NEXT: entry:1661// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81662// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81663// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81664// SIMD-ONLY0-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR3]]1665// SIMD-ONLY0-NEXT: ret void1666//1667//1668// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev1669// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1670// SIMD-ONLY0-NEXT: entry:1671// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81672// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81673// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81674// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01675// SIMD-ONLY0-NEXT: store double 0.000000e+00, ptr [[F]], align 81676// SIMD-ONLY0-NEXT: ret void1677//1678//1679// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev1680// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1681// SIMD-ONLY0-NEXT: entry:1682// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81683// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81684// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81685// SIMD-ONLY0-NEXT: ret void1686//1687//1688// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d1689// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1690// SIMD-ONLY0-NEXT: entry:1691// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81692// SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81693// SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca double, align 81694// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81695// SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81696// SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 81697// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81698// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01699// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 81700// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 01701// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 81702// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 81703// SIMD-ONLY0-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]1704// SIMD-ONLY0-NEXT: store double [[ADD]], ptr [[F]], align 81705// SIMD-ONLY0-NEXT: ret void1706//1707//1708// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed1709// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1710// SIMD-ONLY0-NEXT: entry:1711// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81712// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca double, align 81713// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81714// SIMD-ONLY0-NEXT: store double [[A]], ptr [[A_ADDR]], align 81715// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81716// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01717// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 81718// SIMD-ONLY0-NEXT: store double [[TMP0]], ptr [[F]], align 81719// SIMD-ONLY0-NEXT: ret void1720//1721//1722// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1723// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1724// SIMD-ONLY0-NEXT: entry:1725// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81726// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81727// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81728// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1729// SIMD-ONLY0-NEXT: ret void1730//1731//1732// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i1733// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1734// SIMD-ONLY0-NEXT: entry:1735// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81736// SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81737// SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca i32, align 41738// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81739// SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81740// SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 41741// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81742// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 81743// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 41744// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])1745// SIMD-ONLY0-NEXT: ret void1746//1747//1748// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1749// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1750// SIMD-ONLY0-NEXT: entry:1751// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81752// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41753// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81754// SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41755// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81756// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41757// SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1758// SIMD-ONLY0-NEXT: ret void1759//1760//1761// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1762// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1763// SIMD-ONLY0-NEXT: entry:1764// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81765// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81766// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81767// SIMD-ONLY0-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]1768// SIMD-ONLY0-NEXT: ret void1769//1770//1771// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1772// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1773// SIMD-ONLY0-NEXT: entry:1774// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81775// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81776// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81777// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01778// SIMD-ONLY0-NEXT: store i32 0, ptr [[F]], align 41779// SIMD-ONLY0-NEXT: ret void1780//1781//1782// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i1783// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1784// SIMD-ONLY0-NEXT: entry:1785// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81786// SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81787// SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca i32, align 41788// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81789// SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81790// SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 41791// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81792// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01793// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 81794// SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 01795// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 41796// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 41797// SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]1798// SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[F]], align 41799// SIMD-ONLY0-NEXT: ret void1800//1801//1802// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1803// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1804// SIMD-ONLY0-NEXT: entry:1805// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81806// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41807// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81808// SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41809// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81810// SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01811// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41812// SIMD-ONLY0-NEXT: store i32 [[TMP0]], ptr [[F]], align 41813// SIMD-ONLY0-NEXT: ret void1814//1815//1816// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1817// SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1818// SIMD-ONLY0-NEXT: entry:1819// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81820// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81821// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81822// SIMD-ONLY0-NEXT: ret void1823//1824//1825// SIMD-ONLY1-LABEL: define {{[^@]+}}@main1826// SIMD-ONLY1-SAME: () #[[ATTR0:[0-9]+]] {1827// SIMD-ONLY1-NEXT: entry:1828// SIMD-ONLY1-NEXT: [[RETVAL:%.*]] = alloca i32, align 41829// SIMD-ONLY1-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 81830// SIMD-ONLY1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 81831// SIMD-ONLY1-NEXT: [[T_VAR:%.*]] = alloca i32, align 41832// SIMD-ONLY1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41833// SIMD-ONLY1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 161834// SIMD-ONLY1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 81835// SIMD-ONLY1-NEXT: [[I:%.*]] = alloca i32, align 41836// SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 41837// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])1838// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)1839// SIMD-ONLY1-NEXT: store i32 0, ptr [[T_VAR]], align 41840// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1841// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[S_ARR]], double noundef 1.000000e+00)1842// SIMD-ONLY1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11843// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)1844// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)1845// SIMD-ONLY1-NEXT: store i32 0, ptr [[I]], align 41846// SIMD-ONLY1-NEXT: br label [[FOR_COND:%.*]]1847// SIMD-ONLY1: for.cond:1848// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 41849// SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 101850// SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1851// SIMD-ONLY1: for.body:1852// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41853// SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 01854// SIMD-ONLY1-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 41855// SIMD-ONLY1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 01856// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX1]], ptr align 8 [[VAR]], i64 8, i1 false)1857// SIMD-ONLY1-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 41858// SIMD-ONLY1-NEXT: br label [[FOR_INC:%.*]]1859// SIMD-ONLY1: for.inc:1860// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 41861// SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 11862// SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 41863// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]1864// SIMD-ONLY1: for.end:1865// SIMD-ONLY1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1866// SIMD-ONLY1-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41867// SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR3:[0-9]+]]1868// SIMD-ONLY1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01869// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21870// SIMD-ONLY1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1871// SIMD-ONLY1: arraydestroy.body:1872// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1873// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11874// SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1875// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1876// SIMD-ONLY1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1877// SIMD-ONLY1: arraydestroy.done2:1878// SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR3]]1879// SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR3]]1880// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 41881// SIMD-ONLY1-NEXT: ret i32 [[TMP4]]1882//1883//1884// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev1885// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {1886// SIMD-ONLY1-NEXT: entry:1887// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81888// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81889// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81890// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])1891// SIMD-ONLY1-NEXT: ret void1892//1893//1894// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d1895// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1896// SIMD-ONLY1-NEXT: entry:1897// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81898// SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 81899// SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca double, align 81900// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81901// SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 81902// SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 81903// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81904// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 81905// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 81906// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])1907// SIMD-ONLY1-NEXT: ret void1908//1909//1910// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed1911// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1912// SIMD-ONLY1-NEXT: entry:1913// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81914// SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca double, align 81915// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81916// SIMD-ONLY1-NEXT: store double [[A]], ptr [[A_ADDR]], align 81917// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81918// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 81919// SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])1920// SIMD-ONLY1-NEXT: ret void1921//1922//1923// SIMD-ONLY1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1924// SIMD-ONLY1-SAME: () #[[ATTR1]] {1925// SIMD-ONLY1-NEXT: entry:1926// SIMD-ONLY1-NEXT: [[RETVAL:%.*]] = alloca i32, align 41927// SIMD-ONLY1-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41928// SIMD-ONLY1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 41929// SIMD-ONLY1-NEXT: [[T_VAR:%.*]] = alloca i32, align 1281930// SIMD-ONLY1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41931// SIMD-ONLY1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41932// SIMD-ONLY1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 41933// SIMD-ONLY1-NEXT: [[I:%.*]] = alloca i32, align 41934// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])1935// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)1936// SIMD-ONLY1-NEXT: store i32 0, ptr [[T_VAR]], align 1281937// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)1938// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1939// SIMD-ONLY1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 11940// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1941// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)1942// SIMD-ONLY1-NEXT: store i32 0, ptr [[I]], align 41943// SIMD-ONLY1-NEXT: br label [[FOR_COND:%.*]]1944// SIMD-ONLY1: for.cond:1945// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 41946// SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 101947// SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1948// SIMD-ONLY1: for.body:1949// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 1281950// SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 01951// SIMD-ONLY1-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 41952// SIMD-ONLY1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 01953// SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i64 4, i1 false)1954// SIMD-ONLY1-NEXT: br label [[FOR_INC:%.*]]1955// SIMD-ONLY1: for.inc:1956// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 41957// SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 11958// SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 41959// SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1960// SIMD-ONLY1: for.end:1961// SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 41962// SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR3]]1963// SIMD-ONLY1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01964// SIMD-ONLY1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21965// SIMD-ONLY1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1966// SIMD-ONLY1: arraydestroy.body:1967// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1968// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11969// SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]1970// SIMD-ONLY1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1971// SIMD-ONLY1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1972// SIMD-ONLY1: arraydestroy.done2:1973// SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]1974// SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR3]]1975// SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 41976// SIMD-ONLY1-NEXT: ret i32 [[TMP4]]1977//1978//1979// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev1980// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1981// SIMD-ONLY1-NEXT: entry:1982// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81983// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81984// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81985// SIMD-ONLY1-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR3]]1986// SIMD-ONLY1-NEXT: ret void1987//1988//1989// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev1990// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {1991// SIMD-ONLY1-NEXT: entry:1992// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81993// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81994// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81995// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01996// SIMD-ONLY1-NEXT: store double 0.000000e+00, ptr [[F]], align 81997// SIMD-ONLY1-NEXT: ret void1998//1999//2000// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev2001// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2002// SIMD-ONLY1-NEXT: entry:2003// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82004// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82005// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82006// SIMD-ONLY1-NEXT: ret void2007//2008//2009// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d2010// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2011// SIMD-ONLY1-NEXT: entry:2012// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82013// SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 82014// SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca double, align 82015// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82016// SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 82017// SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 82018// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82019// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02020// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 82021// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 02022// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 82023// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 82024// SIMD-ONLY1-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]2025// SIMD-ONLY1-NEXT: store double [[ADD]], ptr [[F]], align 82026// SIMD-ONLY1-NEXT: ret void2027//2028//2029// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed2030// SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2031// SIMD-ONLY1-NEXT: entry:2032// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82033// SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca double, align 82034// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82035// SIMD-ONLY1-NEXT: store double [[A]], ptr [[A_ADDR]], align 82036// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82037// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02038// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 82039// SIMD-ONLY1-NEXT: store double [[TMP0]], ptr [[F]], align 82040// SIMD-ONLY1-NEXT: ret void2041//2042//2043// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2044// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2045// SIMD-ONLY1-NEXT: entry:2046// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82047// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82048// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82049// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2050// SIMD-ONLY1-NEXT: ret void2051//2052//2053// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i2054// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2055// SIMD-ONLY1-NEXT: entry:2056// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82057// SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 82058// SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca i32, align 42059// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82060// SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 82061// SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 42062// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82063// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 82064// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 42065// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])2066// SIMD-ONLY1-NEXT: ret void2067//2068//2069// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2070// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2071// SIMD-ONLY1-NEXT: entry:2072// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82073// SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42074// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82075// SIMD-ONLY1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42076// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82077// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42078// SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2079// SIMD-ONLY1-NEXT: ret void2080//2081//2082// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2083// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2084// SIMD-ONLY1-NEXT: entry:2085// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82086// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82087// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82088// SIMD-ONLY1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2089// SIMD-ONLY1-NEXT: ret void2090//2091//2092// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2093// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2094// SIMD-ONLY1-NEXT: entry:2095// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82096// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82097// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82098// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02099// SIMD-ONLY1-NEXT: store i32 0, ptr [[F]], align 42100// SIMD-ONLY1-NEXT: ret void2101//2102//2103// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i2104// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2105// SIMD-ONLY1-NEXT: entry:2106// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82107// SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 82108// SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca i32, align 42109// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82110// SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 82111// SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 42112// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82113// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02114// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 82115// SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 02116// SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 42117// SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 42118// SIMD-ONLY1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]2119// SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[F]], align 42120// SIMD-ONLY1-NEXT: ret void2121//2122//2123// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2124// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2125// SIMD-ONLY1-NEXT: entry:2126// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82127// SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42128// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82129// SIMD-ONLY1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42130// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82131// SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02132// SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42133// SIMD-ONLY1-NEXT: store i32 [[TMP0]], ptr [[F]], align 42134// SIMD-ONLY1-NEXT: ret void2135//2136//2137// SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2138// SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2139// SIMD-ONLY1-NEXT: entry:2140// SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82141// SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82142// SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82143// SIMD-ONLY1-NEXT: ret void2144//2145//2146// SIMD-ONLY2-LABEL: define {{[^@]+}}@main2147// SIMD-ONLY2-SAME: () #[[ATTR0:[0-9]+]] {2148// SIMD-ONLY2-NEXT: entry:2149// SIMD-ONLY2-NEXT: [[RETVAL:%.*]] = alloca i32, align 42150// SIMD-ONLY2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 12151// SIMD-ONLY2-NEXT: store i32 0, ptr [[RETVAL]], align 42152// SIMD-ONLY2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])2153// SIMD-ONLY2-NEXT: ret i32 02154//2155//2156// SIMD-ONLY3-LABEL: define {{[^@]+}}@main2157// SIMD-ONLY3-SAME: () #[[ATTR1:[0-9]+]] {2158// SIMD-ONLY3-NEXT: entry:2159// SIMD-ONLY3-NEXT: [[RETVAL:%.*]] = alloca i32, align 42160// SIMD-ONLY3-NEXT: store i32 0, ptr [[RETVAL]], align 42161// SIMD-ONLY3-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds nuw ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 82162// SIMD-ONLY3-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)2163// SIMD-ONLY3-NEXT: ret i32 02164//2165//2166// SIMD-ONLY3-LABEL: define {{[^@]+}}@__main_block_invoke2167// SIMD-ONLY3-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {2168// SIMD-ONLY3-NEXT: entry:2169// SIMD-ONLY3-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82170// SIMD-ONLY3-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 82171// SIMD-ONLY3-NEXT: [[I:%.*]] = alloca i32, align 42172// SIMD-ONLY3-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, double, i32 }>, align 82173// SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82174// SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82175// SIMD-ONLY3-NEXT: store i32 0, ptr [[I]], align 42176// SIMD-ONLY3-NEXT: br label [[FOR_COND:%.*]]2177// SIMD-ONLY3: for.cond:2178// SIMD-ONLY3-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 42179// SIMD-ONLY3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 102180// SIMD-ONLY3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]2181// SIMD-ONLY3: for.body:2182// SIMD-ONLY3-NEXT: store double 1.000000e+00, ptr @g, align 82183// SIMD-ONLY3-NEXT: store i32 11, ptr @_ZZ4mainE5sivar, align 42184// SIMD-ONLY3-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 02185// SIMD-ONLY3-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 82186// SIMD-ONLY3-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 12187// SIMD-ONLY3-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82188// SIMD-ONLY3-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 22189// SIMD-ONLY3-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 42190// SIMD-ONLY3-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 32191// SIMD-ONLY3-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 82192// SIMD-ONLY3-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 42193// SIMD-ONLY3-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 82194// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 52195// SIMD-ONLY3-NEXT: [[TMP1:%.*]] = load volatile double, ptr @g, align 82196// SIMD-ONLY3-NEXT: store volatile double [[TMP1]], ptr [[BLOCK_CAPTURED]], align 82197// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 62198// SIMD-ONLY3-NEXT: [[TMP2:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 42199// SIMD-ONLY3-NEXT: store i32 [[TMP2]], ptr [[BLOCK_CAPTURED1]], align 82200// SIMD-ONLY3-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32201// SIMD-ONLY3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 82202// SIMD-ONLY3-NEXT: call void [[TMP4]](ptr noundef [[BLOCK]])2203// SIMD-ONLY3-NEXT: br label [[FOR_INC:%.*]]2204// SIMD-ONLY3: for.inc:2205// SIMD-ONLY3-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 42206// SIMD-ONLY3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 12207// SIMD-ONLY3-NEXT: store i32 [[INC]], ptr [[I]], align 42208// SIMD-ONLY3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]2209// SIMD-ONLY3: for.end:2210// SIMD-ONLY3-NEXT: ret void2211//2212//2213// SIMD-ONLY3-LABEL: define {{[^@]+}}@__main_block_invoke_22214// SIMD-ONLY3-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {2215// SIMD-ONLY3-NEXT: entry:2216// SIMD-ONLY3-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82217// SIMD-ONLY3-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 82218// SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82219// SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82220// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 52221// SIMD-ONLY3-NEXT: store double 2.000000e+00, ptr [[BLOCK_CAPTURE_ADDR]], align 82222// SIMD-ONLY3-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62223// SIMD-ONLY3-NEXT: store i32 22, ptr [[BLOCK_CAPTURE_ADDR1]], align 82224// SIMD-ONLY3-NEXT: ret void2225//2226//2227// SIMD-ONLY4-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St2228// SIMD-ONLY4-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR0:[0-9]+]] {2229// SIMD-ONLY4-NEXT: entry:2230// SIMD-ONLY4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 42231// SIMD-ONLY4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 82232// SIMD-ONLY4-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 82233// SIMD-ONLY4-NEXT: [[I:%.*]] = alloca i32, align 42234// SIMD-ONLY4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 42235// SIMD-ONLY4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 82236// SIMD-ONLY4-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 82237// SIMD-ONLY4-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 42238// SIMD-ONLY4-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i642239// SIMD-ONLY4-NEXT: store i32 0, ptr [[I]], align 42240// SIMD-ONLY4-NEXT: br label [[FOR_COND:%.*]]2241// SIMD-ONLY4: for.cond:2242// SIMD-ONLY4-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 42243// SIMD-ONLY4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 102244// SIMD-ONLY4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]2245// SIMD-ONLY4: for.body:2246// SIMD-ONLY4-NEXT: br label [[FOR_INC:%.*]]2247// SIMD-ONLY4: for.inc:2248// SIMD-ONLY4-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 42249// SIMD-ONLY4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 12250// SIMD-ONLY4-NEXT: store i32 [[INC]], ptr [[I]], align 42251// SIMD-ONLY4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]2252// SIMD-ONLY4: for.end:2253// SIMD-ONLY4-NEXT: ret void2254//2255