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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK47 8// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s10// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"11// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// expected-no-diagnostics14#ifndef HEADER15#define HEADER16 17volatile int g __attribute__((aligned(128))) = 1212;18 19template <class T>20struct S {21  T f;22  S(T a) : f(a + g) {}23  S() : f(g) {}24  operator T() { return T(); }25  S &operator&(const S &) { return *this; }26  ~S() {}27};28 29struct SS {30  int a;31  int b : 4;32  int &c;33  SS(int &d) : a(0), b(0), c(d) {34#pragma omp parallel reduction(default, +: a, b, c)35#ifdef LAMBDA36    [&]() {37      ++this->a, --b, (this)->c /= 1;38#pragma omp parallel reduction(&: a, b, c)39      ++(this)->a, --b, this->c /= 1;40    }();41#elif defined(BLOCKS)42    ^{43      ++a;44      --this->b;45      (this)->c /= 1;46#pragma omp parallel reduction(-: a, b, c)47      ++(this)->a, --b, this->c /= 1;48    }();49#else50    ++this->a, --b, c /= 1;51#endif52  }53};54 55template<typename T>56struct SST {57  T a;58  SST() : a(T()) {59#pragma omp parallel reduction(*: a)60#ifdef LAMBDA61    [&]() {62      [&]() {63        ++this->a;64#pragma omp parallel reduction(&& :a)65        ++(this)->a;66      }();67    }();68#elif defined(BLOCKS)69    ^{70      ^{71        ++a;72#pragma omp parallel reduction(|: a)73        ++(this)->a;74      }();75    }();76#else77    ++(this)->a;78#endif79  }80};81 82 83void foo_array_sect(short x[1]) {84#pragma omp parallel reduction(default, + : x[:])85  {}86}87 88template <typename T>89T tmain() {90  T t;91  S<T> test;92  SST<T> sst;93  T t_var __attribute__((aligned(128))) = T(), t_var1 __attribute__((aligned(128)));94  T vec[] = {1, 2};95  S<T> s_arr[]  = {1, 2};96  S<T> var __attribute__((aligned(128))) (3), var1 __attribute__((aligned(128)));97#pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)98  {99    vec[0] = t_var;100    s_arr[0] = var;101  }102  return T();103}104 105int sivar;106int main() {107  SS ss(sivar);108#ifdef LAMBDA109  [&]() {110#pragma omp parallel reduction(+:g)111  {112 113 114 115 116    // Reduction list for runtime.117 118    g = 1;119 120    [&]() {121      g = 2;122    }();123  }124  }();125  return 0;126#elif defined(BLOCKS)127  ^{128#pragma omp parallel reduction(-:g)129  {130 131    // Reduction list for runtime.132 133    g = 1;134 135    ^{136      g = 2;137    }();138  }139  }();140  return 0;141 142 143#else144  S<float> test;145  float t_var = 0, t_var1;146  int vec[] = {1, 2};147  S<float> s_arr[] = {1, 2};148  S<float> var(3), var1;149  float _Complex cf;150#pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)151  {152    vec[0] = t_var;153    s_arr[0] = var;154  }155  if (var1)156#pragma omp parallel reduction(+ : t_var) reduction(& : var) reduction(&& : var1) reduction(min : t_var1)157    while (1) {158      vec[0] = t_var;159      s_arr[0] = var;160    }161#pragma omp parallel reduction(+ : cf)162    ;163  return tmain<int>();164#endif165}166 167 168// Reduction list for runtime.169 170 171 172// For + reduction operation initial value of private variable is 0.173 174// For & reduction operation initial value of private variable is ones in all bits.175 176// For && reduction operation initial value of private variable is 1.0.177 178// For min reduction operation initial value of private variable is largest repesentable value.179 180// Skip checks for internal operations.181 182// ptr RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};183 184 185// res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);186 187 188// switch(res)189 190// case 1:191// t_var += t_var_reduction;192 193// var = var.operator &(var_reduction);194 195// var1 = var1.operator &&(var1_reduction);196 197// t_var1 = min(t_var1, t_var1_reduction);198 199// __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);200 201// break;202 203// case 2:204// t_var += t_var_reduction;205 206// var = var.operator &(var_reduction);207 208// var1 = var1.operator &&(var1_reduction);209 210// t_var1 = min(t_var1, t_var1_reduction);211 212// break;213 214 215// void reduce_func(ptr lhs[<n>], ptr rhs[<n>]) {216//  *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);217//  ...218//  *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],219//  *(Type<n>-1*)rhs[<n>-1]);220// }221// t_var_lhs = (ptr)lhs[0];222// t_var_rhs = (ptr)rhs[0];223 224// var_lhs = (Sptr)lhs[1];225// var_rhs = (Sptr)rhs[1];226 227// var1_lhs = (Sptr)lhs[2];228// var1_rhs = (Sptr)rhs[2];229 230// t_var1_lhs = (ptr)lhs[3];231// t_var1_rhs = (ptr)rhs[3];232 233// t_var_lhs += t_var_rhs;234 235// var_lhs = var_lhs.operator &(var_rhs);236 237// var1_lhs = var1_lhs.operator &&(var1_rhs);238 239// t_var1_lhs = min(t_var1_lhs, t_var1_rhs);240 241 242 243 244// For + reduction operation initial value of private variable is 0.245 246// For & reduction operation initial value of private variable is ones in all bits.247 248// For && reduction operation initial value of private variable is 1.0.249 250// For min reduction operation initial value of private variable is largest repesentable value.251 252 253 254 255 256 257// Reduction list for runtime.258 259 260 261// For + reduction operation initial value of private variable is 0.262 263// For & reduction operation initial value of private variable is ones in all bits.264 265// For && reduction operation initial value of private variable is 1.0.266 267// For min reduction operation initial value of private variable is largest repesentable value.268 269// Skip checks for internal operations.270 271// ptr RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};272 273 274// res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);275 276 277// switch(res)278 279// case 1:280// t_var += t_var_reduction;281 282// var = var.operator &(var_reduction);283 284// var1 = var1.operator &&(var1_reduction);285 286// t_var1 = min(t_var1, t_var1_reduction);287 288// __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);289 290// break;291 292// case 2:293// t_var += t_var_reduction;294 295// var = var.operator &(var_reduction);296 297// var1 = var1.operator &&(var1_reduction);298 299// t_var1 = min(t_var1, t_var1_reduction);300 301// break;302 303 304// void reduce_func(ptr lhs[<n>], ptr rhs[<n>]) {305//  *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);306//  ...307//  *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],308//  *(Type<n>-1*)rhs[<n>-1]);309// }310// t_var_lhs = (iptr)lhs[0];311// t_var_rhs = (iptr)rhs[0];312 313// var_lhs = (Sptr)lhs[1];314// var_rhs = (Sptr)rhs[1];315 316// var1_lhs = (Sptr)lhs[2];317// var1_rhs = (Sptr)rhs[2];318 319// t_var1_lhs = (iptr)lhs[3];320// t_var1_rhs = (iptr)rhs[3];321 322// t_var_lhs += t_var_rhs;323 324// var_lhs = var_lhs.operator &(var_rhs);325 326// var1_lhs = var1_lhs.operator &&(var1_rhs);327 328// t_var1_lhs = min(t_var1_lhs, t_var1_rhs);329 330#endif331// CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs332// CHECK1-SAME: (ptr noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {333// CHECK1-NEXT:  entry:334// CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8335// CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8336// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8337// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])338// CHECK1-NEXT:    ret void339//340//341// CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined342// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {343// CHECK1-NEXT:  entry:344// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8345// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8346// CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8347// CHECK1-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8348// CHECK1-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8349// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8350// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8351// CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 2352// CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i16, align 2353// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8354// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8355// CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8356// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8357// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP0]], i64 0358// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8359// CHECK1-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 0360// CHECK1-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i64361// CHECK1-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64362// CHECK1-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]363// CHECK1-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)364// CHECK1-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1365// CHECK1-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)366// CHECK1-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()367// CHECK1-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 8368// CHECK1-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16369// CHECK1-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 8370// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]371// CHECK1-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]372// CHECK1-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]373// CHECK1:       omp.arrayinit.body:374// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]375// CHECK1-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2376// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1377// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]378// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]379// CHECK1:       omp.arrayinit.done:380// CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 8381// CHECK1-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i64382// CHECK1-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64383// CHECK1-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]384// CHECK1-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)385// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]386// CHECK1-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 8387// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0388// CHECK1-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 8389// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1390// CHECK1-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr391// CHECK1-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8392// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8393// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4394// CHECK1-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)395// CHECK1-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [396// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]397// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]398// CHECK1-NEXT:    ]399// CHECK1:       .omp.reduction.case1:400// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]401// CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]402// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]403// CHECK1:       omp.arraycpy.body:404// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]405// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]406// CHECK1-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2407// CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i32408// CHECK1-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2409// CHECK1-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i32410// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]411// CHECK1-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i16412// CHECK1-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2413// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1414// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1415// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]416// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]417// CHECK1:       omp.arraycpy.done7:418// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)419// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]420// CHECK1:       .omp.reduction.case2:421// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]422// CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]423// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]424// CHECK1:       omp.arraycpy.body9:425// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]426// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]427// CHECK1-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2428// CHECK1-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i32429// CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2430// CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]431// CHECK1:       atomic_cont:432// CHECK1-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]433// CHECK1-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 2434// CHECK1-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 2435// CHECK1-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i32436// CHECK1-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2437// CHECK1-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i32438// CHECK1-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]439// CHECK1-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16440// CHECK1-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 2441// CHECK1-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 2442// CHECK1-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 2443// CHECK1-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 0444// CHECK1-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 1445// CHECK1-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]446// CHECK1:       atomic_exit:447// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1448// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1449// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]450// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]451// CHECK1:       omp.arraycpy.done21:452// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]453// CHECK1:       .omp.reduction.default:454// CHECK1-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8455// CHECK1-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])456// CHECK1-NEXT:    ret void457//458//459// CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func460// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {461// CHECK1-NEXT:  entry:462// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8463// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8464// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8465// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8466// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8467// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8468// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 0469// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8470// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 0471// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8472// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 1473// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8474// CHECK1-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i64475// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]476// CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]477// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]478// CHECK1:       omp.arraycpy.body:479// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]480// CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]481// CHECK1-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2482// CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i32483// CHECK1-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2484// CHECK1-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i32485// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]486// CHECK1-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i16487// CHECK1-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2488// CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1489// CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1490// CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]491// CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]492// CHECK1:       omp.arraycpy.done4:493// CHECK1-NEXT:    ret void494//495//496// CHECK1-LABEL: define {{[^@]+}}@main497// CHECK1-SAME: () #[[ATTR6:[0-9]+]] {498// CHECK1-NEXT:  entry:499// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4500// CHECK1-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8501// CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4502// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca float, align 4503// CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca float, align 4504// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4505// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4506// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4507// CHECK1-NEXT:    [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4508// CHECK1-NEXT:    [[CF:%.*]] = alloca { float, float }, align 4509// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4510// CHECK1-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)511// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])512// CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR]], align 4513// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)514// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)515// CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1516// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)517// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)518// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])519// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @main.omp_outlined, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])520// CHECK1-NEXT:    [[CALL:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])521// CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00522// CHECK1-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]523// CHECK1:       if.then:524// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @main.omp_outlined.1, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])525// CHECK1-NEXT:    br label [[IF_END]]526// CHECK1:       if.end:527// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @main.omp_outlined.2, ptr [[CF]])528// CHECK1-NEXT:    [[CALL1:%.*]] = call noundef i32 @_Z5tmainIiET_v()529// CHECK1-NEXT:    store i32 [[CALL1]], ptr [[RETVAL]], align 4530// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]]531// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]532// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0533// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2534// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]535// CHECK1:       arraydestroy.body:536// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]537// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1538// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]539// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]540// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]541// CHECK1:       arraydestroy.done2:542// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]543// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4544// CHECK1-NEXT:    ret i32 [[TMP1]]545//546//547// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi548// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR0]] align 2 {549// CHECK1-NEXT:  entry:550// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8551// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8552// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8553// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8554// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8555// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8556// CHECK1-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])557// CHECK1-NEXT:    ret void558//559//560// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev561// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {562// CHECK1-NEXT:  entry:563// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8564// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8565// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8566// CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])567// CHECK1-NEXT:    ret void568//569//570// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef571// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR0]] align 2 {572// CHECK1-NEXT:  entry:573// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8574// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4575// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8576// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4577// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8578// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4579// CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])580// CHECK1-NEXT:    ret void581//582//583// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined584// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {585// CHECK1-NEXT:  entry:586// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8587// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8588// CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8589// CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8590// CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8591// CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8592// CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 8593// CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 8594// CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca float, align 4595// CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4596// CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4597// CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca float, align 4598// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x ptr], align 8599// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4600// CHECK1-NEXT:    [[REF_TMP12:%.*]] = alloca [[STRUCT_S]], align 4601// CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca float, align 4602// CHECK1-NEXT:    [[TMP:%.*]] = alloca float, align 4603// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8604// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8605// CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8606// CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8607// CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8608// CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8609// CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 8610// CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8611// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8612// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8613// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8614// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8615// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8616// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8617// CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR2]], align 4618// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])619// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])620// CHECK1-NEXT:    store float 0x47EFFFFFE0000000, ptr [[T_VAR15]], align 4621// CHECK1-NEXT:    [[TMP6:%.*]] = load float, ptr [[T_VAR2]], align 4622// CHECK1-NEXT:    [[CONV:%.*]] = fptosi float [[TMP6]] to i32623// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 0624// CHECK1-NEXT:    store i32 [[CONV]], ptr [[ARRAYIDX]], align 4625// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i64 0, i64 0626// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR3]], i64 4, i1 false)627// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0628// CHECK1-NEXT:    store ptr [[T_VAR2]], ptr [[TMP7]], align 8629// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1630// CHECK1-NEXT:    store ptr [[VAR3]], ptr [[TMP8]], align 8631// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2632// CHECK1-NEXT:    store ptr [[VAR14]], ptr [[TMP9]], align 8633// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3634// CHECK1-NEXT:    store ptr [[T_VAR15]], ptr [[TMP10]], align 8635// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8636// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4637// CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], i32 4, i64 32, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @main.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)638// CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [639// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]640// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]641// CHECK1-NEXT:    ]642// CHECK1:       .omp.reduction.case1:643// CHECK1-NEXT:    [[TMP14:%.*]] = load float, ptr [[TMP1]], align 4644// CHECK1-NEXT:    [[TMP15:%.*]] = load float, ptr [[T_VAR2]], align 4645// CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP14]], [[TMP15]]646// CHECK1-NEXT:    store float [[ADD]], ptr [[TMP1]], align 4647// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])648// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[CALL]], i64 4, i1 false)649// CHECK1-NEXT:    [[CALL7:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])650// CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL7]], 0.000000e+00651// CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]652// CHECK1:       land.rhs:653// CHECK1-NEXT:    [[CALL8:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])654// CHECK1-NEXT:    [[TOBOOL9:%.*]] = fcmp une float [[CALL8]], 0.000000e+00655// CHECK1-NEXT:    br label [[LAND_END]]656// CHECK1:       land.end:657// CHECK1-NEXT:    [[TMP16:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]658// CHECK1-NEXT:    [[CONV10:%.*]] = uitofp i1 [[TMP16]] to float659// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV10]])660// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[REF_TMP]], i64 4, i1 false)661// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]662// CHECK1-NEXT:    [[TMP17:%.*]] = load float, ptr [[TMP5]], align 4663// CHECK1-NEXT:    [[TMP18:%.*]] = load float, ptr [[T_VAR15]], align 4664// CHECK1-NEXT:    [[CMP:%.*]] = fcmp olt float [[TMP17]], [[TMP18]]665// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]666// CHECK1:       cond.true:667// CHECK1-NEXT:    [[TMP19:%.*]] = load float, ptr [[TMP5]], align 4668// CHECK1-NEXT:    br label [[COND_END:%.*]]669// CHECK1:       cond.false:670// CHECK1-NEXT:    [[TMP20:%.*]] = load float, ptr [[T_VAR15]], align 4671// CHECK1-NEXT:    br label [[COND_END]]672// CHECK1:       cond.end:673// CHECK1-NEXT:    [[COND:%.*]] = phi float [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]674// CHECK1-NEXT:    store float [[COND]], ptr [[TMP5]], align 4675// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], ptr @.gomp_critical_user_.reduction.var)676// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]677// CHECK1:       .omp.reduction.case2:678// CHECK1-NEXT:    [[TMP21:%.*]] = load float, ptr [[T_VAR2]], align 4679// CHECK1-NEXT:    [[TMP22:%.*]] = atomicrmw fadd ptr [[TMP1]], float [[TMP21]] monotonic, align 4680// CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)681// CHECK1-NEXT:    [[CALL11:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])682// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[CALL11]], i64 4, i1 false)683// CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)684// CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)685// CHECK1-NEXT:    [[CALL13:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])686// CHECK1-NEXT:    [[TOBOOL14:%.*]] = fcmp une float [[CALL13]], 0.000000e+00687// CHECK1-NEXT:    br i1 [[TOBOOL14]], label [[LAND_RHS15:%.*]], label [[LAND_END18:%.*]]688// CHECK1:       land.rhs15:689// CHECK1-NEXT:    [[CALL16:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])690// CHECK1-NEXT:    [[TOBOOL17:%.*]] = fcmp une float [[CALL16]], 0.000000e+00691// CHECK1-NEXT:    br label [[LAND_END18]]692// CHECK1:       land.end18:693// CHECK1-NEXT:    [[TMP23:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL17]], [[LAND_RHS15]] ]694// CHECK1-NEXT:    [[CONV19:%.*]] = uitofp i1 [[TMP23]] to float695// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]], float noundef [[CONV19]])696// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[REF_TMP12]], i64 4, i1 false)697// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]]) #[[ATTR5]]698// CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)699// CHECK1-NEXT:    [[TMP24:%.*]] = load float, ptr [[T_VAR15]], align 4700// CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP5]] monotonic, align 4701// CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]702// CHECK1:       atomic_cont:703// CHECK1-NEXT:    [[TMP25:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[LAND_END18]] ], [ [[TMP33:%.*]], [[COND_END23:%.*]] ]704// CHECK1-NEXT:    [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float705// CHECK1-NEXT:    store float [[TMP26]], ptr [[TMP]], align 4706// CHECK1-NEXT:    [[TMP27:%.*]] = load float, ptr [[TMP]], align 4707// CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[T_VAR15]], align 4708// CHECK1-NEXT:    [[CMP20:%.*]] = fcmp olt float [[TMP27]], [[TMP28]]709// CHECK1-NEXT:    br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]]710// CHECK1:       cond.true21:711// CHECK1-NEXT:    [[TMP29:%.*]] = load float, ptr [[TMP]], align 4712// CHECK1-NEXT:    br label [[COND_END23]]713// CHECK1:       cond.false22:714// CHECK1-NEXT:    [[TMP30:%.*]] = load float, ptr [[T_VAR15]], align 4715// CHECK1-NEXT:    br label [[COND_END23]]716// CHECK1:       cond.end23:717// CHECK1-NEXT:    [[COND24:%.*]] = phi float [ [[TMP29]], [[COND_TRUE21]] ], [ [[TMP30]], [[COND_FALSE22]] ]718// CHECK1-NEXT:    store float [[COND24]], ptr [[ATOMIC_TEMP]], align 4719// CHECK1-NEXT:    [[TMP31:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4720// CHECK1-NEXT:    [[TMP32:%.*]] = cmpxchg ptr [[TMP5]], i32 [[TMP25]], i32 [[TMP31]] monotonic monotonic, align 4721// CHECK1-NEXT:    [[TMP33]] = extractvalue { i32, i1 } [[TMP32]], 0722// CHECK1-NEXT:    [[TMP34:%.*]] = extractvalue { i32, i1 } [[TMP32]], 1723// CHECK1-NEXT:    br i1 [[TMP34]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]724// CHECK1:       atomic_exit:725// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]726// CHECK1:       .omp.reduction.default:727// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]728// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]729// CHECK1-NEXT:    ret void730//731//732// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.omp.reduction.reduction_func733// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {734// CHECK1-NEXT:  entry:735// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8736// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8737// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4738// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8739// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8740// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8741// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8742// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 0743// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8744// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 0745// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8746// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 1747// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8748// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 1749// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8750// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 2751// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8752// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 2753// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8754// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 3755// CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8756// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 3757// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8758// CHECK1-NEXT:    [[TMP20:%.*]] = load float, ptr [[TMP7]], align 4759// CHECK1-NEXT:    [[TMP21:%.*]] = load float, ptr [[TMP5]], align 4760// CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP20]], [[TMP21]]761// CHECK1-NEXT:    store float [[ADD]], ptr [[TMP7]], align 4762// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP11]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP9]])763// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP11]], ptr align 4 [[CALL]], i64 4, i1 false)764// CHECK1-NEXT:    [[CALL2:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]])765// CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00766// CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]767// CHECK1:       land.rhs:768// CHECK1-NEXT:    [[CALL3:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]])769// CHECK1-NEXT:    [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00770// CHECK1-NEXT:    br label [[LAND_END]]771// CHECK1:       land.end:772// CHECK1-NEXT:    [[TMP22:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]773// CHECK1-NEXT:    [[CONV:%.*]] = uitofp i1 [[TMP22]] to float774// CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV]])775// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP15]], ptr align 4 [[REF_TMP]], i64 4, i1 false)776// CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]777// CHECK1-NEXT:    [[TMP23:%.*]] = load float, ptr [[TMP19]], align 4778// CHECK1-NEXT:    [[TMP24:%.*]] = load float, ptr [[TMP17]], align 4779// CHECK1-NEXT:    [[CMP:%.*]] = fcmp olt float [[TMP23]], [[TMP24]]780// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]781// CHECK1:       cond.true:782// CHECK1-NEXT:    [[TMP25:%.*]] = load float, ptr [[TMP19]], align 4783// CHECK1-NEXT:    br label [[COND_END:%.*]]784// CHECK1:       cond.false:785// CHECK1-NEXT:    [[TMP26:%.*]] = load float, ptr [[TMP17]], align 4786// CHECK1-NEXT:    br label [[COND_END]]787// CHECK1:       cond.end:788// CHECK1-NEXT:    [[COND:%.*]] = phi float [ [[TMP25]], [[COND_TRUE]] ], [ [[TMP26]], [[COND_FALSE]] ]789// CHECK1-NEXT:    store float [[COND]], ptr [[TMP19]], align 4790// CHECK1-NEXT:    ret void791//792//793// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_794// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {795// CHECK1-NEXT:  entry:796// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8797// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8798// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8799// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8800// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8801// CHECK1-NEXT:    ret ptr [[THIS1]]802//803//804// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv805// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {806// CHECK1-NEXT:  entry:807// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8808// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8809// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8810// CHECK1-NEXT:    ret float 0.000000e+00811//812//813// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev814// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {815// CHECK1-NEXT:  entry:816// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8817// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8818// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8819// CHECK1-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]820// CHECK1-NEXT:    ret void821//822//823// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1824// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {825// CHECK1-NEXT:  entry:826// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8827// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8828// CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8829// CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8830// CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8831// CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8832// CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 8833// CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 8834// CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca float, align 4835// CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4836// CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4837// CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca float, align 4838// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8839// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8840// CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8841// CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8842// CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8843// CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8844// CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 8845// CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8846// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8847// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8848// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8849// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8850// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8851// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8852// CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR2]], align 4853// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])854// CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])855// CHECK1-NEXT:    store float 0x47EFFFFFE0000000, ptr [[T_VAR15]], align 4856// CHECK1-NEXT:    br label [[WHILE_COND:%.*]]857// CHECK1:       while.cond:858// CHECK1-NEXT:    br label [[WHILE_BODY:%.*]]859// CHECK1:       while.body:860// CHECK1-NEXT:    [[TMP6:%.*]] = load float, ptr [[T_VAR2]], align 4861// CHECK1-NEXT:    [[CONV:%.*]] = fptosi float [[TMP6]] to i32862// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 0863// CHECK1-NEXT:    store i32 [[CONV]], ptr [[ARRAYIDX]], align 4864// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i64 0, i64 0865// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR3]], i64 4, i1 false)866// CHECK1-NEXT:    br label [[WHILE_COND]], !llvm.loop [[LOOP5:![0-9]+]]867//868//869// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2870// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] {871// CHECK1-NEXT:  entry:872// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8873// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8874// CHECK1-NEXT:    [[CF_ADDR:%.*]] = alloca ptr, align 8875// CHECK1-NEXT:    [[CF1:%.*]] = alloca { float, float }, align 4876// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8877// CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4878// CHECK1-NEXT:    [[ATOMIC_TEMP10:%.*]] = alloca { float, float }, align 4879// CHECK1-NEXT:    [[TMP:%.*]] = alloca { float, float }, align 4880// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8881// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8882// CHECK1-NEXT:    store ptr [[CF]], ptr [[CF_ADDR]], align 8883// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[CF_ADDR]], align 8884// CHECK1-NEXT:    [[CF1_REALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 0885// CHECK1-NEXT:    [[CF1_IMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 1886// CHECK1-NEXT:    store float 0.000000e+00, ptr [[CF1_REALP]], align 4887// CHECK1-NEXT:    store float 0.000000e+00, ptr [[CF1_IMAGP]], align 4888// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0889// CHECK1-NEXT:    store ptr [[CF1]], ptr [[TMP1]], align 8890// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8891// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4892// CHECK1-NEXT:    [[TMP4:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @main.omp_outlined.2.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)893// CHECK1-NEXT:    switch i32 [[TMP4]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [894// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]895// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]896// CHECK1-NEXT:    ]897// CHECK1:       .omp.reduction.case1:898// CHECK1-NEXT:    [[DOTREALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP0]], i32 0, i32 0899// CHECK1-NEXT:    [[DOTREAL:%.*]] = load float, ptr [[DOTREALP]], align 4900// CHECK1-NEXT:    [[DOTIMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP0]], i32 0, i32 1901// CHECK1-NEXT:    [[DOTIMAG:%.*]] = load float, ptr [[DOTIMAGP]], align 4902// CHECK1-NEXT:    [[CF1_REALP2:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 0903// CHECK1-NEXT:    [[CF1_REAL:%.*]] = load float, ptr [[CF1_REALP2]], align 4904// CHECK1-NEXT:    [[CF1_IMAGP3:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 1905// CHECK1-NEXT:    [[CF1_IMAG:%.*]] = load float, ptr [[CF1_IMAGP3]], align 4906// CHECK1-NEXT:    [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF1_REAL]]907// CHECK1-NEXT:    [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF1_IMAG]]908// CHECK1-NEXT:    [[DOTREALP4:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP0]], i32 0, i32 0909// CHECK1-NEXT:    [[DOTIMAGP5:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP0]], i32 0, i32 1910// CHECK1-NEXT:    store float [[ADD_R]], ptr [[DOTREALP4]], align 4911// CHECK1-NEXT:    store float [[ADD_I]], ptr [[DOTIMAGP5]], align 4912// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)913// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]914// CHECK1:       .omp.reduction.case2:915// CHECK1-NEXT:    [[CF1_REALP6:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 0916// CHECK1-NEXT:    [[CF1_REAL7:%.*]] = load float, ptr [[CF1_REALP6]], align 4917// CHECK1-NEXT:    [[CF1_IMAGP8:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 1918// CHECK1-NEXT:    [[CF1_IMAG9:%.*]] = load float, ptr [[CF1_IMAGP8]], align 4919// CHECK1-NEXT:    call void @__atomic_load(i64 noundef 8, ptr noundef [[TMP0]], ptr noundef [[ATOMIC_TEMP]], i32 noundef 0)920// CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]921// CHECK1:       atomic_cont:922// CHECK1-NEXT:    [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[ATOMIC_TEMP]], i32 0, i32 0923// CHECK1-NEXT:    [[ATOMIC_TEMP_REAL:%.*]] = load float, ptr [[ATOMIC_TEMP_REALP]], align 4924// CHECK1-NEXT:    [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[ATOMIC_TEMP]], i32 0, i32 1925// CHECK1-NEXT:    [[ATOMIC_TEMP_IMAG:%.*]] = load float, ptr [[ATOMIC_TEMP_IMAGP]], align 4926// CHECK1-NEXT:    [[TMP_REALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP]], i32 0, i32 0927// CHECK1-NEXT:    [[TMP_IMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP]], i32 0, i32 1928// CHECK1-NEXT:    store float [[ATOMIC_TEMP_REAL]], ptr [[TMP_REALP]], align 4929// CHECK1-NEXT:    store float [[ATOMIC_TEMP_IMAG]], ptr [[TMP_IMAGP]], align 4930// CHECK1-NEXT:    [[TMP_REALP11:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP]], i32 0, i32 0931// CHECK1-NEXT:    [[TMP_REAL:%.*]] = load float, ptr [[TMP_REALP11]], align 4932// CHECK1-NEXT:    [[TMP_IMAGP12:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP]], i32 0, i32 1933// CHECK1-NEXT:    [[TMP_IMAG:%.*]] = load float, ptr [[TMP_IMAGP12]], align 4934// CHECK1-NEXT:    [[CF1_REALP13:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 0935// CHECK1-NEXT:    [[CF1_REAL14:%.*]] = load float, ptr [[CF1_REALP13]], align 4936// CHECK1-NEXT:    [[CF1_IMAGP15:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[CF1]], i32 0, i32 1937// CHECK1-NEXT:    [[CF1_IMAG16:%.*]] = load float, ptr [[CF1_IMAGP15]], align 4938// CHECK1-NEXT:    [[ADD_R17:%.*]] = fadd float [[TMP_REAL]], [[CF1_REAL14]]939// CHECK1-NEXT:    [[ADD_I18:%.*]] = fadd float [[TMP_IMAG]], [[CF1_IMAG16]]940// CHECK1-NEXT:    [[ATOMIC_TEMP10_REALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[ATOMIC_TEMP10]], i32 0, i32 0941// CHECK1-NEXT:    [[ATOMIC_TEMP10_IMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[ATOMIC_TEMP10]], i32 0, i32 1942// CHECK1-NEXT:    store float [[ADD_R17]], ptr [[ATOMIC_TEMP10_REALP]], align 4943// CHECK1-NEXT:    store float [[ADD_I18]], ptr [[ATOMIC_TEMP10_IMAGP]], align 4944// CHECK1-NEXT:    [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[TMP0]], ptr noundef [[ATOMIC_TEMP]], ptr noundef [[ATOMIC_TEMP10]], i32 noundef 0, i32 noundef 0)945// CHECK1-NEXT:    br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]946// CHECK1:       atomic_exit:947// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]948// CHECK1:       .omp.reduction.default:949// CHECK1-NEXT:    ret void950//951//952// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2.omp.reduction.reduction_func953// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {954// CHECK1-NEXT:  entry:955// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8956// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8957// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8958// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8959// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8960// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8961// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0962// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8963// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0964// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8965// CHECK1-NEXT:    [[DOTREALP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP7]], i32 0, i32 0966// CHECK1-NEXT:    [[DOTREAL:%.*]] = load float, ptr [[DOTREALP]], align 4967// CHECK1-NEXT:    [[DOTIMAGP:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP7]], i32 0, i32 1968// CHECK1-NEXT:    [[DOTIMAG:%.*]] = load float, ptr [[DOTIMAGP]], align 4969// CHECK1-NEXT:    [[DOTREALP2:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP5]], i32 0, i32 0970// CHECK1-NEXT:    [[DOTREAL3:%.*]] = load float, ptr [[DOTREALP2]], align 4971// CHECK1-NEXT:    [[DOTIMAGP4:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP5]], i32 0, i32 1972// CHECK1-NEXT:    [[DOTIMAG5:%.*]] = load float, ptr [[DOTIMAGP4]], align 4973// CHECK1-NEXT:    [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]]974// CHECK1-NEXT:    [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]]975// CHECK1-NEXT:    [[DOTREALP6:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP7]], i32 0, i32 0976// CHECK1-NEXT:    [[DOTIMAGP7:%.*]] = getelementptr inbounds nuw { float, float }, ptr [[TMP7]], i32 0, i32 1977// CHECK1-NEXT:    store float [[ADD_R]], ptr [[DOTREALP6]], align 4978// CHECK1-NEXT:    store float [[ADD_I]], ptr [[DOTIMAGP7]], align 4979// CHECK1-NEXT:    ret void980//981//982// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v983// CHECK1-SAME: () #[[ATTR0]] {984// CHECK1-NEXT:  entry:985// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4986// CHECK1-NEXT:    [[T:%.*]] = alloca i32, align 4987// CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4988// CHECK1-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4989// CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128990// CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 128991// CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4992// CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4993// CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128994// CHECK1-NEXT:    [[VAR1:%.*]] = alloca [[STRUCT_S_0]], align 128995// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])996// CHECK1-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])997// CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 128998// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)999// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1000// CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 11001// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1002// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)1003// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])1004// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])1005// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 41006// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]]1007// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]1008// CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01009// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21010// CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1011// CHECK1:       arraydestroy.body:1012// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1013// CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11014// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]1015// CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1016// CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]1017// CHECK1:       arraydestroy.done1:1018// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]1019// CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 41020// CHECK1-NEXT:    ret i32 [[TMP1]]1021//1022//1023// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi1024// CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1025// CHECK1-NEXT:  entry:1026// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81027// CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 81028// CHECK1-NEXT:    [[A2:%.*]] = alloca ptr, align 81029// CHECK1-NEXT:    [[B4:%.*]] = alloca i32, align 41030// CHECK1-NEXT:    [[C5:%.*]] = alloca ptr, align 81031// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81032// CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 81033// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81034// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01035// CHECK1-NEXT:    store i32 0, ptr [[A]], align 81036// CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 11037// CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 41038// CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161039// CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 01040// CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 41041// CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21042// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81043// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[C]], align 81044// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01045// CHECK1-NEXT:    store ptr [[A3]], ptr [[A2]], align 81046// CHECK1-NEXT:    [[C6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21047// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 81048// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 81049// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 81050// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 81051// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])1052// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 41053// CHECK1-NEXT:    [[B7:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 11054// CHECK1-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i81055// CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 41056// CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 151057// CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -161058// CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]1059// CHECK1-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 41060// CHECK1-NEXT:    ret void1061//1062//1063// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined1064// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {1065// CHECK1-NEXT:  entry:1066// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81067// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81068// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81069// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81070// CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 81071// CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 81072// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 81073// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81074// CHECK1-NEXT:    [[A2:%.*]] = alloca i32, align 41075// CHECK1-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 81076// CHECK1-NEXT:    [[B4:%.*]] = alloca i32, align 41077// CHECK1-NEXT:    [[C5:%.*]] = alloca i32, align 41078// CHECK1-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81079// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 81080// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81081// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81082// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81083// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81084// CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 81085// CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 81086// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81087// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81088// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 81089// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 81090// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81091// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 81092// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81093// CHECK1-NEXT:    store i32 0, ptr [[A2]], align 41094// CHECK1-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 81095// CHECK1-NEXT:    store i32 0, ptr [[B4]], align 41096// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81097// CHECK1-NEXT:    store i32 0, ptr [[C5]], align 41098// CHECK1-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 81099// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 81100// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41101// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 11102// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 41103// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 41104// CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -11105// CHECK1-NEXT:    store i32 [[DEC]], ptr [[B4]], align 41106// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 81107// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41108// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 11109// CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 41110// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01111// CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 81112// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 11113// CHECK1-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 81114// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 21115// CHECK1-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 81116// CHECK1-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81117// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 41118// CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1119// CHECK1-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1120// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1121// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1122// CHECK1-NEXT:    ]1123// CHECK1:       .omp.reduction.case1:1124// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 41125// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 41126// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]1127// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 41128// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 41129// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 41130// CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]1131// CHECK1-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 41132// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 41133// CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 41134// CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]1135// CHECK1-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 41136// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)1137// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1138// CHECK1:       .omp.reduction.case2:1139// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 41140// CHECK1-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 41141// CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 41142// CHECK1-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 41143// CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 41144// CHECK1-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 41145// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1146// CHECK1:       .omp.reduction.default:1147// CHECK1-NEXT:    ret void1148//1149//1150// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func1151// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1152// CHECK1-NEXT:  entry:1153// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81154// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 81155// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81156// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 81157// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81158// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81159// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 01160// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81161// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 01162// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81163// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 11164// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81165// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 11166// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 81167// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 21168// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81169// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 21170// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 81171// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 41172// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 41173// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]1174// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 41175// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 41176// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 41177// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1178// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 41179// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 41180// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 41181// CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1182// CHECK1-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 41183// CHECK1-NEXT:    ret void1184//1185//1186// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1187// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1188// CHECK1-NEXT:  entry:1189// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81190// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81191// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81192// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01193// CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 1281194// CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float1195// CHECK1-NEXT:    store float [[CONV]], ptr [[F]], align 41196// CHECK1-NEXT:    ret void1197//1198//1199// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1200// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1201// CHECK1-NEXT:  entry:1202// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81203// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41204// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81205// CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41206// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81207// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01208// CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41209// CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 1281210// CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float1211// CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]1212// CHECK1-NEXT:    store float [[ADD]], ptr [[F]], align 41213// CHECK1-NEXT:    ret void1214//1215//1216// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1217// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1218// CHECK1-NEXT:  entry:1219// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81220// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81221// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81222// CHECK1-NEXT:    ret void1223//1224//1225// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1226// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1227// CHECK1-NEXT:  entry:1228// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81229// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81230// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81231// CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1232// CHECK1-NEXT:    ret void1233//1234//1235// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev1236// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1237// CHECK1-NEXT:  entry:1238// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81239// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81240// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81241// CHECK1-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1242// CHECK1-NEXT:    ret void1243//1244//1245// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1246// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1247// CHECK1-NEXT:  entry:1248// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81249// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41250// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81251// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41252// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81253// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41254// CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1255// CHECK1-NEXT:    ret void1256//1257//1258// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined1259// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {1260// CHECK1-NEXT:  entry:1261// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81262// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81263// CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 81264// CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 81265// CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 81266// CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 81267// CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 81268// CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 81269// CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 1281270// CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S_0:%.*]], align 1281271// CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S_0]], align 1281272// CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca i32, align 1281273// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x ptr], align 81274// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S_0]], align 41275// CHECK1-NEXT:    [[REF_TMP11:%.*]] = alloca [[STRUCT_S_0]], align 41276// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81277// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81278// CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 81279// CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 81280// CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81281// CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 81282// CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 81283// CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 81284// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 81285// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 81286// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 81287// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 81288// CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 81289// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 81290// CHECK1-NEXT:    store i32 0, ptr [[T_VAR2]], align 1281291// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])1292// CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])1293// CHECK1-NEXT:    store i32 2147483647, ptr [[T_VAR15]], align 1281294// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[T_VAR2]], align 1281295// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 01296// CHECK1-NEXT:    store i32 [[TMP6]], ptr [[ARRAYIDX]], align 41297// CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i64 0, i64 01298// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 128 [[VAR3]], i64 4, i1 false)1299// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01300// CHECK1-NEXT:    store ptr [[T_VAR2]], ptr [[TMP7]], align 81301// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 11302// CHECK1-NEXT:    store ptr [[VAR3]], ptr [[TMP8]], align 81303// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 21304// CHECK1-NEXT:    store ptr [[VAR14]], ptr [[TMP9]], align 81305// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 31306// CHECK1-NEXT:    store ptr [[T_VAR15]], ptr [[TMP10]], align 81307// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81308// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 41309// CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], i32 4, i64 32, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z5tmainIiET_v.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1310// CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1311// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1312// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1313// CHECK1-NEXT:    ]1314// CHECK1:       .omp.reduction.case1:1315// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP1]], align 1281316// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR2]], align 1281317// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]1318// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP1]], align 1281319// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])1320// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP3]], ptr align 4 [[CALL]], i64 4, i1 false)1321// CHECK1-NEXT:    [[CALL7:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])1322// CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[CALL7]], 01323// CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]1324// CHECK1:       land.rhs:1325// CHECK1-NEXT:    [[CALL8:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])1326// CHECK1-NEXT:    [[TOBOOL9:%.*]] = icmp ne i32 [[CALL8]], 01327// CHECK1-NEXT:    br label [[LAND_END]]1328// CHECK1:       land.end:1329// CHECK1-NEXT:    [[TMP16:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]1330// CHECK1-NEXT:    [[CONV:%.*]] = zext i1 [[TMP16]] to i321331// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])1332// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP4]], ptr align 4 [[REF_TMP]], i64 4, i1 false)1333// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]1334// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 1281335// CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[T_VAR15]], align 1281336// CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP17]], [[TMP18]]1337// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1338// CHECK1:       cond.true:1339// CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP5]], align 1281340// CHECK1-NEXT:    br label [[COND_END:%.*]]1341// CHECK1:       cond.false:1342// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[T_VAR15]], align 1281343// CHECK1-NEXT:    br label [[COND_END]]1344// CHECK1:       cond.end:1345// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]1346// CHECK1-NEXT:    store i32 [[COND]], ptr [[TMP5]], align 1281347// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], ptr @.gomp_critical_user_.reduction.var)1348// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1349// CHECK1:       .omp.reduction.case2:1350// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 1281351// CHECK1-NEXT:    [[TMP22:%.*]] = atomicrmw add ptr [[TMP1]], i32 [[TMP21]] monotonic, align 1281352// CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)1353// CHECK1-NEXT:    [[CALL10:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])1354// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP3]], ptr align 4 [[CALL10]], i64 4, i1 false)1355// CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)1356// CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)1357// CHECK1-NEXT:    [[CALL12:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])1358// CHECK1-NEXT:    [[TOBOOL13:%.*]] = icmp ne i32 [[CALL12]], 01359// CHECK1-NEXT:    br i1 [[TOBOOL13]], label [[LAND_RHS14:%.*]], label [[LAND_END17:%.*]]1360// CHECK1:       land.rhs14:1361// CHECK1-NEXT:    [[CALL15:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])1362// CHECK1-NEXT:    [[TOBOOL16:%.*]] = icmp ne i32 [[CALL15]], 01363// CHECK1-NEXT:    br label [[LAND_END17]]1364// CHECK1:       land.end17:1365// CHECK1-NEXT:    [[TMP23:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL16]], [[LAND_RHS14]] ]1366// CHECK1-NEXT:    [[CONV18:%.*]] = zext i1 [[TMP23]] to i321367// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]], i32 noundef [[CONV18]])1368// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP4]], ptr align 4 [[REF_TMP11]], i64 4, i1 false)1369// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]]) #[[ATTR5]]1370// CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)1371// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR15]], align 1281372// CHECK1-NEXT:    [[TMP25:%.*]] = atomicrmw min ptr [[TMP5]], i32 [[TMP24]] monotonic, align 1281373// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1374// CHECK1:       .omp.reduction.default:1375// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]1376// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]1377// CHECK1-NEXT:    ret void1378//1379//1380// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined.omp.reduction.reduction_func1381// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1382// CHECK1-NEXT:  entry:1383// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81384// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 81385// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41386// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81387// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 81388// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81389// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81390// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 01391// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81392// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 01393// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81394// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 11395// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81396// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 11397// CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 81398// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 21399// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81400// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 21401// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 81402// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 31403// CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 81404// CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 31405// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 81406// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP7]], align 1281407// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 1281408// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1409// CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 1281410// CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP11]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP9]])1411// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP11]], ptr align 4 [[CALL]], i64 4, i1 false)1412// CHECK1-NEXT:    [[CALL2:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]])1413// CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 01414// CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]1415// CHECK1:       land.rhs:1416// CHECK1-NEXT:    [[CALL3:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]])1417// CHECK1-NEXT:    [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 01418// CHECK1-NEXT:    br label [[LAND_END]]1419// CHECK1:       land.end:1420// CHECK1-NEXT:    [[TMP22:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]1421// CHECK1-NEXT:    [[CONV:%.*]] = zext i1 [[TMP22]] to i321422// CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])1423// CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP15]], ptr align 4 [[REF_TMP]], i64 4, i1 false)1424// CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]1425// CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP19]], align 1281426// CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP17]], align 1281427// CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP23]], [[TMP24]]1428// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1429// CHECK1:       cond.true:1430// CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP19]], align 1281431// CHECK1-NEXT:    br label [[COND_END:%.*]]1432// CHECK1:       cond.false:1433// CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP17]], align 1281434// CHECK1-NEXT:    br label [[COND_END]]1435// CHECK1:       cond.end:1436// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP25]], [[COND_TRUE]] ], [ [[TMP26]], [[COND_FALSE]] ]1437// CHECK1-NEXT:    store i32 [[COND]], ptr [[TMP19]], align 1281438// CHECK1-NEXT:    ret void1439//1440//1441// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_1442// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {1443// CHECK1-NEXT:  entry:1444// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81445// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81446// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81447// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81448// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81449// CHECK1-NEXT:    ret ptr [[THIS1]]1450//1451//1452// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv1453// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {1454// CHECK1-NEXT:  entry:1455// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81456// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81457// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81458// CHECK1-NEXT:    ret i32 01459//1460//1461// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1462// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1463// CHECK1-NEXT:  entry:1464// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81465// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81466// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81467// CHECK1-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]1468// CHECK1-NEXT:    ret void1469//1470//1471// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1472// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1473// CHECK1-NEXT:  entry:1474// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81475// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81476// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81477// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01478// CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 1281479// CHECK1-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41480// CHECK1-NEXT:    ret void1481//1482//1483// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev1484// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1485// CHECK1-NEXT:  entry:1486// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81487// CHECK1-NEXT:    [[A2:%.*]] = alloca ptr, align 81488// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81489// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81490// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 01491// CHECK1-NEXT:    store i32 0, ptr [[A]], align 41492// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SST]], ptr [[THIS1]], i32 0, i32 01493// CHECK1-NEXT:    store ptr [[A3]], ptr [[A2]], align 81494// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A2]], align 81495// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 2, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]], ptr [[TMP0]])1496// CHECK1-NEXT:    ret void1497//1498//1499// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined1500// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1]] {1501// CHECK1-NEXT:  entry:1502// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81503// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81504// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81505// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81506// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 81507// CHECK1-NEXT:    [[A1:%.*]] = alloca i32, align 41508// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 81509// CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81510// CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i32, align 41511// CHECK1-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41512// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81513// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81514// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81515// CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81516// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81517// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81518// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81519// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 81520// CHECK1-NEXT:    store i32 1, ptr [[A1]], align 41521// CHECK1-NEXT:    store ptr [[A1]], ptr [[_TMP2]], align 81522// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP2]], align 81523// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41524// CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 11525// CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 41526// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01527// CHECK1-NEXT:    store ptr [[A1]], ptr [[TMP5]], align 81528// CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81529// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41530// CHECK1-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP7]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN3SSTIiEC2Ev.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1531// CHECK1-NEXT:    switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1532// CHECK1-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1533// CHECK1-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1534// CHECK1-NEXT:    ]1535// CHECK1:       .omp.reduction.case1:1536// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 41537// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[A1]], align 41538// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]]1539// CHECK1-NEXT:    store i32 [[MUL]], ptr [[TMP2]], align 41540// CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP7]], ptr @.gomp_critical_user_.reduction.var)1541// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1542// CHECK1:       .omp.reduction.case2:1543// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[A1]], align 41544// CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP2]] monotonic, align 41545// CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]1546// CHECK1:       atomic_cont:1547// CHECK1-NEXT:    [[TMP12:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP17:%.*]], [[ATOMIC_CONT]] ]1548// CHECK1-NEXT:    store i32 [[TMP12]], ptr [[_TMP3]], align 41549// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[_TMP3]], align 41550// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[A1]], align 41551// CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[TMP13]], [[TMP14]]1552// CHECK1-NEXT:    store i32 [[MUL4]], ptr [[ATOMIC_TEMP]], align 41553// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 41554// CHECK1-NEXT:    [[TMP16:%.*]] = cmpxchg ptr [[TMP2]], i32 [[TMP12]], i32 [[TMP15]] monotonic monotonic, align 41555// CHECK1-NEXT:    [[TMP17]] = extractvalue { i32, i1 } [[TMP16]], 01556// CHECK1-NEXT:    [[TMP18:%.*]] = extractvalue { i32, i1 } [[TMP16]], 11557// CHECK1-NEXT:    br i1 [[TMP18]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]1558// CHECK1:       atomic_exit:1559// CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1560// CHECK1:       .omp.reduction.default:1561// CHECK1-NEXT:    ret void1562//1563//1564// CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined.omp.reduction.reduction_func1565// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1566// CHECK1-NEXT:  entry:1567// CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81568// CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 81569// CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81570// CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 81571// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81572// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81573// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01574// CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81575// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01576// CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81577// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41578// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41579// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]1580// CHECK1-NEXT:    store i32 [[MUL]], ptr [[TMP7]], align 41581// CHECK1-NEXT:    ret void1582//1583//1584// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1585// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1586// CHECK1-NEXT:  entry:1587// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81588// CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41589// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81590// CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41591// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81592// CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01593// CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41594// CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 1281595// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]1596// CHECK1-NEXT:    store i32 [[ADD]], ptr [[F]], align 41597// CHECK1-NEXT:    ret void1598//1599//1600// CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1601// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1602// CHECK1-NEXT:  entry:1603// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81604// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81605// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81606// CHECK1-NEXT:    ret void1607//1608//1609// CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs1610// CHECK3-SAME: (ptr noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {1611// CHECK3-NEXT:  entry:1612// CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 81613// CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 81614// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 81615// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])1616// CHECK3-NEXT:    ret void1617//1618//1619// CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined1620// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {1621// CHECK3-NEXT:  entry:1622// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81623// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81624// CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 81625// CHECK3-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 81626// CHECK3-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 81627// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 81628// CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 81629// CHECK3-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 21630// CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i16, align 21631// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81632// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81633// CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 81634// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 81635// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP0]], i64 01636// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 81637// CHECK3-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 01638// CHECK3-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i641639// CHECK3-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i641640// CHECK3-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]1641// CHECK3-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)1642// CHECK3-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 11643// CHECK3-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)1644// CHECK3-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()1645// CHECK3-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 81646// CHECK3-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 161647// CHECK3-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 81648// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]1649// CHECK3-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]1650// CHECK3-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]1651// CHECK3:       omp.arrayinit.body:1652// CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]1653// CHECK3-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 21654// CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11655// CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]1656// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]1657// CHECK3:       omp.arrayinit.done:1658// CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 81659// CHECK3-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i641660// CHECK3-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i641661// CHECK3-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]1662// CHECK3-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)1663// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]1664// CHECK3-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 81665// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01666// CHECK3-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 81667// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 11668// CHECK3-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr1669// CHECK3-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 81670// CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81671// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 41672// CHECK3-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1673// CHECK3-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1674// CHECK3-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1675// CHECK3-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1676// CHECK3-NEXT:    ]1677// CHECK3:       .omp.reduction.case1:1678// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]1679// CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]1680// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1681// CHECK3:       omp.arraycpy.body:1682// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1683// CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]1684// CHECK3-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 21685// CHECK3-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i321686// CHECK3-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 21687// CHECK3-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i321688// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]1689// CHECK3-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i161690// CHECK3-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 21691// CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 11692// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11693// CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]1694// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]1695// CHECK3:       omp.arraycpy.done7:1696// CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)1697// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1698// CHECK3:       .omp.reduction.case2:1699// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]1700// CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]1701// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]1702// CHECK3:       omp.arraycpy.body9:1703// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]1704// CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]1705// CHECK3-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 21706// CHECK3-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i321707// CHECK3-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 21708// CHECK3-NEXT:    br label [[ATOMIC_CONT:%.*]]1709// CHECK3:       atomic_cont:1710// CHECK3-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]1711// CHECK3-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 21712// CHECK3-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 21713// CHECK3-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i321714// CHECK3-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 21715// CHECK3-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i321716// CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]1717// CHECK3-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i161718// CHECK3-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 21719// CHECK3-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 21720// CHECK3-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 21721// CHECK3-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 01722// CHECK3-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 11723// CHECK3-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]1724// CHECK3:       atomic_exit:1725// CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 11726// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 11727// CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]1728// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]1729// CHECK3:       omp.arraycpy.done21:1730// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1731// CHECK3:       .omp.reduction.default:1732// CHECK3-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 81733// CHECK3-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])1734// CHECK3-NEXT:    ret void1735//1736//1737// CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func1738// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {1739// CHECK3-NEXT:  entry:1740// CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81741// CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 81742// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81743// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 81744// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81745// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81746// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 01747// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81748// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 01749// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81750// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 11751// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81752// CHECK3-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i641753// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]1754// CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]1755// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1756// CHECK3:       omp.arraycpy.body:1757// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1758// CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1759// CHECK3-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 21760// CHECK3-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i321761// CHECK3-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 21762// CHECK3-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i321763// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]1764// CHECK3-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i161765// CHECK3-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 21766// CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11767// CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11768// CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]1769// CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]1770// CHECK3:       omp.arraycpy.done4:1771// CHECK3-NEXT:    ret void1772//1773//1774// CHECK3-LABEL: define {{[^@]+}}@main1775// CHECK3-SAME: () #[[ATTR6:[0-9]+]] {1776// CHECK3-NEXT:  entry:1777// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41778// CHECK3-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 81779// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 11780// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 41781// CHECK3-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)1782// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])1783// CHECK3-NEXT:    ret i32 01784//1785//1786// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi1787// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1788// CHECK3-NEXT:  entry:1789// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81790// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 81791// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81792// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 81793// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81794// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81795// CHECK3-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])1796// CHECK3-NEXT:    ret void1797//1798//1799// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi1800// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR0]] align 2 {1801// CHECK3-NEXT:  entry:1802// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81803// CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 81804// CHECK3-NEXT:    [[A2:%.*]] = alloca ptr, align 81805// CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 41806// CHECK3-NEXT:    [[C5:%.*]] = alloca ptr, align 81807// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81808// CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 81809// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81810// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01811// CHECK3-NEXT:    store i32 0, ptr [[A]], align 81812// CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 11813// CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 41814// CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -161815// CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 01816// CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 41817// CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21818// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 81819// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[C]], align 81820// CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01821// CHECK3-NEXT:    store ptr [[A3]], ptr [[A2]], align 81822// CHECK3-NEXT:    [[C6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 21823// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 81824// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 81825// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 81826// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 81827// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])1828// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 41829// CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 11830// CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i81831// CHECK3-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 41832// CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 151833// CHECK3-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -161834// CHECK3-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]1835// CHECK3-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 41836// CHECK3-NEXT:    ret void1837//1838//1839// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined1840// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {1841// CHECK3-NEXT:  entry:1842// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81843// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81844// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81845// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81846// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 81847// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 81848// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 81849// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 81850// CHECK3-NEXT:    [[A2:%.*]] = alloca i32, align 41851// CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 81852// CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 41853// CHECK3-NEXT:    [[C5:%.*]] = alloca i32, align 41854// CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 81855// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 81856// CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 81857// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81858// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81859// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81860// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81861// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 81862// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 81863// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81864// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81865// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 81866// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 81867// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 81868// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 81869// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 81870// CHECK3-NEXT:    store i32 0, ptr [[A2]], align 41871// CHECK3-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 81872// CHECK3-NEXT:    store i32 0, ptr [[B4]], align 41873// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 81874// CHECK3-NEXT:    store i32 0, ptr [[C5]], align 41875// CHECK3-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 81876// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 01877// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP6]], align 81878// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 11879// CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP3]], align 81880// CHECK3-NEXT:    store ptr [[TMP8]], ptr [[TMP7]], align 81881// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 21882// CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP9]], align 81883// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 31884// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP6]], align 81885// CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 81886// CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])1887// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01888// CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP12]], align 81889// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 11890// CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP13]], align 81891// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 21892// CHECK3-NEXT:    store ptr [[C5]], ptr [[TMP14]], align 81893// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81894// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 41895// CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP16]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1896// CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1897// CHECK3-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1898// CHECK3-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1899// CHECK3-NEXT:    ]1900// CHECK3:       .omp.reduction.case1:1901// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP4]], align 41902// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[A2]], align 41903// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1904// CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 41905// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP2]], align 41906// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[B4]], align 41907// CHECK3-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1908// CHECK3-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 41909// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP5]], align 41910// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[C5]], align 41911// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]1912// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 41913// CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP16]], ptr @.gomp_critical_user_.reduction.var)1914// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1915// CHECK3:       .omp.reduction.case2:1916// CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A2]], align 41917// CHECK3-NEXT:    [[TMP25:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP24]] monotonic, align 41918// CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B4]], align 41919// CHECK3-NEXT:    [[TMP27:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP26]] monotonic, align 41920// CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[C5]], align 41921// CHECK3-NEXT:    [[TMP29:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP28]] monotonic, align 41922// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]1923// CHECK3:       .omp.reduction.default:1924// CHECK3-NEXT:    ret void1925//1926//1927// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv1928// CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] align 2 {1929// CHECK3-NEXT:  entry:1930// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81931// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81932// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81933// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 01934// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 81935// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11936// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 81937// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41938// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 11939// CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 41940// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21941// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 81942// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41943// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -11944// CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP6]], align 41945// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31946// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81947// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 41948// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 11949// CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 41950// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 11951// CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 81952// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 21953// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 81954// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 31955// CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 81956// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])1957// CHECK3-NEXT:    ret void1958//1959//1960// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func1961// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1962// CHECK3-NEXT:  entry:1963// CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 81964// CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 81965// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 81966// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 81967// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81968// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81969// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 01970// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81971// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 01972// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81973// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 11974// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 81975// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 11976// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 81977// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 21978// CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 81979// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 21980// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 81981// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 41982// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 41983// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]1984// CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 41985// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 41986// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 41987// CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]1988// CHECK3-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 41989// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 41990// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 41991// CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]1992// CHECK3-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 41993// CHECK3-NEXT:    ret void1994//1995//1996// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined1997// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {1998// CHECK3-NEXT:  entry:1999// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82000// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82001// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82002// CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82003// CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82004// CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82005// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 82006// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82007// CHECK3-NEXT:    [[A2:%.*]] = alloca i32, align 42008// CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 82009// CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 42010// CHECK3-NEXT:    [[C5:%.*]] = alloca i32, align 42011// CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82012// CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 82013// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82014// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82015// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82016// CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82017// CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82018// CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82019// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82020// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82021// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 82022// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 82023// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82024// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 82025// CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 82026// CHECK3-NEXT:    store i32 -1, ptr [[A2]], align 42027// CHECK3-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 82028// CHECK3-NEXT:    store i32 -1, ptr [[B4]], align 42029// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 82030// CHECK3-NEXT:    store i32 -1, ptr [[C5]], align 42031// CHECK3-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 82032// CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 82033// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42034// CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 12035// CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 42036// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 42037// CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -12038// CHECK3-NEXT:    store i32 [[DEC]], ptr [[B4]], align 42039// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 82040// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 42041// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 12042// CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 42043// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02044// CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 82045// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 12046// CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 82047// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 22048// CHECK3-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 82049// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82050// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 42051// CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2052// CHECK3-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2053// CHECK3-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2054// CHECK3-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2055// CHECK3-NEXT:    ]2056// CHECK3:       .omp.reduction.case1:2057// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 42058// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 42059// CHECK3-NEXT:    [[AND:%.*]] = and i32 [[TMP17]], [[TMP18]]2060// CHECK3-NEXT:    store i32 [[AND]], ptr [[TMP4]], align 42061// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 42062// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 42063// CHECK3-NEXT:    [[AND7:%.*]] = and i32 [[TMP19]], [[TMP20]]2064// CHECK3-NEXT:    store i32 [[AND7]], ptr [[TMP2]], align 42065// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 42066// CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 42067// CHECK3-NEXT:    [[AND8:%.*]] = and i32 [[TMP21]], [[TMP22]]2068// CHECK3-NEXT:    store i32 [[AND8]], ptr [[TMP5]], align 42069// CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)2070// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2071// CHECK3:       .omp.reduction.case2:2072// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 42073// CHECK3-NEXT:    [[TMP24:%.*]] = atomicrmw and ptr [[TMP4]], i32 [[TMP23]] monotonic, align 42074// CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 42075// CHECK3-NEXT:    [[TMP26:%.*]] = atomicrmw and ptr [[TMP2]], i32 [[TMP25]] monotonic, align 42076// CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 42077// CHECK3-NEXT:    [[TMP28:%.*]] = atomicrmw and ptr [[TMP5]], i32 [[TMP27]] monotonic, align 42078// CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2079// CHECK3:       .omp.reduction.default:2080// CHECK3-NEXT:    ret void2081//2082//2083// CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined.omp.reduction.reduction_func2084// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {2085// CHECK3-NEXT:  entry:2086// CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 82087// CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 82088// CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 82089// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 82090// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82091// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82092// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 02093// CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82094// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 02095// CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82096// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 12097// CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 82098// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 12099// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 82100// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 22101// CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 82102// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 22103// CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 82104// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 42105// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 42106// CHECK3-NEXT:    [[AND:%.*]] = and i32 [[TMP16]], [[TMP17]]2107// CHECK3-NEXT:    store i32 [[AND]], ptr [[TMP7]], align 42108// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 42109// CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 42110// CHECK3-NEXT:    [[AND2:%.*]] = and i32 [[TMP18]], [[TMP19]]2111// CHECK3-NEXT:    store i32 [[AND2]], ptr [[TMP11]], align 42112// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 42113// CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 42114// CHECK3-NEXT:    [[AND3:%.*]] = and i32 [[TMP20]], [[TMP21]]2115// CHECK3-NEXT:    store i32 [[AND3]], ptr [[TMP15]], align 42116// CHECK3-NEXT:    ret void2117//2118//2119// CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs2120// CHECK4-SAME: (ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {2121// CHECK4-NEXT:  entry:2122// CHECK4-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 82123// CHECK4-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 82124// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 82125// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])2126// CHECK4-NEXT:    ret void2127//2128//2129// CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined2130// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR2:[0-9]+]] {2131// CHECK4-NEXT:  entry:2132// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82133// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82134// CHECK4-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 82135// CHECK4-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 82136// CHECK4-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 82137// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82138// CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 82139// CHECK4-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 22140// CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i16, align 22141// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82142// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82143// CHECK4-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 82144// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 82145// CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP0]], i64 02146// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 82147// CHECK4-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i16, ptr [[TMP1]], i64 02148// CHECK4-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i642149// CHECK4-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i642150// CHECK4-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]2151// CHECK4-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)2152// CHECK4-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 12153// CHECK4-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)2154// CHECK4-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()2155// CHECK4-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 82156// CHECK4-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 162157// CHECK4-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 82158// CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]2159// CHECK4-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]2160// CHECK4-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]2161// CHECK4:       omp.arrayinit.body:2162// CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]2163// CHECK4-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 22164// CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12165// CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]2166// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]2167// CHECK4:       omp.arrayinit.done:2168// CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 82169// CHECK4-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i642170// CHECK4-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i642171// CHECK4-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]2172// CHECK4-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)2173// CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]2174// CHECK4-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 82175// CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02176// CHECK4-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 82177// CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 12178// CHECK4-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr2179// CHECK4-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 82180// CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82181// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 42182// CHECK4-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2183// CHECK4-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2184// CHECK4-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2185// CHECK4-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2186// CHECK4-NEXT:    ]2187// CHECK4:       .omp.reduction.case1:2188// CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]2189// CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]2190// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2191// CHECK4:       omp.arraycpy.body:2192// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2193// CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]2194// CHECK4-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 22195// CHECK4-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i322196// CHECK4-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 22197// CHECK4-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i322198// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]2199// CHECK4-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i162200// CHECK4-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 22201// CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 12202// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12203// CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]2204// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]2205// CHECK4:       omp.arraycpy.done7:2206// CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)2207// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2208// CHECK4:       .omp.reduction.case2:2209// CHECK4-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]2210// CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]2211// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]2212// CHECK4:       omp.arraycpy.body9:2213// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]2214// CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]2215// CHECK4-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 22216// CHECK4-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i322217// CHECK4-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 22218// CHECK4-NEXT:    br label [[ATOMIC_CONT:%.*]]2219// CHECK4:       atomic_cont:2220// CHECK4-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]2221// CHECK4-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 22222// CHECK4-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 22223// CHECK4-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i322224// CHECK4-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 22225// CHECK4-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i322226// CHECK4-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]2227// CHECK4-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i162228// CHECK4-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 22229// CHECK4-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 22230// CHECK4-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 22231// CHECK4-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 02232// CHECK4-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 12233// CHECK4-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]2234// CHECK4:       atomic_exit:2235// CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 12236// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 12237// CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]2238// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]2239// CHECK4:       omp.arraycpy.done21:2240// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2241// CHECK4:       .omp.reduction.default:2242// CHECK4-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 82243// CHECK4-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])2244// CHECK4-NEXT:    ret void2245//2246//2247// CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func2248// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {2249// CHECK4-NEXT:  entry:2250// CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 82251// CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 82252// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 82253// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 82254// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82255// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82256// CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 02257// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82258// CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 02259// CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82260// CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 12261// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 82262// CHECK4-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i642263// CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]2264// CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]2265// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2266// CHECK4:       omp.arraycpy.body:2267// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2268// CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2269// CHECK4-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 22270// CHECK4-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i322271// CHECK4-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 22272// CHECK4-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i322273// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]2274// CHECK4-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i162275// CHECK4-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 22276// CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12277// CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12278// CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]2279// CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]2280// CHECK4:       omp.arraycpy.done4:2281// CHECK4-NEXT:    ret void2282//2283//2284// CHECK4-LABEL: define {{[^@]+}}@main2285// CHECK4-SAME: () #[[ATTR7:[0-9]+]] {2286// CHECK4-NEXT:  entry:2287// CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42288// CHECK4-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 82289// CHECK4-NEXT:    store i32 0, ptr [[RETVAL]], align 42290// CHECK4-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)2291// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds nuw ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 82292// CHECK4-NEXT:    call void [[TMP0]](ptr noundef @__block_literal_global)2293// CHECK4-NEXT:    ret i32 02294//2295//2296// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi2297// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2298// CHECK4-NEXT:  entry:2299// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82300// CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82301// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82302// CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82303// CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82304// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 82305// CHECK4-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])2306// CHECK4-NEXT:    ret void2307//2308//2309// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke2310// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8:[0-9]+]] {2311// CHECK4-NEXT:  entry:2312// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82313// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82314// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82315// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82316// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @__main_block_invoke.omp_outlined, ptr @g)2317// CHECK4-NEXT:    ret void2318//2319//2320// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined2321// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {2322// CHECK4-NEXT:  entry:2323// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82324// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82325// CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 82326// CHECK4-NEXT:    [[G1:%.*]] = alloca i32, align 1282327// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, align 1282328// CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 82329// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82330// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82331// CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 82332// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 82333// CHECK4-NEXT:    store i32 0, ptr [[G1]], align 1282334// CHECK4-NEXT:    store i32 1, ptr [[G1]], align 1282335// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 02336// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 1282337// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 12338// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82339// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 22340// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42341// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 32342// CHECK4-NEXT:    store ptr @g_block_invoke, ptr [[BLOCK_INVOKE]], align 162343// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 42344// CHECK4-NEXT:    store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 82345// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 62346// CHECK4-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr [[G1]], align 1282347// CHECK4-NEXT:    store volatile i32 [[TMP1]], ptr [[BLOCK_CAPTURED]], align 1282348// CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32349// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 82350// CHECK4-NEXT:    call void [[TMP3]](ptr noundef [[BLOCK]])2351// CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02352// CHECK4-NEXT:    store ptr [[G1]], ptr [[TMP4]], align 82353// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82354// CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 42355// CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP6]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @__main_block_invoke.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2356// CHECK4-NEXT:    switch i32 [[TMP7]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2357// CHECK4-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2358// CHECK4-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2359// CHECK4-NEXT:    ]2360// CHECK4:       .omp.reduction.case1:2361// CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP0]], align 1282362// CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[G1]], align 1282363// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]2364// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP0]], align 1282365// CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP6]], ptr @.gomp_critical_user_.reduction.var)2366// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2367// CHECK4:       .omp.reduction.case2:2368// CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[G1]], align 1282369// CHECK4-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP10]] monotonic, align 1282370// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2371// CHECK4:       .omp.reduction.default:2372// CHECK4-NEXT:    ret void2373//2374//2375// CHECK4-LABEL: define {{[^@]+}}@g_block_invoke2376// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {2377// CHECK4-NEXT:  entry:2378// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82379// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82380// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82381// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82382// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62383// CHECK4-NEXT:    store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 1282384// CHECK4-NEXT:    ret void2385//2386//2387// CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined.omp.reduction.reduction_func2388// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {2389// CHECK4-NEXT:  entry:2390// CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 82391// CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 82392// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 82393// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 82394// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82395// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82396// CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 02397// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82398// CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 02399// CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82400// CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 1282401// CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 1282402// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]2403// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 1282404// CHECK4-NEXT:    ret void2405//2406//2407// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi2408// CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {2409// CHECK4-NEXT:  entry:2410// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82411// CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 82412// CHECK4-NEXT:    [[A2:%.*]] = alloca ptr, align 82413// CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 42414// CHECK4-NEXT:    [[C5:%.*]] = alloca ptr, align 82415// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82416// CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 82417// CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82418// CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 02419// CHECK4-NEXT:    store i32 0, ptr [[A]], align 82420// CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 12421// CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 42422// CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -162423// CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 02424// CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 42425// CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 22426// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 82427// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[C]], align 82428// CHECK4-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 02429// CHECK4-NEXT:    store ptr [[A3]], ptr [[A2]], align 82430// CHECK4-NEXT:    [[C6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 22431// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 82432// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 82433// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 82434// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 82435// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])2436// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 42437// CHECK4-NEXT:    [[B7:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 12438// CHECK4-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i82439// CHECK4-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 42440// CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 152441// CHECK4-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -162442// CHECK4-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]2443// CHECK4-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 42444// CHECK4-NEXT:    ret void2445//2446//2447// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined2448// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {2449// CHECK4-NEXT:  entry:2450// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82451// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82452// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82453// CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82454// CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82455// CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82456// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82457// CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82458// CHECK4-NEXT:    [[A2:%.*]] = alloca i32, align 42459// CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 82460// CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 42461// CHECK4-NEXT:    [[C5:%.*]] = alloca i32, align 42462// CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82463// CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 82464// CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 82465// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82466// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82467// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82468// CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82469// CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82470// CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82471// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82472// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82473// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 82474// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 82475// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82476// CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 82477// CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 82478// CHECK4-NEXT:    store i32 0, ptr [[A2]], align 42479// CHECK4-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 82480// CHECK4-NEXT:    store i32 0, ptr [[B4]], align 42481// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 82482// CHECK4-NEXT:    store i32 0, ptr [[C5]], align 42483// CHECK4-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 82484// CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 02485// CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 82486// CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 12487// CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 82488// CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 22489// CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 42490// CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 32491// CHECK4-NEXT:    store ptr @g_block_invoke_2, ptr [[BLOCK_INVOKE]], align 82492// CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 42493// CHECK4-NEXT:    store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 82494// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 52495// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 82496// CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 62497// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 82498// CHECK4-NEXT:    store ptr [[TMP6]], ptr [[BLOCK_CAPTURED]], align 82499// CHECK4-NEXT:    [[BLOCK_CAPTURED7:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 82500// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[B4]], align 42501// CHECK4-NEXT:    store i32 [[TMP7]], ptr [[BLOCK_CAPTURED7]], align 82502// CHECK4-NEXT:    [[BLOCK_CAPTURED8:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 72503// CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP6]], align 82504// CHECK4-NEXT:    store ptr [[TMP8]], ptr [[BLOCK_CAPTURED8]], align 82505// CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 32506// CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[TMP9]], align 82507// CHECK4-NEXT:    call void [[TMP10]](ptr noundef [[BLOCK]])2508// CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02509// CHECK4-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 82510// CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 12511// CHECK4-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 82512// CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 22513// CHECK4-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 82514// CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82515// CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 42516// CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2517// CHECK4-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2518// CHECK4-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2519// CHECK4-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2520// CHECK4-NEXT:    ]2521// CHECK4:       .omp.reduction.case1:2522// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 42523// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 42524// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]2525// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 42526// CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 42527// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 42528// CHECK4-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]2529// CHECK4-NEXT:    store i32 [[ADD9]], ptr [[TMP2]], align 42530// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 42531// CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 42532// CHECK4-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]2533// CHECK4-NEXT:    store i32 [[ADD10]], ptr [[TMP5]], align 42534// CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)2535// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2536// CHECK4:       .omp.reduction.case2:2537// CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 42538// CHECK4-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 42539// CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 42540// CHECK4-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 42541// CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 42542// CHECK4-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 42543// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2544// CHECK4:       .omp.reduction.default:2545// CHECK4-NEXT:    ret void2546//2547//2548// CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_22549// CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {2550// CHECK4-NEXT:  entry:2551// CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 82552// CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 82553// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 82554// CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 82555// CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 52556// CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 82557// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62558// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 82559// CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 42560// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 12561// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 42562// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 82563// CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 82564// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -12565// CHECK4-NEXT:    store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 82566// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 72567// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 82568// CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 42569// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 12570// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 42571// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 62572// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 82573// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 82574// CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 72575// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 82576// CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @g_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])2577// CHECK4-NEXT:    ret void2578//2579//2580// CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined2581// CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {2582// CHECK4-NEXT:  entry:2583// CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82584// CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82585// CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 82586// CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82587// CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 82588// CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 82589// CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 82590// CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 82591// CHECK4-NEXT:    [[A2:%.*]] = alloca i32, align 42592// CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 82593// CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 42594// CHECK4-NEXT:    [[C5:%.*]] = alloca i32, align 42595// CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 82596// CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 82597// CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82598// CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82599// CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 82600// CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82601// CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 82602// CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 82603// CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82604// CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 82605// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 82606// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 82607// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 82608// CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 82609// CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 82610// CHECK4-NEXT:    store i32 0, ptr [[A2]], align 42611// CHECK4-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 82612// CHECK4-NEXT:    store i32 0, ptr [[B4]], align 42613// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 82614// CHECK4-NEXT:    store i32 0, ptr [[C5]], align 42615// CHECK4-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 82616// CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 82617// CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42618// CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 12619// CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 42620// CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 42621// CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -12622// CHECK4-NEXT:    store i32 [[DEC]], ptr [[B4]], align 42623// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 82624// CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 42625// CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 12626// CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 42627// CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02628// CHECK4-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 82629// CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 12630// CHECK4-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 82631// CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 22632// CHECK4-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 82633// CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82634// CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 42635// CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @g_block_invoke_2.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2636// CHECK4-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2637// CHECK4-NEXT:      i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2638// CHECK4-NEXT:      i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2639// CHECK4-NEXT:    ]2640// CHECK4:       .omp.reduction.case1:2641// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 42642// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 42643// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]2644// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 42645// CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 42646// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 42647// CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]2648// CHECK4-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 42649// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 42650// CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 42651// CHECK4-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]2652// CHECK4-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 42653// CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)2654// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2655// CHECK4:       .omp.reduction.case2:2656// CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 42657// CHECK4-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 42658// CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 42659// CHECK4-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 42660// CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 42661// CHECK4-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 42662// CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]2663// CHECK4:       .omp.reduction.default:2664// CHECK4-NEXT:    ret void2665//2666//2667// CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined.omp.reduction.reduction_func2668// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {2669// CHECK4-NEXT:  entry:2670// CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 82671// CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 82672// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 82673// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 82674// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82675// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82676// CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 02677// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82678// CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 02679// CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82680// CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 12681// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 82682// CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 12683// CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 82684// CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 22685// CHECK4-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 82686// CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 22687// CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 82688// CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 42689// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 42690// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]2691// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 42692// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 42693// CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 42694// CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]2695// CHECK4-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 42696// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 42697// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 42698// CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]2699// CHECK4-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 42700// CHECK4-NEXT:    ret void2701//2702//2703// CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func2704// CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {2705// CHECK4-NEXT:  entry:2706// CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 82707// CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 82708// CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 82709// CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 82710// CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82711// CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82712// CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 02713// CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82714// CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 02715// CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82716// CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 12717// CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 82718// CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 12719// CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 82720// CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 22721// CHECK4-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 82722// CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 22723// CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 82724// CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 42725// CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 42726// CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]2727// CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 42728// CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 42729// CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 42730// CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]2731// CHECK4-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 42732// CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 42733// CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 42734// CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]2735// CHECK4-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 42736// CHECK4-NEXT:    ret void2737//2738