1556 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2 3// expected-no-diagnostics4 5// Check code generation6// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 8// Check same results after serialization round-trip9// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -emit-pch -o %t %s10// RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -std=c++20 -fclang-abi-compat=latest -fopenmp -fopenmp-version=60 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK211 12#ifndef HEADER13#define HEADER14 15// placeholder for loop body code.16extern "C" void body(...) {}17 18 19struct S {20 int i;21 S() {22#pragma omp reverse23 for (i = 7; i < 17; i += 3)24 body(i);25 }26} s;27 28 29extern "C" void foo1(int start, int end, int step) {30 int i;31#pragma omp reverse32 for (i = start; i < end; i += step)33 body(i);34}35 36 37extern "C" void foo2() {38#pragma omp for39#pragma omp reverse40 for (int i = 7; i < 17; i += 3)41 body(i);42}43 44 45extern "C" void foo3() {46#pragma omp for collapse(3)47 for (int k = 7; k < 17; k += 3)48#pragma omp reverse49 for (int i = 7; i < 17; i += 3)50 for (int j = 7; j < 17; j += 3)51 body(k, i, j);52}53 54 55extern "C" void foo4() {56#pragma omp parallel for57#pragma omp reverse58 for (int i = 7; i < 17; i += 3)59 body(i);60}61 62 63template<typename T, T Step>64void foo5(T start, T end) {65#pragma omp reverse66 for (T i = start; i < end; i += Step)67 body(i);68}69 70extern "C" void tfoo5() {71 foo5<int,3>(0, 42);72}73 74 75extern "C" void foo6() {76 double arr[128];77#pragma omp reverse78 for (int c = 42; auto && v : arr)79 body(v, c);80}81 82 83extern "C" void foo7() {84 double A[128];85 86#pragma omp for collapse(3)87 for (int k = 7; k < 17; k += 3)88#pragma omp reverse89 for (int c = 42; auto && v : A)90 for (int j = 7; j < 17; j += 3)91 body(k, c, v, j);92}93 94#endif /* HEADER */95 96 97// CHECK1-LABEL: define {{[^@]+}}@body98// CHECK1-SAME: (...) #[[ATTR0:[0-9]+]] {99// CHECK1-NEXT: entry:100// CHECK1-NEXT: ret void101//102//103// CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init104// CHECK1-SAME: () #[[ATTR1:[0-9]+]] section ".text.startup" {105// CHECK1-NEXT: entry:106// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s)107// CHECK1-NEXT: ret void108//109//110// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev111// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {112// CHECK1-NEXT: entry:113// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8114// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8115// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8116// CHECK1-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])117// CHECK1-NEXT: ret void118//119//120// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev121// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR0]] comdat align 2 {122// CHECK1-NEXT: entry:123// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8124// CHECK1-NEXT: [[I2:%.*]] = alloca ptr, align 8125// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4126// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4127// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8128// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8129// CHECK1-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0130// CHECK1-NEXT: store i32 7, ptr [[I]], align 4131// CHECK1-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0132// CHECK1-NEXT: store ptr [[I3]], ptr [[I2]], align 8133// CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4134// CHECK1-NEXT: br label [[FOR_COND:%.*]]135// CHECK1: for.cond:136// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4137// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4138// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]139// CHECK1: for.body:140// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4141// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP1]]142// CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4143// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4144// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 3145// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]]146// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8147// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4148// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8149// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4150// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP5]])151// CHECK1-NEXT: br label [[FOR_INC:%.*]]152// CHECK1: for.inc:153// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4154// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1155// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4156// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]157// CHECK1: for.end:158// CHECK1-NEXT: ret void159//160//161// CHECK1-LABEL: define {{[^@]+}}@foo1162// CHECK1-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR0]] {163// CHECK1-NEXT: entry:164// CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4165// CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4166// CHECK1-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4167// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4168// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4169// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4170// CHECK1-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4171// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4172// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4173// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4174// CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4175// CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4176// CHECK1-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4177// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4178// CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4179// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4180// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4181// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4182// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4183// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4184// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4185// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4186// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4187// CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]]188// CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1189// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4190// CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]]191// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4192// CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]]193// CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1194// CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4195// CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4196// CHECK1-NEXT: br label [[FOR_COND:%.*]]197// CHECK1: for.cond:198// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4199// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4200// CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1201// CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]]202// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]203// CHECK1: for.body:204// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4205// CHECK1-NEXT: [[ADD6:%.*]] = add i32 [[TMP10]], 1206// CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1207// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4208// CHECK1-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP11]]209// CHECK1-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4210// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4211// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4212// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4213// CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], [[TMP14]]214// CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP12]], [[MUL]]215// CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4216// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4217// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP15]])218// CHECK1-NEXT: br label [[FOR_INC:%.*]]219// CHECK1: for.inc:220// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4221// CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1222// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4223// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]224// CHECK1: for.end:225// CHECK1-NEXT: ret void226//227//228// CHECK1-LABEL: define {{[^@]+}}@foo2229// CHECK1-SAME: () #[[ATTR0]] {230// CHECK1-NEXT: entry:231// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4232// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4233// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4234// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4235// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4236// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4237// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4238// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4239// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4240// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]])241// CHECK1-NEXT: store i32 7, ptr [[I]], align 4242// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4243// CHECK1-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4244// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4245// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4246// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)247// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4248// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3249// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]250// CHECK1: cond.true:251// CHECK1-NEXT: br label [[COND_END:%.*]]252// CHECK1: cond.false:253// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4254// CHECK1-NEXT: br label [[COND_END]]255// CHECK1: cond.end:256// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]257// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4258// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4259// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4260// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]261// CHECK1: omp.inner.for.cond:262// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4263// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4264// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]265// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]266// CHECK1: omp.inner.for.body:267// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4268// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1269// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]270// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4271// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4272// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP7]]273// CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4274// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4275// CHECK1-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP8]], 3276// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]]277// CHECK1-NEXT: store i32 [[ADD3]], ptr [[I]], align 4278// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4279// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP9]])280// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]281// CHECK1: omp.body.continue:282// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]283// CHECK1: omp.inner.for.inc:284// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4285// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1286// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4287// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]288// CHECK1: omp.inner.for.end:289// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]290// CHECK1: omp.loop.exit:291// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])292// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]])293// CHECK1-NEXT: ret void294//295//296// CHECK1-LABEL: define {{[^@]+}}@foo3297// CHECK1-SAME: () #[[ATTR0]] {298// CHECK1-NEXT: entry:299// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4300// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4301// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4302// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4303// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4304// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4305// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4306// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4307// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4308// CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4309// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4310// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4311// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4312// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]])313// CHECK1-NEXT: store i32 7, ptr [[I]], align 4314// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4315// CHECK1-NEXT: store i32 63, ptr [[DOTOMP_UB]], align 4316// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4317// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4318// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)319// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4320// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 63321// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]322// CHECK1: cond.true:323// CHECK1-NEXT: br label [[COND_END:%.*]]324// CHECK1: cond.false:325// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4326// CHECK1-NEXT: br label [[COND_END]]327// CHECK1: cond.end:328// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 63, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]329// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4330// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4331// CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4332// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]333// CHECK1: omp.inner.for.cond:334// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4335// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4336// CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]337// CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]338// CHECK1: omp.inner.for.body:339// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4340// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 16341// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 3342// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]]343// CHECK1-NEXT: store i32 [[ADD]], ptr [[K]], align 4344// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4345// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4346// CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP8]], 16347// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 16348// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL5]]349// CHECK1-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB]], 4350// CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[DIV6]], 1351// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]352// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTFORWARD_IV_I]], align 4353// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4354// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4355// CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[TMP10]], 16356// CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 16357// CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP9]], [[MUL10]]358// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4359// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4360// CHECK1-NEXT: [[DIV12:%.*]] = sdiv i32 [[TMP12]], 16361// CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 16362// CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP11]], [[MUL13]]363// CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 4364// CHECK1-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 4365// CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[SUB11]], [[MUL16]]366// CHECK1-NEXT: [[MUL18:%.*]] = mul nsw i32 [[SUB17]], 3367// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]]368// CHECK1-NEXT: store i32 [[ADD19]], ptr [[J]], align 4369// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4370// CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 3, [[TMP13]]371// CHECK1-NEXT: store i32 [[SUB20]], ptr [[DOTREVERSED_IV_I]], align 4372// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4373// CHECK1-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP14]], 3374// CHECK1-NEXT: [[ADD22:%.*]] = add nsw i32 7, [[MUL21]]375// CHECK1-NEXT: store i32 [[ADD22]], ptr [[I]], align 4376// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[K]], align 4377// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4378// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[J]], align 4379// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP15]], i32 noundef [[TMP16]], i32 noundef [[TMP17]])380// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]381// CHECK1: omp.body.continue:382// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]383// CHECK1: omp.inner.for.inc:384// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4385// CHECK1-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP18]], 1386// CHECK1-NEXT: store i32 [[ADD23]], ptr [[DOTOMP_IV]], align 4387// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]388// CHECK1: omp.inner.for.end:389// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]390// CHECK1: omp.loop.exit:391// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])392// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]])393// CHECK1-NEXT: ret void394//395//396// CHECK1-LABEL: define {{[^@]+}}@foo4397// CHECK1-SAME: () #[[ATTR0]] {398// CHECK1-NEXT: entry:399// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo4.omp_outlined)400// CHECK1-NEXT: ret void401//402//403// CHECK1-LABEL: define {{[^@]+}}@foo4.omp_outlined404// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] {405// CHECK1-NEXT: entry:406// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8407// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8408// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4409// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4410// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4411// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4412// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4413// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4414// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4415// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4416// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4417// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8418// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8419// CHECK1-NEXT: store i32 7, ptr [[I]], align 4420// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4421// CHECK1-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4422// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4423// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4424// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8425// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4426// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)427// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4428// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 3429// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]430// CHECK1: cond.true:431// CHECK1-NEXT: br label [[COND_END:%.*]]432// CHECK1: cond.false:433// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4434// CHECK1-NEXT: br label [[COND_END]]435// CHECK1: cond.end:436// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]437// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4438// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4439// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4440// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]441// CHECK1: omp.inner.for.cond:442// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4443// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4444// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]445// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]446// CHECK1: omp.inner.for.body:447// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4448// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1449// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]450// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 4451// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4452// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP8]]453// CHECK1-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4454// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4455// CHECK1-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 3456// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]]457// CHECK1-NEXT: store i32 [[ADD3]], ptr [[I]], align 4458// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4459// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP10]])460// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]461// CHECK1: omp.body.continue:462// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]463// CHECK1: omp.inner.for.inc:464// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4465// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1466// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4467// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]468// CHECK1: omp.inner.for.end:469// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]470// CHECK1: omp.loop.exit:471// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])472// CHECK1-NEXT: ret void473//474//475// CHECK1-LABEL: define {{[^@]+}}@tfoo5476// CHECK1-SAME: () #[[ATTR0]] {477// CHECK1-NEXT: entry:478// CHECK1-NEXT: call void @_Z4foo5IiTnT_Li3EEvS0_S0_(i32 noundef 0, i32 noundef 42)479// CHECK1-NEXT: ret void480//481//482// CHECK1-LABEL: define {{[^@]+}}@_Z4foo5IiTnT_Li3EEvS0_S0_483// CHECK1-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR0]] comdat {484// CHECK1-NEXT: entry:485// CHECK1-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4486// CHECK1-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4487// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4488// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4489// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4490// CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4491// CHECK1-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4492// CHECK1-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4493// CHECK1-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4494// CHECK1-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4495// CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4496// CHECK1-NEXT: store i32 [[TMP0]], ptr [[I]], align 4497// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4498// CHECK1-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4499// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4500// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4501// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4502// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4503// CHECK1-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]504// CHECK1-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1505// CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 3506// CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 3507// CHECK1-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1508// CHECK1-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4509// CHECK1-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4510// CHECK1-NEXT: br label [[FOR_COND:%.*]]511// CHECK1: for.cond:512// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4513// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4514// CHECK1-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 1515// CHECK1-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]]516// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]517// CHECK1: for.body:518// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4519// CHECK1-NEXT: [[ADD6:%.*]] = add i32 [[TMP7]], 1520// CHECK1-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1521// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4522// CHECK1-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP8]]523// CHECK1-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4524// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4525// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4526// CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP10]], 3527// CHECK1-NEXT: [[ADD9:%.*]] = add i32 [[TMP9]], [[MUL]]528// CHECK1-NEXT: store i32 [[ADD9]], ptr [[I]], align 4529// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4530// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP11]])531// CHECK1-NEXT: br label [[FOR_INC:%.*]]532// CHECK1: for.inc:533// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4534// CHECK1-NEXT: [[INC:%.*]] = add i32 [[TMP12]], 1535// CHECK1-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4536// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]537// CHECK1: for.end:538// CHECK1-NEXT: ret void539//540//541// CHECK1-LABEL: define {{[^@]+}}@foo6542// CHECK1-SAME: () #[[ATTR0]] {543// CHECK1-NEXT: entry:544// CHECK1-NEXT: [[ARR:%.*]] = alloca [128 x double], align 16545// CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4546// CHECK1-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 8547// CHECK1-NEXT: [[__END2:%.*]] = alloca ptr, align 8548// CHECK1-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 8549// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8550// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 8551// CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8552// CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN2:%.*]] = alloca i64, align 8553// CHECK1-NEXT: [[DOTREVERSED_IV___BEGIN2:%.*]] = alloca i64, align 8554// CHECK1-NEXT: [[V:%.*]] = alloca ptr, align 8555// CHECK1-NEXT: store i32 42, ptr [[C]], align 4556// CHECK1-NEXT: store ptr [[ARR]], ptr [[__RANGE2]], align 8557// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 8558// CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP0]], i64 0, i64 0559// CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128560// CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 8561// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 8562// CHECK1-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0563// CHECK1-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 8564// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 8565// CHECK1-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0566// CHECK1-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 8567// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 8568// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 8569// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 8570// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8571// CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i64572// CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64573// CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]574// CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8575// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1576// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1577// CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1578// CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 1579// CHECK1-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 8580// CHECK1-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN2]], align 8581// CHECK1-NEXT: br label [[FOR_COND:%.*]]582// CHECK1: for.cond:583// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8584// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8585// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 1586// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]]587// CHECK1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]588// CHECK1: for.body:589// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 8590// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP8]], 1591// CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i64 [[ADD7]], 1592// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8593// CHECK1-NEXT: [[SUB9:%.*]] = sub nsw i64 [[SUB8]], [[TMP9]]594// CHECK1-NEXT: store i64 [[SUB9]], ptr [[DOTREVERSED_IV___BEGIN2]], align 8595// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8596// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN2]], align 8597// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP11]], 1598// CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds double, ptr [[TMP10]], i64 [[MUL]]599// CHECK1-NEXT: store ptr [[ADD_PTR10]], ptr [[__BEGIN2]], align 8600// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[__BEGIN2]], align 8601// CHECK1-NEXT: store ptr [[TMP12]], ptr [[V]], align 8602// CHECK1-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V]], align 8603// CHECK1-NEXT: [[TMP14:%.*]] = load double, ptr [[TMP13]], align 8604// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[C]], align 4605// CHECK1-NEXT: call void (...) @body(double noundef [[TMP14]], i32 noundef [[TMP15]])606// CHECK1-NEXT: br label [[FOR_INC:%.*]]607// CHECK1: for.inc:608// CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 8609// CHECK1-NEXT: [[INC:%.*]] = add nsw i64 [[TMP16]], 1610// CHECK1-NEXT: store i64 [[INC]], ptr [[DOTFORWARD_IV___BEGIN2]], align 8611// CHECK1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]612// CHECK1: for.end:613// CHECK1-NEXT: ret void614//615//616// CHECK1-LABEL: define {{[^@]+}}@foo7617// CHECK1-SAME: () #[[ATTR0]] {618// CHECK1-NEXT: entry:619// CHECK1-NEXT: [[A:%.*]] = alloca [128 x double], align 16620// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8621// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4622// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i64, align 8623// CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4624// CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4625// CHECK1-NEXT: [[__RANGE3:%.*]] = alloca ptr, align 8626// CHECK1-NEXT: [[__END3:%.*]] = alloca ptr, align 8627// CHECK1-NEXT: [[__BEGIN3:%.*]] = alloca ptr, align 8628// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 8629// CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca ptr, align 8630// CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8631// CHECK1-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 8632// CHECK1-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i64, align 8633// CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4634// CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN3:%.*]] = alloca i64, align 8635// CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4636// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8637// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8638// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8639// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4640// CHECK1-NEXT: [[K15:%.*]] = alloca i32, align 4641// CHECK1-NEXT: [[DOTFORWARD_IV___BEGIN316:%.*]] = alloca i64, align 8642// CHECK1-NEXT: [[J17:%.*]] = alloca i32, align 4643// CHECK1-NEXT: [[DOTREVERSED_IV___BEGIN3:%.*]] = alloca i64, align 8644// CHECK1-NEXT: [[V:%.*]] = alloca ptr, align 8645// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]])646// CHECK1-NEXT: store i32 42, ptr [[C]], align 4647// CHECK1-NEXT: store ptr [[A]], ptr [[__RANGE3]], align 8648// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE3]], align 8649// CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 0650// CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 128651// CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[__END3]], align 8652// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE3]], align 8653// CHECK1-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 0654// CHECK1-NEXT: store ptr [[ARRAYDECAY3]], ptr [[__BEGIN3]], align 8655// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__RANGE3]], align 8656// CHECK1-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP3]], i64 0, i64 0657// CHECK1-NEXT: store ptr [[ARRAYDECAY4]], ptr [[DOTCAPTURE_EXPR_]], align 8658// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[__END3]], align 8659// CHECK1-NEXT: store ptr [[TMP4]], ptr [[DOTCAPTURE_EXPR_5]], align 8660// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_5]], align 8661// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8662// CHECK1-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i64663// CHECK1-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP6]] to i64664// CHECK1-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]665// CHECK1-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 8666// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 1667// CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 1668// CHECK1-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 1669// CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i64 [[DIV]], 1670// CHECK1-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_6]], align 8671// CHECK1-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8672// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP7]], 1673// CHECK1-NEXT: store i64 [[ADD9]], ptr [[DOTCAPTURE_EXPR_8]], align 8674// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8675// CHECK1-NEXT: [[SUB11:%.*]] = sub nsw i64 [[TMP8]], 0676// CHECK1-NEXT: [[DIV12:%.*]] = sdiv i64 [[SUB11]], 1677// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 4, [[DIV12]]678// CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i64 [[MUL]], 4679// CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL13]], 1680// CHECK1-NEXT: store i64 [[SUB14]], ptr [[DOTCAPTURE_EXPR_10]], align 8681// CHECK1-NEXT: store i32 7, ptr [[K]], align 4682// CHECK1-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN3]], align 8683// CHECK1-NEXT: store i32 7, ptr [[J]], align 4684// CHECK1-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8685// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i64 0, [[TMP9]]686// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]687// CHECK1: omp.precond.then:688// CHECK1-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8689// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8690// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTOMP_UB]], align 8691// CHECK1-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8692// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4693// CHECK1-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)694// CHECK1-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8695// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8696// CHECK1-NEXT: [[CMP18:%.*]] = icmp sgt i64 [[TMP11]], [[TMP12]]697// CHECK1-NEXT: br i1 [[CMP18]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]698// CHECK1: cond.true:699// CHECK1-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 8700// CHECK1-NEXT: br label [[COND_END:%.*]]701// CHECK1: cond.false:702// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8703// CHECK1-NEXT: br label [[COND_END]]704// CHECK1: cond.end:705// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]706// CHECK1-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8707// CHECK1-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8708// CHECK1-NEXT: store i64 [[TMP15]], ptr [[DOTOMP_IV]], align 8709// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]710// CHECK1: omp.inner.for.cond:711// CHECK1-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8712// CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8713// CHECK1-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP16]], [[TMP17]]714// CHECK1-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]715// CHECK1: omp.inner.for.body:716// CHECK1-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8717// CHECK1-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8718// CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i64 [[TMP19]], 0719// CHECK1-NEXT: [[DIV21:%.*]] = sdiv i64 [[SUB20]], 1720// CHECK1-NEXT: [[MUL22:%.*]] = mul nsw i64 1, [[DIV21]]721// CHECK1-NEXT: [[MUL23:%.*]] = mul nsw i64 [[MUL22]], 4722// CHECK1-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[MUL23]]723// CHECK1-NEXT: [[MUL25:%.*]] = mul nsw i64 [[DIV24]], 3724// CHECK1-NEXT: [[ADD26:%.*]] = add nsw i64 7, [[MUL25]]725// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[ADD26]] to i32726// CHECK1-NEXT: store i32 [[CONV]], ptr [[K15]], align 4727// CHECK1-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8728// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8729// CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8730// CHECK1-NEXT: [[SUB27:%.*]] = sub nsw i64 [[TMP22]], 0731// CHECK1-NEXT: [[DIV28:%.*]] = sdiv i64 [[SUB27]], 1732// CHECK1-NEXT: [[MUL29:%.*]] = mul nsw i64 1, [[DIV28]]733// CHECK1-NEXT: [[MUL30:%.*]] = mul nsw i64 [[MUL29]], 4734// CHECK1-NEXT: [[DIV31:%.*]] = sdiv i64 [[TMP21]], [[MUL30]]735// CHECK1-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8736// CHECK1-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], 0737// CHECK1-NEXT: [[DIV33:%.*]] = sdiv i64 [[SUB32]], 1738// CHECK1-NEXT: [[MUL34:%.*]] = mul nsw i64 1, [[DIV33]]739// CHECK1-NEXT: [[MUL35:%.*]] = mul nsw i64 [[MUL34]], 4740// CHECK1-NEXT: [[MUL36:%.*]] = mul nsw i64 [[DIV31]], [[MUL35]]741// CHECK1-NEXT: [[SUB37:%.*]] = sub nsw i64 [[TMP20]], [[MUL36]]742// CHECK1-NEXT: [[DIV38:%.*]] = sdiv i64 [[SUB37]], 4743// CHECK1-NEXT: [[MUL39:%.*]] = mul nsw i64 [[DIV38]], 1744// CHECK1-NEXT: [[ADD40:%.*]] = add nsw i64 0, [[MUL39]]745// CHECK1-NEXT: store i64 [[ADD40]], ptr [[DOTFORWARD_IV___BEGIN316]], align 8746// CHECK1-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8747// CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8748// CHECK1-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8749// CHECK1-NEXT: [[SUB41:%.*]] = sub nsw i64 [[TMP26]], 0750// CHECK1-NEXT: [[DIV42:%.*]] = sdiv i64 [[SUB41]], 1751// CHECK1-NEXT: [[MUL43:%.*]] = mul nsw i64 1, [[DIV42]]752// CHECK1-NEXT: [[MUL44:%.*]] = mul nsw i64 [[MUL43]], 4753// CHECK1-NEXT: [[DIV45:%.*]] = sdiv i64 [[TMP25]], [[MUL44]]754// CHECK1-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8755// CHECK1-NEXT: [[SUB46:%.*]] = sub nsw i64 [[TMP27]], 0756// CHECK1-NEXT: [[DIV47:%.*]] = sdiv i64 [[SUB46]], 1757// CHECK1-NEXT: [[MUL48:%.*]] = mul nsw i64 1, [[DIV47]]758// CHECK1-NEXT: [[MUL49:%.*]] = mul nsw i64 [[MUL48]], 4759// CHECK1-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV45]], [[MUL49]]760// CHECK1-NEXT: [[SUB51:%.*]] = sub nsw i64 [[TMP24]], [[MUL50]]761// CHECK1-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8762// CHECK1-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8763// CHECK1-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8764// CHECK1-NEXT: [[SUB52:%.*]] = sub nsw i64 [[TMP30]], 0765// CHECK1-NEXT: [[DIV53:%.*]] = sdiv i64 [[SUB52]], 1766// CHECK1-NEXT: [[MUL54:%.*]] = mul nsw i64 1, [[DIV53]]767// CHECK1-NEXT: [[MUL55:%.*]] = mul nsw i64 [[MUL54]], 4768// CHECK1-NEXT: [[DIV56:%.*]] = sdiv i64 [[TMP29]], [[MUL55]]769// CHECK1-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 8770// CHECK1-NEXT: [[SUB57:%.*]] = sub nsw i64 [[TMP31]], 0771// CHECK1-NEXT: [[DIV58:%.*]] = sdiv i64 [[SUB57]], 1772// CHECK1-NEXT: [[MUL59:%.*]] = mul nsw i64 1, [[DIV58]]773// CHECK1-NEXT: [[MUL60:%.*]] = mul nsw i64 [[MUL59]], 4774// CHECK1-NEXT: [[MUL61:%.*]] = mul nsw i64 [[DIV56]], [[MUL60]]775// CHECK1-NEXT: [[SUB62:%.*]] = sub nsw i64 [[TMP28]], [[MUL61]]776// CHECK1-NEXT: [[DIV63:%.*]] = sdiv i64 [[SUB62]], 4777// CHECK1-NEXT: [[MUL64:%.*]] = mul nsw i64 [[DIV63]], 4778// CHECK1-NEXT: [[SUB65:%.*]] = sub nsw i64 [[SUB51]], [[MUL64]]779// CHECK1-NEXT: [[MUL66:%.*]] = mul nsw i64 [[SUB65]], 3780// CHECK1-NEXT: [[ADD67:%.*]] = add nsw i64 7, [[MUL66]]781// CHECK1-NEXT: [[CONV68:%.*]] = trunc i64 [[ADD67]] to i32782// CHECK1-NEXT: store i32 [[CONV68]], ptr [[J17]], align 4783// CHECK1-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 8784// CHECK1-NEXT: [[ADD69:%.*]] = add nsw i64 [[TMP32]], 1785// CHECK1-NEXT: [[SUB70:%.*]] = sub nsw i64 [[ADD69]], 1786// CHECK1-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN316]], align 8787// CHECK1-NEXT: [[SUB71:%.*]] = sub nsw i64 [[SUB70]], [[TMP33]]788// CHECK1-NEXT: store i64 [[SUB71]], ptr [[DOTREVERSED_IV___BEGIN3]], align 8789// CHECK1-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 8790// CHECK1-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN3]], align 8791// CHECK1-NEXT: [[MUL72:%.*]] = mul nsw i64 [[TMP35]], 1792// CHECK1-NEXT: [[ADD_PTR73:%.*]] = getelementptr inbounds double, ptr [[TMP34]], i64 [[MUL72]]793// CHECK1-NEXT: store ptr [[ADD_PTR73]], ptr [[__BEGIN3]], align 8794// CHECK1-NEXT: [[TMP36:%.*]] = load ptr, ptr [[__BEGIN3]], align 8795// CHECK1-NEXT: store ptr [[TMP36]], ptr [[V]], align 8796// CHECK1-NEXT: [[TMP37:%.*]] = load i32, ptr [[K15]], align 4797// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[C]], align 4798// CHECK1-NEXT: [[TMP39:%.*]] = load ptr, ptr [[V]], align 8799// CHECK1-NEXT: [[TMP40:%.*]] = load double, ptr [[TMP39]], align 8800// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[J17]], align 4801// CHECK1-NEXT: call void (...) @body(i32 noundef [[TMP37]], i32 noundef [[TMP38]], double noundef [[TMP40]], i32 noundef [[TMP41]])802// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]803// CHECK1: omp.body.continue:804// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]805// CHECK1: omp.inner.for.inc:806// CHECK1-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8807// CHECK1-NEXT: [[ADD74:%.*]] = add nsw i64 [[TMP42]], 1808// CHECK1-NEXT: store i64 [[ADD74]], ptr [[DOTOMP_IV]], align 8809// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]810// CHECK1: omp.inner.for.end:811// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]812// CHECK1: omp.loop.exit:813// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])814// CHECK1-NEXT: br label [[OMP_PRECOND_END]]815// CHECK1: omp.precond.end:816// CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]])817// CHECK1-NEXT: ret void818//819//820// CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_reverse_codegen.cpp821// CHECK1-SAME: () #[[ATTR1]] section ".text.startup" {822// CHECK1-NEXT: entry:823// CHECK1-NEXT: call void @__cxx_global_var_init()824// CHECK1-NEXT: ret void825//826//827// CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init828// CHECK2-SAME: () #[[ATTR0:[0-9]+]] section ".text.startup" {829// CHECK2-NEXT: entry:830// CHECK2-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 4 dereferenceable(4) @s)831// CHECK2-NEXT: ret void832//833//834// CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1Ev835// CHECK2-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {836// CHECK2-NEXT: entry:837// CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8838// CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8839// CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8840// CHECK2-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])841// CHECK2-NEXT: ret void842//843//844// CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2Ev845// CHECK2-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {846// CHECK2-NEXT: entry:847// CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8848// CHECK2-NEXT: [[I2:%.*]] = alloca ptr, align 8849// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4850// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4851// CHECK2-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8852// CHECK2-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8853// CHECK2-NEXT: [[I:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0854// CHECK2-NEXT: store i32 7, ptr [[I]], align 4855// CHECK2-NEXT: [[I3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0856// CHECK2-NEXT: store ptr [[I3]], ptr [[I2]], align 8857// CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4858// CHECK2-NEXT: br label [[FOR_COND:%.*]]859// CHECK2: for.cond:860// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4861// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 4862// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]863// CHECK2: for.body:864// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4865// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP1]]866// CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 4867// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4868// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP2]], 3869// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]]870// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[I2]], align 8871// CHECK2-NEXT: store i32 [[ADD]], ptr [[TMP3]], align 4872// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[I2]], align 8873// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4874// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP5]])875// CHECK2-NEXT: br label [[FOR_INC:%.*]]876// CHECK2: for.inc:877// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4878// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP6]], 1879// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4880// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]881// CHECK2: for.end:882// CHECK2-NEXT: ret void883//884//885// CHECK2-LABEL: define {{[^@]+}}@body886// CHECK2-SAME: (...) #[[ATTR1]] {887// CHECK2-NEXT: entry:888// CHECK2-NEXT: ret void889//890//891// CHECK2-LABEL: define {{[^@]+}}@foo1892// CHECK2-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]], i32 noundef [[STEP:%.*]]) #[[ATTR1]] {893// CHECK2-NEXT: entry:894// CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 4895// CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 4896// CHECK2-NEXT: [[STEP_ADDR:%.*]] = alloca i32, align 4897// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4898// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4899// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4900// CHECK2-NEXT: [[DOTNEW_STEP:%.*]] = alloca i32, align 4901// CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4902// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4903// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4904// CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 4905// CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 4906// CHECK2-NEXT: store i32 [[STEP]], ptr [[STEP_ADDR]], align 4907// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 4908// CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 4909// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 4910// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4911// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 4912// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4913// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[STEP_ADDR]], align 4914// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTNEW_STEP]], align 4915// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4916// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4917// CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP4]], [[TMP5]]918// CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 1919// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4920// CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], [[TMP6]]921// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4922// CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP7]]923// CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 1924// CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 4925// CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 4926// CHECK2-NEXT: br label [[FOR_COND:%.*]]927// CHECK2: for.cond:928// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4929// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4930// CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP9]], 1931// CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP8]], [[ADD5]]932// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]933// CHECK2: for.body:934// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4935// CHECK2-NEXT: [[ADD6:%.*]] = add i32 [[TMP10]], 1936// CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 1937// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4938// CHECK2-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP11]]939// CHECK2-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 4940// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4941// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 4942// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTNEW_STEP]], align 4943// CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], [[TMP14]]944// CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP12]], [[MUL]]945// CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 4946// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4947// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP15]])948// CHECK2-NEXT: br label [[FOR_INC:%.*]]949// CHECK2: for.inc:950// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 4951// CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP16]], 1952// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 4953// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]954// CHECK2: for.end:955// CHECK2-NEXT: ret void956//957//958// CHECK2-LABEL: define {{[^@]+}}@foo2959// CHECK2-SAME: () #[[ATTR1]] {960// CHECK2-NEXT: entry:961// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4962// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4963// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4964// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4965// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4966// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4967// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4968// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 4969// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 4970// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]])971// CHECK2-NEXT: store i32 7, ptr [[I]], align 4972// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4973// CHECK2-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 4974// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4975// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4976// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)977// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4978// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 3979// CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]980// CHECK2: cond.true:981// CHECK2-NEXT: br label [[COND_END:%.*]]982// CHECK2: cond.false:983// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4984// CHECK2-NEXT: br label [[COND_END]]985// CHECK2: cond.end:986// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]987// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4988// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4989// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4990// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]991// CHECK2: omp.inner.for.cond:992// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4993// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4994// CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]995// CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]996// CHECK2: omp.inner.for.body:997// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4998// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1999// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1000// CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 41001// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41002// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP7]]1003// CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 41004// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 41005// CHECK2-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP8]], 31006// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]]1007// CHECK2-NEXT: store i32 [[ADD3]], ptr [[I]], align 41008// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 41009// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP9]])1010// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1011// CHECK2: omp.body.continue:1012// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1013// CHECK2: omp.inner.for.inc:1014// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41015// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 11016// CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41017// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1018// CHECK2: omp.inner.for.end:1019// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1020// CHECK2: omp.loop.exit:1021// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])1022// CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:[0-9]+]], i32 [[TMP0]])1023// CHECK2-NEXT: ret void1024//1025//1026// CHECK2-LABEL: define {{[^@]+}}@foo31027// CHECK2-SAME: () #[[ATTR1]] {1028// CHECK2-NEXT: entry:1029// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41030// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41031// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 41032// CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 41033// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41034// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41035// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41036// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41037// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41038// CHECK2-NEXT: [[K:%.*]] = alloca i32, align 41039// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 41040// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 41041// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 41042// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]])1043// CHECK2-NEXT: store i32 7, ptr [[I]], align 41044// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41045// CHECK2-NEXT: store i32 63, ptr [[DOTOMP_UB]], align 41046// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41047// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41048// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1049// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41050// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 631051// CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1052// CHECK2: cond.true:1053// CHECK2-NEXT: br label [[COND_END:%.*]]1054// CHECK2: cond.false:1055// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41056// CHECK2-NEXT: br label [[COND_END]]1057// CHECK2: cond.end:1058// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 63, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]1059// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41060// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41061// CHECK2-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 41062// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1063// CHECK2: omp.inner.for.cond:1064// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41065// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41066// CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]1067// CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1068// CHECK2: omp.inner.for.body:1069// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41070// CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP6]], 161071// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 31072// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 7, [[MUL]]1073// CHECK2-NEXT: store i32 [[ADD]], ptr [[K]], align 41074// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41075// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41076// CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP8]], 161077// CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 161078// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], [[MUL5]]1079// CHECK2-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB]], 41080// CHECK2-NEXT: [[MUL7:%.*]] = mul nsw i32 [[DIV6]], 11081// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]1082// CHECK2-NEXT: store i32 [[ADD8]], ptr [[DOTFORWARD_IV_I]], align 41083// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41084// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41085// CHECK2-NEXT: [[DIV9:%.*]] = sdiv i32 [[TMP10]], 161086// CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 161087// CHECK2-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP9]], [[MUL10]]1088// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41089// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41090// CHECK2-NEXT: [[DIV12:%.*]] = sdiv i32 [[TMP12]], 161091// CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 161092// CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP11]], [[MUL13]]1093// CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 41094// CHECK2-NEXT: [[MUL16:%.*]] = mul nsw i32 [[DIV15]], 41095// CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[SUB11]], [[MUL16]]1096// CHECK2-NEXT: [[MUL18:%.*]] = mul nsw i32 [[SUB17]], 31097// CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 7, [[MUL18]]1098// CHECK2-NEXT: store i32 [[ADD19]], ptr [[J]], align 41099// CHECK2-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41100// CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i32 3, [[TMP13]]1101// CHECK2-NEXT: store i32 [[SUB20]], ptr [[DOTREVERSED_IV_I]], align 41102// CHECK2-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 41103// CHECK2-NEXT: [[MUL21:%.*]] = mul nsw i32 [[TMP14]], 31104// CHECK2-NEXT: [[ADD22:%.*]] = add nsw i32 7, [[MUL21]]1105// CHECK2-NEXT: store i32 [[ADD22]], ptr [[I]], align 41106// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[K]], align 41107// CHECK2-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 41108// CHECK2-NEXT: [[TMP17:%.*]] = load i32, ptr [[J]], align 41109// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP15]], i32 noundef [[TMP16]], i32 noundef [[TMP17]])1110// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1111// CHECK2: omp.body.continue:1112// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1113// CHECK2: omp.inner.for.inc:1114// CHECK2-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41115// CHECK2-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP18]], 11116// CHECK2-NEXT: store i32 [[ADD23]], ptr [[DOTOMP_IV]], align 41117// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1118// CHECK2: omp.inner.for.end:1119// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1120// CHECK2: omp.loop.exit:1121// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])1122// CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]])1123// CHECK2-NEXT: ret void1124//1125//1126// CHECK2-LABEL: define {{[^@]+}}@foo41127// CHECK2-SAME: () #[[ATTR1]] {1128// CHECK2-NEXT: entry:1129// CHECK2-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 0, ptr @foo4.omp_outlined)1130// CHECK2-NEXT: ret void1131//1132//1133// CHECK2-LABEL: define {{[^@]+}}@foo4.omp_outlined1134// CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] {1135// CHECK2-NEXT: entry:1136// CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81137// CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81138// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41139// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41140// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41141// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41142// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41143// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41144// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41145// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 41146// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 41147// CHECK2-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81148// CHECK2-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81149// CHECK2-NEXT: store i32 7, ptr [[I]], align 41150// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41151// CHECK2-NEXT: store i32 3, ptr [[DOTOMP_UB]], align 41152// CHECK2-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41153// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41154// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81155// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 41156// CHECK2-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1157// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41158// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 31159// CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1160// CHECK2: cond.true:1161// CHECK2-NEXT: br label [[COND_END:%.*]]1162// CHECK2: cond.false:1163// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41164// CHECK2-NEXT: br label [[COND_END]]1165// CHECK2: cond.end:1166// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 3, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]1167// CHECK2-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41168// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41169// CHECK2-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 41170// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1171// CHECK2: omp.inner.for.cond:1172// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41173// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41174// CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1175// CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1176// CHECK2: omp.inner.for.body:1177// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41178// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11179// CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1180// CHECK2-NEXT: store i32 [[ADD]], ptr [[DOTFORWARD_IV_I]], align 41181// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41182// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 3, [[TMP8]]1183// CHECK2-NEXT: store i32 [[SUB]], ptr [[DOTREVERSED_IV_I]], align 41184// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 41185// CHECK2-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP9]], 31186// CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 7, [[MUL2]]1187// CHECK2-NEXT: store i32 [[ADD3]], ptr [[I]], align 41188// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41189// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP10]])1190// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1191// CHECK2: omp.body.continue:1192// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1193// CHECK2: omp.inner.for.inc:1194// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41195// CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 11196// CHECK2-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41197// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1198// CHECK2: omp.inner.for.end:1199// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1200// CHECK2: omp.loop.exit:1201// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])1202// CHECK2-NEXT: ret void1203//1204//1205// CHECK2-LABEL: define {{[^@]+}}@foo61206// CHECK2-SAME: () #[[ATTR1]] {1207// CHECK2-NEXT: entry:1208// CHECK2-NEXT: [[ARR:%.*]] = alloca [128 x double], align 161209// CHECK2-NEXT: [[C:%.*]] = alloca i32, align 41210// CHECK2-NEXT: [[__RANGE2:%.*]] = alloca ptr, align 81211// CHECK2-NEXT: [[__END2:%.*]] = alloca ptr, align 81212// CHECK2-NEXT: [[__BEGIN2:%.*]] = alloca ptr, align 81213// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 81214// CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca ptr, align 81215// CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 81216// CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN2:%.*]] = alloca i64, align 81217// CHECK2-NEXT: [[DOTREVERSED_IV___BEGIN2:%.*]] = alloca i64, align 81218// CHECK2-NEXT: [[V:%.*]] = alloca ptr, align 81219// CHECK2-NEXT: store i32 42, ptr [[C]], align 41220// CHECK2-NEXT: store ptr [[ARR]], ptr [[__RANGE2]], align 81221// CHECK2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__RANGE2]], align 81222// CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP0]], i64 0, i64 01223// CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 1281224// CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END2]], align 81225// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE2]], align 81226// CHECK2-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 01227// CHECK2-NEXT: store ptr [[ARRAYDECAY1]], ptr [[__BEGIN2]], align 81228// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE2]], align 81229// CHECK2-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 01230// CHECK2-NEXT: store ptr [[ARRAYDECAY2]], ptr [[DOTCAPTURE_EXPR_]], align 81231// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__END2]], align 81232// CHECK2-NEXT: store ptr [[TMP3]], ptr [[DOTCAPTURE_EXPR_3]], align 81233// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_3]], align 81234// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 81235// CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP4]] to i641236// CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i641237// CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]1238// CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 81239// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 11240// CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 11241// CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 11242// CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i64 [[DIV]], 11243// CHECK2-NEXT: store i64 [[SUB5]], ptr [[DOTCAPTURE_EXPR_4]], align 81244// CHECK2-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN2]], align 81245// CHECK2-NEXT: br label [[FOR_COND:%.*]]1246// CHECK2: for.cond:1247// CHECK2-NEXT: [[TMP6:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 81248// CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 81249// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP7]], 11250// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 [[TMP6]], [[ADD6]]1251// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1252// CHECK2: for.body:1253// CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_4]], align 81254// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP8]], 11255// CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i64 [[ADD7]], 11256// CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 81257// CHECK2-NEXT: [[SUB9:%.*]] = sub nsw i64 [[SUB8]], [[TMP9]]1258// CHECK2-NEXT: store i64 [[SUB9]], ptr [[DOTREVERSED_IV___BEGIN2]], align 81259// CHECK2-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 81260// CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN2]], align 81261// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP11]], 11262// CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds double, ptr [[TMP10]], i64 [[MUL]]1263// CHECK2-NEXT: store ptr [[ADD_PTR10]], ptr [[__BEGIN2]], align 81264// CHECK2-NEXT: [[TMP12:%.*]] = load ptr, ptr [[__BEGIN2]], align 81265// CHECK2-NEXT: store ptr [[TMP12]], ptr [[V]], align 81266// CHECK2-NEXT: [[TMP13:%.*]] = load ptr, ptr [[V]], align 81267// CHECK2-NEXT: [[TMP14:%.*]] = load double, ptr [[TMP13]], align 81268// CHECK2-NEXT: [[TMP15:%.*]] = load i32, ptr [[C]], align 41269// CHECK2-NEXT: call void (...) @body(double noundef [[TMP14]], i32 noundef [[TMP15]])1270// CHECK2-NEXT: br label [[FOR_INC:%.*]]1271// CHECK2: for.inc:1272// CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN2]], align 81273// CHECK2-NEXT: [[INC:%.*]] = add nsw i64 [[TMP16]], 11274// CHECK2-NEXT: store i64 [[INC]], ptr [[DOTFORWARD_IV___BEGIN2]], align 81275// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]1276// CHECK2: for.end:1277// CHECK2-NEXT: ret void1278//1279//1280// CHECK2-LABEL: define {{[^@]+}}@foo71281// CHECK2-SAME: () #[[ATTR1]] {1282// CHECK2-NEXT: entry:1283// CHECK2-NEXT: [[A:%.*]] = alloca [128 x double], align 161284// CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 81285// CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 41286// CHECK2-NEXT: [[_TMP1:%.*]] = alloca i64, align 81287// CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 41288// CHECK2-NEXT: [[C:%.*]] = alloca i32, align 41289// CHECK2-NEXT: [[__RANGE3:%.*]] = alloca ptr, align 81290// CHECK2-NEXT: [[__END3:%.*]] = alloca ptr, align 81291// CHECK2-NEXT: [[__BEGIN3:%.*]] = alloca ptr, align 81292// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca ptr, align 81293// CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca ptr, align 81294// CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 81295// CHECK2-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 81296// CHECK2-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i64, align 81297// CHECK2-NEXT: [[K:%.*]] = alloca i32, align 41298// CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN3:%.*]] = alloca i64, align 81299// CHECK2-NEXT: [[J:%.*]] = alloca i32, align 41300// CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 81301// CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 81302// CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81303// CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41304// CHECK2-NEXT: [[K15:%.*]] = alloca i32, align 41305// CHECK2-NEXT: [[DOTFORWARD_IV___BEGIN316:%.*]] = alloca i64, align 81306// CHECK2-NEXT: [[J17:%.*]] = alloca i32, align 41307// CHECK2-NEXT: [[DOTREVERSED_IV___BEGIN3:%.*]] = alloca i64, align 81308// CHECK2-NEXT: [[V:%.*]] = alloca ptr, align 81309// CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2]])1310// CHECK2-NEXT: store i32 42, ptr [[C]], align 41311// CHECK2-NEXT: store ptr [[A]], ptr [[__RANGE3]], align 81312// CHECK2-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__RANGE3]], align 81313// CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP1]], i64 0, i64 01314// CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds double, ptr [[ARRAYDECAY]], i64 1281315// CHECK2-NEXT: store ptr [[ADD_PTR]], ptr [[__END3]], align 81316// CHECK2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[__RANGE3]], align 81317// CHECK2-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP2]], i64 0, i64 01318// CHECK2-NEXT: store ptr [[ARRAYDECAY3]], ptr [[__BEGIN3]], align 81319// CHECK2-NEXT: [[TMP3:%.*]] = load ptr, ptr [[__RANGE3]], align 81320// CHECK2-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [128 x double], ptr [[TMP3]], i64 0, i64 01321// CHECK2-NEXT: store ptr [[ARRAYDECAY4]], ptr [[DOTCAPTURE_EXPR_]], align 81322// CHECK2-NEXT: [[TMP4:%.*]] = load ptr, ptr [[__END3]], align 81323// CHECK2-NEXT: store ptr [[TMP4]], ptr [[DOTCAPTURE_EXPR_5]], align 81324// CHECK2-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_5]], align 81325// CHECK2-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 81326// CHECK2-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[TMP5]] to i641327// CHECK2-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[TMP6]] to i641328// CHECK2-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]1329// CHECK2-NEXT: [[SUB_PTR_DIV:%.*]] = sdiv exact i64 [[SUB_PTR_SUB]], 81330// CHECK2-NEXT: [[SUB:%.*]] = sub nsw i64 [[SUB_PTR_DIV]], 11331// CHECK2-NEXT: [[ADD:%.*]] = add nsw i64 [[SUB]], 11332// CHECK2-NEXT: [[DIV:%.*]] = sdiv i64 [[ADD]], 11333// CHECK2-NEXT: [[SUB7:%.*]] = sub nsw i64 [[DIV]], 11334// CHECK2-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_6]], align 81335// CHECK2-NEXT: [[TMP7:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 81336// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i64 [[TMP7]], 11337// CHECK2-NEXT: store i64 [[ADD9]], ptr [[DOTCAPTURE_EXPR_8]], align 81338// CHECK2-NEXT: [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81339// CHECK2-NEXT: [[SUB11:%.*]] = sub nsw i64 [[TMP8]], 01340// CHECK2-NEXT: [[DIV12:%.*]] = sdiv i64 [[SUB11]], 11341// CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 4, [[DIV12]]1342// CHECK2-NEXT: [[MUL13:%.*]] = mul nsw i64 [[MUL]], 41343// CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL13]], 11344// CHECK2-NEXT: store i64 [[SUB14]], ptr [[DOTCAPTURE_EXPR_10]], align 81345// CHECK2-NEXT: store i32 7, ptr [[K]], align 41346// CHECK2-NEXT: store i64 0, ptr [[DOTFORWARD_IV___BEGIN3]], align 81347// CHECK2-NEXT: store i32 7, ptr [[J]], align 41348// CHECK2-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81349// CHECK2-NEXT: [[CMP:%.*]] = icmp slt i64 0, [[TMP9]]1350// CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1351// CHECK2: omp.precond.then:1352// CHECK2-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 81353// CHECK2-NEXT: [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 81354// CHECK2-NEXT: store i64 [[TMP10]], ptr [[DOTOMP_UB]], align 81355// CHECK2-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 81356// CHECK2-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41357// CHECK2-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1358// CHECK2-NEXT: [[TMP11:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81359// CHECK2-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 81360// CHECK2-NEXT: [[CMP18:%.*]] = icmp sgt i64 [[TMP11]], [[TMP12]]1361// CHECK2-NEXT: br i1 [[CMP18]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1362// CHECK2: cond.true:1363// CHECK2-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_10]], align 81364// CHECK2-NEXT: br label [[COND_END:%.*]]1365// CHECK2: cond.false:1366// CHECK2-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81367// CHECK2-NEXT: br label [[COND_END]]1368// CHECK2: cond.end:1369// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]1370// CHECK2-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 81371// CHECK2-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_LB]], align 81372// CHECK2-NEXT: store i64 [[TMP15]], ptr [[DOTOMP_IV]], align 81373// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1374// CHECK2: omp.inner.for.cond:1375// CHECK2-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81376// CHECK2-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81377// CHECK2-NEXT: [[CMP19:%.*]] = icmp sle i64 [[TMP16]], [[TMP17]]1378// CHECK2-NEXT: br i1 [[CMP19]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1379// CHECK2: omp.inner.for.body:1380// CHECK2-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81381// CHECK2-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81382// CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i64 [[TMP19]], 01383// CHECK2-NEXT: [[DIV21:%.*]] = sdiv i64 [[SUB20]], 11384// CHECK2-NEXT: [[MUL22:%.*]] = mul nsw i64 1, [[DIV21]]1385// CHECK2-NEXT: [[MUL23:%.*]] = mul nsw i64 [[MUL22]], 41386// CHECK2-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[MUL23]]1387// CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i64 [[DIV24]], 31388// CHECK2-NEXT: [[ADD26:%.*]] = add nsw i64 7, [[MUL25]]1389// CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[ADD26]] to i321390// CHECK2-NEXT: store i32 [[CONV]], ptr [[K15]], align 41391// CHECK2-NEXT: [[TMP20:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81392// CHECK2-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81393// CHECK2-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81394// CHECK2-NEXT: [[SUB27:%.*]] = sub nsw i64 [[TMP22]], 01395// CHECK2-NEXT: [[DIV28:%.*]] = sdiv i64 [[SUB27]], 11396// CHECK2-NEXT: [[MUL29:%.*]] = mul nsw i64 1, [[DIV28]]1397// CHECK2-NEXT: [[MUL30:%.*]] = mul nsw i64 [[MUL29]], 41398// CHECK2-NEXT: [[DIV31:%.*]] = sdiv i64 [[TMP21]], [[MUL30]]1399// CHECK2-NEXT: [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81400// CHECK2-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], 01401// CHECK2-NEXT: [[DIV33:%.*]] = sdiv i64 [[SUB32]], 11402// CHECK2-NEXT: [[MUL34:%.*]] = mul nsw i64 1, [[DIV33]]1403// CHECK2-NEXT: [[MUL35:%.*]] = mul nsw i64 [[MUL34]], 41404// CHECK2-NEXT: [[MUL36:%.*]] = mul nsw i64 [[DIV31]], [[MUL35]]1405// CHECK2-NEXT: [[SUB37:%.*]] = sub nsw i64 [[TMP20]], [[MUL36]]1406// CHECK2-NEXT: [[DIV38:%.*]] = sdiv i64 [[SUB37]], 41407// CHECK2-NEXT: [[MUL39:%.*]] = mul nsw i64 [[DIV38]], 11408// CHECK2-NEXT: [[ADD40:%.*]] = add nsw i64 0, [[MUL39]]1409// CHECK2-NEXT: store i64 [[ADD40]], ptr [[DOTFORWARD_IV___BEGIN316]], align 81410// CHECK2-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81411// CHECK2-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81412// CHECK2-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81413// CHECK2-NEXT: [[SUB41:%.*]] = sub nsw i64 [[TMP26]], 01414// CHECK2-NEXT: [[DIV42:%.*]] = sdiv i64 [[SUB41]], 11415// CHECK2-NEXT: [[MUL43:%.*]] = mul nsw i64 1, [[DIV42]]1416// CHECK2-NEXT: [[MUL44:%.*]] = mul nsw i64 [[MUL43]], 41417// CHECK2-NEXT: [[DIV45:%.*]] = sdiv i64 [[TMP25]], [[MUL44]]1418// CHECK2-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81419// CHECK2-NEXT: [[SUB46:%.*]] = sub nsw i64 [[TMP27]], 01420// CHECK2-NEXT: [[DIV47:%.*]] = sdiv i64 [[SUB46]], 11421// CHECK2-NEXT: [[MUL48:%.*]] = mul nsw i64 1, [[DIV47]]1422// CHECK2-NEXT: [[MUL49:%.*]] = mul nsw i64 [[MUL48]], 41423// CHECK2-NEXT: [[MUL50:%.*]] = mul nsw i64 [[DIV45]], [[MUL49]]1424// CHECK2-NEXT: [[SUB51:%.*]] = sub nsw i64 [[TMP24]], [[MUL50]]1425// CHECK2-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81426// CHECK2-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81427// CHECK2-NEXT: [[TMP30:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81428// CHECK2-NEXT: [[SUB52:%.*]] = sub nsw i64 [[TMP30]], 01429// CHECK2-NEXT: [[DIV53:%.*]] = sdiv i64 [[SUB52]], 11430// CHECK2-NEXT: [[MUL54:%.*]] = mul nsw i64 1, [[DIV53]]1431// CHECK2-NEXT: [[MUL55:%.*]] = mul nsw i64 [[MUL54]], 41432// CHECK2-NEXT: [[DIV56:%.*]] = sdiv i64 [[TMP29]], [[MUL55]]1433// CHECK2-NEXT: [[TMP31:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_8]], align 81434// CHECK2-NEXT: [[SUB57:%.*]] = sub nsw i64 [[TMP31]], 01435// CHECK2-NEXT: [[DIV58:%.*]] = sdiv i64 [[SUB57]], 11436// CHECK2-NEXT: [[MUL59:%.*]] = mul nsw i64 1, [[DIV58]]1437// CHECK2-NEXT: [[MUL60:%.*]] = mul nsw i64 [[MUL59]], 41438// CHECK2-NEXT: [[MUL61:%.*]] = mul nsw i64 [[DIV56]], [[MUL60]]1439// CHECK2-NEXT: [[SUB62:%.*]] = sub nsw i64 [[TMP28]], [[MUL61]]1440// CHECK2-NEXT: [[DIV63:%.*]] = sdiv i64 [[SUB62]], 41441// CHECK2-NEXT: [[MUL64:%.*]] = mul nsw i64 [[DIV63]], 41442// CHECK2-NEXT: [[SUB65:%.*]] = sub nsw i64 [[SUB51]], [[MUL64]]1443// CHECK2-NEXT: [[MUL66:%.*]] = mul nsw i64 [[SUB65]], 31444// CHECK2-NEXT: [[ADD67:%.*]] = add nsw i64 7, [[MUL66]]1445// CHECK2-NEXT: [[CONV68:%.*]] = trunc i64 [[ADD67]] to i321446// CHECK2-NEXT: store i32 [[CONV68]], ptr [[J17]], align 41447// CHECK2-NEXT: [[TMP32:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_6]], align 81448// CHECK2-NEXT: [[ADD69:%.*]] = add nsw i64 [[TMP32]], 11449// CHECK2-NEXT: [[SUB70:%.*]] = sub nsw i64 [[ADD69]], 11450// CHECK2-NEXT: [[TMP33:%.*]] = load i64, ptr [[DOTFORWARD_IV___BEGIN316]], align 81451// CHECK2-NEXT: [[SUB71:%.*]] = sub nsw i64 [[SUB70]], [[TMP33]]1452// CHECK2-NEXT: store i64 [[SUB71]], ptr [[DOTREVERSED_IV___BEGIN3]], align 81453// CHECK2-NEXT: [[TMP34:%.*]] = load ptr, ptr [[DOTCAPTURE_EXPR_]], align 81454// CHECK2-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTREVERSED_IV___BEGIN3]], align 81455// CHECK2-NEXT: [[MUL72:%.*]] = mul nsw i64 [[TMP35]], 11456// CHECK2-NEXT: [[ADD_PTR73:%.*]] = getelementptr inbounds double, ptr [[TMP34]], i64 [[MUL72]]1457// CHECK2-NEXT: store ptr [[ADD_PTR73]], ptr [[__BEGIN3]], align 81458// CHECK2-NEXT: [[TMP36:%.*]] = load ptr, ptr [[__BEGIN3]], align 81459// CHECK2-NEXT: store ptr [[TMP36]], ptr [[V]], align 81460// CHECK2-NEXT: [[TMP37:%.*]] = load i32, ptr [[K15]], align 41461// CHECK2-NEXT: [[TMP38:%.*]] = load i32, ptr [[C]], align 41462// CHECK2-NEXT: [[TMP39:%.*]] = load ptr, ptr [[V]], align 81463// CHECK2-NEXT: [[TMP40:%.*]] = load double, ptr [[TMP39]], align 81464// CHECK2-NEXT: [[TMP41:%.*]] = load i32, ptr [[J17]], align 41465// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP37]], i32 noundef [[TMP38]], double noundef [[TMP40]], i32 noundef [[TMP41]])1466// CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1467// CHECK2: omp.body.continue:1468// CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1469// CHECK2: omp.inner.for.inc:1470// CHECK2-NEXT: [[TMP42:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81471// CHECK2-NEXT: [[ADD74:%.*]] = add nsw i64 [[TMP42]], 11472// CHECK2-NEXT: store i64 [[ADD74]], ptr [[DOTOMP_IV]], align 81473// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]1474// CHECK2: omp.inner.for.end:1475// CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1476// CHECK2: omp.loop.exit:1477// CHECK2-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])1478// CHECK2-NEXT: br label [[OMP_PRECOND_END]]1479// CHECK2: omp.precond.end:1480// CHECK2-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3]], i32 [[TMP0]])1481// CHECK2-NEXT: ret void1482//1483//1484// CHECK2-LABEL: define {{[^@]+}}@tfoo51485// CHECK2-SAME: () #[[ATTR1]] {1486// CHECK2-NEXT: entry:1487// CHECK2-NEXT: call void @_Z4foo5IiTnT_Li3EEvS0_S0_(i32 noundef 0, i32 noundef 42)1488// CHECK2-NEXT: ret void1489//1490//1491// CHECK2-LABEL: define {{[^@]+}}@_Z4foo5IiTnT_Li3EEvS0_S0_1492// CHECK2-SAME: (i32 noundef [[START:%.*]], i32 noundef [[END:%.*]]) #[[ATTR1]] comdat {1493// CHECK2-NEXT: entry:1494// CHECK2-NEXT: [[START_ADDR:%.*]] = alloca i32, align 41495// CHECK2-NEXT: [[END_ADDR:%.*]] = alloca i32, align 41496// CHECK2-NEXT: [[I:%.*]] = alloca i32, align 41497// CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41498// CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41499// CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 41500// CHECK2-NEXT: [[DOTFORWARD_IV_I:%.*]] = alloca i32, align 41501// CHECK2-NEXT: [[DOTREVERSED_IV_I:%.*]] = alloca i32, align 41502// CHECK2-NEXT: store i32 [[START]], ptr [[START_ADDR]], align 41503// CHECK2-NEXT: store i32 [[END]], ptr [[END_ADDR]], align 41504// CHECK2-NEXT: [[TMP0:%.*]] = load i32, ptr [[START_ADDR]], align 41505// CHECK2-NEXT: store i32 [[TMP0]], ptr [[I]], align 41506// CHECK2-NEXT: [[TMP1:%.*]] = load i32, ptr [[START_ADDR]], align 41507// CHECK2-NEXT: store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 41508// CHECK2-NEXT: [[TMP2:%.*]] = load i32, ptr [[END_ADDR]], align 41509// CHECK2-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 41510// CHECK2-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41511// CHECK2-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41512// CHECK2-NEXT: [[SUB:%.*]] = sub i32 [[TMP3]], [[TMP4]]1513// CHECK2-NEXT: [[SUB3:%.*]] = sub i32 [[SUB]], 11514// CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB3]], 31515// CHECK2-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 31516// CHECK2-NEXT: [[SUB4:%.*]] = sub i32 [[DIV]], 11517// CHECK2-NEXT: store i32 [[SUB4]], ptr [[DOTCAPTURE_EXPR_2]], align 41518// CHECK2-NEXT: store i32 0, ptr [[DOTFORWARD_IV_I]], align 41519// CHECK2-NEXT: br label [[FOR_COND:%.*]]1520// CHECK2: for.cond:1521// CHECK2-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41522// CHECK2-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41523// CHECK2-NEXT: [[ADD5:%.*]] = add i32 [[TMP6]], 11524// CHECK2-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP5]], [[ADD5]]1525// CHECK2-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]1526// CHECK2: for.body:1527// CHECK2-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41528// CHECK2-NEXT: [[ADD6:%.*]] = add i32 [[TMP7]], 11529// CHECK2-NEXT: [[SUB7:%.*]] = sub i32 [[ADD6]], 11530// CHECK2-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41531// CHECK2-NEXT: [[SUB8:%.*]] = sub i32 [[SUB7]], [[TMP8]]1532// CHECK2-NEXT: store i32 [[SUB8]], ptr [[DOTREVERSED_IV_I]], align 41533// CHECK2-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41534// CHECK2-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTREVERSED_IV_I]], align 41535// CHECK2-NEXT: [[MUL:%.*]] = mul i32 [[TMP10]], 31536// CHECK2-NEXT: [[ADD9:%.*]] = add i32 [[TMP9]], [[MUL]]1537// CHECK2-NEXT: store i32 [[ADD9]], ptr [[I]], align 41538// CHECK2-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 41539// CHECK2-NEXT: call void (...) @body(i32 noundef [[TMP11]])1540// CHECK2-NEXT: br label [[FOR_INC:%.*]]1541// CHECK2: for.inc:1542// CHECK2-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTFORWARD_IV_I]], align 41543// CHECK2-NEXT: [[INC:%.*]] = add i32 [[TMP12]], 11544// CHECK2-NEXT: store i32 [[INC]], ptr [[DOTFORWARD_IV_I]], align 41545// CHECK2-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]1546// CHECK2: for.end:1547// CHECK2-NEXT: ret void1548//1549//1550// CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_reverse_codegen.cpp1551// CHECK2-SAME: () #[[ATTR0]] section ".text.startup" {1552// CHECK2-NEXT: entry:1553// CHECK2-NEXT: call void @__cxx_global_var_init()1554// CHECK2-NEXT: ret void1555//1556