448 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=51 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s3 4// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -fopenmp-version=51 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s5// expected-no-diagnostics6 7struct S {8 int a = 0;9 int *ptr = &a;10 int &ref = a;11 int arr[4];12 S() {}13 void foo() {14#pragma omp target has_device_addr(a, ref, ptr[0:4], arr[:a])15 ++a, ++*ptr, ++ref, ++arr[0];16 }17};18 19int main() {20 float a = 0;21 float *ptr = &a;22 float &ref = a;23 float arr[4];24 float vla[(int)a];25 S s;26 s.foo();27#pragma omp target has_device_addr(a, ref, ptr[0:4], arr[:(int)a], vla[0])28 ++a, ++*ptr, ++ref, ++arr[0], ++vla[0];29 return a;30}31 32 33// CHECK-LABEL: define {{[^@]+}}@main34// CHECK-SAME: () #[[ATTR0:[0-9]+]] {35// CHECK-NEXT: entry:36// CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 437// CHECK-NEXT: [[A:%.*]] = alloca float, align 438// CHECK-NEXT: [[PTR:%.*]] = alloca ptr, align 839// CHECK-NEXT: [[REF:%.*]] = alloca ptr, align 840// CHECK-NEXT: [[ARR:%.*]] = alloca [4 x float], align 441// CHECK-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 842// CHECK-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 843// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 844// CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 845// CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [6 x ptr], align 846// CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [6 x ptr], align 847// CHECK-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [6 x ptr], align 848// CHECK-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 849// CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 450// CHECK-NEXT: store float 0.000000e+00, ptr [[A]], align 451// CHECK-NEXT: store ptr [[A]], ptr [[PTR]], align 852// CHECK-NEXT: store ptr [[A]], ptr [[REF]], align 853// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 454// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i3255// CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i6456// CHECK-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()57// CHECK-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 858// CHECK-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 459// CHECK-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 860// CHECK-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])61// CHECK-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])62// CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 863// CHECK-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 864// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[PTR]], align 865// CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 866// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 067// CHECK-NEXT: store ptr [[A]], ptr [[TMP6]], align 868// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 069// CHECK-NEXT: store ptr [[A]], ptr [[TMP7]], align 870// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 071// CHECK-NEXT: store ptr null, ptr [[TMP8]], align 872// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 173// CHECK-NEXT: store ptr [[TMP4]], ptr [[TMP9]], align 874// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 175// CHECK-NEXT: store ptr [[TMP4]], ptr [[TMP10]], align 876// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 177// CHECK-NEXT: store ptr null, ptr [[TMP11]], align 878// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 279// CHECK-NEXT: store ptr [[TMP5]], ptr [[TMP12]], align 880// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 281// CHECK-NEXT: store ptr [[TMP5]], ptr [[TMP13]], align 882// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 283// CHECK-NEXT: store ptr null, ptr [[TMP14]], align 884// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 385// CHECK-NEXT: store ptr [[ARR]], ptr [[TMP15]], align 886// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 387// CHECK-NEXT: store ptr [[ARR]], ptr [[TMP16]], align 888// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 389// CHECK-NEXT: store ptr null, ptr [[TMP17]], align 890// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 491// CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP18]], align 892// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 493// CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP19]], align 894// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 495// CHECK-NEXT: store ptr null, ptr [[TMP20]], align 896// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 597// CHECK-NEXT: store ptr [[VLA]], ptr [[TMP21]], align 898// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 599// CHECK-NEXT: store ptr [[VLA]], ptr [[TMP22]], align 8100// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 5101// CHECK-NEXT: store ptr null, ptr [[TMP23]], align 8102// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0103// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [6 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0104// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0105// CHECK-NEXT: store i32 3, ptr [[TMP26]], align 4106// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1107// CHECK-NEXT: store i32 6, ptr [[TMP27]], align 4108// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2109// CHECK-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8110// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3111// CHECK-NEXT: store ptr [[TMP25]], ptr [[TMP29]], align 8112// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4113// CHECK-NEXT: store ptr @.offload_sizes, ptr [[TMP30]], align 8114// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5115// CHECK-NEXT: store ptr @.offload_maptypes, ptr [[TMP31]], align 8116// CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6117// CHECK-NEXT: store ptr null, ptr [[TMP32]], align 8118// CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7119// CHECK-NEXT: store ptr null, ptr [[TMP33]], align 8120// CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8121// CHECK-NEXT: store i64 0, ptr [[TMP34]], align 8122// CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9123// CHECK-NEXT: store i64 0, ptr [[TMP35]], align 8124// CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10125// CHECK-NEXT: store [3 x i32] [i32 -1, i32 0, i32 0], ptr [[TMP36]], align 4126// CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11127// CHECK-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP37]], align 4128// CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12129// CHECK-NEXT: store i32 0, ptr [[TMP38]], align 4130// CHECK-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1:[0-9]+]], i64 -1, i32 -1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l27.region_id, ptr [[KERNEL_ARGS]])131// CHECK-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0132// CHECK-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]133// CHECK: omp_offload.failed:134// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l27(ptr [[A]], ptr [[TMP4]], ptr [[TMP5]], ptr [[ARR]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]135// CHECK-NEXT: br label [[OMP_OFFLOAD_CONT]]136// CHECK: omp_offload.cont:137// CHECK-NEXT: [[TMP41:%.*]] = load float, ptr [[A]], align 4138// CHECK-NEXT: [[CONV1:%.*]] = fptosi float [[TMP41]] to i32139// CHECK-NEXT: store i32 [[CONV1]], ptr [[RETVAL]], align 4140// CHECK-NEXT: [[TMP42:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8141// CHECK-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP42]])142// CHECK-NEXT: [[TMP43:%.*]] = load i32, ptr [[RETVAL]], align 4143// CHECK-NEXT: ret i32 [[TMP43]]144//145//146// CHECK-LABEL: define {{[^@]+}}@_ZN1SC1Ev147// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {148// CHECK-NEXT: entry:149// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8150// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8151// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8152// CHECK-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])153// CHECK-NEXT: ret void154//155//156// CHECK-LABEL: define {{[^@]+}}@_ZN1S3fooEv157// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {158// CHECK-NEXT: entry:159// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8160// CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8161// CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8162// CHECK-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8163// CHECK-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8164// CHECK-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8165// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8166// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8167// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0168// CHECK-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2169// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[REF]], align 8170// CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1171// CHECK-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3172// CHECK-NEXT: [[TMP1:%.*]] = getelementptr [4 x i32], ptr [[ARR]], i32 1173// CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64174// CHECK-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[A]] to i64175// CHECK-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]176// CHECK-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i8, ptr null, i32 1) to i64)177// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes.1, i64 40, i1 false)178// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0179// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP6]], align 8180// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0181// CHECK-NEXT: store ptr [[A]], ptr [[TMP7]], align 8182// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0183// CHECK-NEXT: store i64 [[TMP5]], ptr [[TMP8]], align 8184// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0185// CHECK-NEXT: store ptr null, ptr [[TMP9]], align 8186// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1187// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP10]], align 8188// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1189// CHECK-NEXT: store ptr [[A]], ptr [[TMP11]], align 8190// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1191// CHECK-NEXT: store ptr null, ptr [[TMP12]], align 8192// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2193// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP13]], align 8194// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2195// CHECK-NEXT: store ptr [[TMP0]], ptr [[TMP14]], align 8196// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2197// CHECK-NEXT: store ptr null, ptr [[TMP15]], align 8198// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3199// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP16]], align 8200// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3201// CHECK-NEXT: store ptr [[PTR]], ptr [[TMP17]], align 8202// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3203// CHECK-NEXT: store ptr null, ptr [[TMP18]], align 8204// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4205// CHECK-NEXT: store ptr [[THIS1]], ptr [[TMP19]], align 8206// CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4207// CHECK-NEXT: store ptr [[ARR]], ptr [[TMP20]], align 8208// CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4209// CHECK-NEXT: store ptr null, ptr [[TMP21]], align 8210// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0211// CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0212// CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0213// CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0214// CHECK-NEXT: store i32 3, ptr [[TMP25]], align 4215// CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1216// CHECK-NEXT: store i32 5, ptr [[TMP26]], align 4217// CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2218// CHECK-NEXT: store ptr [[TMP22]], ptr [[TMP27]], align 8219// CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3220// CHECK-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8221// CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4222// CHECK-NEXT: store ptr [[TMP24]], ptr [[TMP29]], align 8223// CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5224// CHECK-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8225// CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6226// CHECK-NEXT: store ptr null, ptr [[TMP31]], align 8227// CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7228// CHECK-NEXT: store ptr null, ptr [[TMP32]], align 8229// CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8230// CHECK-NEXT: store i64 0, ptr [[TMP33]], align 8231// CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9232// CHECK-NEXT: store i64 0, ptr [[TMP34]], align 8233// CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10234// CHECK-NEXT: store [3 x i32] [i32 -1, i32 0, i32 0], ptr [[TMP35]], align 4235// CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11236// CHECK-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4237// CHECK-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12238// CHECK-NEXT: store i32 0, ptr [[TMP37]], align 4239// CHECK-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB1]], i64 -1, i32 -1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN1S3fooEv_l14.region_id, ptr [[KERNEL_ARGS]])240// CHECK-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0241// CHECK-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]242// CHECK: omp_offload.failed:243// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN1S3fooEv_l14(ptr [[THIS1]]) #[[ATTR4]]244// CHECK-NEXT: br label [[OMP_OFFLOAD_CONT]]245// CHECK: omp_offload.cont:246// CHECK-NEXT: ret void247//248//249// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l27250// CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef [[PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[REF:%.*]], ptr noundef nonnull align 4 dereferenceable(16) [[ARR:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VLA1:%.*]]) #[[ATTR3:[0-9]+]] {251// CHECK-NEXT: entry:252// CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8253// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8254// CHECK-NEXT: [[REF_ADDR:%.*]] = alloca ptr, align 8255// CHECK-NEXT: [[ARR_ADDR:%.*]] = alloca ptr, align 8256// CHECK-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8257// CHECK-NEXT: [[VLA_ADDR2:%.*]] = alloca ptr, align 8258// CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 8259// CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8260// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8261// CHECK-NEXT: store ptr [[REF]], ptr [[REF_ADDR]], align 8262// CHECK-NEXT: store ptr [[ARR]], ptr [[ARR_ADDR]], align 8263// CHECK-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8264// CHECK-NEXT: store ptr [[VLA1]], ptr [[VLA_ADDR2]], align 8265// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8266// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[REF_ADDR]], align 8267// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARR_ADDR]], align 8268// CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR]], align 8269// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[VLA_ADDR2]], align 8270// CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8271// CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP0]], align 4272// CHECK-NEXT: [[INC:%.*]] = fadd float [[TMP5]], 1.000000e+00273// CHECK-NEXT: store float [[INC]], ptr [[TMP0]], align 4274// CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8275// CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[TMP6]], align 4276// CHECK-NEXT: [[INC3:%.*]] = fadd float [[TMP7]], 1.000000e+00277// CHECK-NEXT: store float [[INC3]], ptr [[TMP6]], align 4278// CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8279// CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP8]], align 4280// CHECK-NEXT: [[INC4:%.*]] = fadd float [[TMP9]], 1.000000e+00281// CHECK-NEXT: store float [[INC4]], ptr [[TMP8]], align 4282// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP2]], i64 0, i64 0283// CHECK-NEXT: [[TMP10:%.*]] = load float, ptr [[ARRAYIDX]], align 4284// CHECK-NEXT: [[INC5:%.*]] = fadd float [[TMP10]], 1.000000e+00285// CHECK-NEXT: store float [[INC5]], ptr [[ARRAYIDX]], align 4286// CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i64 0287// CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX6]], align 4288// CHECK-NEXT: [[INC7:%.*]] = fadd float [[TMP11]], 1.000000e+00289// CHECK-NEXT: store float [[INC7]], ptr [[ARRAYIDX6]], align 4290// CHECK-NEXT: ret void291//292//293// CHECK-LABEL: define {{[^@]+}}@_ZN1SC2Ev294// CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {295// CHECK-NEXT: entry:296// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8297// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8298// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8299// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0300// CHECK-NEXT: store i32 0, ptr [[A]], align 8301// CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1302// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0303// CHECK-NEXT: store ptr [[A2]], ptr [[PTR]], align 8304// CHECK-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2305// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0306// CHECK-NEXT: store ptr [[A3]], ptr [[REF]], align 8307// CHECK-NEXT: ret void308//309//310// CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN1S3fooEv_l14311// CHECK-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR3]] {312// CHECK-NEXT: entry:313// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8314// CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8315// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8316// CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[TMP0]], i32 0, i32 0317// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 8318// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1319// CHECK-NEXT: store i32 [[INC]], ptr [[A]], align 8320// CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 1321// CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[PTR]], align 8322// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4323// CHECK-NEXT: [[INC1:%.*]] = add nsw i32 [[TMP3]], 1324// CHECK-NEXT: store i32 [[INC1]], ptr [[TMP2]], align 4325// CHECK-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 2326// CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[REF]], align 8327// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4328// CHECK-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP5]], 1329// CHECK-NEXT: store i32 [[INC2]], ptr [[TMP4]], align 4330// CHECK-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 3331// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], ptr [[ARR]], i64 0, i64 0332// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX]], align 8333// CHECK-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP6]], 1334// CHECK-NEXT: store i32 [[INC3]], ptr [[ARRAYIDX]], align 8335// CHECK-NEXT: ret void336//337//338// SIMD-ONLY0-LABEL: define {{[^@]+}}@main339// SIMD-ONLY0-SAME: () #[[ATTR0:[0-9]+]] {340// SIMD-ONLY0-NEXT: entry:341// SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4342// SIMD-ONLY0-NEXT: [[A:%.*]] = alloca float, align 4343// SIMD-ONLY0-NEXT: [[PTR:%.*]] = alloca ptr, align 8344// SIMD-ONLY0-NEXT: [[REF:%.*]] = alloca ptr, align 8345// SIMD-ONLY0-NEXT: [[ARR:%.*]] = alloca [4 x float], align 4346// SIMD-ONLY0-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8347// SIMD-ONLY0-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8348// SIMD-ONLY0-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8349// SIMD-ONLY0-NEXT: [[TMP:%.*]] = alloca ptr, align 8350// SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4351// SIMD-ONLY0-NEXT: store float 0.000000e+00, ptr [[A]], align 4352// SIMD-ONLY0-NEXT: store ptr [[A]], ptr [[PTR]], align 8353// SIMD-ONLY0-NEXT: store ptr [[A]], ptr [[REF]], align 8354// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4355// SIMD-ONLY0-NEXT: [[CONV:%.*]] = fptosi float [[TMP0]] to i32356// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = zext i32 [[CONV]] to i64357// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()358// SIMD-ONLY0-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8359// SIMD-ONLY0-NEXT: [[VLA:%.*]] = alloca float, i64 [[TMP1]], align 4360// SIMD-ONLY0-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8361// SIMD-ONLY0-NEXT: call void @_ZN1SC1Ev(ptr noundef nonnull align 8 dereferenceable(40) [[S]])362// SIMD-ONLY0-NEXT: call void @_ZN1S3fooEv(ptr noundef nonnull align 8 dereferenceable(40) [[S]])363// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8364// SIMD-ONLY0-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8365// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load ptr, ptr [[REF]], align 8366// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load float, ptr [[A]], align 4367// SIMD-ONLY0-NEXT: [[INC:%.*]] = fadd float [[TMP5]], 1.000000e+00368// SIMD-ONLY0-NEXT: store float [[INC]], ptr [[A]], align 4369// SIMD-ONLY0-NEXT: [[TMP6:%.*]] = load ptr, ptr [[PTR]], align 8370// SIMD-ONLY0-NEXT: [[TMP7:%.*]] = load float, ptr [[TMP6]], align 4371// SIMD-ONLY0-NEXT: [[INC1:%.*]] = fadd float [[TMP7]], 1.000000e+00372// SIMD-ONLY0-NEXT: store float [[INC1]], ptr [[TMP6]], align 4373// SIMD-ONLY0-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8374// SIMD-ONLY0-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP8]], align 4375// SIMD-ONLY0-NEXT: [[INC2:%.*]] = fadd float [[TMP9]], 1.000000e+00376// SIMD-ONLY0-NEXT: store float [[INC2]], ptr [[TMP8]], align 4377// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x float], ptr [[ARR]], i64 0, i64 0378// SIMD-ONLY0-NEXT: [[TMP10:%.*]] = load float, ptr [[ARRAYIDX]], align 4379// SIMD-ONLY0-NEXT: [[INC3:%.*]] = fadd float [[TMP10]], 1.000000e+00380// SIMD-ONLY0-NEXT: store float [[INC3]], ptr [[ARRAYIDX]], align 4381// SIMD-ONLY0-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[VLA]], i64 0382// SIMD-ONLY0-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX4]], align 4383// SIMD-ONLY0-NEXT: [[INC5:%.*]] = fadd float [[TMP11]], 1.000000e+00384// SIMD-ONLY0-NEXT: store float [[INC5]], ptr [[ARRAYIDX4]], align 4385// SIMD-ONLY0-NEXT: [[TMP12:%.*]] = load float, ptr [[A]], align 4386// SIMD-ONLY0-NEXT: [[CONV6:%.*]] = fptosi float [[TMP12]] to i32387// SIMD-ONLY0-NEXT: store i32 [[CONV6]], ptr [[RETVAL]], align 4388// SIMD-ONLY0-NEXT: [[TMP13:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8389// SIMD-ONLY0-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP13]])390// SIMD-ONLY0-NEXT: [[TMP14:%.*]] = load i32, ptr [[RETVAL]], align 4391// SIMD-ONLY0-NEXT: ret i32 [[TMP14]]392//393//394// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SC1Ev395// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] comdat {396// SIMD-ONLY0-NEXT: entry:397// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8398// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8399// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8400// SIMD-ONLY0-NEXT: call void @_ZN1SC2Ev(ptr noundef nonnull align 8 dereferenceable(40) [[THIS1]])401// SIMD-ONLY0-NEXT: ret void402//403//404// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1S3fooEv405// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) #[[ATTR2]] comdat {406// SIMD-ONLY0-NEXT: entry:407// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8408// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8409// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8410// SIMD-ONLY0-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0411// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 8412// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1413// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[A]], align 8414// SIMD-ONLY0-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1415// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load ptr, ptr [[PTR]], align 8416// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4417// SIMD-ONLY0-NEXT: [[INC2:%.*]] = add nsw i32 [[TMP2]], 1418// SIMD-ONLY0-NEXT: store i32 [[INC2]], ptr [[TMP1]], align 4419// SIMD-ONLY0-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2420// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load ptr, ptr [[REF]], align 8421// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4422// SIMD-ONLY0-NEXT: [[INC3:%.*]] = add nsw i32 [[TMP4]], 1423// SIMD-ONLY0-NEXT: store i32 [[INC3]], ptr [[TMP3]], align 4424// SIMD-ONLY0-NEXT: [[ARR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 3425// SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], ptr [[ARR]], i64 0, i64 0426// SIMD-ONLY0-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX]], align 8427// SIMD-ONLY0-NEXT: [[INC4:%.*]] = add nsw i32 [[TMP5]], 1428// SIMD-ONLY0-NEXT: store i32 [[INC4]], ptr [[ARRAYIDX]], align 8429// SIMD-ONLY0-NEXT: ret void430//431//432// SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SC2Ev433// SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(40) [[THIS:%.*]]) unnamed_addr #[[ATTR2]] comdat {434// SIMD-ONLY0-NEXT: entry:435// SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8436// SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8437// SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8438// SIMD-ONLY0-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0439// SIMD-ONLY0-NEXT: store i32 0, ptr [[A]], align 8440// SIMD-ONLY0-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 1441// SIMD-ONLY0-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0442// SIMD-ONLY0-NEXT: store ptr [[A2]], ptr [[PTR]], align 8443// SIMD-ONLY0-NEXT: [[REF:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 2444// SIMD-ONLY0-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[THIS1]], i32 0, i32 0445// SIMD-ONLY0-NEXT: store ptr [[A3]], ptr [[REF]], align 8446// SIMD-ONLY0-NEXT: ret void447//448