947 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 22// Test host codegen.3// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s4// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s5// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s6// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-X867// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK-X869 10// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s11// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s13// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0-X86 %s14// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s15// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0-X86 %s16 17// Test target parallel for codegen - host bc file has to be created first.18// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc19// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s -check-prefix=TCHECK-TARGET20// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s21// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK-TARGET22// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc23// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s -check-prefix=TCHECK-TARGET-X8624// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s25// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK-TARGET-X8626 27// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc28// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1-TARGET %s29// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s30// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1-TARGET %s31// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc32// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1-TARGET-X86 %s33// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s34// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1-TARGET-X86 %s35 36// expected-no-diagnostics37#ifndef HEADER38#define HEADER39 40 41int nested(int a){42 #pragma omp target parallel loop43 for (int i = 0; i < 10; ++i)44 ++a;45 46 auto F = [&](){47 #pragma omp parallel48 {49 #pragma omp target parallel loop50 for (int i = 0; i < 10; ++i)51 ++a;52 }53 };54 55 F();56 57 return a;58}59 60 61 62 63 64 65// Check metadata is properly generated:66 67#endif68// CHECK-LABEL: define dso_local noundef signext i32 @_Z6nestedi69// CHECK-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR0:[0-9]+]] {70// CHECK-NEXT: entry:71// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 472// CHECK-NEXT: [[A_CASTED:%.*]] = alloca i64, align 873// CHECK-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 874// CHECK-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 875// CHECK-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 876// CHECK-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 877// CHECK-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 878// CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 479// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 480// CHECK-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 481// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 882// CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 083// CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 884// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 085// CHECK-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 886// CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 087// CHECK-NEXT: store ptr null, ptr [[TMP4]], align 888// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 089// CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 090// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 091// CHECK-NEXT: store i32 3, ptr [[TMP7]], align 492// CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 193// CHECK-NEXT: store i32 1, ptr [[TMP8]], align 494// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 295// CHECK-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 896// CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 397// CHECK-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 898// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 499// CHECK-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 8100// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5101// CHECK-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 8102// CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6103// CHECK-NEXT: store ptr null, ptr [[TMP13]], align 8104// CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7105// CHECK-NEXT: store ptr null, ptr [[TMP14]], align 8106// CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8107// CHECK-NEXT: store i64 0, ptr [[TMP15]], align 8108// CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9109// CHECK-NEXT: store i64 0, ptr [[TMP16]], align 8110// CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10111// CHECK-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP17]], align 4112// CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11113// CHECK-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4114// CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12115// CHECK-NEXT: store i32 0, ptr [[TMP19]], align 4116// CHECK-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.region_id, ptr [[KERNEL_ARGS]])117// CHECK-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0118// CHECK-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]119// CHECK: omp_offload.failed:120// CHECK-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]121// CHECK-NEXT: br label [[OMP_OFFLOAD_CONT]]122// CHECK: omp_offload.cont:123// CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0124// CHECK-NEXT: store ptr [[A_ADDR]], ptr [[TMP22]], align 8125// CHECK-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[F]])126// CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[A_ADDR]], align 4127// CHECK-NEXT: ret i32 [[TMP23]]128//129//130// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42131// CHECK-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {132// CHECK-NEXT: entry:133// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8134// CHECK-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8135// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8136// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4137// CHECK-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4138// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8139// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined, i64 [[TMP1]])140// CHECK-NEXT: ret void141//142//143// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined144// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {145// CHECK-NEXT: entry:146// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8147// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8148// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8149// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4150// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4151// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4152// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4153// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4154// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4155// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4156// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8157// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8158// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8159// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4160// CHECK-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4161// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4162// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4163// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8164// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4165// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)166// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4167// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9168// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]169// CHECK: cond.true:170// CHECK-NEXT: br label [[COND_END:%.*]]171// CHECK: cond.false:172// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4173// CHECK-NEXT: br label [[COND_END]]174// CHECK: cond.end:175// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]176// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4177// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4178// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4179// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]180// CHECK: omp.inner.for.cond:181// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4182// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4183// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]184// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]185// CHECK: omp.inner.for.body:186// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4187// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1188// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]189// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4190// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4191// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1192// CHECK-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4193// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]194// CHECK: omp.body.continue:195// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]196// CHECK: omp.inner.for.inc:197// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4198// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1199// CHECK-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4200// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]201// CHECK: omp.inner.for.end:202// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]203// CHECK: omp.loop.exit:204// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])205// CHECK-NEXT: ret void206//207//208// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49209// CHECK-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {210// CHECK-NEXT: entry:211// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8212// CHECK-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8213// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8214// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4215// CHECK-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4216// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8217// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined, i64 [[TMP1]])218// CHECK-NEXT: ret void219//220//221// CHECK-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined222// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {223// CHECK-NEXT: entry:224// CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8225// CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8226// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8227// CHECK-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4228// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4229// CHECK-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4230// CHECK-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4231// CHECK-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4232// CHECK-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4233// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4234// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8235// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8236// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8237// CHECK-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4238// CHECK-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4239// CHECK-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4240// CHECK-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4241// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8242// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4243// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)244// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4245// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9246// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]247// CHECK: cond.true:248// CHECK-NEXT: br label [[COND_END:%.*]]249// CHECK: cond.false:250// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4251// CHECK-NEXT: br label [[COND_END]]252// CHECK: cond.end:253// CHECK-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]254// CHECK-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4255// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4256// CHECK-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4257// CHECK-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]258// CHECK: omp.inner.for.cond:259// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4260// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4261// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]262// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]263// CHECK: omp.inner.for.body:264// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4265// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1266// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]267// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4268// CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4269// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1270// CHECK-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4271// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]272// CHECK: omp.body.continue:273// CHECK-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]274// CHECK: omp.inner.for.inc:275// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4276// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1277// CHECK-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4278// CHECK-NEXT: br label [[OMP_INNER_FOR_COND]]279// CHECK: omp.inner.for.end:280// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]281// CHECK: omp.loop.exit:282// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])283// CHECK-NEXT: ret void284//285//286// CHECK-X86-LABEL: define dso_local noundef i32 @_Z6nestedi287// CHECK-X86-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {288// CHECK-X86-NEXT: entry:289// CHECK-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4290// CHECK-X86-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4291// CHECK-X86-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4292// CHECK-X86-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4293// CHECK-X86-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4294// CHECK-X86-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8295// CHECK-X86-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 4296// CHECK-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4297// CHECK-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4298// CHECK-X86-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4299// CHECK-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4300// CHECK-X86-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0301// CHECK-X86-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4302// CHECK-X86-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0303// CHECK-X86-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4304// CHECK-X86-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0305// CHECK-X86-NEXT: store ptr null, ptr [[TMP4]], align 4306// CHECK-X86-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0307// CHECK-X86-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0308// CHECK-X86-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0309// CHECK-X86-NEXT: store i32 3, ptr [[TMP7]], align 4310// CHECK-X86-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1311// CHECK-X86-NEXT: store i32 1, ptr [[TMP8]], align 4312// CHECK-X86-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2313// CHECK-X86-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4314// CHECK-X86-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3315// CHECK-X86-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4316// CHECK-X86-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4317// CHECK-X86-NEXT: store ptr @.offload_sizes, ptr [[TMP11]], align 4318// CHECK-X86-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5319// CHECK-X86-NEXT: store ptr @.offload_maptypes, ptr [[TMP12]], align 4320// CHECK-X86-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6321// CHECK-X86-NEXT: store ptr null, ptr [[TMP13]], align 4322// CHECK-X86-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7323// CHECK-X86-NEXT: store ptr null, ptr [[TMP14]], align 4324// CHECK-X86-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8325// CHECK-X86-NEXT: store i64 0, ptr [[TMP15]], align 8326// CHECK-X86-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9327// CHECK-X86-NEXT: store i64 0, ptr [[TMP16]], align 8328// CHECK-X86-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10329// CHECK-X86-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP17]], align 4330// CHECK-X86-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11331// CHECK-X86-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4332// CHECK-X86-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12333// CHECK-X86-NEXT: store i32 0, ptr [[TMP19]], align 4334// CHECK-X86-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.region_id, ptr [[KERNEL_ARGS]])335// CHECK-X86-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0336// CHECK-X86-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]337// CHECK-X86: omp_offload.failed:338// CHECK-X86-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]339// CHECK-X86-NEXT: br label [[OMP_OFFLOAD_CONT]]340// CHECK-X86: omp_offload.cont:341// CHECK-X86-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0342// CHECK-X86-NEXT: store ptr [[A_ADDR]], ptr [[TMP22]], align 4343// CHECK-X86-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(4) [[F]])344// CHECK-X86-NEXT: [[TMP23:%.*]] = load i32, ptr [[A_ADDR]], align 4345// CHECK-X86-NEXT: ret i32 [[TMP23]]346//347//348// CHECK-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42349// CHECK-X86-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {350// CHECK-X86-NEXT: entry:351// CHECK-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4352// CHECK-X86-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4353// CHECK-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4354// CHECK-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4355// CHECK-X86-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4356// CHECK-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4357// CHECK-X86-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined, i32 [[TMP1]])358// CHECK-X86-NEXT: ret void359//360//361// CHECK-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined362// CHECK-X86-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {363// CHECK-X86-NEXT: entry:364// CHECK-X86-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4365// CHECK-X86-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4366// CHECK-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4367// CHECK-X86-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4368// CHECK-X86-NEXT: [[TMP:%.*]] = alloca i32, align 4369// CHECK-X86-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4370// CHECK-X86-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4371// CHECK-X86-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4372// CHECK-X86-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4373// CHECK-X86-NEXT: [[I:%.*]] = alloca i32, align 4374// CHECK-X86-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4375// CHECK-X86-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4376// CHECK-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4377// CHECK-X86-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4378// CHECK-X86-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4379// CHECK-X86-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4380// CHECK-X86-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4381// CHECK-X86-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4382// CHECK-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4383// CHECK-X86-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)384// CHECK-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4385// CHECK-X86-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9386// CHECK-X86-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]387// CHECK-X86: cond.true:388// CHECK-X86-NEXT: br label [[COND_END:%.*]]389// CHECK-X86: cond.false:390// CHECK-X86-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4391// CHECK-X86-NEXT: br label [[COND_END]]392// CHECK-X86: cond.end:393// CHECK-X86-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]394// CHECK-X86-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4395// CHECK-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4396// CHECK-X86-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4397// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]398// CHECK-X86: omp.inner.for.cond:399// CHECK-X86-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4400// CHECK-X86-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4401// CHECK-X86-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]402// CHECK-X86-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]403// CHECK-X86: omp.inner.for.body:404// CHECK-X86-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4405// CHECK-X86-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1406// CHECK-X86-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]407// CHECK-X86-NEXT: store i32 [[ADD]], ptr [[I]], align 4408// CHECK-X86-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4409// CHECK-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1410// CHECK-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4411// CHECK-X86-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]412// CHECK-X86: omp.body.continue:413// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]414// CHECK-X86: omp.inner.for.inc:415// CHECK-X86-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4416// CHECK-X86-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1417// CHECK-X86-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4418// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_COND]]419// CHECK-X86: omp.inner.for.end:420// CHECK-X86-NEXT: br label [[OMP_LOOP_EXIT:%.*]]421// CHECK-X86: omp.loop.exit:422// CHECK-X86-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])423// CHECK-X86-NEXT: ret void424//425//426// CHECK-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49427// CHECK-X86-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {428// CHECK-X86-NEXT: entry:429// CHECK-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4430// CHECK-X86-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4431// CHECK-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4432// CHECK-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4433// CHECK-X86-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4434// CHECK-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4435// CHECK-X86-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined, i32 [[TMP1]])436// CHECK-X86-NEXT: ret void437//438//439// CHECK-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined440// CHECK-X86-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] {441// CHECK-X86-NEXT: entry:442// CHECK-X86-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4443// CHECK-X86-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4444// CHECK-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4445// CHECK-X86-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4446// CHECK-X86-NEXT: [[TMP:%.*]] = alloca i32, align 4447// CHECK-X86-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4448// CHECK-X86-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4449// CHECK-X86-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4450// CHECK-X86-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4451// CHECK-X86-NEXT: [[I:%.*]] = alloca i32, align 4452// CHECK-X86-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4453// CHECK-X86-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4454// CHECK-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4455// CHECK-X86-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4456// CHECK-X86-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4457// CHECK-X86-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4458// CHECK-X86-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4459// CHECK-X86-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4460// CHECK-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4461// CHECK-X86-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)462// CHECK-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4463// CHECK-X86-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9464// CHECK-X86-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]465// CHECK-X86: cond.true:466// CHECK-X86-NEXT: br label [[COND_END:%.*]]467// CHECK-X86: cond.false:468// CHECK-X86-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4469// CHECK-X86-NEXT: br label [[COND_END]]470// CHECK-X86: cond.end:471// CHECK-X86-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]472// CHECK-X86-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4473// CHECK-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4474// CHECK-X86-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4475// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]476// CHECK-X86: omp.inner.for.cond:477// CHECK-X86-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4478// CHECK-X86-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4479// CHECK-X86-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]480// CHECK-X86-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]481// CHECK-X86: omp.inner.for.body:482// CHECK-X86-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4483// CHECK-X86-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1484// CHECK-X86-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]485// CHECK-X86-NEXT: store i32 [[ADD]], ptr [[I]], align 4486// CHECK-X86-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4487// CHECK-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1488// CHECK-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4489// CHECK-X86-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]490// CHECK-X86: omp.body.continue:491// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]492// CHECK-X86: omp.inner.for.inc:493// CHECK-X86-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4494// CHECK-X86-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1495// CHECK-X86-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4496// CHECK-X86-NEXT: br label [[OMP_INNER_FOR_COND]]497// CHECK-X86: omp.inner.for.end:498// CHECK-X86-NEXT: br label [[OMP_LOOP_EXIT:%.*]]499// CHECK-X86: omp.loop.exit:500// CHECK-X86-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])501// CHECK-X86-NEXT: ret void502//503//504// SIMD-ONLY0-LABEL: define dso_local noundef signext i32 @_Z6nestedi505// SIMD-ONLY0-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR0:[0-9]+]] {506// SIMD-ONLY0-NEXT: entry:507// SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4508// SIMD-ONLY0-NEXT: [[I:%.*]] = alloca i32, align 4509// SIMD-ONLY0-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 8510// SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4511// SIMD-ONLY0-NEXT: store i32 0, ptr [[I]], align 4512// SIMD-ONLY0-NEXT: br label [[FOR_COND:%.*]]513// SIMD-ONLY0: for.cond:514// SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4515// SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10516// SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]517// SIMD-ONLY0: for.body:518// SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4519// SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1520// SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4521// SIMD-ONLY0-NEXT: br label [[FOR_INC:%.*]]522// SIMD-ONLY0: for.inc:523// SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4524// SIMD-ONLY0-NEXT: [[INC1:%.*]] = add nsw i32 [[TMP2]], 1525// SIMD-ONLY0-NEXT: store i32 [[INC1]], ptr [[I]], align 4526// SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]527// SIMD-ONLY0: for.end:528// SIMD-ONLY0-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0529// SIMD-ONLY0-NEXT: store ptr [[A_ADDR]], ptr [[TMP3]], align 8530// SIMD-ONLY0-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[F]])531// SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4532// SIMD-ONLY0-NEXT: ret i32 [[TMP4]]533//534//535// SIMD-ONLY0-X86-LABEL: define dso_local noundef i32 @_Z6nestedi536// SIMD-ONLY0-X86-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {537// SIMD-ONLY0-X86-NEXT: entry:538// SIMD-ONLY0-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4539// SIMD-ONLY0-X86-NEXT: [[I:%.*]] = alloca i32, align 4540// SIMD-ONLY0-X86-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 4541// SIMD-ONLY0-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4542// SIMD-ONLY0-X86-NEXT: store i32 0, ptr [[I]], align 4543// SIMD-ONLY0-X86-NEXT: br label [[FOR_COND:%.*]]544// SIMD-ONLY0-X86: for.cond:545// SIMD-ONLY0-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4546// SIMD-ONLY0-X86-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10547// SIMD-ONLY0-X86-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]548// SIMD-ONLY0-X86: for.body:549// SIMD-ONLY0-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4550// SIMD-ONLY0-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1551// SIMD-ONLY0-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4552// SIMD-ONLY0-X86-NEXT: br label [[FOR_INC:%.*]]553// SIMD-ONLY0-X86: for.inc:554// SIMD-ONLY0-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4555// SIMD-ONLY0-X86-NEXT: [[INC1:%.*]] = add nsw i32 [[TMP2]], 1556// SIMD-ONLY0-X86-NEXT: store i32 [[INC1]], ptr [[I]], align 4557// SIMD-ONLY0-X86-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]558// SIMD-ONLY0-X86: for.end:559// SIMD-ONLY0-X86-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0560// SIMD-ONLY0-X86-NEXT: store ptr [[A_ADDR]], ptr [[TMP3]], align 4561// SIMD-ONLY0-X86-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(4) [[F]])562// SIMD-ONLY0-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4563// SIMD-ONLY0-X86-NEXT: ret i32 [[TMP4]]564//565//566// TCHECK-TARGET-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42567// TCHECK-TARGET-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {568// TCHECK-TARGET-NEXT: entry:569// TCHECK-TARGET-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8570// TCHECK-TARGET-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8571// TCHECK-TARGET-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8572// TCHECK-TARGET-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8573// TCHECK-TARGET-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8574// TCHECK-TARGET-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4575// TCHECK-TARGET-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4576// TCHECK-TARGET-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8577// TCHECK-TARGET-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined, i64 [[TMP1]])578// TCHECK-TARGET-NEXT: ret void579//580//581// TCHECK-TARGET-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined582// TCHECK-TARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {583// TCHECK-TARGET-NEXT: entry:584// TCHECK-TARGET-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8585// TCHECK-TARGET-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8586// TCHECK-TARGET-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8587// TCHECK-TARGET-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4588// TCHECK-TARGET-NEXT: [[TMP:%.*]] = alloca i32, align 4589// TCHECK-TARGET-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4590// TCHECK-TARGET-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4591// TCHECK-TARGET-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4592// TCHECK-TARGET-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4593// TCHECK-TARGET-NEXT: [[I:%.*]] = alloca i32, align 4594// TCHECK-TARGET-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8595// TCHECK-TARGET-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8596// TCHECK-TARGET-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8597// TCHECK-TARGET-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4598// TCHECK-TARGET-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4599// TCHECK-TARGET-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4600// TCHECK-TARGET-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4601// TCHECK-TARGET-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8602// TCHECK-TARGET-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4603// TCHECK-TARGET-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)604// TCHECK-TARGET-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4605// TCHECK-TARGET-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9606// TCHECK-TARGET-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]607// TCHECK-TARGET: cond.true:608// TCHECK-TARGET-NEXT: br label [[COND_END:%.*]]609// TCHECK-TARGET: cond.false:610// TCHECK-TARGET-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4611// TCHECK-TARGET-NEXT: br label [[COND_END]]612// TCHECK-TARGET: cond.end:613// TCHECK-TARGET-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]614// TCHECK-TARGET-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4615// TCHECK-TARGET-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4616// TCHECK-TARGET-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4617// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]618// TCHECK-TARGET: omp.inner.for.cond:619// TCHECK-TARGET-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4620// TCHECK-TARGET-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4621// TCHECK-TARGET-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]622// TCHECK-TARGET-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]623// TCHECK-TARGET: omp.inner.for.body:624// TCHECK-TARGET-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4625// TCHECK-TARGET-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1626// TCHECK-TARGET-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]627// TCHECK-TARGET-NEXT: store i32 [[ADD]], ptr [[I]], align 4628// TCHECK-TARGET-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4629// TCHECK-TARGET-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1630// TCHECK-TARGET-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4631// TCHECK-TARGET-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]632// TCHECK-TARGET: omp.body.continue:633// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]634// TCHECK-TARGET: omp.inner.for.inc:635// TCHECK-TARGET-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4636// TCHECK-TARGET-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1637// TCHECK-TARGET-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4638// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_COND]]639// TCHECK-TARGET: omp.inner.for.end:640// TCHECK-TARGET-NEXT: br label [[OMP_LOOP_EXIT:%.*]]641// TCHECK-TARGET: omp.loop.exit:642// TCHECK-TARGET-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])643// TCHECK-TARGET-NEXT: ret void644//645//646// TCHECK-TARGET-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49647// TCHECK-TARGET-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {648// TCHECK-TARGET-NEXT: entry:649// TCHECK-TARGET-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8650// TCHECK-TARGET-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8651// TCHECK-TARGET-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8652// TCHECK-TARGET-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8653// TCHECK-TARGET-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8654// TCHECK-TARGET-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4655// TCHECK-TARGET-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4656// TCHECK-TARGET-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8657// TCHECK-TARGET-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined, i64 [[TMP1]])658// TCHECK-TARGET-NEXT: ret void659//660//661// TCHECK-TARGET-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined662// TCHECK-TARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {663// TCHECK-TARGET-NEXT: entry:664// TCHECK-TARGET-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8665// TCHECK-TARGET-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8666// TCHECK-TARGET-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8667// TCHECK-TARGET-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4668// TCHECK-TARGET-NEXT: [[TMP:%.*]] = alloca i32, align 4669// TCHECK-TARGET-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4670// TCHECK-TARGET-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4671// TCHECK-TARGET-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4672// TCHECK-TARGET-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4673// TCHECK-TARGET-NEXT: [[I:%.*]] = alloca i32, align 4674// TCHECK-TARGET-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8675// TCHECK-TARGET-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8676// TCHECK-TARGET-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8677// TCHECK-TARGET-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4678// TCHECK-TARGET-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4679// TCHECK-TARGET-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4680// TCHECK-TARGET-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4681// TCHECK-TARGET-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8682// TCHECK-TARGET-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4683// TCHECK-TARGET-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)684// TCHECK-TARGET-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4685// TCHECK-TARGET-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9686// TCHECK-TARGET-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]687// TCHECK-TARGET: cond.true:688// TCHECK-TARGET-NEXT: br label [[COND_END:%.*]]689// TCHECK-TARGET: cond.false:690// TCHECK-TARGET-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4691// TCHECK-TARGET-NEXT: br label [[COND_END]]692// TCHECK-TARGET: cond.end:693// TCHECK-TARGET-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]694// TCHECK-TARGET-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4695// TCHECK-TARGET-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4696// TCHECK-TARGET-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4697// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]698// TCHECK-TARGET: omp.inner.for.cond:699// TCHECK-TARGET-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4700// TCHECK-TARGET-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4701// TCHECK-TARGET-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]702// TCHECK-TARGET-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]703// TCHECK-TARGET: omp.inner.for.body:704// TCHECK-TARGET-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4705// TCHECK-TARGET-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1706// TCHECK-TARGET-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]707// TCHECK-TARGET-NEXT: store i32 [[ADD]], ptr [[I]], align 4708// TCHECK-TARGET-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4709// TCHECK-TARGET-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1710// TCHECK-TARGET-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4711// TCHECK-TARGET-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]712// TCHECK-TARGET: omp.body.continue:713// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]714// TCHECK-TARGET: omp.inner.for.inc:715// TCHECK-TARGET-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4716// TCHECK-TARGET-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1717// TCHECK-TARGET-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4718// TCHECK-TARGET-NEXT: br label [[OMP_INNER_FOR_COND]]719// TCHECK-TARGET: omp.inner.for.end:720// TCHECK-TARGET-NEXT: br label [[OMP_LOOP_EXIT:%.*]]721// TCHECK-TARGET: omp.loop.exit:722// TCHECK-TARGET-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])723// TCHECK-TARGET-NEXT: ret void724//725//726// TCHECK-TARGET-X86-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42727// TCHECK-TARGET-X86-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {728// TCHECK-TARGET-X86-NEXT: entry:729// TCHECK-TARGET-X86-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4730// TCHECK-TARGET-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4731// TCHECK-TARGET-X86-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4732// TCHECK-TARGET-X86-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4733// TCHECK-TARGET-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4734// TCHECK-TARGET-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4735// TCHECK-TARGET-X86-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4736// TCHECK-TARGET-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4737// TCHECK-TARGET-X86-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined, i32 [[TMP1]])738// TCHECK-TARGET-X86-NEXT: ret void739//740//741// TCHECK-TARGET-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l42.omp_outlined742// TCHECK-TARGET-X86-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {743// TCHECK-TARGET-X86-NEXT: entry:744// TCHECK-TARGET-X86-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4745// TCHECK-TARGET-X86-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4746// TCHECK-TARGET-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4747// TCHECK-TARGET-X86-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4748// TCHECK-TARGET-X86-NEXT: [[TMP:%.*]] = alloca i32, align 4749// TCHECK-TARGET-X86-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4750// TCHECK-TARGET-X86-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4751// TCHECK-TARGET-X86-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4752// TCHECK-TARGET-X86-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4753// TCHECK-TARGET-X86-NEXT: [[I:%.*]] = alloca i32, align 4754// TCHECK-TARGET-X86-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4755// TCHECK-TARGET-X86-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4756// TCHECK-TARGET-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4757// TCHECK-TARGET-X86-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4758// TCHECK-TARGET-X86-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4759// TCHECK-TARGET-X86-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4760// TCHECK-TARGET-X86-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4761// TCHECK-TARGET-X86-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4762// TCHECK-TARGET-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4763// TCHECK-TARGET-X86-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)764// TCHECK-TARGET-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4765// TCHECK-TARGET-X86-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9766// TCHECK-TARGET-X86-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]767// TCHECK-TARGET-X86: cond.true:768// TCHECK-TARGET-X86-NEXT: br label [[COND_END:%.*]]769// TCHECK-TARGET-X86: cond.false:770// TCHECK-TARGET-X86-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4771// TCHECK-TARGET-X86-NEXT: br label [[COND_END]]772// TCHECK-TARGET-X86: cond.end:773// TCHECK-TARGET-X86-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]774// TCHECK-TARGET-X86-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4775// TCHECK-TARGET-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4776// TCHECK-TARGET-X86-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4777// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]778// TCHECK-TARGET-X86: omp.inner.for.cond:779// TCHECK-TARGET-X86-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4780// TCHECK-TARGET-X86-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4781// TCHECK-TARGET-X86-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]782// TCHECK-TARGET-X86-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]783// TCHECK-TARGET-X86: omp.inner.for.body:784// TCHECK-TARGET-X86-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4785// TCHECK-TARGET-X86-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1786// TCHECK-TARGET-X86-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]787// TCHECK-TARGET-X86-NEXT: store i32 [[ADD]], ptr [[I]], align 4788// TCHECK-TARGET-X86-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4789// TCHECK-TARGET-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1790// TCHECK-TARGET-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4791// TCHECK-TARGET-X86-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]792// TCHECK-TARGET-X86: omp.body.continue:793// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]794// TCHECK-TARGET-X86: omp.inner.for.inc:795// TCHECK-TARGET-X86-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4796// TCHECK-TARGET-X86-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1797// TCHECK-TARGET-X86-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4798// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_COND]]799// TCHECK-TARGET-X86: omp.inner.for.end:800// TCHECK-TARGET-X86-NEXT: br label [[OMP_LOOP_EXIT:%.*]]801// TCHECK-TARGET-X86: omp.loop.exit:802// TCHECK-TARGET-X86-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])803// TCHECK-TARGET-X86-NEXT: ret void804//805//806// TCHECK-TARGET-X86-LABEL: define weak_odr protected void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49807// TCHECK-TARGET-X86-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {808// TCHECK-TARGET-X86-NEXT: entry:809// TCHECK-TARGET-X86-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4810// TCHECK-TARGET-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4811// TCHECK-TARGET-X86-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4812// TCHECK-TARGET-X86-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4813// TCHECK-TARGET-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4814// TCHECK-TARGET-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4815// TCHECK-TARGET-X86-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4816// TCHECK-TARGET-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4817// TCHECK-TARGET-X86-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined, i32 [[TMP1]])818// TCHECK-TARGET-X86-NEXT: ret void819//820//821// TCHECK-TARGET-X86-LABEL: define internal void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z6nestedi_l49.omp_outlined822// TCHECK-TARGET-X86-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {823// TCHECK-TARGET-X86-NEXT: entry:824// TCHECK-TARGET-X86-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4825// TCHECK-TARGET-X86-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4826// TCHECK-TARGET-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4827// TCHECK-TARGET-X86-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4828// TCHECK-TARGET-X86-NEXT: [[TMP:%.*]] = alloca i32, align 4829// TCHECK-TARGET-X86-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4830// TCHECK-TARGET-X86-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4831// TCHECK-TARGET-X86-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4832// TCHECK-TARGET-X86-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4833// TCHECK-TARGET-X86-NEXT: [[I:%.*]] = alloca i32, align 4834// TCHECK-TARGET-X86-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4835// TCHECK-TARGET-X86-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4836// TCHECK-TARGET-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4837// TCHECK-TARGET-X86-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4838// TCHECK-TARGET-X86-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4839// TCHECK-TARGET-X86-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4840// TCHECK-TARGET-X86-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4841// TCHECK-TARGET-X86-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4842// TCHECK-TARGET-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4843// TCHECK-TARGET-X86-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)844// TCHECK-TARGET-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4845// TCHECK-TARGET-X86-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9846// TCHECK-TARGET-X86-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]847// TCHECK-TARGET-X86: cond.true:848// TCHECK-TARGET-X86-NEXT: br label [[COND_END:%.*]]849// TCHECK-TARGET-X86: cond.false:850// TCHECK-TARGET-X86-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4851// TCHECK-TARGET-X86-NEXT: br label [[COND_END]]852// TCHECK-TARGET-X86: cond.end:853// TCHECK-TARGET-X86-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]854// TCHECK-TARGET-X86-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4855// TCHECK-TARGET-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4856// TCHECK-TARGET-X86-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4857// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]858// TCHECK-TARGET-X86: omp.inner.for.cond:859// TCHECK-TARGET-X86-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4860// TCHECK-TARGET-X86-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4861// TCHECK-TARGET-X86-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]862// TCHECK-TARGET-X86-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]863// TCHECK-TARGET-X86: omp.inner.for.body:864// TCHECK-TARGET-X86-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4865// TCHECK-TARGET-X86-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1866// TCHECK-TARGET-X86-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]867// TCHECK-TARGET-X86-NEXT: store i32 [[ADD]], ptr [[I]], align 4868// TCHECK-TARGET-X86-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4869// TCHECK-TARGET-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1870// TCHECK-TARGET-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4871// TCHECK-TARGET-X86-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]872// TCHECK-TARGET-X86: omp.body.continue:873// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]874// TCHECK-TARGET-X86: omp.inner.for.inc:875// TCHECK-TARGET-X86-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4876// TCHECK-TARGET-X86-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1877// TCHECK-TARGET-X86-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4878// TCHECK-TARGET-X86-NEXT: br label [[OMP_INNER_FOR_COND]]879// TCHECK-TARGET-X86: omp.inner.for.end:880// TCHECK-TARGET-X86-NEXT: br label [[OMP_LOOP_EXIT:%.*]]881// TCHECK-TARGET-X86: omp.loop.exit:882// TCHECK-TARGET-X86-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])883// TCHECK-TARGET-X86-NEXT: ret void884//885//886// SIMD-ONLY1-TARGET-LABEL: define dso_local noundef signext i32 @_Z6nestedi887// SIMD-ONLY1-TARGET-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR0:[0-9]+]] {888// SIMD-ONLY1-TARGET-NEXT: entry:889// SIMD-ONLY1-TARGET-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4890// SIMD-ONLY1-TARGET-NEXT: [[I:%.*]] = alloca i32, align 4891// SIMD-ONLY1-TARGET-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 8892// SIMD-ONLY1-TARGET-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4893// SIMD-ONLY1-TARGET-NEXT: store i32 0, ptr [[I]], align 4894// SIMD-ONLY1-TARGET-NEXT: br label [[FOR_COND:%.*]]895// SIMD-ONLY1-TARGET: for.cond:896// SIMD-ONLY1-TARGET-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4897// SIMD-ONLY1-TARGET-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10898// SIMD-ONLY1-TARGET-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]899// SIMD-ONLY1-TARGET: for.body:900// SIMD-ONLY1-TARGET-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4901// SIMD-ONLY1-TARGET-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1902// SIMD-ONLY1-TARGET-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4903// SIMD-ONLY1-TARGET-NEXT: br label [[FOR_INC:%.*]]904// SIMD-ONLY1-TARGET: for.inc:905// SIMD-ONLY1-TARGET-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4906// SIMD-ONLY1-TARGET-NEXT: [[INC1:%.*]] = add nsw i32 [[TMP2]], 1907// SIMD-ONLY1-TARGET-NEXT: store i32 [[INC1]], ptr [[I]], align 4908// SIMD-ONLY1-TARGET-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]909// SIMD-ONLY1-TARGET: for.end:910// SIMD-ONLY1-TARGET-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0911// SIMD-ONLY1-TARGET-NEXT: store ptr [[A_ADDR]], ptr [[TMP3]], align 8912// SIMD-ONLY1-TARGET-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[F]])913// SIMD-ONLY1-TARGET-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4914// SIMD-ONLY1-TARGET-NEXT: ret i32 [[TMP4]]915//916//917// SIMD-ONLY1-TARGET-X86-LABEL: define dso_local noundef i32 @_Z6nestedi918// SIMD-ONLY1-TARGET-X86-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {919// SIMD-ONLY1-TARGET-X86-NEXT: entry:920// SIMD-ONLY1-TARGET-X86-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4921// SIMD-ONLY1-TARGET-X86-NEXT: [[I:%.*]] = alloca i32, align 4922// SIMD-ONLY1-TARGET-X86-NEXT: [[F:%.*]] = alloca [[CLASS_ANON:%.*]], align 4923// SIMD-ONLY1-TARGET-X86-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4924// SIMD-ONLY1-TARGET-X86-NEXT: store i32 0, ptr [[I]], align 4925// SIMD-ONLY1-TARGET-X86-NEXT: br label [[FOR_COND:%.*]]926// SIMD-ONLY1-TARGET-X86: for.cond:927// SIMD-ONLY1-TARGET-X86-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4928// SIMD-ONLY1-TARGET-X86-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10929// SIMD-ONLY1-TARGET-X86-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]930// SIMD-ONLY1-TARGET-X86: for.body:931// SIMD-ONLY1-TARGET-X86-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_ADDR]], align 4932// SIMD-ONLY1-TARGET-X86-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1933// SIMD-ONLY1-TARGET-X86-NEXT: store i32 [[INC]], ptr [[A_ADDR]], align 4934// SIMD-ONLY1-TARGET-X86-NEXT: br label [[FOR_INC:%.*]]935// SIMD-ONLY1-TARGET-X86: for.inc:936// SIMD-ONLY1-TARGET-X86-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4937// SIMD-ONLY1-TARGET-X86-NEXT: [[INC1:%.*]] = add nsw i32 [[TMP2]], 1938// SIMD-ONLY1-TARGET-X86-NEXT: store i32 [[INC1]], ptr [[I]], align 4939// SIMD-ONLY1-TARGET-X86-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]940// SIMD-ONLY1-TARGET-X86: for.end:941// SIMD-ONLY1-TARGET-X86-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[F]], i32 0, i32 0942// SIMD-ONLY1-TARGET-X86-NEXT: store ptr [[A_ADDR]], ptr [[TMP3]], align 4943// SIMD-ONLY1-TARGET-X86-NEXT: call void @"_ZZ6nestediENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(4) [[F]])944// SIMD-ONLY1-TARGET-X86-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4945// SIMD-ONLY1-TARGET-X86-NEXT: ret i32 [[TMP4]]946//947