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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"17// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"18// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"20#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24  T a[X][Y];25 26  int foo(void) {27 28    #pragma omp target teams distribute collapse(2)29    for(int i = 0; i < X; i++) {30      for(int j = 0; j < Y; j++) {31        a[i][j] = (T)0;32      }33    }34 35    // discard loop variables not needed here36 37    return a[0][0];38  }39};40 41int teams_template_struct(void) {42  SS<int, 123, 456> V;43  return V.foo();44 45}46#endif // CK147 48// Test host codegen.49// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK950// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s51// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK952// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1153// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s54// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1155 56// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"57// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s58// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"59// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"60// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s61// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"62#ifdef CK263 64template <typename T, int n, int m>65int tmain(T argc) {66  T a[n][m];67  #pragma omp target teams distribute collapse(2)68  for(int i = 0; i < n; i++) {69    for(int j = 0; j < m; j++) {70      a[i][j] = (T)0;71    }72  }73  return 0;74}75 76int main (int argc, char **argv) {77  int n = 100;78  int m = 2;79  int a[n][m];80  #pragma omp target teams distribute collapse(2)81  for(int i = 0; i < n; i++) {82    for(int j = 0; j < m; j++) {83      a[i][j] = 0;84    }85  }86  return tmain<int, 10, 2>(argc);87}88 89 90 91 92 93// discard loop variables not needed here94 95#endif // CK296#endif // #ifndef HEADER97// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv98// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {99// CHECK1-NEXT:  entry:100// CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4101// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])102// CHECK1-NEXT:    ret i32 [[CALL]]103//104//105// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv106// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {107// CHECK1-NEXT:  entry:108// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8109// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8110// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8111// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8112// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4113// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4114// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8115// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8116// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8117// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0118// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0119// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8120// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0121// CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8122// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0123// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8124// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0125// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0126// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0127// CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4128// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1129// CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4130// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2131// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8132// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3133// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8134// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4135// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8136// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5137// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8138// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6139// CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8140// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7141// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8142// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8143// CHECK1-NEXT:    store i64 56088, ptr [[TMP13]], align 8144// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9145// CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8146// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10147// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4148// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11149// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4150// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12151// CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4152// CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])153// CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0154// CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]155// CHECK1:       omp_offload.failed:156// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]157// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]158// CHECK1:       omp_offload.cont:159// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0160// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0161// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0162// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4163// CHECK1-NEXT:    ret i32 [[TMP20]]164//165//166// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28167// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {168// CHECK1-NEXT:  entry:169// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8170// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8171// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8172// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])173// CHECK1-NEXT:    ret void174//175//176// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined177// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {178// CHECK1-NEXT:  entry:179// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8180// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8181// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8182// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4183// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4184// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4185// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4186// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4187// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4188// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4189// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4190// CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4191// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8192// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8193// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8194// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8195// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4196// CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4197// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4198// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4199// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8200// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4201// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)202// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4203// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087204// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]205// CHECK1:       cond.true:206// CHECK1-NEXT:    br label [[COND_END:%.*]]207// CHECK1:       cond.false:208// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4209// CHECK1-NEXT:    br label [[COND_END]]210// CHECK1:       cond.end:211// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]212// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4213// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4214// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4215// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]216// CHECK1:       omp.inner.for.cond:217// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4218// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4219// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]220// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]221// CHECK1:       omp.inner.for.body:222// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4223// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456224// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1225// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]226// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4227// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4228// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4229// CHECK1-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456230// CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456231// CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]232// CHECK1-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1233// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]234// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4235// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0236// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4237// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64238// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]239// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4240// CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64241// CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]242// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4243// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]244// CHECK1:       omp.body.continue:245// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]246// CHECK1:       omp.inner.for.inc:247// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4248// CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1249// CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4250// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]251// CHECK1:       omp.inner.for.end:252// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]253// CHECK1:       omp.loop.exit:254// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])255// CHECK1-NEXT:    ret void256//257//258// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv259// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {260// CHECK3-NEXT:  entry:261// CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4262// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])263// CHECK3-NEXT:    ret i32 [[CALL]]264//265//266// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv267// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {268// CHECK3-NEXT:  entry:269// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4270// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4271// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4272// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4273// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4274// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4275// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8276// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4277// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4278// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0279// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0280// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4281// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0282// CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4283// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0284// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4285// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0286// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0287// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0288// CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4289// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1290// CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4291// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2292// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4293// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3294// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4295// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4296// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4297// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5298// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4299// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6300// CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4301// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7302// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4303// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8304// CHECK3-NEXT:    store i64 56088, ptr [[TMP13]], align 8305// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9306// CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8307// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10308// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4309// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11310// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4311// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12312// CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4313// CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])314// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0315// CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]316// CHECK3:       omp_offload.failed:317// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]318// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]319// CHECK3:       omp_offload.cont:320// CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0321// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0322// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0323// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4324// CHECK3-NEXT:    ret i32 [[TMP20]]325//326//327// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28328// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {329// CHECK3-NEXT:  entry:330// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4331// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4332// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4333// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])334// CHECK3-NEXT:    ret void335//336//337// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined338// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {339// CHECK3-NEXT:  entry:340// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4341// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4342// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4343// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4344// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4345// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4346// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4347// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4348// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4349// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4350// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4351// CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4352// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4353// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4354// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4355// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4356// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4357// CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4358// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4359// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4360// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4361// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4362// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)363// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4364// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087365// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]366// CHECK3:       cond.true:367// CHECK3-NEXT:    br label [[COND_END:%.*]]368// CHECK3:       cond.false:369// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4370// CHECK3-NEXT:    br label [[COND_END]]371// CHECK3:       cond.end:372// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]373// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4374// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4375// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4376// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]377// CHECK3:       omp.inner.for.cond:378// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4379// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4380// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]381// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]382// CHECK3:       omp.inner.for.body:383// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4384// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456385// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1386// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]387// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4388// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4389// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4390// CHECK3-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456391// CHECK3-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456392// CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]393// CHECK3-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1394// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]395// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4396// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0397// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4398// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]]399// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4400// CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]401// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4402// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]403// CHECK3:       omp.body.continue:404// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]405// CHECK3:       omp.inner.for.inc:406// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4407// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1408// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4409// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]410// CHECK3:       omp.inner.for.end:411// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]412// CHECK3:       omp.loop.exit:413// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])414// CHECK3-NEXT:    ret void415//416//417// CHECK9-LABEL: define {{[^@]+}}@main418// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {419// CHECK9-NEXT:  entry:420// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4421// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4422// CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8423// CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4424// CHECK9-NEXT:    [[M:%.*]] = alloca i32, align 4425// CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8426// CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8427// CHECK9-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i64, align 8428// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8429// CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8430// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8431// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8432// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8433// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8434// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4435// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4436// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4437// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4438// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8439// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8440// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4441// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4442// CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8443// CHECK9-NEXT:    store i32 100, ptr [[N]], align 4444// CHECK9-NEXT:    store i32 2, ptr [[M]], align 4445// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4446// CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64447// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M]], align 4448// CHECK9-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64449// CHECK9-NEXT:    [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()450// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8451// CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]452// CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4453// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8454// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8455// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N]], align 4456// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4457// CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8458// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[M]], align 4459// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[M_CASTED]], align 4460// CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8461// CHECK9-NEXT:    [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]462// CHECK9-NEXT:    [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4463// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)464// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0465// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP12]], align 8466// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0467// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP13]], align 8468// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0469// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8470// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1471// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP15]], align 8472// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1473// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP16]], align 8474// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1475// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8476// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2477// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP18]], align 8478// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2479// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP19]], align 8480// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2481// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8482// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3483// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP21]], align 8484// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3485// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP22]], align 8486// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3487// CHECK9-NEXT:    store ptr null, ptr [[TMP23]], align 8488// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4489// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 8490// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4491// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP25]], align 8492// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4493// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[TMP26]], align 8494// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4495// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8496// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0497// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0498// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0499// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[N]], align 4500// CHECK9-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4501// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[M]], align 4502// CHECK9-NEXT:    store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4503// CHECK9-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4504// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0505// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1506// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64507// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4508// CHECK9-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0509// CHECK9-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1510// CHECK9-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64511// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]512// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1513// CHECK9-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8514// CHECK9-NEXT:    [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8515// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP35]], 1516// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0517// CHECK9-NEXT:    store i32 3, ptr [[TMP36]], align 4518// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1519// CHECK9-NEXT:    store i32 5, ptr [[TMP37]], align 4520// CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2521// CHECK9-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 8522// CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3523// CHECK9-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 8524// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4525// CHECK9-NEXT:    store ptr [[TMP30]], ptr [[TMP40]], align 8526// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5527// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8528// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6529// CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8530// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7531// CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8532// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8533// CHECK9-NEXT:    store i64 [[ADD]], ptr [[TMP44]], align 8534// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9535// CHECK9-NEXT:    store i64 0, ptr [[TMP45]], align 8536// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10537// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4538// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11539// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4540// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12541// CHECK9-NEXT:    store i32 0, ptr [[TMP48]], align 4542// CHECK9-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, ptr [[KERNEL_ARGS]])543// CHECK9-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0544// CHECK9-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]545// CHECK9:       omp_offload.failed:546// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]547// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]548// CHECK9:       omp_offload.cont:549// CHECK9-NEXT:    [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4550// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])551// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4552// CHECK9-NEXT:    [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8553// CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP52]])554// CHECK9-NEXT:    [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4555// CHECK9-NEXT:    ret i32 [[TMP53]]556//557//558// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80559// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {560// CHECK9-NEXT:  entry:561// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8562// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8563// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8564// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8565// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8566// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8567// CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8568// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8569// CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8570// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8571// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8572// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8573// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8574// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8575// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8576// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4577// CHECK9-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4578// CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8579// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 4580// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[M_CASTED]], align 4581// CHECK9-NEXT:    [[TMP6:%.*]] = load i64, ptr [[M_CASTED]], align 8582// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined, i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])583// CHECK9-NEXT:    ret void584//585//586// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined587// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {588// CHECK9-NEXT:  entry:589// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8590// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8591// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8592// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8593// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8594// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8595// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8596// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8597// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4598// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4599// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4600// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4601// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8602// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4603// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4604// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 8605// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 8606// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8607// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4608// CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4609// CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4610// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8611// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8612// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8613// CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8614// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8615// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8616// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8617// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8618// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8619// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8620// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4621// CHECK9-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4622// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4623// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4624// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4625// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0626// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1627// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64628// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4629// CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0630// CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1631// CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64632// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]633// CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1634// CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8635// CHECK9-NEXT:    store i32 0, ptr [[I]], align 4636// CHECK9-NEXT:    store i32 0, ptr [[J]], align 4637// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4638// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]639// CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]640// CHECK9:       land.lhs.true:641// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4642// CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]643// CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]644// CHECK9:       omp.precond.then:645// CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 8646// CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8647// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8648// CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8649// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4650// CHECK9-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8651// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4652// CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)653// CHECK9-NEXT:    [[TMP12:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8654// CHECK9-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8655// CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]656// CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]657// CHECK9:       cond.true:658// CHECK9-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8659// CHECK9-NEXT:    br label [[COND_END:%.*]]660// CHECK9:       cond.false:661// CHECK9-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8662// CHECK9-NEXT:    br label [[COND_END]]663// CHECK9:       cond.end:664// CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]665// CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 8666// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8667// CHECK9-NEXT:    store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8668// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]669// CHECK9:       omp.inner.for.cond:670// CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8671// CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8672// CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]673// CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]674// CHECK9:       omp.inner.for.body:675// CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8676// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4677// CHECK9-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP20]], 0678// CHECK9-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1679// CHECK9-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]680// CHECK9-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64681// CHECK9-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP19]], [[CONV18]]682// CHECK9-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1683// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]684// CHECK9-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32685// CHECK9-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4686// CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8687// CHECK9-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8688// CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4689// CHECK9-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP23]], 0690// CHECK9-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1691// CHECK9-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]692// CHECK9-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64693// CHECK9-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP22]], [[CONV25]]694// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4695// CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP24]], 0696// CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1697// CHECK9-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]698// CHECK9-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64699// CHECK9-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]700// CHECK9-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP21]], [[MUL31]]701// CHECK9-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1702// CHECK9-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]703// CHECK9-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32704// CHECK9-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4705// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[I11]], align 4706// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64707// CHECK9-NEXT:    [[TMP26:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]708// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[TMP26]]709// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[J12]], align 4710// CHECK9-NEXT:    [[IDXPROM36:%.*]] = sext i32 [[TMP27]] to i64711// CHECK9-NEXT:    [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]712// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX37]], align 4713// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]714// CHECK9:       omp.body.continue:715// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]716// CHECK9:       omp.inner.for.inc:717// CHECK9-NEXT:    [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8718// CHECK9-NEXT:    [[ADD38:%.*]] = add nsw i64 [[TMP28]], 1719// CHECK9-NEXT:    store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8720// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]721// CHECK9:       omp.inner.for.end:722// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]723// CHECK9:       omp.loop.exit:724// CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8725// CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4726// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP30]])727// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]728// CHECK9:       omp.precond.end:729// CHECK9-NEXT:    ret void730//731//732// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_733// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {734// CHECK9-NEXT:  entry:735// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4736// CHECK9-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 4737// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8738// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8739// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8740// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4741// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4742// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8743// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4744// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0745// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8746// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0747// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8748// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0749// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8750// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0751// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0752// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0753// CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 4754// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1755// CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 4756// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2757// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8758// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3759// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8760// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4761// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 8762// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5763// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8764// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6765// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8766// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7767// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8768// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8769// CHECK9-NEXT:    store i64 20, ptr [[TMP13]], align 8770// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9771// CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 8772// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10773// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4774// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11775// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4776// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12777// CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 4778// CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, ptr [[KERNEL_ARGS]])779// CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0780// CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]781// CHECK9:       omp_offload.failed:782// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67(ptr [[A]]) #[[ATTR3]]783// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]784// CHECK9:       omp_offload.cont:785// CHECK9-NEXT:    ret i32 0786//787//788// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67789// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {790// CHECK9-NEXT:  entry:791// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8792// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8793// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8794// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined, ptr [[TMP0]])795// CHECK9-NEXT:    ret void796//797//798// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined799// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {800// CHECK9-NEXT:  entry:801// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8802// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8803// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8804// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4805// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4806// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4807// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4808// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4809// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4810// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4811// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4812// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4813// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8814// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8815// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8816// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8817// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4818// CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 4819// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4820// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4821// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8822// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4823// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)824// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4825// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19826// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]827// CHECK9:       cond.true:828// CHECK9-NEXT:    br label [[COND_END:%.*]]829// CHECK9:       cond.false:830// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4831// CHECK9-NEXT:    br label [[COND_END]]832// CHECK9:       cond.end:833// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]834// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4835// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4836// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4837// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]838// CHECK9:       omp.inner.for.cond:839// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4840// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4841// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]842// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]843// CHECK9:       omp.inner.for.body:844// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4845// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 2846// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1847// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]848// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4849// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4850// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4851// CHECK9-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2852// CHECK9-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2853// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]854// CHECK9-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1855// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]856// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4857// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4858// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64859// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]860// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4861// CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64862// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]863// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4864// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]865// CHECK9:       omp.body.continue:866// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]867// CHECK9:       omp.inner.for.inc:868// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4869// CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1870// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4871// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]872// CHECK9:       omp.inner.for.end:873// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]874// CHECK9:       omp.loop.exit:875// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])876// CHECK9-NEXT:    ret void877//878//879// CHECK11-LABEL: define {{[^@]+}}@main880// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {881// CHECK11-NEXT:  entry:882// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4883// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4884// CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4885// CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4886// CHECK11-NEXT:    [[M:%.*]] = alloca i32, align 4887// CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4888// CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4889// CHECK11-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i32, align 4890// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4891// CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4892// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4893// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4894// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4895// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4896// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4897// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4898// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4899// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4900// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8901// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8902// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4903// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4904// CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4905// CHECK11-NEXT:    store i32 100, ptr [[N]], align 4906// CHECK11-NEXT:    store i32 2, ptr [[M]], align 4907// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4908// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M]], align 4909// CHECK11-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()910// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4911// CHECK11-NEXT:    [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]912// CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4913// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4914// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4915// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N]], align 4916// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4917// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4918// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M]], align 4919// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[M_CASTED]], align 4920// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4921// CHECK11-NEXT:    [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]922// CHECK11-NEXT:    [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4923// CHECK11-NEXT:    [[TMP10:%.*]] = sext i32 [[TMP9]] to i64924// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)925// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0926// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP11]], align 4927// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0928// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP12]], align 4929// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0930// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4931// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1932// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP14]], align 4933// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1934// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP15]], align 4935// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1936// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4937// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2938// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP17]], align 4939// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2940// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP18]], align 4941// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2942// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4943// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3944// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP20]], align 4945// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3946// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP21]], align 4947// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3948// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4949// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4950// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP23]], align 4951// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4952// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 4953// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4954// CHECK11-NEXT:    store i64 [[TMP10]], ptr [[TMP25]], align 4955// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4956// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4957// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0958// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0959// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0960// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4961// CHECK11-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4962// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[M]], align 4963// CHECK11-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4964// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4965// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0966// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1967// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64968// CHECK11-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4969// CHECK11-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0970// CHECK11-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1971// CHECK11-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64972// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]973// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1974// CHECK11-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8975// CHECK11-NEXT:    [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8976// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP34]], 1977// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0978// CHECK11-NEXT:    store i32 3, ptr [[TMP35]], align 4979// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1980// CHECK11-NEXT:    store i32 5, ptr [[TMP36]], align 4981// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2982// CHECK11-NEXT:    store ptr [[TMP27]], ptr [[TMP37]], align 4983// CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3984// CHECK11-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 4985// CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4986// CHECK11-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 4987// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5988// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP40]], align 4989// CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6990// CHECK11-NEXT:    store ptr null, ptr [[TMP41]], align 4991// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7992// CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 4993// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8994// CHECK11-NEXT:    store i64 [[ADD]], ptr [[TMP43]], align 8995// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9996// CHECK11-NEXT:    store i64 0, ptr [[TMP44]], align 8997// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10998// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4999// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111000// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 41001// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121002// CHECK11-NEXT:    store i32 0, ptr [[TMP47]], align 41003// CHECK11-NEXT:    [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, ptr [[KERNEL_ARGS]])1004// CHECK11-NEXT:    [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 01005// CHECK11-NEXT:    br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1006// CHECK11:       omp_offload.failed:1007// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1008// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1009// CHECK11:       omp_offload.cont:1010// CHECK11-NEXT:    [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41011// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])1012// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41013// CHECK11-NEXT:    [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 41014// CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP51]])1015// CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 41016// CHECK11-NEXT:    ret i32 [[TMP52]]1017//1018//1019// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l801020// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1021// CHECK11-NEXT:  entry:1022// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 41023// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 41024// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41025// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41026// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41027// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 41028// CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 41029// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 41030// CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 41031// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41032// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41033// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41034// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 41035// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41036// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41037// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 41038// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 41039// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 41040// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 41041// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[M_CASTED]], align 41042// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M_CASTED]], align 41043// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined, i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])1044// CHECK11-NEXT:    ret void1045//1046//1047// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined1048// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1049// CHECK11-NEXT:  entry:1050// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41051// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41052// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 41053// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 41054// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41055// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41056// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41057// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 81058// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41059// CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41060// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41061// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 41062// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 81063// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41064// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41065// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 81066// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 81067// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81068// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41069// CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 41070// CHECK11-NEXT:    [[J12:%.*]] = alloca i32, align 41071// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41072// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41073// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 41074// CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 41075// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41076// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41077// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41078// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 41079// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41080// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41081// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 41082// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 41083// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 41084// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 41085// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41086// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP5]], 01087// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11088// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641089// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41090// CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 01091// CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11092// CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i641093// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]1094// CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 11095// CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 81096// CHECK11-NEXT:    store i32 0, ptr [[I]], align 41097// CHECK11-NEXT:    store i32 0, ptr [[J]], align 41098// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41099// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]1100// CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]1101// CHECK11:       land.lhs.true:1102// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41103// CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]1104// CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]1105// CHECK11:       omp.precond.then:1106// CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 81107// CHECK11-NEXT:    [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81108// CHECK11-NEXT:    store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 81109// CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 81110// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41111// CHECK11-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41112// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 41113// CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1114// CHECK11-NEXT:    [[TMP12:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81115// CHECK11-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81116// CHECK11-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]1117// CHECK11-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1118// CHECK11:       cond.true:1119// CHECK11-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81120// CHECK11-NEXT:    br label [[COND_END:%.*]]1121// CHECK11:       cond.false:1122// CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81123// CHECK11-NEXT:    br label [[COND_END]]1124// CHECK11:       cond.end:1125// CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]1126// CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 81127// CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTOMP_LB]], align 81128// CHECK11-NEXT:    store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 81129// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1130// CHECK11:       omp.inner.for.cond:1131// CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81132// CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81133// CHECK11-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]1134// CHECK11-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1135// CHECK11:       omp.inner.for.body:1136// CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81137// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41138// CHECK11-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP20]], 01139// CHECK11-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 11140// CHECK11-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]1141// CHECK11-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i641142// CHECK11-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP19]], [[CONV18]]1143// CHECK11-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 11144// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]1145// CHECK11-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i321146// CHECK11-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 41147// CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81148// CHECK11-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81149// CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41150// CHECK11-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP23]], 01151// CHECK11-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 11152// CHECK11-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]1153// CHECK11-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i641154// CHECK11-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP22]], [[CONV25]]1155// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41156// CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP24]], 01157// CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 11158// CHECK11-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]1159// CHECK11-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i641160// CHECK11-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]1161// CHECK11-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP21]], [[MUL31]]1162// CHECK11-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 11163// CHECK11-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]1164// CHECK11-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i321165// CHECK11-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 41166// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[I11]], align 41167// CHECK11-NEXT:    [[TMP26:%.*]] = mul nsw i32 [[TMP25]], [[TMP1]]1168// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP26]]1169// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[J12]], align 41170// CHECK11-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP27]]1171// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX36]], align 41172// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1173// CHECK11:       omp.body.continue:1174// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1175// CHECK11:       omp.inner.for.inc:1176// CHECK11-NEXT:    [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81177// CHECK11-NEXT:    [[ADD37:%.*]] = add nsw i64 [[TMP28]], 11178// CHECK11-NEXT:    store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 81179// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1180// CHECK11:       omp.inner.for.end:1181// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1182// CHECK11:       omp.loop.exit:1183// CHECK11-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41184// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 41185// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP30]])1186// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]1187// CHECK11:       omp.precond.end:1188// CHECK11-NEXT:    ret void1189//1190//1191// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_1192// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1193// CHECK11-NEXT:  entry:1194// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41195// CHECK11-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 41196// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41197// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41198// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41199// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41200// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41201// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81202// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41203// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01204// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 41205// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01206// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 41207// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01208// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41209// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01210// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01211// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01212// CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 41213// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11214// CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 41215// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21216// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 41217// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31218// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 41219// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41220// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 41221// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51222// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 41223// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61224// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41225// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71226// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 41227// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81228// CHECK11-NEXT:    store i64 20, ptr [[TMP13]], align 81229// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91230// CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 81231// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101232// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41233// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111234// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41235// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121236// CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 41237// CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, ptr [[KERNEL_ARGS]])1238// CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01239// CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1240// CHECK11:       omp_offload.failed:1241// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67(ptr [[A]]) #[[ATTR3]]1242// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1243// CHECK11:       omp_offload.cont:1244// CHECK11-NEXT:    ret i32 01245//1246//1247// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l671248// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1249// CHECK11-NEXT:  entry:1250// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41251// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41252// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41253// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined, ptr [[TMP0]])1254// CHECK11-NEXT:    ret void1255//1256//1257// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined1258// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1259// CHECK11-NEXT:  entry:1260// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41261// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41262// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41263// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41264// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41265// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41266// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41267// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41268// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41269// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41270// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41271// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41272// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41273// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41274// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41275// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41276// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41277// CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 41278// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41279// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41280// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41281// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41282// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1283// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41284// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 191285// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1286// CHECK11:       cond.true:1287// CHECK11-NEXT:    br label [[COND_END:%.*]]1288// CHECK11:       cond.false:1289// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41290// CHECK11-NEXT:    br label [[COND_END]]1291// CHECK11:       cond.end:1292// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1293// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41294// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41295// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41296// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1297// CHECK11:       omp.inner.for.cond:1298// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41299// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41300// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1301// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1302// CHECK11:       omp.inner.for.body:1303// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41304// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 21305// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 11306// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1307// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41308// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41309// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41310// CHECK11-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 21311// CHECK11-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 21312// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]1313// CHECK11-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 11314// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]1315// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[J]], align 41316// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41317// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]]1318// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 41319// CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]1320// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 41321// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1322// CHECK11:       omp.body.continue:1323// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1324// CHECK11:       omp.inner.for.inc:1325// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41326// CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 11327// CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41328// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1329// CHECK11:       omp.inner.for.end:1330// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1331// CHECK11:       omp.loop.exit:1332// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1333// CHECK11-NEXT:    ret void1334//1335