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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"24// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"26// RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"27// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"29// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35  T f;36  S(T a) : f(a) {}37  S() : f() {}38  operator T() { return T(); }39  ~S() {}40};41 42template <typename T>43T tmain() {44  S<T> test;45  T t_var = T();46  T vec[] = {1, 2};47  S<T> s_arr[] = {1, 2};48  S<T> &var = test;49  #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var)50  for (int i = 0; i < 2; ++i) {51    vec[i] = t_var;52    s_arr[i] = var;53  }54  return T();55}56 57int main() {58  static int svar;59  volatile double g;60  volatile double &g1 = g;61 62  #ifdef LAMBDA63  [&]() {64    static float sfvar;65 66    #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar)67    for (int i = 0; i < 2; ++i) {68      // loop variables69 70      // init private variables71      g = 1;72      g1 = 1;73      svar = 3;74      sfvar = 4.0;75 76 77      [&]() {78        g = 2;79        g1 = 2;80        svar = 4;81        sfvar = 8.0;82 83      }();84    }85  }();86  return 0;87  #else88  S<float> test;89  int t_var = 0;90  int vec[] = {1, 2};91  S<float> s_arr[] = {1, 2};92  S<float> &var = test;93 94  #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)95  for (int i = 0; i < 2; ++i) {96    vec[i] = t_var;97    s_arr[i] = var;98  }99  int i;100 101  return tmain<int>();102  #endif103}104 105 106// skip loop variables107 108// copy from parameters to local address variables109 110// load content of local address variables111// the distribute loop112// assignment: vec[i] = t_var;113 114// assignment: s_arr[i] = var;115 116// lastprivates117 118 119// template tmain120 121 122 123// skip alloca of global_tid and bound_tid124// skip loop variables125 126// skip init of bound and global tid127// copy from parameters to local address variables128 129// load content of local address variables130// assignment: vec[i] = t_var;131 132// assignment: s_arr[i] = var;133 134// lastprivates135 136#endif137// CHECK1-LABEL: define {{[^@]+}}@main138// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {139// CHECK1-NEXT:  entry:140// CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4141// CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8142// CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8143// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8144// CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4145// CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8146// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0147// CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8148// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1149// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8150// CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8151// CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])152// CHECK1-NEXT:    ret i32 0153//154//155// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66156// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {157// CHECK1-NEXT:  entry:158// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8159// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8160// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8161// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8162// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8163// CHECK1-NEXT:    [[G_CASTED:%.*]] = alloca i64, align 8164// CHECK1-NEXT:    [[G1_CASTED:%.*]] = alloca i64, align 8165// CHECK1-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8166// CHECK1-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i64, align 8167// CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8168// CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8169// CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8170// CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8171// CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8172// CHECK1-NEXT:    [[TMP0:%.*]] = load double, ptr [[G_ADDR]], align 8173// CHECK1-NEXT:    store double [[TMP0]], ptr [[G_CASTED]], align 8174// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[G_CASTED]], align 8175// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8176// CHECK1-NEXT:    [[TMP3:%.*]] = load volatile double, ptr [[TMP2]], align 8177// CHECK1-NEXT:    store double [[TMP3]], ptr [[G1_CASTED]], align 8178// CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[G1_CASTED]], align 8179// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4180// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[SVAR_CASTED]], align 4181// CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8182// CHECK1-NEXT:    [[TMP7:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4183// CHECK1-NEXT:    store float [[TMP7]], ptr [[SFVAR_CASTED]], align 4184// CHECK1-NEXT:    [[TMP8:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8185// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]])186// CHECK1-NEXT:    ret void187//188//189// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined190// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {191// CHECK1-NEXT:  entry:192// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8193// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8194// CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8195// CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8196// CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8197// CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8198// CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8199// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4200// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4201// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4202// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4203// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4204// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4205// CHECK1-NEXT:    [[G2:%.*]] = alloca double, align 8206// CHECK1-NEXT:    [[G13:%.*]] = alloca double, align 8207// CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8208// CHECK1-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4209// CHECK1-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4210// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4211// CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8212// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8213// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8214// CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8215// CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8216// CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8217// CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8218// CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8219// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4220// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4221// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4222// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4223// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8224// CHECK1-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 8225// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8226// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4227// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)228// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4229// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1230// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]231// CHECK1:       cond.true:232// CHECK1-NEXT:    br label [[COND_END:%.*]]233// CHECK1:       cond.false:234// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4235// CHECK1-NEXT:    br label [[COND_END]]236// CHECK1:       cond.end:237// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]238// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4239// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4240// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4241// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]242// CHECK1:       omp.inner.for.cond:243// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4244// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4245// CHECK1-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]246// CHECK1-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]247// CHECK1:       omp.inner.for.body:248// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4249// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1250// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]251// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4252// CHECK1-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8253// CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8254// CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP9]], align 8255// CHECK1-NEXT:    store i32 3, ptr [[SVAR5]], align 4256// CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4257// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0258// CHECK1-NEXT:    store ptr [[G2]], ptr [[TMP10]], align 8259// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1260// CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP4]], align 8261// CHECK1-NEXT:    store ptr [[TMP12]], ptr [[TMP11]], align 8262// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2263// CHECK1-NEXT:    store ptr [[SVAR5]], ptr [[TMP13]], align 8264// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3265// CHECK1-NEXT:    store ptr [[SFVAR6]], ptr [[TMP14]], align 8266// CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])267// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]268// CHECK1:       omp.body.continue:269// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]270// CHECK1:       omp.inner.for.inc:271// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4272// CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1273// CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4274// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]275// CHECK1:       omp.inner.for.end:276// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]277// CHECK1:       omp.loop.exit:278// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])279// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4280// CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0281// CHECK1-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]282// CHECK1:       .omp.lastprivate.then:283// CHECK1-NEXT:    [[TMP18:%.*]] = load double, ptr [[G2]], align 8284// CHECK1-NEXT:    store volatile double [[TMP18]], ptr [[G_ADDR]], align 8285// CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP4]], align 8286// CHECK1-NEXT:    [[TMP20:%.*]] = load double, ptr [[TMP19]], align 8287// CHECK1-NEXT:    store volatile double [[TMP20]], ptr [[TMP0]], align 8288// CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[SVAR5]], align 4289// CHECK1-NEXT:    store i32 [[TMP21]], ptr [[SVAR_ADDR]], align 4290// CHECK1-NEXT:    [[TMP22:%.*]] = load float, ptr [[SFVAR6]], align 4291// CHECK1-NEXT:    store float [[TMP22]], ptr [[SFVAR_ADDR]], align 4292// CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]293// CHECK1:       .omp.lastprivate.done:294// CHECK1-NEXT:    ret void295//296//297// CHECK3-LABEL: define {{[^@]+}}@main298// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {299// CHECK3-NEXT:  entry:300// CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4301// CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8302// CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4303// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4304// CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4305// CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4306// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0307// CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4308// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1309// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4310// CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4311// CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])312// CHECK3-NEXT:    ret i32 0313//314//315// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66316// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {317// CHECK3-NEXT:  entry:318// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4319// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4320// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4321// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4322// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4323// CHECK3-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4324// CHECK3-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i32, align 4325// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4326// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4327// CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4328// CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4329// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4330// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4331// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4332// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4333// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4334// CHECK3-NEXT:    store i32 [[TMP3]], ptr [[SVAR_CASTED]], align 4335// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4336// CHECK3-NEXT:    [[TMP5:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4337// CHECK3-NEXT:    store float [[TMP5]], ptr [[SFVAR_CASTED]], align 4338// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4339// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP2]], i32 [[TMP4]], i32 [[TMP6]])340// CHECK3-NEXT:    ret void341//342//343// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined344// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {345// CHECK3-NEXT:  entry:346// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4347// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4348// CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4349// CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4350// CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4351// CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4352// CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4353// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4354// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4355// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4356// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4357// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4358// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4359// CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8360// CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8361// CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4362// CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4363// CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4364// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4365// CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4366// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4367// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4368// CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4369// CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4370// CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4371// CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4372// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4373// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4374// CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4375// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4376// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4377// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4378// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4379// CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4380// CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4381// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4382// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4383// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)384// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4385// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1386// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]387// CHECK3:       cond.true:388// CHECK3-NEXT:    br label [[COND_END:%.*]]389// CHECK3:       cond.false:390// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4391// CHECK3-NEXT:    br label [[COND_END]]392// CHECK3:       cond.end:393// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]394// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4395// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4396// CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4397// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]398// CHECK3:       omp.inner.for.cond:399// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4400// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4401// CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]402// CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]403// CHECK3:       omp.inner.for.body:404// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4405// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1406// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]407// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4408// CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8409// CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 4410// CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP11]], align 4411// CHECK3-NEXT:    store i32 3, ptr [[SVAR5]], align 4412// CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4413// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0414// CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP12]], align 4415// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1416// CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4417// CHECK3-NEXT:    store ptr [[TMP14]], ptr [[TMP13]], align 4418// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2419// CHECK3-NEXT:    store ptr [[SVAR5]], ptr [[TMP15]], align 4420// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3421// CHECK3-NEXT:    store ptr [[SFVAR6]], ptr [[TMP16]], align 4422// CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])423// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]424// CHECK3:       omp.body.continue:425// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]426// CHECK3:       omp.inner.for.inc:427// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4428// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1429// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4430// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]431// CHECK3:       omp.inner.for.end:432// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]433// CHECK3:       omp.loop.exit:434// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])435// CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4436// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0437// CHECK3-NEXT:    br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]438// CHECK3:       .omp.lastprivate.then:439// CHECK3-NEXT:    [[TMP20:%.*]] = load double, ptr [[G2]], align 8440// CHECK3-NEXT:    store volatile double [[TMP20]], ptr [[TMP0]], align 8441// CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[_TMP4]], align 4442// CHECK3-NEXT:    [[TMP22:%.*]] = load double, ptr [[TMP21]], align 4443// CHECK3-NEXT:    store volatile double [[TMP22]], ptr [[TMP2]], align 4444// CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[SVAR5]], align 4445// CHECK3-NEXT:    store i32 [[TMP23]], ptr [[SVAR_ADDR]], align 4446// CHECK3-NEXT:    [[TMP24:%.*]] = load float, ptr [[SFVAR6]], align 4447// CHECK3-NEXT:    store float [[TMP24]], ptr [[SFVAR_ADDR]], align 4448// CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]449// CHECK3:       .omp.lastprivate.done:450// CHECK3-NEXT:    ret void451//452//453// CHECK9-LABEL: define {{[^@]+}}@main454// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {455// CHECK9-NEXT:  entry:456// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4457// CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8458// CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8459// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4460// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4461// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4462// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4463// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8464// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8465// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8466// CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8467// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8468// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8469// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8470// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4471// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8472// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4473// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4474// CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8475// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])476// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4477// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)478// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)479// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1480// CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)481// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8482// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8483// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8484// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4485// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4486// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8487// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8488// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4489// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4490// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8491// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0492// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP6]], align 8493// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0494// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP7]], align 8495// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0496// CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 8497// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1498// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8499// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1500// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP10]], align 8501// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1502// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8503// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2504// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 8505// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2506// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 8507// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2508// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8509// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3510// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP15]], align 8511// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3512// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP16]], align 8513// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3514// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8515// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4516// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP18]], align 8517// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4518// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP19]], align 8519// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4520// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8521// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0522// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0523// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0524// CHECK9-NEXT:    store i32 3, ptr [[TMP23]], align 4525// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1526// CHECK9-NEXT:    store i32 5, ptr [[TMP24]], align 4527// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2528// CHECK9-NEXT:    store ptr [[TMP21]], ptr [[TMP25]], align 8529// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3530// CHECK9-NEXT:    store ptr [[TMP22]], ptr [[TMP26]], align 8531// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4532// CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP27]], align 8533// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5534// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8535// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6536// CHECK9-NEXT:    store ptr null, ptr [[TMP29]], align 8537// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7538// CHECK9-NEXT:    store ptr null, ptr [[TMP30]], align 8539// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8540// CHECK9-NEXT:    store i64 2, ptr [[TMP31]], align 8541// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9542// CHECK9-NEXT:    store i64 0, ptr [[TMP32]], align 8543// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10544// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4545// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11546// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4547// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12548// CHECK9-NEXT:    store i32 0, ptr [[TMP35]], align 4549// CHECK9-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])550// CHECK9-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0551// CHECK9-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]552// CHECK9:       omp_offload.failed:553// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]554// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]555// CHECK9:       omp_offload.cont:556// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()557// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4558// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0559// CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2560// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]561// CHECK9:       arraydestroy.body:562// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]563// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1564// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]565// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]566// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]567// CHECK9:       arraydestroy.done2:568// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]569// CHECK9-NEXT:    [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4570// CHECK9-NEXT:    ret i32 [[TMP39]]571//572//573// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev574// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {575// CHECK9-NEXT:  entry:576// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8577// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8578// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8579// CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])580// CHECK9-NEXT:    ret void581//582//583// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef584// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {585// CHECK9-NEXT:  entry:586// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8587// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4588// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8589// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4590// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8591// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4592// CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])593// CHECK9-NEXT:    ret void594//595//596// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94597// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {598// CHECK9-NEXT:  entry:599// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8600// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8601// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8602// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8603// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8604// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8605// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8606// CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8607// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8608// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8609// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8610// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8611// CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8612// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8613// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8614// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8615// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8616// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4617// CHECK9-NEXT:    store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4618// CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8619// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8620// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4621// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4622// CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8623// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i64 [[TMP7]])624// CHECK9-NEXT:    ret void625//626//627// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined628// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {629// CHECK9-NEXT:  entry:630// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8631// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8632// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8633// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8634// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8635// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8636// CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8637// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8638// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4639// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4640// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4641// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4642// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4643// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4644// CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4645// CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4646// CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4647// CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4648// CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8649// CHECK9-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4650// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4651// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8652// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8653// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8654// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8655// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8656// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8657// CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8658// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8659// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8660// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8661// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8662// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4663// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4664// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4665// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4666// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0667// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2668// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]669// CHECK9:       arrayctor.loop:670// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]671// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])672// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1673// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]674// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]675// CHECK9:       arrayctor.cont:676// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8677// CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])678// CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8679// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8680// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4681// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)682// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4683// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1684// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]685// CHECK9:       cond.true:686// CHECK9-NEXT:    br label [[COND_END:%.*]]687// CHECK9:       cond.false:688// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4689// CHECK9-NEXT:    br label [[COND_END]]690// CHECK9:       cond.end:691// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]692// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4693// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4694// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4695// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]696// CHECK9:       omp.inner.for.cond:697// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4698// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4699// CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]700// CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]701// CHECK9:       omp.inner.for.cond.cleanup:702// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]703// CHECK9:       omp.inner.for.body:704// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4705// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1706// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]707// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4708// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4709// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4710// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64711// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]712// CHECK9-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4713// CHECK9-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8714// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4715// CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64716// CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]717// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP14]], i64 4, i1 false)718// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]719// CHECK9:       omp.body.continue:720// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]721// CHECK9:       omp.inner.for.inc:722// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4723// CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1724// CHECK9-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4725// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]726// CHECK9:       omp.inner.for.end:727// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]728// CHECK9:       omp.loop.exit:729// CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8730// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4731// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])732// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4733// CHECK9-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0734// CHECK9-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]735// CHECK9:       .omp.lastprivate.then:736// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4737// CHECK9-NEXT:    store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4738// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)739// CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0740// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2741// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP22]]742// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]743// CHECK9:       omp.arraycpy.body:744// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]745// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]746// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)747// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1748// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1749// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]750// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]751// CHECK9:       omp.arraycpy.done13:752// CHECK9-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 8753// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false)754// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 4755// CHECK9-NEXT:    store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 4756// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]757// CHECK9:       .omp.lastprivate.done:758// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]759// CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0760// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2761// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]762// CHECK9:       arraydestroy.body:763// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]764// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1765// CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]766// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]767// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]768// CHECK9:       arraydestroy.done15:769// CHECK9-NEXT:    ret void770//771//772// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev773// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {774// CHECK9-NEXT:  entry:775// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8776// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8777// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8778// CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]779// CHECK9-NEXT:    ret void780//781//782// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v783// CHECK9-SAME: () #[[ATTR1]] comdat {784// CHECK9-NEXT:  entry:785// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4786// CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4787// CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4788// CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4789// CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4790// CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8791// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8792// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8793// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8794// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8795// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8796// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4797// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8798// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])799// CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4800// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)801// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)802// CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1803// CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)804// CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8805// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8806// CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8807// CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4808// CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4809// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8810// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8811// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0812// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP4]], align 8813// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0814// CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP5]], align 8815// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0816// CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8817// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1818// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 8819// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1820// CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8821// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1822// CHECK9-NEXT:    store ptr null, ptr [[TMP9]], align 8823// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2824// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP10]], align 8825// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2826// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP11]], align 8827// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2828// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8829// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3830// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 8831// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3832// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 8833// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3834// CHECK9-NEXT:    store ptr null, ptr [[TMP15]], align 8835// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0836// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0837// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0838// CHECK9-NEXT:    store i32 3, ptr [[TMP18]], align 4839// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1840// CHECK9-NEXT:    store i32 4, ptr [[TMP19]], align 4841// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2842// CHECK9-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 8843// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3844// CHECK9-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 8845// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4846// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 8847// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5848// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8849// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6850// CHECK9-NEXT:    store ptr null, ptr [[TMP24]], align 8851// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7852// CHECK9-NEXT:    store ptr null, ptr [[TMP25]], align 8853// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8854// CHECK9-NEXT:    store i64 2, ptr [[TMP26]], align 8855// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9856// CHECK9-NEXT:    store i64 0, ptr [[TMP27]], align 8857// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10858// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4859// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11860// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4861// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12862// CHECK9-NEXT:    store i32 0, ptr [[TMP30]], align 4863// CHECK9-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])864// CHECK9-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0865// CHECK9-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]866// CHECK9:       omp_offload.failed:867// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]868// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]869// CHECK9:       omp_offload.cont:870// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4871// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0872// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2873// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]874// CHECK9:       arraydestroy.body:875// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]876// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1877// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]878// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]879// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]880// CHECK9:       arraydestroy.done2:881// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]882// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4883// CHECK9-NEXT:    ret i32 [[TMP34]]884//885//886// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev887// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {888// CHECK9-NEXT:  entry:889// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8890// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8891// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8892// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0893// CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4894// CHECK9-NEXT:    ret void895//896//897// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef898// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {899// CHECK9-NEXT:  entry:900// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8901// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4902// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8903// CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4904// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8905// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0906// CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4907// CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4908// CHECK9-NEXT:    ret void909//910//911// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev912// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {913// CHECK9-NEXT:  entry:914// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8915// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8916// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8917// CHECK9-NEXT:    ret void918//919//920// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev921// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {922// CHECK9-NEXT:  entry:923// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8924// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8925// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8926// CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])927// CHECK9-NEXT:    ret void928//929//930// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei931// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {932// CHECK9-NEXT:  entry:933// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8934// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4935// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8936// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4937// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8938// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4939// CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])940// CHECK9-NEXT:    ret void941//942//943// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49944// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {945// CHECK9-NEXT:  entry:946// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8947// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8948// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8949// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8950// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8951// CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8952// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8953// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8954// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8955// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8956// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8957// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8958// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8959// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8960// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4961// CHECK9-NEXT:    store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4962// CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8963// CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8964// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])965// CHECK9-NEXT:    ret void966//967//968// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined969// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {970// CHECK9-NEXT:  entry:971// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8972// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8973// CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8974// CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8975// CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8976// CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8977// CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8978// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4979// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4980// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4981// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4982// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4983// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4984// CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4985// CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4986// CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4987// CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4988// CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8989// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4990// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8991// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8992// CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8993// CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8994// CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8995// CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8996// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8997// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8998// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8999// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 81000// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41001// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41002// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41003// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41004// CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01005// CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21006// CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1007// CHECK9:       arrayctor.loop:1008// CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1009// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1010// CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11011// CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1012// CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1013// CHECK9:       arrayctor.cont:1014// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 81015// CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1016// CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 81017// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81018// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41019// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1020// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41021// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11022// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1023// CHECK9:       cond.true:1024// CHECK9-NEXT:    br label [[COND_END:%.*]]1025// CHECK9:       cond.false:1026// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41027// CHECK9-NEXT:    br label [[COND_END]]1028// CHECK9:       cond.end:1029// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1030// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41031// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41032// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41033// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1034// CHECK9:       omp.inner.for.cond:1035// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41036// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41037// CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1038// CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1039// CHECK9:       omp.inner.for.cond.cleanup:1040// CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1041// CHECK9:       omp.inner.for.body:1042// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41043// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11044// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1045// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 41046// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 41047// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41048// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i641049// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1050// CHECK9-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 41051// CHECK9-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 81052// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 41053// CHECK9-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i641054// CHECK9-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]]1055// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i64 4, i1 false)1056// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1057// CHECK9:       omp.body.continue:1058// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1059// CHECK9:       omp.inner.for.inc:1060// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41061// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 11062// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 41063// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]1064// CHECK9:       omp.inner.for.end:1065// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1066// CHECK9:       omp.loop.exit:1067// CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81068// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41069// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1070// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41071// CHECK9-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01072// CHECK9-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1073// CHECK9:       .omp.lastprivate.then:1074// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 41075// CHECK9-NEXT:    store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 41076// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)1077// CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 01078// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 21079// CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]]1080// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1081// CHECK9:       omp.arraycpy.body:1082// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1083// CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1084// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1085// CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11086// CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11087// CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]1088// CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1089// CHECK9:       omp.arraycpy.done12:1090// CHECK9-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 81091// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false)1092// CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1093// CHECK9:       .omp.lastprivate.done:1094// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1095// CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01096// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 21097// CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1098// CHECK9:       arraydestroy.body:1099// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1100// CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11101// CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1102// CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1103// CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1104// CHECK9:       arraydestroy.done14:1105// CHECK9-NEXT:    ret void1106//1107//1108// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1109// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1110// CHECK9-NEXT:  entry:1111// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81112// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81113// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81114// CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1115// CHECK9-NEXT:    ret void1116//1117//1118// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1119// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1120// CHECK9-NEXT:  entry:1121// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81122// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81123// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81124// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01125// CHECK9-NEXT:    store i32 0, ptr [[F]], align 41126// CHECK9-NEXT:    ret void1127//1128//1129// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1130// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1131// CHECK9-NEXT:  entry:1132// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81133// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41134// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81135// CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41136// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81137// CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01138// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41139// CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41140// CHECK9-NEXT:    ret void1141//1142//1143// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1144// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1145// CHECK9-NEXT:  entry:1146// CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81147// CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81148// CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81149// CHECK9-NEXT:    ret void1150//1151//1152// CHECK11-LABEL: define {{[^@]+}}@main1153// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1154// CHECK11-NEXT:  entry:1155// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41156// CHECK11-NEXT:    [[G:%.*]] = alloca double, align 81157// CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 41158// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41159// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41160// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41161// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41162// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41163// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41164// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41165// CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 41166// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41167// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41168// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41169// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41170// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81171// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41172// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41173// CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 41174// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1175// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41176// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1177// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1178// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11179// CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1180// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41181// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41182// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 41183// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41184// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41185// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41186// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41187// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41188// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41189// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41190// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01191// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP6]], align 41192// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01193// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP7]], align 41194// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01195// CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 41196// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11197// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 41198// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11199// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP10]], align 41200// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11201// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41202// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21203// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 41204// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21205// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 41206// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21207// CHECK11-NEXT:    store ptr null, ptr [[TMP14]], align 41208// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31209// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP15]], align 41210// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31211// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP16]], align 41212// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31213// CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 41214// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41215// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP18]], align 41216// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41217// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP19]], align 41218// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41219// CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 41220// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01221// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01222// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01223// CHECK11-NEXT:    store i32 3, ptr [[TMP23]], align 41224// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11225// CHECK11-NEXT:    store i32 5, ptr [[TMP24]], align 41226// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21227// CHECK11-NEXT:    store ptr [[TMP21]], ptr [[TMP25]], align 41228// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31229// CHECK11-NEXT:    store ptr [[TMP22]], ptr [[TMP26]], align 41230// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41231// CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP27]], align 41232// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51233// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 41234// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61235// CHECK11-NEXT:    store ptr null, ptr [[TMP29]], align 41236// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71237// CHECK11-NEXT:    store ptr null, ptr [[TMP30]], align 41238// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81239// CHECK11-NEXT:    store i64 2, ptr [[TMP31]], align 81240// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91241// CHECK11-NEXT:    store i64 0, ptr [[TMP32]], align 81242// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101243// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 41244// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111245// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 41246// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121247// CHECK11-NEXT:    store i32 0, ptr [[TMP35]], align 41248// CHECK11-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])1249// CHECK11-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 01250// CHECK11-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1251// CHECK11:       omp_offload.failed:1252// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1253// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1254// CHECK11:       omp_offload.cont:1255// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1256// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41257// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01258// CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21259// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1260// CHECK11:       arraydestroy.body:1261// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1262// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11263// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1264// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1265// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1266// CHECK11:       arraydestroy.done2:1267// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1268// CHECK11-NEXT:    [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 41269// CHECK11-NEXT:    ret i32 [[TMP39]]1270//1271//1272// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1273// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1274// CHECK11-NEXT:  entry:1275// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41276// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41277// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41278// CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1279// CHECK11-NEXT:    ret void1280//1281//1282// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1283// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1284// CHECK11-NEXT:  entry:1285// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41286// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41287// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41288// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41289// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41290// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41291// CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1292// CHECK11-NEXT:    ret void1293//1294//1295// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l941296// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1297// CHECK11-NEXT:  entry:1298// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41299// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41300// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41301// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41302// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 41303// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41304// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41305// CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 41306// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41307// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41308// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41309// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41310// CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41311// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41312// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41313// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41314// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41315// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 41316// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 41317// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41318// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41319// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 41320// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 41321// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41322// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i32 [[TMP7]])1323// CHECK11-NEXT:    ret void1324//1325//1326// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined1327// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {1328// CHECK11-NEXT:  entry:1329// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41330// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41331// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41332// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41333// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41334// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41335// CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 41336// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41337// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41338// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41339// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41340// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41341// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41342// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41343// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41344// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41345// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 41346// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 41347// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 41348// CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 41349// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41350// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41351// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41352// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41353// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41354// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41355// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41356// CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41357// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41358// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41359// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41360// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41361// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41362// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41363// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41364// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41365// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01366// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21367// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1368// CHECK11:       arrayctor.loop:1369// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1370// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1371// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11372// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1373// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1374// CHECK11:       arrayctor.cont:1375// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41376// CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1377// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 41378// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41379// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41380// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1381// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41382// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11383// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1384// CHECK11:       cond.true:1385// CHECK11-NEXT:    br label [[COND_END:%.*]]1386// CHECK11:       cond.false:1387// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41388// CHECK11-NEXT:    br label [[COND_END]]1389// CHECK11:       cond.end:1390// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1391// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41392// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41393// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41394// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1395// CHECK11:       omp.inner.for.cond:1396// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41397// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41398// CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1399// CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1400// CHECK11:       omp.inner.for.cond.cleanup:1401// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1402// CHECK11:       omp.inner.for.body:1403// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41404// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11405// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1406// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41407// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 41408// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41409// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]1410// CHECK11-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 41411// CHECK11-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 41412// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 41413// CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]1414// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i32 4, i1 false)1415// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1416// CHECK11:       omp.body.continue:1417// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1418// CHECK11:       omp.inner.for.inc:1419// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41420// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP16]], 11421// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 41422// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1423// CHECK11:       omp.inner.for.end:1424// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1425// CHECK11:       omp.loop.exit:1426// CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41427// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41428// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1429// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41430// CHECK11-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01431// CHECK11-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1432// CHECK11:       .omp.lastprivate.then:1433// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 41434// CHECK11-NEXT:    store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 41435// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1436// CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 01437// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 21438// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]]1439// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1440// CHECK11:       omp.arraycpy.body:1441// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1442// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1443// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1444// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11445// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11446// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]1447// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1448// CHECK11:       omp.arraycpy.done12:1449// CHECK11-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 41450// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false)1451// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 41452// CHECK11-NEXT:    store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 41453// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1454// CHECK11:       .omp.lastprivate.done:1455// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1456// CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01457// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 21458// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1459// CHECK11:       arraydestroy.body:1460// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1461// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11462// CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1463// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1464// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1465// CHECK11:       arraydestroy.done14:1466// CHECK11-NEXT:    ret void1467//1468//1469// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1470// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1471// CHECK11-NEXT:  entry:1472// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41473// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41474// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41475// CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1476// CHECK11-NEXT:    ret void1477//1478//1479// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1480// CHECK11-SAME: () #[[ATTR1]] comdat {1481// CHECK11-NEXT:  entry:1482// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41483// CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41484// CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 41485// CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 41486// CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41487// CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 41488// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41489// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41490// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41491// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41492// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41493// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41494// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81495// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1496// CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 41497// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1498// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1499// CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11500// CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1501// CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 41502// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 41503// CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 41504// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41505// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41506// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41507// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41508// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01509// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP4]], align 41510// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01511// CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP5]], align 41512// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01513// CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 41514// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11515// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 41516// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11517// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 41518// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11519// CHECK11-NEXT:    store ptr null, ptr [[TMP9]], align 41520// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21521// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP10]], align 41522// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21523// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP11]], align 41524// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21525// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 41526// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31527// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP13]], align 41528// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31529// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP14]], align 41530// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31531// CHECK11-NEXT:    store ptr null, ptr [[TMP15]], align 41532// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01533// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01534// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01535// CHECK11-NEXT:    store i32 3, ptr [[TMP18]], align 41536// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11537// CHECK11-NEXT:    store i32 4, ptr [[TMP19]], align 41538// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21539// CHECK11-NEXT:    store ptr [[TMP16]], ptr [[TMP20]], align 41540// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31541// CHECK11-NEXT:    store ptr [[TMP17]], ptr [[TMP21]], align 41542// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41543// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP22]], align 41544// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51545// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP23]], align 41546// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61547// CHECK11-NEXT:    store ptr null, ptr [[TMP24]], align 41548// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71549// CHECK11-NEXT:    store ptr null, ptr [[TMP25]], align 41550// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81551// CHECK11-NEXT:    store i64 2, ptr [[TMP26]], align 81552// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91553// CHECK11-NEXT:    store i64 0, ptr [[TMP27]], align 81554// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101555// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP28]], align 41556// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111557// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP29]], align 41558// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121559// CHECK11-NEXT:    store i32 0, ptr [[TMP30]], align 41560// CHECK11-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1561// CHECK11-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01562// CHECK11-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1563// CHECK11:       omp_offload.failed:1564// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1565// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1566// CHECK11:       omp_offload.cont:1567// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41568// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01569// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21570// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1571// CHECK11:       arraydestroy.body:1572// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1573// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11574// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1575// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1576// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1577// CHECK11:       arraydestroy.done2:1578// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1579// CHECK11-NEXT:    [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 41580// CHECK11-NEXT:    ret i32 [[TMP34]]1581//1582//1583// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1584// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1585// CHECK11-NEXT:  entry:1586// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41587// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41588// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41589// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01590// CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 41591// CHECK11-NEXT:    ret void1592//1593//1594// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1595// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1596// CHECK11-NEXT:  entry:1597// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41598// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 41599// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41600// CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 41601// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41602// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01603// CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41604// CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 41605// CHECK11-NEXT:    ret void1606//1607//1608// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1609// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1610// CHECK11-NEXT:  entry:1611// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41612// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41613// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41614// CHECK11-NEXT:    ret void1615//1616//1617// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1618// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1619// CHECK11-NEXT:  entry:1620// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41621// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41622// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41623// CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1624// CHECK11-NEXT:    ret void1625//1626//1627// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1628// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1629// CHECK11-NEXT:  entry:1630// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41631// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41632// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41633// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41634// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41635// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41636// CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1637// CHECK11-NEXT:    ret void1638//1639//1640// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491641// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1642// CHECK11-NEXT:  entry:1643// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41644// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41645// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41646// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41647// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41648// CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 41649// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41650// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41651// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41652// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41653// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41654// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41655// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41656// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41657// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 41658// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 41659// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41660// CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 41661// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])1662// CHECK11-NEXT:    ret void1663//1664//1665// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1666// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1667// CHECK11-NEXT:  entry:1668// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41669// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41670// CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 41671// CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 41672// CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 41673// CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 41674// CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 41675// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41676// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41677// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41678// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41679// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41680// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41681// CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 41682// CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 41683// CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41684// CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41685// CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 41686// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41687// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41688// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41689// CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 41690// CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41691// CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41692// CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 41693// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 41694// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 41695// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 41696// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 41697// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41698// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 41699// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41700// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41701// CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01702// CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21703// CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]1704// CHECK11:       arrayctor.loop:1705// CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1706// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1707// CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11708// CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1709// CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1710// CHECK11:       arrayctor.cont:1711// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 41712// CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1713// CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 41714// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41715// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41716// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1717// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41718// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11719// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1720// CHECK11:       cond.true:1721// CHECK11-NEXT:    br label [[COND_END:%.*]]1722// CHECK11:       cond.false:1723// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41724// CHECK11-NEXT:    br label [[COND_END]]1725// CHECK11:       cond.end:1726// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1727// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41728// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41729// CHECK11-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41730// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1731// CHECK11:       omp.inner.for.cond:1732// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41733// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41734// CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1735// CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1736// CHECK11:       omp.inner.for.cond.cleanup:1737// CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]1738// CHECK11:       omp.inner.for.body:1739// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41740// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11741// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1742// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41743// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 41744// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41745// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]1746// CHECK11-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 41747// CHECK11-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 41748// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 41749// CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]1750// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP14]], i32 4, i1 false)1751// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1752// CHECK11:       omp.body.continue:1753// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1754// CHECK11:       omp.inner.for.inc:1755// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41756// CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP16]], 11757// CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 41758// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1759// CHECK11:       omp.inner.for.end:1760// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1761// CHECK11:       omp.loop.exit:1762// CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41763// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41764// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1765// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41766// CHECK11-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01767// CHECK11-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1768// CHECK11:       .omp.lastprivate.then:1769// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 41770// CHECK11-NEXT:    store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 41771// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1772// CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 01773// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 21774// CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP22]]1775// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1776// CHECK11:       omp.arraycpy.body:1777// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1778// CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1779// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1780// CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11781// CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11782// CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]1783// CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]1784// CHECK11:       omp.arraycpy.done11:1785// CHECK11-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 41786// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false)1787// CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]1788// CHECK11:       .omp.lastprivate.done:1789// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1790// CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01791// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 21792// CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]1793// CHECK11:       arraydestroy.body:1794// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1795// CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11796// CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1797// CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]1798// CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]1799// CHECK11:       arraydestroy.done13:1800// CHECK11-NEXT:    ret void1801//1802//1803// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1804// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1805// CHECK11-NEXT:  entry:1806// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41807// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41808// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41809// CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1810// CHECK11-NEXT:    ret void1811//1812//1813// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1814// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1815// CHECK11-NEXT:  entry:1816// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41817// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41818// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41819// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01820// CHECK11-NEXT:    store i32 0, ptr [[F]], align 41821// CHECK11-NEXT:    ret void1822//1823//1824// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1825// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1826// CHECK11-NEXT:  entry:1827// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41828// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 41829// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41830// CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 41831// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41832// CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01833// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41834// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 41835// CHECK11-NEXT:    ret void1836//1837//1838// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1839// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1840// CHECK11-NEXT:  entry:1841// CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41842// CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41843// CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41844// CHECK11-NEXT:    ret void1845//1846