9387 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"10// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"12// RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"13// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15 16// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919 20// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"21// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s22// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"23 24// expected-no-diagnostics25#ifndef HEADER26#define HEADER27 28template <typename T>29T tmain() {30 T t_var = T();31 T vec[] = {1, 2};32#pragma omp target teams distribute reduction(+: t_var)33 for (int i = 0; i < 2; ++i) {34 t_var += (T) i;35 }36 37#pragma omp target teams distribute reduction(-: t_var)38 for (int i = 0; i < 2; ++i) {39 t_var -= vec[i];40 }41 42t_var = T(1);43#pragma omp target teams distribute reduction(*: t_var)44 for (int i = 0; i < 2; ++i) {45 t_var = t_var * vec[i];46 }47 48 bool and_var = true;49#pragma omp target teams distribute reduction(&&: and_var)50 for (int i = 0; i < 2; ++i) {51 and_var = and_var && (vec[i]%2 == 0);52 }53 54 bool or_var = false;55#pragma omp target teams distribute reduction(||: or_var)56 for (int i = 0; i < 2; ++i) {57 or_var = or_var || (vec[i]%2 == 0);58 }59 60 unsigned int bit_var = 1;61#pragma omp target teams distribute reduction(&: bit_var)62 for (int i = 0; i < 2; ++i) {63 bit_var = (bit_var & vec[i]);64 }65 66#pragma omp target teams distribute reduction(|: bit_var)67 for (int i = 0; i < 2; ++i) {68 bit_var = (bit_var | vec[i]);69 }70 71#pragma omp target teams distribute reduction(^: bit_var)72 for (int i = 0; i < 2; ++i) {73 bit_var = (bit_var ^ vec[i]);74 }75 76 t_var = T(0);77#pragma omp target teams distribute reduction(max: t_var)78 for (int i = 0; i < 2; ++i) {79 t_var = t_var >= vec[i] ? t_var : vec[i];80 }81 82 t_var = T(10);83#pragma omp target teams distribute reduction(min: t_var)84 for (int i = 0; i < 2; ++i) {85 t_var = t_var <= vec[i] ? t_var : vec[i];86 }87 88 return T();89}90 91int main() {92 static int sivar;93#ifdef LAMBDA94 95 [&]() {96#pragma omp target teams distribute reduction(+: sivar)97 for (int i = 0; i < 2; ++i) {98 99 // Skip global and bound tid vars100 101 sivar += i;102 103 [&]() {104 105 sivar += 4;106 107 }();108 }109 }();110 111 [&]() {112#pragma omp target teams distribute reduction(-: sivar)113 for (int i = 0; i < 2; ++i) {114 sivar -= i;115 [&]() {116 sivar += 4;117 }();118 }119 }();120 121 [&]() {122#pragma omp target teams distribute reduction(*: sivar)123 for (int i = 0; i < 2; ++i) {124 sivar *= i;125 [&]() {126 sivar += 4;127 }();128 }129 }();130 131 [&]() {132 bool and_var = true;133#pragma omp target teams distribute reduction(&&: and_var)134 for (int i = 0; i < 2; ++i) {135 and_var = and_var && (i == 0);136 [&]() {137 sivar += 4;138 }();139 }140 }();141 142 [&]() {143 bool or_var = true;144#pragma omp target teams distribute reduction(||: or_var)145 for (int i = 0; i < 2; ++i) {146 or_var = or_var || (i == 0);147 [&]() {148 sivar += 4;149 }();150 }151 }();152 153 [&]() {154 unsigned int bit_var = true;155#pragma omp target teams distribute reduction(&: bit_var)156 for (int i = 0; i < 2; ++i) {157 bit_var = (bit_var & i);158 [&]() {159 sivar += 4;160 }();161 }162 }();163 164 [&]() {165 unsigned int bit_var = false;166#pragma omp target teams distribute reduction(|: bit_var)167 for (int i = 0; i < 2; ++i) {168 bit_var = (bit_var | i);169 [&]() {170 sivar += 4;171 }();172 }173 }();174 175 [&]() {176 unsigned int bit_var = false;177#pragma omp target teams distribute reduction(^: bit_var)178 for (int i = 0; i < 2; ++i) {179 bit_var = (bit_var ^ i);180 [&]() {181 sivar += 4;182 }();183 }184 }();185 186 [&]() {187 int max_var = 0;188#pragma omp target teams distribute reduction(max: max_var)189 for (int i = 0; i < 2; ++i) {190 max_var = max_var >= i ? max_var : i;191 [&]() {192 max_var += 4;193 }();194 }195 }();196 197 [&]() {198 int min_var = 10;199#pragma omp target teams distribute reduction(min: min_var)200 for (int i = 0; i < 2; ++i) {201 min_var = min_var <= i ? min_var : i;202 [&]() {203 min_var += 4;204 }();205 }206 }();207 return 0;208#else209#pragma omp target teams distribute reduction(+: sivar)210 for (int i = 0; i < 2; ++i) {211 sivar += i;212 }213 214#pragma omp target teams distribute reduction(-: sivar)215 for (int i = 0; i < 2; ++i) {216 sivar -= i;217 }218 219 sivar = 1;220#pragma omp target teams distribute reduction(*: sivar)221 for (int i = 0; i < 2; ++i) {222 sivar = sivar * i;223 }224 225 bool and_var = true;226#pragma omp target teams distribute reduction(&&: and_var)227 for (int i = 0; i < 2; ++i) {228 and_var = and_var && (i == 0);229 }230 231 bool or_var = false;232#pragma omp target teams distribute reduction(||: or_var)233 for (int i = 0; i < 2; ++i) {234 or_var = or_var || (i == 0);235 }236 237 unsigned int bit_var = 1;238#pragma omp target teams distribute reduction(&: bit_var)239 for (int i = 0; i < 2; ++i) {240 bit_var = (bit_var & i);241 }242 243#pragma omp target teams distribute reduction(|: bit_var)244 for (int i = 0; i < 2; ++i) {245 bit_var = (bit_var | i);246 }247 248#pragma omp target teams distribute reduction(^: bit_var)249 for (int i = 0; i < 2; ++i) {250 bit_var = (bit_var ^ i);251 }252 253 sivar = 0;254#pragma omp target teams distribute reduction(max: sivar)255 for (int i = 0; i < 2; ++i) {256 sivar = sivar >= i ? sivar : i;257 }258 259 sivar = 10;260#pragma omp target teams distribute reduction(min: sivar)261 for (int i = 0; i < 2; ++i) {262 sivar = sivar <= i ? sivar : i;263 }264 265 return tmain<int>();266#endif267}268 269 270#endif271// CHECK1-LABEL: define {{[^@]+}}@main272// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {273// CHECK1-NEXT: entry:274// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4275// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8276// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8277// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8278// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4279// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8280// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8281// CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8282// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8283// CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4284// CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8285// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 8286// CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 8287// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 8288// CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4289// CHECK1-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8290// CHECK1-NEXT: [[AND_VAR:%.*]] = alloca i8, align 1291// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8292// CHECK1-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8293// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8294// CHECK1-NEXT: [[_TMP18:%.*]] = alloca i32, align 4295// CHECK1-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8296// CHECK1-NEXT: [[OR_VAR:%.*]] = alloca i8, align 1297// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [1 x ptr], align 8298// CHECK1-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [1 x ptr], align 8299// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [1 x ptr], align 8300// CHECK1-NEXT: [[_TMP25:%.*]] = alloca i32, align 4301// CHECK1-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8302// CHECK1-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 4303// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [1 x ptr], align 8304// CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [1 x ptr], align 8305// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [1 x ptr], align 8306// CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 4307// CHECK1-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8308// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [1 x ptr], align 8309// CHECK1-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [1 x ptr], align 8310// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [1 x ptr], align 8311// CHECK1-NEXT: [[_TMP39:%.*]] = alloca i32, align 4312// CHECK1-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8313// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [1 x ptr], align 8314// CHECK1-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [1 x ptr], align 8315// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [1 x ptr], align 8316// CHECK1-NEXT: [[_TMP46:%.*]] = alloca i32, align 4317// CHECK1-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8318// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [1 x ptr], align 8319// CHECK1-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [1 x ptr], align 8320// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [1 x ptr], align 8321// CHECK1-NEXT: [[_TMP53:%.*]] = alloca i32, align 4322// CHECK1-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8323// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [1 x ptr], align 8324// CHECK1-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [1 x ptr], align 8325// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [1 x ptr], align 8326// CHECK1-NEXT: [[_TMP60:%.*]] = alloca i32, align 4327// CHECK1-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8328// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4329// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0330// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 8331// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0332// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 8333// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0334// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8335// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0336// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0337// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0338// CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4339// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1340// CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4341// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2342// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8343// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3344// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8345// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4346// CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8347// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5348// CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8349// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6350// CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8351// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7352// CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8353// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8354// CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 8355// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9356// CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8357// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10358// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4359// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11360// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4361// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12362// CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4363// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.region_id, ptr [[KERNEL_ARGS]])364// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0365// CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]366// CHECK1: omp_offload.failed:367// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]368// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]369// CHECK1: omp_offload.cont:370// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0371// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP20]], align 8372// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0373// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP21]], align 8374// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0375// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8376// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0377// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0378// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0379// CHECK1-NEXT: store i32 3, ptr [[TMP25]], align 4380// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1381// CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4382// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2383// CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8384// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3385// CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8386// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4387// CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8388// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5389// CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8390// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6391// CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8392// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7393// CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8394// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8395// CHECK1-NEXT: store i64 2, ptr [[TMP33]], align 8396// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9397// CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8398// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10399// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4400// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11401// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4402// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12403// CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4404// CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.region_id, ptr [[KERNEL_ARGS5]])405// CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0406// CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]407// CHECK1: omp_offload.failed6:408// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214(ptr @_ZZ4mainE5sivar) #[[ATTR2]]409// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]410// CHECK1: omp_offload.cont7:411// CHECK1-NEXT: store i32 1, ptr @_ZZ4mainE5sivar, align 4412// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0413// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP40]], align 8414// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0415// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP41]], align 8416// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0417// CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8418// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0419// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0420// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0421// CHECK1-NEXT: store i32 3, ptr [[TMP45]], align 4422// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1423// CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4424// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2425// CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8426// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3427// CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8428// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4429// CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8430// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5431// CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8432// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6433// CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8434// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7435// CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8436// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8437// CHECK1-NEXT: store i64 2, ptr [[TMP53]], align 8438// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9439// CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8440// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10441// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4442// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11443// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4444// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12445// CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4446// CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.region_id, ptr [[KERNEL_ARGS12]])447// CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0448// CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]449// CHECK1: omp_offload.failed13:450// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220(ptr @_ZZ4mainE5sivar) #[[ATTR2]]451// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT14]]452// CHECK1: omp_offload.cont14:453// CHECK1-NEXT: store i8 1, ptr [[AND_VAR]], align 1454// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0455// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP60]], align 8456// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0457// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP61]], align 8458// CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0459// CHECK1-NEXT: store ptr null, ptr [[TMP62]], align 8460// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0461// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0462// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0463// CHECK1-NEXT: store i32 3, ptr [[TMP65]], align 4464// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1465// CHECK1-NEXT: store i32 1, ptr [[TMP66]], align 4466// CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2467// CHECK1-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 8468// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3469// CHECK1-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 8470// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4471// CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 8472// CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5473// CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8474// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6475// CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 8476// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7477// CHECK1-NEXT: store ptr null, ptr [[TMP72]], align 8478// CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8479// CHECK1-NEXT: store i64 2, ptr [[TMP73]], align 8480// CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9481// CHECK1-NEXT: store i64 0, ptr [[TMP74]], align 8482// CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10483// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4484// CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11485// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4486// CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12487// CHECK1-NEXT: store i32 0, ptr [[TMP77]], align 4488// CHECK1-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.region_id, ptr [[KERNEL_ARGS19]])489// CHECK1-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0490// CHECK1-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]491// CHECK1: omp_offload.failed20:492// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226(ptr [[AND_VAR]]) #[[ATTR2]]493// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]]494// CHECK1: omp_offload.cont21:495// CHECK1-NEXT: store i8 0, ptr [[OR_VAR]], align 1496// CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0497// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP80]], align 8498// CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0499// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP81]], align 8500// CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0501// CHECK1-NEXT: store ptr null, ptr [[TMP82]], align 8502// CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0503// CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 0504// CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 0505// CHECK1-NEXT: store i32 3, ptr [[TMP85]], align 4506// CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 1507// CHECK1-NEXT: store i32 1, ptr [[TMP86]], align 4508// CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 2509// CHECK1-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 8510// CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 3511// CHECK1-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 8512// CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 4513// CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 8514// CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 5515// CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8516// CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 6517// CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 8518// CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 7519// CHECK1-NEXT: store ptr null, ptr [[TMP92]], align 8520// CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 8521// CHECK1-NEXT: store i64 2, ptr [[TMP93]], align 8522// CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 9523// CHECK1-NEXT: store i64 0, ptr [[TMP94]], align 8524// CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 10525// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4526// CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 11527// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4528// CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12529// CHECK1-NEXT: store i32 0, ptr [[TMP97]], align 4530// CHECK1-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.region_id, ptr [[KERNEL_ARGS26]])531// CHECK1-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0532// CHECK1-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]533// CHECK1: omp_offload.failed27:534// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232(ptr [[OR_VAR]]) #[[ATTR2]]535// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT28]]536// CHECK1: omp_offload.cont28:537// CHECK1-NEXT: store i32 1, ptr [[BIT_VAR]], align 4538// CHECK1-NEXT: [[TMP100:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0539// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP100]], align 8540// CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0541// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP101]], align 8542// CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 0543// CHECK1-NEXT: store ptr null, ptr [[TMP102]], align 8544// CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 0545// CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 0546// CHECK1-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 0547// CHECK1-NEXT: store i32 3, ptr [[TMP105]], align 4548// CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 1549// CHECK1-NEXT: store i32 1, ptr [[TMP106]], align 4550// CHECK1-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 2551// CHECK1-NEXT: store ptr [[TMP103]], ptr [[TMP107]], align 8552// CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 3553// CHECK1-NEXT: store ptr [[TMP104]], ptr [[TMP108]], align 8554// CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 4555// CHECK1-NEXT: store ptr @.offload_sizes.9, ptr [[TMP109]], align 8556// CHECK1-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 5557// CHECK1-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP110]], align 8558// CHECK1-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 6559// CHECK1-NEXT: store ptr null, ptr [[TMP111]], align 8560// CHECK1-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 7561// CHECK1-NEXT: store ptr null, ptr [[TMP112]], align 8562// CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 8563// CHECK1-NEXT: store i64 2, ptr [[TMP113]], align 8564// CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 9565// CHECK1-NEXT: store i64 0, ptr [[TMP114]], align 8566// CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 10567// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 4568// CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 11569// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP116]], align 4570// CHECK1-NEXT: [[TMP117:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12571// CHECK1-NEXT: store i32 0, ptr [[TMP117]], align 4572// CHECK1-NEXT: [[TMP118:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.region_id, ptr [[KERNEL_ARGS33]])573// CHECK1-NEXT: [[TMP119:%.*]] = icmp ne i32 [[TMP118]], 0574// CHECK1-NEXT: br i1 [[TMP119]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]575// CHECK1: omp_offload.failed34:576// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238(ptr [[BIT_VAR]]) #[[ATTR2]]577// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT35]]578// CHECK1: omp_offload.cont35:579// CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0580// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP120]], align 8581// CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0582// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP121]], align 8583// CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0584// CHECK1-NEXT: store ptr null, ptr [[TMP122]], align 8585// CHECK1-NEXT: [[TMP123:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0586// CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 0587// CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 0588// CHECK1-NEXT: store i32 3, ptr [[TMP125]], align 4589// CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 1590// CHECK1-NEXT: store i32 1, ptr [[TMP126]], align 4591// CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 2592// CHECK1-NEXT: store ptr [[TMP123]], ptr [[TMP127]], align 8593// CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 3594// CHECK1-NEXT: store ptr [[TMP124]], ptr [[TMP128]], align 8595// CHECK1-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 4596// CHECK1-NEXT: store ptr @.offload_sizes.11, ptr [[TMP129]], align 8597// CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 5598// CHECK1-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP130]], align 8599// CHECK1-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 6600// CHECK1-NEXT: store ptr null, ptr [[TMP131]], align 8601// CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 7602// CHECK1-NEXT: store ptr null, ptr [[TMP132]], align 8603// CHECK1-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 8604// CHECK1-NEXT: store i64 2, ptr [[TMP133]], align 8605// CHECK1-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 9606// CHECK1-NEXT: store i64 0, ptr [[TMP134]], align 8607// CHECK1-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 10608// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP135]], align 4609// CHECK1-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 11610// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP136]], align 4611// CHECK1-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12612// CHECK1-NEXT: store i32 0, ptr [[TMP137]], align 4613// CHECK1-NEXT: [[TMP138:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.region_id, ptr [[KERNEL_ARGS40]])614// CHECK1-NEXT: [[TMP139:%.*]] = icmp ne i32 [[TMP138]], 0615// CHECK1-NEXT: br i1 [[TMP139]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]]616// CHECK1: omp_offload.failed41:617// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243(ptr [[BIT_VAR]]) #[[ATTR2]]618// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT42]]619// CHECK1: omp_offload.cont42:620// CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0621// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP140]], align 8622// CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0623// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP141]], align 8624// CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 0625// CHECK1-NEXT: store ptr null, ptr [[TMP142]], align 8626// CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 0627// CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 0628// CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 0629// CHECK1-NEXT: store i32 3, ptr [[TMP145]], align 4630// CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 1631// CHECK1-NEXT: store i32 1, ptr [[TMP146]], align 4632// CHECK1-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 2633// CHECK1-NEXT: store ptr [[TMP143]], ptr [[TMP147]], align 8634// CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 3635// CHECK1-NEXT: store ptr [[TMP144]], ptr [[TMP148]], align 8636// CHECK1-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 4637// CHECK1-NEXT: store ptr @.offload_sizes.13, ptr [[TMP149]], align 8638// CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 5639// CHECK1-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP150]], align 8640// CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 6641// CHECK1-NEXT: store ptr null, ptr [[TMP151]], align 8642// CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 7643// CHECK1-NEXT: store ptr null, ptr [[TMP152]], align 8644// CHECK1-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 8645// CHECK1-NEXT: store i64 2, ptr [[TMP153]], align 8646// CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 9647// CHECK1-NEXT: store i64 0, ptr [[TMP154]], align 8648// CHECK1-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 10649// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP155]], align 4650// CHECK1-NEXT: [[TMP156:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 11651// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP156]], align 4652// CHECK1-NEXT: [[TMP157:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12653// CHECK1-NEXT: store i32 0, ptr [[TMP157]], align 4654// CHECK1-NEXT: [[TMP158:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.region_id, ptr [[KERNEL_ARGS47]])655// CHECK1-NEXT: [[TMP159:%.*]] = icmp ne i32 [[TMP158]], 0656// CHECK1-NEXT: br i1 [[TMP159]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]657// CHECK1: omp_offload.failed48:658// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248(ptr [[BIT_VAR]]) #[[ATTR2]]659// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT49]]660// CHECK1: omp_offload.cont49:661// CHECK1-NEXT: store i32 0, ptr @_ZZ4mainE5sivar, align 4662// CHECK1-NEXT: [[TMP160:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0663// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP160]], align 8664// CHECK1-NEXT: [[TMP161:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0665// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP161]], align 8666// CHECK1-NEXT: [[TMP162:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0667// CHECK1-NEXT: store ptr null, ptr [[TMP162]], align 8668// CHECK1-NEXT: [[TMP163:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0669// CHECK1-NEXT: [[TMP164:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0670// CHECK1-NEXT: [[TMP165:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 0671// CHECK1-NEXT: store i32 3, ptr [[TMP165]], align 4672// CHECK1-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 1673// CHECK1-NEXT: store i32 1, ptr [[TMP166]], align 4674// CHECK1-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 2675// CHECK1-NEXT: store ptr [[TMP163]], ptr [[TMP167]], align 8676// CHECK1-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 3677// CHECK1-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 8678// CHECK1-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 4679// CHECK1-NEXT: store ptr @.offload_sizes.15, ptr [[TMP169]], align 8680// CHECK1-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 5681// CHECK1-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP170]], align 8682// CHECK1-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 6683// CHECK1-NEXT: store ptr null, ptr [[TMP171]], align 8684// CHECK1-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 7685// CHECK1-NEXT: store ptr null, ptr [[TMP172]], align 8686// CHECK1-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 8687// CHECK1-NEXT: store i64 2, ptr [[TMP173]], align 8688// CHECK1-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 9689// CHECK1-NEXT: store i64 0, ptr [[TMP174]], align 8690// CHECK1-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 10691// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP175]], align 4692// CHECK1-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 11693// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 4694// CHECK1-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12695// CHECK1-NEXT: store i32 0, ptr [[TMP177]], align 4696// CHECK1-NEXT: [[TMP178:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.region_id, ptr [[KERNEL_ARGS54]])697// CHECK1-NEXT: [[TMP179:%.*]] = icmp ne i32 [[TMP178]], 0698// CHECK1-NEXT: br i1 [[TMP179]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]]699// CHECK1: omp_offload.failed55:700// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254(ptr @_ZZ4mainE5sivar) #[[ATTR2]]701// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT56]]702// CHECK1: omp_offload.cont56:703// CHECK1-NEXT: store i32 10, ptr @_ZZ4mainE5sivar, align 4704// CHECK1-NEXT: [[TMP180:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0705// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP180]], align 8706// CHECK1-NEXT: [[TMP181:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0707// CHECK1-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP181]], align 8708// CHECK1-NEXT: [[TMP182:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 0709// CHECK1-NEXT: store ptr null, ptr [[TMP182]], align 8710// CHECK1-NEXT: [[TMP183:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 0711// CHECK1-NEXT: [[TMP184:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 0712// CHECK1-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0713// CHECK1-NEXT: store i32 3, ptr [[TMP185]], align 4714// CHECK1-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1715// CHECK1-NEXT: store i32 1, ptr [[TMP186]], align 4716// CHECK1-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2717// CHECK1-NEXT: store ptr [[TMP183]], ptr [[TMP187]], align 8718// CHECK1-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3719// CHECK1-NEXT: store ptr [[TMP184]], ptr [[TMP188]], align 8720// CHECK1-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4721// CHECK1-NEXT: store ptr @.offload_sizes.17, ptr [[TMP189]], align 8722// CHECK1-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5723// CHECK1-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP190]], align 8724// CHECK1-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6725// CHECK1-NEXT: store ptr null, ptr [[TMP191]], align 8726// CHECK1-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7727// CHECK1-NEXT: store ptr null, ptr [[TMP192]], align 8728// CHECK1-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8729// CHECK1-NEXT: store i64 2, ptr [[TMP193]], align 8730// CHECK1-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9731// CHECK1-NEXT: store i64 0, ptr [[TMP194]], align 8732// CHECK1-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10733// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 4734// CHECK1-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11735// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 4736// CHECK1-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12737// CHECK1-NEXT: store i32 0, ptr [[TMP197]], align 4738// CHECK1-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.region_id, ptr [[KERNEL_ARGS61]])739// CHECK1-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 0740// CHECK1-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]741// CHECK1: omp_offload.failed62:742// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260(ptr @_ZZ4mainE5sivar) #[[ATTR2]]743// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT63]]744// CHECK1: omp_offload.cont63:745// CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()746// CHECK1-NEXT: ret i32 [[CALL]]747//748//749// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209750// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {751// CHECK1-NEXT: entry:752// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8753// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8754// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8755// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined, ptr [[TMP0]])756// CHECK1-NEXT: ret void757//758//759// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined760// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {761// CHECK1-NEXT: entry:762// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8763// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8764// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8765// CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4766// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4767// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4768// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4769// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4770// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4771// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4772// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4773// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8774// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8775// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8776// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8777// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8778// CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4779// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4780// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4781// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4782// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4783// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8784// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4785// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)786// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4787// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1788// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]789// CHECK1: cond.true:790// CHECK1-NEXT: br label [[COND_END:%.*]]791// CHECK1: cond.false:792// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4793// CHECK1-NEXT: br label [[COND_END]]794// CHECK1: cond.end:795// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]796// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4797// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4798// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4799// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]800// CHECK1: omp.inner.for.cond:801// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4802// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4803// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]804// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]805// CHECK1: omp.inner.for.body:806// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4807// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1808// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]809// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4810// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4811// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4812// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]813// CHECK1-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 4814// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]815// CHECK1: omp.body.continue:816// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]817// CHECK1: omp.inner.for.inc:818// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4819// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1820// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4821// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]822// CHECK1: omp.inner.for.end:823// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]824// CHECK1: omp.loop.exit:825// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])826// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0827// CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8828// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)829// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [830// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]831// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]832// CHECK1-NEXT: ]833// CHECK1: .omp.reduction.case1:834// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4835// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4836// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]837// CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 4838// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)839// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]840// CHECK1: .omp.reduction.case2:841// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4842// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4843// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)844// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]845// CHECK1: .omp.reduction.default:846// CHECK1-NEXT: ret void847//848//849// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func850// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {851// CHECK1-NEXT: entry:852// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8853// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8854// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8855// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8856// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8857// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8858// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0859// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8860// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0861// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8862// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4863// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4864// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]865// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4866// CHECK1-NEXT: ret void867//868//869// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214870// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {871// CHECK1-NEXT: entry:872// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8873// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8874// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8875// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined, ptr [[TMP0]])876// CHECK1-NEXT: ret void877//878//879// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined880// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {881// CHECK1-NEXT: entry:882// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8883// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8884// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8885// CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4886// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4887// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4888// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4889// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4890// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4891// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4892// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4893// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8894// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8895// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8896// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8897// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8898// CHECK1-NEXT: store i32 0, ptr [[SIVAR1]], align 4899// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4900// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4901// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4902// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4903// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8904// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4905// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)906// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4907// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1908// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]909// CHECK1: cond.true:910// CHECK1-NEXT: br label [[COND_END:%.*]]911// CHECK1: cond.false:912// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4913// CHECK1-NEXT: br label [[COND_END]]914// CHECK1: cond.end:915// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]916// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4917// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4918// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4919// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]920// CHECK1: omp.inner.for.cond:921// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4922// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4923// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]924// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]925// CHECK1: omp.inner.for.body:926// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4927// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1928// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]929// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4930// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4931// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 4932// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]]933// CHECK1-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 4934// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]935// CHECK1: omp.body.continue:936// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]937// CHECK1: omp.inner.for.inc:938// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4939// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1940// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4941// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]942// CHECK1: omp.inner.for.end:943// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]944// CHECK1: omp.loop.exit:945// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])946// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0947// CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 8948// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)949// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [950// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]951// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]952// CHECK1-NEXT: ]953// CHECK1: .omp.reduction.case1:954// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 4955// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 4956// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]957// CHECK1-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 4958// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)959// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]960// CHECK1: .omp.reduction.case2:961// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 4962// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 4963// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)964// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]965// CHECK1: .omp.reduction.default:966// CHECK1-NEXT: ret void967//968//969// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func970// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {971// CHECK1-NEXT: entry:972// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8973// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8974// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8975// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8976// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8977// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8978// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0979// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8980// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0981// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8982// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4983// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4984// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]985// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 4986// CHECK1-NEXT: ret void987//988//989// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220990// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {991// CHECK1-NEXT: entry:992// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 8993// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8994// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8995// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined, ptr [[TMP0]])996// CHECK1-NEXT: ret void997//998//999// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined1000// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {1001// CHECK1-NEXT: entry:1002// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81003// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81004// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 81005// CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 41006// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41007// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41008// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41009// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41010// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41011// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41012// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41013// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81014// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 41015// CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 41016// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81017// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81018// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 81019// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 81020// CHECK1-NEXT: store i32 1, ptr [[SIVAR1]], align 41021// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41022// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41023// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41024// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41025// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81026// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41027// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1028// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41029// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11030// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1031// CHECK1: cond.true:1032// CHECK1-NEXT: br label [[COND_END:%.*]]1033// CHECK1: cond.false:1034// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41035// CHECK1-NEXT: br label [[COND_END]]1036// CHECK1: cond.end:1037// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1038// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41039// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41040// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41041// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1042// CHECK1: omp.inner.for.cond:1043// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41044// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41045// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1046// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1047// CHECK1: omp.inner.for.body:1048// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41049// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11050// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1051// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41052// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 41053// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41054// CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]]1055// CHECK1-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 41056// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1057// CHECK1: omp.body.continue:1058// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1059// CHECK1: omp.inner.for.inc:1060// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41061// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 11062// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41063// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1064// CHECK1: omp.inner.for.end:1065// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1066// CHECK1: omp.loop.exit:1067// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1068// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01069// CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 81070// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1071// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1072// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1073// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1074// CHECK1-NEXT: ]1075// CHECK1: .omp.reduction.case1:1076// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 41077// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 41078// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]]1079// CHECK1-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 41080// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1081// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1082// CHECK1: .omp.reduction.case2:1083// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 41084// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 41085// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]1086// CHECK1: atomic_cont:1087// CHECK1-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ]1088// CHECK1-NEXT: store i32 [[TMP17]], ptr [[_TMP6]], align 41089// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[_TMP6]], align 41090// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 41091// CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]]1092// CHECK1-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 41093// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 41094// CHECK1-NEXT: [[TMP21:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 41095// CHECK1-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 01096// CHECK1-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 11097// CHECK1-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]1098// CHECK1: atomic_exit:1099// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1100// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1101// CHECK1: .omp.reduction.default:1102// CHECK1-NEXT: ret void1103//1104//1105// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func1106// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1107// CHECK1-NEXT: entry:1108// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81109// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81110// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81111// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81112// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81113// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81114// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01115// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81116// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01117// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81118// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41119// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41120// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]1121// CHECK1-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 41122// CHECK1-NEXT: ret void1123//1124//1125// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2261126// CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] {1127// CHECK1-NEXT: entry:1128// CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 81129// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 81130// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 81131// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined, ptr [[TMP0]])1132// CHECK1-NEXT: ret void1133//1134//1135// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined1136// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] {1137// CHECK1-NEXT: entry:1138// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81139// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81140// CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 81141// CHECK1-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 11142// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41143// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41144// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41145// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41146// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41147// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41148// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41149// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81150// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 11151// CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 11152// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81153// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81154// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 81155// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 81156// CHECK1-NEXT: store i8 1, ptr [[AND_VAR1]], align 11157// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41158// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41159// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41160// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41161// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81162// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41163// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1164// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41165// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11166// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1167// CHECK1: cond.true:1168// CHECK1-NEXT: br label [[COND_END:%.*]]1169// CHECK1: cond.false:1170// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41171// CHECK1-NEXT: br label [[COND_END]]1172// CHECK1: cond.end:1173// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1174// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41175// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41176// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41177// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1178// CHECK1: omp.inner.for.cond:1179// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41180// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41181// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1182// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1183// CHECK1: omp.inner.for.body:1184// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41185// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11186// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1187// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41188// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 11189// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i11190// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]1191// CHECK1: land.rhs:1192// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41193// CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 01194// CHECK1-NEXT: br label [[LAND_END]]1195// CHECK1: land.end:1196// CHECK1-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ]1197// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i81198// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 11199// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1200// CHECK1: omp.body.continue:1201// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1202// CHECK1: omp.inner.for.inc:1203// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41204// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 11205// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41206// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1207// CHECK1: omp.inner.for.end:1208// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1209// CHECK1: omp.loop.exit:1210// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1211// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01212// CHECK1-NEXT: store ptr [[AND_VAR1]], ptr [[TMP13]], align 81213// CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1214// CHECK1-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1215// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1216// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1217// CHECK1-NEXT: ]1218// CHECK1: .omp.reduction.case1:1219// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 11220// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i11221// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]1222// CHECK1: land.rhs6:1223// CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 11224// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i11225// CHECK1-NEXT: br label [[LAND_END8]]1226// CHECK1: land.end8:1227// CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]1228// CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i81229// CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 11230// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1231// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1232// CHECK1: .omp.reduction.case2:1233// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 11234// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i11235// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 11236// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]1237// CHECK1: atomic_cont:1238// CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ]1239// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i11240// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i81241// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 11242// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 11243// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i11244// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]1245// CHECK1: land.rhs15:1246// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 11247// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i11248// CHECK1-NEXT: br label [[LAND_END17]]1249// CHECK1: land.end17:1250// CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]1251// CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i81252// CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 11253// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 11254// CHECK1-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 11255// CHECK1-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 01256// CHECK1-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 11257// CHECK1-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]1258// CHECK1: atomic_exit:1259// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1260// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1261// CHECK1: .omp.reduction.default:1262// CHECK1-NEXT: ret void1263//1264//1265// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func1266// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1267// CHECK1-NEXT: entry:1268// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81269// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81270// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81271// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81272// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81273// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81274// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01275// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81276// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01277// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81278// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 11279// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i11280// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]1281// CHECK1: land.rhs:1282// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 11283// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i11284// CHECK1-NEXT: br label [[LAND_END]]1285// CHECK1: land.end:1286// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]1287// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i81288// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 11289// CHECK1-NEXT: ret void1290//1291//1292// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2321293// CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] {1294// CHECK1-NEXT: entry:1295// CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 81296// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 81297// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 81298// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined, ptr [[TMP0]])1299// CHECK1-NEXT: ret void1300//1301//1302// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined1303// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] {1304// CHECK1-NEXT: entry:1305// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81306// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81307// CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 81308// CHECK1-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 11309// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41310// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41311// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41312// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41313// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41314// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41315// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41316// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81317// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 11318// CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 11319// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81320// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81321// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 81322// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 81323// CHECK1-NEXT: store i8 0, ptr [[OR_VAR1]], align 11324// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41325// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41326// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41327// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41328// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81329// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41330// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1331// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41332// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11333// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1334// CHECK1: cond.true:1335// CHECK1-NEXT: br label [[COND_END:%.*]]1336// CHECK1: cond.false:1337// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41338// CHECK1-NEXT: br label [[COND_END]]1339// CHECK1: cond.end:1340// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1341// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41342// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41343// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41344// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1345// CHECK1: omp.inner.for.cond:1346// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41347// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41348// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1349// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1350// CHECK1: omp.inner.for.body:1351// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41352// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11353// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1354// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41355// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 11356// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i11357// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]1358// CHECK1: lor.rhs:1359// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41360// CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 01361// CHECK1-NEXT: br label [[LOR_END]]1362// CHECK1: lor.end:1363// CHECK1-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ]1364// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i81365// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 11366// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1367// CHECK1: omp.body.continue:1368// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1369// CHECK1: omp.inner.for.inc:1370// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41371// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 11372// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 41373// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1374// CHECK1: omp.inner.for.end:1375// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1376// CHECK1: omp.loop.exit:1377// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1378// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01379// CHECK1-NEXT: store ptr [[OR_VAR1]], ptr [[TMP13]], align 81380// CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1381// CHECK1-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1382// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1383// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1384// CHECK1-NEXT: ]1385// CHECK1: .omp.reduction.case1:1386// CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 11387// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i11388// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]1389// CHECK1: lor.rhs6:1390// CHECK1-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 11391// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i11392// CHECK1-NEXT: br label [[LOR_END8]]1393// CHECK1: lor.end8:1394// CHECK1-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]1395// CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i81396// CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 11397// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1398// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1399// CHECK1: .omp.reduction.case2:1400// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 11401// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i11402// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 11403// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]1404// CHECK1: atomic_cont:1405// CHECK1-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ]1406// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i11407// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i81408// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 11409// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 11410// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i11411// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]1412// CHECK1: lor.rhs15:1413// CHECK1-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 11414// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i11415// CHECK1-NEXT: br label [[LOR_END17]]1416// CHECK1: lor.end17:1417// CHECK1-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]1418// CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i81419// CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 11420// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 11421// CHECK1-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 11422// CHECK1-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 01423// CHECK1-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 11424// CHECK1-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]1425// CHECK1: atomic_exit:1426// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1427// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1428// CHECK1: .omp.reduction.default:1429// CHECK1-NEXT: ret void1430//1431//1432// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func1433// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1434// CHECK1-NEXT: entry:1435// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81436// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81437// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81438// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81439// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81440// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81441// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01442// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81443// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01444// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81445// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 11446// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i11447// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]1448// CHECK1: lor.rhs:1449// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 11450// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i11451// CHECK1-NEXT: br label [[LOR_END]]1452// CHECK1: lor.end:1453// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]1454// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i81455// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 11456// CHECK1-NEXT: ret void1457//1458//1459// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2381460// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1461// CHECK1-NEXT: entry:1462// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81463// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81464// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81465// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined, ptr [[TMP0]])1466// CHECK1-NEXT: ret void1467//1468//1469// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined1470// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1471// CHECK1-NEXT: entry:1472// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81473// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81474// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81475// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 41476// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41477// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41478// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41479// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41480// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41481// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41482// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41483// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81484// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81485// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81486// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81487// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81488// CHECK1-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 41489// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41490// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41491// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41492// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41493// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81494// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41495// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1496// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41497// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11498// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1499// CHECK1: cond.true:1500// CHECK1-NEXT: br label [[COND_END:%.*]]1501// CHECK1: cond.false:1502// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41503// CHECK1-NEXT: br label [[COND_END]]1504// CHECK1: cond.end:1505// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1506// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41507// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41508// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41509// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1510// CHECK1: omp.inner.for.cond:1511// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41512// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41513// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1514// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1515// CHECK1: omp.inner.for.body:1516// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41517// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11518// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1519// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41520// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 41521// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41522// CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]]1523// CHECK1-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 41524// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1525// CHECK1: omp.body.continue:1526// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1527// CHECK1: omp.inner.for.inc:1528// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41529// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 11530// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 41531// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1532// CHECK1: omp.inner.for.end:1533// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1534// CHECK1: omp.loop.exit:1535// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1536// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01537// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 81538// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1539// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1540// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1541// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1542// CHECK1-NEXT: ]1543// CHECK1: .omp.reduction.case1:1544// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 41545// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 41546// CHECK1-NEXT: [[AND4:%.*]] = and i32 [[TMP14]], [[TMP15]]1547// CHECK1-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 41548// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1549// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1550// CHECK1: .omp.reduction.case2:1551// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 41552// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP16]] monotonic, align 41553// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1554// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1555// CHECK1: .omp.reduction.default:1556// CHECK1-NEXT: ret void1557//1558//1559// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func1560// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1561// CHECK1-NEXT: entry:1562// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81563// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81564// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81565// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81566// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81567// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81568// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01569// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81570// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01571// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81572// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41573// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41574// CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]]1575// CHECK1-NEXT: store i32 [[AND]], ptr [[TMP7]], align 41576// CHECK1-NEXT: ret void1577//1578//1579// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2431580// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1581// CHECK1-NEXT: entry:1582// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81583// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81584// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81585// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined, ptr [[TMP0]])1586// CHECK1-NEXT: ret void1587//1588//1589// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined1590// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1591// CHECK1-NEXT: entry:1592// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81593// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81594// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81595// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 41596// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41597// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41598// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41599// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41600// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41601// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41602// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41603// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81604// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81605// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81606// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81607// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81608// CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 41609// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41610// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41611// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41612// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41613// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81614// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41615// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1616// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41617// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11618// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1619// CHECK1: cond.true:1620// CHECK1-NEXT: br label [[COND_END:%.*]]1621// CHECK1: cond.false:1622// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41623// CHECK1-NEXT: br label [[COND_END]]1624// CHECK1: cond.end:1625// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1626// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41627// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41628// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41629// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1630// CHECK1: omp.inner.for.cond:1631// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41632// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41633// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1634// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1635// CHECK1: omp.inner.for.body:1636// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41637// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11638// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1639// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41640// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 41641// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41642// CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]]1643// CHECK1-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 41644// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1645// CHECK1: omp.body.continue:1646// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1647// CHECK1: omp.inner.for.inc:1648// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41649// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 11650// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 41651// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1652// CHECK1: omp.inner.for.end:1653// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1654// CHECK1: omp.loop.exit:1655// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1656// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01657// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 81658// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1659// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1660// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1661// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1662// CHECK1-NEXT: ]1663// CHECK1: .omp.reduction.case1:1664// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 41665// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 41666// CHECK1-NEXT: [[OR4:%.*]] = or i32 [[TMP14]], [[TMP15]]1667// CHECK1-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 41668// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1669// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1670// CHECK1: .omp.reduction.case2:1671// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 41672// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP16]] monotonic, align 41673// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1674// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1675// CHECK1: .omp.reduction.default:1676// CHECK1-NEXT: ret void1677//1678//1679// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func1680// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1681// CHECK1-NEXT: entry:1682// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81683// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81684// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81685// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81686// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81687// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81688// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01689// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81690// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01691// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81692// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41693// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41694// CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]]1695// CHECK1-NEXT: store i32 [[OR]], ptr [[TMP7]], align 41696// CHECK1-NEXT: ret void1697//1698//1699// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2481700// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1701// CHECK1-NEXT: entry:1702// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81703// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81704// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81705// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined, ptr [[TMP0]])1706// CHECK1-NEXT: ret void1707//1708//1709// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined1710// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {1711// CHECK1-NEXT: entry:1712// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81713// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81714// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 81715// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 41716// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41717// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41718// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41719// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41720// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41721// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41722// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41723// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81724// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81725// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81726// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 81727// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 81728// CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 41729// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41730// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41731// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41732// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41733// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81734// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41735// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1736// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41737// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11738// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1739// CHECK1: cond.true:1740// CHECK1-NEXT: br label [[COND_END:%.*]]1741// CHECK1: cond.false:1742// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41743// CHECK1-NEXT: br label [[COND_END]]1744// CHECK1: cond.end:1745// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1746// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41747// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41748// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41749// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1750// CHECK1: omp.inner.for.cond:1751// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41752// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41753// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1754// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1755// CHECK1: omp.inner.for.body:1756// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41757// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11758// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1759// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41760// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 41761// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41762// CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]]1763// CHECK1-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 41764// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1765// CHECK1: omp.body.continue:1766// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1767// CHECK1: omp.inner.for.inc:1768// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41769// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 11770// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 41771// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1772// CHECK1: omp.inner.for.end:1773// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1774// CHECK1: omp.loop.exit:1775// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1776// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01777// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 81778// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1779// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1780// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1781// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1782// CHECK1-NEXT: ]1783// CHECK1: .omp.reduction.case1:1784// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 41785// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 41786// CHECK1-NEXT: [[XOR4:%.*]] = xor i32 [[TMP14]], [[TMP15]]1787// CHECK1-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 41788// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1789// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1790// CHECK1: .omp.reduction.case2:1791// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 41792// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP16]] monotonic, align 41793// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1794// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1795// CHECK1: .omp.reduction.default:1796// CHECK1-NEXT: ret void1797//1798//1799// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func1800// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1801// CHECK1-NEXT: entry:1802// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81803// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81804// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81805// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81806// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81807// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81808// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01809// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81810// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01811// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81812// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41813// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41814// CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]]1815// CHECK1-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 41816// CHECK1-NEXT: ret void1817//1818//1819// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2541820// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {1821// CHECK1-NEXT: entry:1822// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 81823// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 81824// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 81825// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined, ptr [[TMP0]])1826// CHECK1-NEXT: ret void1827//1828//1829// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined1830// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {1831// CHECK1-NEXT: entry:1832// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81833// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81834// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 81835// CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 41836// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41837// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41838// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41839// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41840// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41841// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41842// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41843// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81844// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81845// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81846// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 81847// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 81848// CHECK1-NEXT: store i32 -2147483648, ptr [[SIVAR1]], align 41849// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41850// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41851// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41852// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41853// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81854// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41855// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1856// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41857// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 11858// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1859// CHECK1: cond.true:1860// CHECK1-NEXT: br label [[COND_END:%.*]]1861// CHECK1: cond.false:1862// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41863// CHECK1-NEXT: br label [[COND_END]]1864// CHECK1: cond.end:1865// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1866// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41867// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41868// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41869// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1870// CHECK1: omp.inner.for.cond:1871// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41872// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41873// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1874// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1875// CHECK1: omp.inner.for.body:1876// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41877// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 11878// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1879// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 41880// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 41881// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 41882// CHECK1-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]]1883// CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]1884// CHECK1: cond.true4:1885// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 41886// CHECK1-NEXT: br label [[COND_END6:%.*]]1887// CHECK1: cond.false5:1888// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 41889// CHECK1-NEXT: br label [[COND_END6]]1890// CHECK1: cond.end6:1891// CHECK1-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]1892// CHECK1-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 41893// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1894// CHECK1: omp.body.continue:1895// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1896// CHECK1: omp.inner.for.inc:1897// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41898// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 11899// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41900// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]1901// CHECK1: omp.inner.for.end:1902// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1903// CHECK1: omp.loop.exit:1904// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1905// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 01906// CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 81907// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)1908// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [1909// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]1910// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]1911// CHECK1-NEXT: ]1912// CHECK1: .omp.reduction.case1:1913// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 41914// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 41915// CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP16]], [[TMP17]]1916// CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]1917// CHECK1: cond.true10:1918// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 41919// CHECK1-NEXT: br label [[COND_END12:%.*]]1920// CHECK1: cond.false11:1921// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 41922// CHECK1-NEXT: br label [[COND_END12]]1923// CHECK1: cond.end12:1924// CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ]1925// CHECK1-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 41926// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1927// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1928// CHECK1: .omp.reduction.case2:1929// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 41930// CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP20]] monotonic, align 41931// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)1932// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]1933// CHECK1: .omp.reduction.default:1934// CHECK1-NEXT: ret void1935//1936//1937// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func1938// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {1939// CHECK1-NEXT: entry:1940// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 81941// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 81942// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 81943// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 81944// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 81945// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 81946// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 01947// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 81948// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 01949// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 81950// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41951// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 41952// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]1953// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1954// CHECK1: cond.true:1955// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 41956// CHECK1-NEXT: br label [[COND_END:%.*]]1957// CHECK1: cond.false:1958// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 41959// CHECK1-NEXT: br label [[COND_END]]1960// CHECK1: cond.end:1961// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1962// CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 41963// CHECK1-NEXT: ret void1964//1965//1966// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2601967// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {1968// CHECK1-NEXT: entry:1969// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 81970// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 81971// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 81972// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined, ptr [[TMP0]])1973// CHECK1-NEXT: ret void1974//1975//1976// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined1977// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {1978// CHECK1-NEXT: entry:1979// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81980// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81981// CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 81982// CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 41983// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41984// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 41985// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41986// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41987// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41988// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41989// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 41990// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 81991// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81992// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81993// CHECK1-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 81994// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 81995// CHECK1-NEXT: store i32 2147483647, ptr [[SIVAR1]], align 41996// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41997// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41998// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41999// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42000// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82001// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42002// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2003// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42004// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 12005// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2006// CHECK1: cond.true:2007// CHECK1-NEXT: br label [[COND_END:%.*]]2008// CHECK1: cond.false:2009// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42010// CHECK1-NEXT: br label [[COND_END]]2011// CHECK1: cond.end:2012// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2013// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42014// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42015// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42016// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2017// CHECK1: omp.inner.for.cond:2018// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42019// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42020// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2021// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2022// CHECK1: omp.inner.for.body:2023// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42024// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12025// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2026// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 42027// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 42028// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 42029// CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]2030// CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]2031// CHECK1: cond.true4:2032// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 42033// CHECK1-NEXT: br label [[COND_END6:%.*]]2034// CHECK1: cond.false5:2035// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 42036// CHECK1-NEXT: br label [[COND_END6]]2037// CHECK1: cond.end6:2038// CHECK1-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]2039// CHECK1-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 42040// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2041// CHECK1: omp.body.continue:2042// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2043// CHECK1: omp.inner.for.inc:2044// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42045// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 12046// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 42047// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]2048// CHECK1: omp.inner.for.end:2049// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2050// CHECK1: omp.loop.exit:2051// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2052// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02053// CHECK1-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 82054// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2055// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2056// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2057// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2058// CHECK1-NEXT: ]2059// CHECK1: .omp.reduction.case1:2060// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 42061// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 42062// CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]]2063// CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]2064// CHECK1: cond.true10:2065// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 42066// CHECK1-NEXT: br label [[COND_END12:%.*]]2067// CHECK1: cond.false11:2068// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 42069// CHECK1-NEXT: br label [[COND_END12]]2070// CHECK1: cond.end12:2071// CHECK1-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ]2072// CHECK1-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 42073// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)2074// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2075// CHECK1: .omp.reduction.case2:2076// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 42077// CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP20]] monotonic, align 42078// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)2079// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2080// CHECK1: .omp.reduction.default:2081// CHECK1-NEXT: ret void2082//2083//2084// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func2085// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {2086// CHECK1-NEXT: entry:2087// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 82088// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 82089// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 82090// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 82091// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82092// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82093// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 02094// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82095// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 02096// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82097// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42098// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 42099// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]]2100// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2101// CHECK1: cond.true:2102// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 42103// CHECK1-NEXT: br label [[COND_END:%.*]]2104// CHECK1: cond.false:2105// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 42106// CHECK1-NEXT: br label [[COND_END]]2107// CHECK1: cond.end:2108// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]2109// CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 42110// CHECK1-NEXT: ret void2111//2112//2113// CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2114// CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {2115// CHECK1-NEXT: entry:2116// CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 42117// CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42118// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 82119// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 82120// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 82121// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 42122// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82123// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [2 x ptr], align 82124// CHECK1-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [2 x ptr], align 82125// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [2 x ptr], align 82126// CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 42127// CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82128// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 82129// CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 82130// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 82131// CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 42132// CHECK1-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82133// CHECK1-NEXT: [[AND_VAR:%.*]] = alloca i8, align 12134// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [2 x ptr], align 82135// CHECK1-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [2 x ptr], align 82136// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [2 x ptr], align 82137// CHECK1-NEXT: [[_TMP18:%.*]] = alloca i32, align 42138// CHECK1-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82139// CHECK1-NEXT: [[OR_VAR:%.*]] = alloca i8, align 12140// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x ptr], align 82141// CHECK1-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x ptr], align 82142// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x ptr], align 82143// CHECK1-NEXT: [[_TMP25:%.*]] = alloca i32, align 42144// CHECK1-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82145// CHECK1-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 42146// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [2 x ptr], align 82147// CHECK1-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [2 x ptr], align 82148// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [2 x ptr], align 82149// CHECK1-NEXT: [[_TMP32:%.*]] = alloca i32, align 42150// CHECK1-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82151// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [2 x ptr], align 82152// CHECK1-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [2 x ptr], align 82153// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [2 x ptr], align 82154// CHECK1-NEXT: [[_TMP39:%.*]] = alloca i32, align 42155// CHECK1-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82156// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [2 x ptr], align 82157// CHECK1-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [2 x ptr], align 82158// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [2 x ptr], align 82159// CHECK1-NEXT: [[_TMP46:%.*]] = alloca i32, align 42160// CHECK1-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82161// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [2 x ptr], align 82162// CHECK1-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [2 x ptr], align 82163// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [2 x ptr], align 82164// CHECK1-NEXT: [[_TMP53:%.*]] = alloca i32, align 42165// CHECK1-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82166// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [2 x ptr], align 82167// CHECK1-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [2 x ptr], align 82168// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [2 x ptr], align 82169// CHECK1-NEXT: [[_TMP60:%.*]] = alloca i32, align 42170// CHECK1-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82171// CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 42172// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)2173// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02174// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 82175// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02176// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 82177// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 02178// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 82179// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02180// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02181// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02182// CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 42183// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12184// CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 42185// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22186// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 82187// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32188// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 82189// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42190// CHECK1-NEXT: store ptr @.offload_sizes.19, ptr [[TMP9]], align 82191// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52192// CHECK1-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP10]], align 82193// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62194// CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 82195// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72196// CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 82197// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82198// CHECK1-NEXT: store i64 2, ptr [[TMP13]], align 82199// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92200// CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 82201// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102202// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 42203// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112204// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 42205// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122206// CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 42207// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]])2208// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 02209// CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2210// CHECK1: omp_offload.failed:2211// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]]2212// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]2213// CHECK1: omp_offload.cont:2214// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 02215// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP20]], align 82216// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 02217// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP21]], align 82218// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 02219// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 82220// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 12221// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP23]], align 82222// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 12223// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP24]], align 82224// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 12225// CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 82226// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 02227// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 02228// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 02229// CHECK1-NEXT: store i32 3, ptr [[TMP28]], align 42230// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12231// CHECK1-NEXT: store i32 2, ptr [[TMP29]], align 42232// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 22233// CHECK1-NEXT: store ptr [[TMP26]], ptr [[TMP30]], align 82234// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 32235// CHECK1-NEXT: store ptr [[TMP27]], ptr [[TMP31]], align 82236// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 42237// CHECK1-NEXT: store ptr @.offload_sizes.21, ptr [[TMP32]], align 82238// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 52239// CHECK1-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP33]], align 82240// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 62241// CHECK1-NEXT: store ptr null, ptr [[TMP34]], align 82242// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 72243// CHECK1-NEXT: store ptr null, ptr [[TMP35]], align 82244// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 82245// CHECK1-NEXT: store i64 2, ptr [[TMP36]], align 82246// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 92247// CHECK1-NEXT: store i64 0, ptr [[TMP37]], align 82248// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 102249// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 42250// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 112251// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 42252// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 122253// CHECK1-NEXT: store i32 0, ptr [[TMP40]], align 42254// CHECK1-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.region_id, ptr [[KERNEL_ARGS5]])2255// CHECK1-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 02256// CHECK1-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]2257// CHECK1: omp_offload.failed6:2258// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]2259// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]2260// CHECK1: omp_offload.cont7:2261// CHECK1-NEXT: store i32 1, ptr [[T_VAR]], align 42262// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02263// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP43]], align 82264// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02265// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP44]], align 82266// CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 02267// CHECK1-NEXT: store ptr null, ptr [[TMP45]], align 82268// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 12269// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP46]], align 82270// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 12271// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP47]], align 82272// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 12273// CHECK1-NEXT: store ptr null, ptr [[TMP48]], align 82274// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02275// CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02276// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 02277// CHECK1-NEXT: store i32 3, ptr [[TMP51]], align 42278// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12279// CHECK1-NEXT: store i32 2, ptr [[TMP52]], align 42280// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 22281// CHECK1-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 82282// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 32283// CHECK1-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 82284// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 42285// CHECK1-NEXT: store ptr @.offload_sizes.23, ptr [[TMP55]], align 82286// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 52287// CHECK1-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP56]], align 82288// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 62289// CHECK1-NEXT: store ptr null, ptr [[TMP57]], align 82290// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 72291// CHECK1-NEXT: store ptr null, ptr [[TMP58]], align 82292// CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 82293// CHECK1-NEXT: store i64 2, ptr [[TMP59]], align 82294// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 92295// CHECK1-NEXT: store i64 0, ptr [[TMP60]], align 82296// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 102297// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 42298// CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 112299// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 42300// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 122301// CHECK1-NEXT: store i32 0, ptr [[TMP63]], align 42302// CHECK1-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.region_id, ptr [[KERNEL_ARGS12]])2303// CHECK1-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 02304// CHECK1-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]2305// CHECK1: omp_offload.failed13:2306// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]2307// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT14]]2308// CHECK1: omp_offload.cont14:2309// CHECK1-NEXT: store i8 1, ptr [[AND_VAR]], align 12310// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 02311// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP66]], align 82312// CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 02313// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[TMP67]], align 82314// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 02315// CHECK1-NEXT: store ptr null, ptr [[TMP68]], align 82316// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 12317// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP69]], align 82318// CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 12319// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP70]], align 82320// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 12321// CHECK1-NEXT: store ptr null, ptr [[TMP71]], align 82322// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 02323// CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 02324// CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 02325// CHECK1-NEXT: store i32 3, ptr [[TMP74]], align 42326// CHECK1-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12327// CHECK1-NEXT: store i32 2, ptr [[TMP75]], align 42328// CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 22329// CHECK1-NEXT: store ptr [[TMP72]], ptr [[TMP76]], align 82330// CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 32331// CHECK1-NEXT: store ptr [[TMP73]], ptr [[TMP77]], align 82332// CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 42333// CHECK1-NEXT: store ptr @.offload_sizes.25, ptr [[TMP78]], align 82334// CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 52335// CHECK1-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP79]], align 82336// CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 62337// CHECK1-NEXT: store ptr null, ptr [[TMP80]], align 82338// CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 72339// CHECK1-NEXT: store ptr null, ptr [[TMP81]], align 82340// CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 82341// CHECK1-NEXT: store i64 2, ptr [[TMP82]], align 82342// CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 92343// CHECK1-NEXT: store i64 0, ptr [[TMP83]], align 82344// CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 102345// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP84]], align 42346// CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 112347// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP85]], align 42348// CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 122349// CHECK1-NEXT: store i32 0, ptr [[TMP86]], align 42350// CHECK1-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS19]])2351// CHECK1-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 02352// CHECK1-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]2353// CHECK1: omp_offload.failed20:2354// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[AND_VAR]], ptr [[VEC]]) #[[ATTR2]]2355// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT21]]2356// CHECK1: omp_offload.cont21:2357// CHECK1-NEXT: store i8 0, ptr [[OR_VAR]], align 12358// CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 02359// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP89]], align 82360// CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 02361// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[TMP90]], align 82362// CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 02363// CHECK1-NEXT: store ptr null, ptr [[TMP91]], align 82364// CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 12365// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP92]], align 82366// CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 12367// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP93]], align 82368// CHECK1-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 12369// CHECK1-NEXT: store ptr null, ptr [[TMP94]], align 82370// CHECK1-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 02371// CHECK1-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 02372// CHECK1-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 02373// CHECK1-NEXT: store i32 3, ptr [[TMP97]], align 42374// CHECK1-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 12375// CHECK1-NEXT: store i32 2, ptr [[TMP98]], align 42376// CHECK1-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 22377// CHECK1-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 82378// CHECK1-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 32379// CHECK1-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 82380// CHECK1-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 42381// CHECK1-NEXT: store ptr @.offload_sizes.27, ptr [[TMP101]], align 82382// CHECK1-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 52383// CHECK1-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP102]], align 82384// CHECK1-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 62385// CHECK1-NEXT: store ptr null, ptr [[TMP103]], align 82386// CHECK1-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 72387// CHECK1-NEXT: store ptr null, ptr [[TMP104]], align 82388// CHECK1-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 82389// CHECK1-NEXT: store i64 2, ptr [[TMP105]], align 82390// CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 92391// CHECK1-NEXT: store i64 0, ptr [[TMP106]], align 82392// CHECK1-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 102393// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 42394// CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 112395// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 42396// CHECK1-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 122397// CHECK1-NEXT: store i32 0, ptr [[TMP109]], align 42398// CHECK1-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.region_id, ptr [[KERNEL_ARGS26]])2399// CHECK1-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 02400// CHECK1-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]2401// CHECK1: omp_offload.failed27:2402// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55(ptr [[OR_VAR]], ptr [[VEC]]) #[[ATTR2]]2403// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT28]]2404// CHECK1: omp_offload.cont28:2405// CHECK1-NEXT: store i32 1, ptr [[BIT_VAR]], align 42406// CHECK1-NEXT: [[TMP112:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 02407// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP112]], align 82408// CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 02409// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP113]], align 82410// CHECK1-NEXT: [[TMP114:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 02411// CHECK1-NEXT: store ptr null, ptr [[TMP114]], align 82412// CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 12413// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP115]], align 82414// CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 12415// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP116]], align 82416// CHECK1-NEXT: [[TMP117:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i64 0, i64 12417// CHECK1-NEXT: store ptr null, ptr [[TMP117]], align 82418// CHECK1-NEXT: [[TMP118:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 02419// CHECK1-NEXT: [[TMP119:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 02420// CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 02421// CHECK1-NEXT: store i32 3, ptr [[TMP120]], align 42422// CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 12423// CHECK1-NEXT: store i32 2, ptr [[TMP121]], align 42424// CHECK1-NEXT: [[TMP122:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 22425// CHECK1-NEXT: store ptr [[TMP118]], ptr [[TMP122]], align 82426// CHECK1-NEXT: [[TMP123:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 32427// CHECK1-NEXT: store ptr [[TMP119]], ptr [[TMP123]], align 82428// CHECK1-NEXT: [[TMP124:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 42429// CHECK1-NEXT: store ptr @.offload_sizes.29, ptr [[TMP124]], align 82430// CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 52431// CHECK1-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP125]], align 82432// CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 62433// CHECK1-NEXT: store ptr null, ptr [[TMP126]], align 82434// CHECK1-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 72435// CHECK1-NEXT: store ptr null, ptr [[TMP127]], align 82436// CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 82437// CHECK1-NEXT: store i64 2, ptr [[TMP128]], align 82438// CHECK1-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 92439// CHECK1-NEXT: store i64 0, ptr [[TMP129]], align 82440// CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 102441// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP130]], align 42442// CHECK1-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 112443// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP131]], align 42444// CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 122445// CHECK1-NEXT: store i32 0, ptr [[TMP132]], align 42446// CHECK1-NEXT: [[TMP133:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.region_id, ptr [[KERNEL_ARGS33]])2447// CHECK1-NEXT: [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 02448// CHECK1-NEXT: br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]2449// CHECK1: omp_offload.failed34:2450// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]2451// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT35]]2452// CHECK1: omp_offload.cont35:2453// CHECK1-NEXT: [[TMP135:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 02454// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP135]], align 82455// CHECK1-NEXT: [[TMP136:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 02456// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP136]], align 82457// CHECK1-NEXT: [[TMP137:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 02458// CHECK1-NEXT: store ptr null, ptr [[TMP137]], align 82459// CHECK1-NEXT: [[TMP138:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 12460// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP138]], align 82461// CHECK1-NEXT: [[TMP139:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 12462// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP139]], align 82463// CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 12464// CHECK1-NEXT: store ptr null, ptr [[TMP140]], align 82465// CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 02466// CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 02467// CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 02468// CHECK1-NEXT: store i32 3, ptr [[TMP143]], align 42469// CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 12470// CHECK1-NEXT: store i32 2, ptr [[TMP144]], align 42471// CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 22472// CHECK1-NEXT: store ptr [[TMP141]], ptr [[TMP145]], align 82473// CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 32474// CHECK1-NEXT: store ptr [[TMP142]], ptr [[TMP146]], align 82475// CHECK1-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 42476// CHECK1-NEXT: store ptr @.offload_sizes.31, ptr [[TMP147]], align 82477// CHECK1-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 52478// CHECK1-NEXT: store ptr @.offload_maptypes.32, ptr [[TMP148]], align 82479// CHECK1-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 62480// CHECK1-NEXT: store ptr null, ptr [[TMP149]], align 82481// CHECK1-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 72482// CHECK1-NEXT: store ptr null, ptr [[TMP150]], align 82483// CHECK1-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 82484// CHECK1-NEXT: store i64 2, ptr [[TMP151]], align 82485// CHECK1-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 92486// CHECK1-NEXT: store i64 0, ptr [[TMP152]], align 82487// CHECK1-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 102488// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 42489// CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 112490// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP154]], align 42491// CHECK1-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 122492// CHECK1-NEXT: store i32 0, ptr [[TMP155]], align 42493// CHECK1-NEXT: [[TMP156:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS40]])2494// CHECK1-NEXT: [[TMP157:%.*]] = icmp ne i32 [[TMP156]], 02495// CHECK1-NEXT: br i1 [[TMP157]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]]2496// CHECK1: omp_offload.failed41:2497// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]2498// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT42]]2499// CHECK1: omp_offload.cont42:2500// CHECK1-NEXT: [[TMP158:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 02501// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP158]], align 82502// CHECK1-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 02503// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[TMP159]], align 82504// CHECK1-NEXT: [[TMP160:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 02505// CHECK1-NEXT: store ptr null, ptr [[TMP160]], align 82506// CHECK1-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 12507// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP161]], align 82508// CHECK1-NEXT: [[TMP162:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 12509// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP162]], align 82510// CHECK1-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i64 0, i64 12511// CHECK1-NEXT: store ptr null, ptr [[TMP163]], align 82512// CHECK1-NEXT: [[TMP164:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 02513// CHECK1-NEXT: [[TMP165:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 02514// CHECK1-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 02515// CHECK1-NEXT: store i32 3, ptr [[TMP166]], align 42516// CHECK1-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 12517// CHECK1-NEXT: store i32 2, ptr [[TMP167]], align 42518// CHECK1-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 22519// CHECK1-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 82520// CHECK1-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 32521// CHECK1-NEXT: store ptr [[TMP165]], ptr [[TMP169]], align 82522// CHECK1-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 42523// CHECK1-NEXT: store ptr @.offload_sizes.33, ptr [[TMP170]], align 82524// CHECK1-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 52525// CHECK1-NEXT: store ptr @.offload_maptypes.34, ptr [[TMP171]], align 82526// CHECK1-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 62527// CHECK1-NEXT: store ptr null, ptr [[TMP172]], align 82528// CHECK1-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 72529// CHECK1-NEXT: store ptr null, ptr [[TMP173]], align 82530// CHECK1-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 82531// CHECK1-NEXT: store i64 2, ptr [[TMP174]], align 82532// CHECK1-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 92533// CHECK1-NEXT: store i64 0, ptr [[TMP175]], align 82534// CHECK1-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 102535// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 42536// CHECK1-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 112537// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP177]], align 42538// CHECK1-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 122539// CHECK1-NEXT: store i32 0, ptr [[TMP178]], align 42540// CHECK1-NEXT: [[TMP179:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.region_id, ptr [[KERNEL_ARGS47]])2541// CHECK1-NEXT: [[TMP180:%.*]] = icmp ne i32 [[TMP179]], 02542// CHECK1-NEXT: br i1 [[TMP180]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]2543// CHECK1: omp_offload.failed48:2544// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]2545// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT49]]2546// CHECK1: omp_offload.cont49:2547// CHECK1-NEXT: store i32 0, ptr [[T_VAR]], align 42548// CHECK1-NEXT: [[TMP181:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 02549// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP181]], align 82550// CHECK1-NEXT: [[TMP182:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 02551// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP182]], align 82552// CHECK1-NEXT: [[TMP183:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 02553// CHECK1-NEXT: store ptr null, ptr [[TMP183]], align 82554// CHECK1-NEXT: [[TMP184:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 12555// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP184]], align 82556// CHECK1-NEXT: [[TMP185:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 12557// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP185]], align 82558// CHECK1-NEXT: [[TMP186:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 12559// CHECK1-NEXT: store ptr null, ptr [[TMP186]], align 82560// CHECK1-NEXT: [[TMP187:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 02561// CHECK1-NEXT: [[TMP188:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 02562// CHECK1-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 02563// CHECK1-NEXT: store i32 3, ptr [[TMP189]], align 42564// CHECK1-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 12565// CHECK1-NEXT: store i32 2, ptr [[TMP190]], align 42566// CHECK1-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 22567// CHECK1-NEXT: store ptr [[TMP187]], ptr [[TMP191]], align 82568// CHECK1-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 32569// CHECK1-NEXT: store ptr [[TMP188]], ptr [[TMP192]], align 82570// CHECK1-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 42571// CHECK1-NEXT: store ptr @.offload_sizes.35, ptr [[TMP193]], align 82572// CHECK1-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 52573// CHECK1-NEXT: store ptr @.offload_maptypes.36, ptr [[TMP194]], align 82574// CHECK1-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 62575// CHECK1-NEXT: store ptr null, ptr [[TMP195]], align 82576// CHECK1-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 72577// CHECK1-NEXT: store ptr null, ptr [[TMP196]], align 82578// CHECK1-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 82579// CHECK1-NEXT: store i64 2, ptr [[TMP197]], align 82580// CHECK1-NEXT: [[TMP198:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 92581// CHECK1-NEXT: store i64 0, ptr [[TMP198]], align 82582// CHECK1-NEXT: [[TMP199:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 102583// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP199]], align 42584// CHECK1-NEXT: [[TMP200:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 112585// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP200]], align 42586// CHECK1-NEXT: [[TMP201:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 122587// CHECK1-NEXT: store i32 0, ptr [[TMP201]], align 42588// CHECK1-NEXT: [[TMP202:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.region_id, ptr [[KERNEL_ARGS54]])2589// CHECK1-NEXT: [[TMP203:%.*]] = icmp ne i32 [[TMP202]], 02590// CHECK1-NEXT: br i1 [[TMP203]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]]2591// CHECK1: omp_offload.failed55:2592// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]2593// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT56]]2594// CHECK1: omp_offload.cont56:2595// CHECK1-NEXT: store i32 10, ptr [[T_VAR]], align 42596// CHECK1-NEXT: [[TMP204:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 02597// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP204]], align 82598// CHECK1-NEXT: [[TMP205:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 02599// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[TMP205]], align 82600// CHECK1-NEXT: [[TMP206:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 02601// CHECK1-NEXT: store ptr null, ptr [[TMP206]], align 82602// CHECK1-NEXT: [[TMP207:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 12603// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP207]], align 82604// CHECK1-NEXT: [[TMP208:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 12605// CHECK1-NEXT: store ptr [[VEC]], ptr [[TMP208]], align 82606// CHECK1-NEXT: [[TMP209:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i64 0, i64 12607// CHECK1-NEXT: store ptr null, ptr [[TMP209]], align 82608// CHECK1-NEXT: [[TMP210:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 02609// CHECK1-NEXT: [[TMP211:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 02610// CHECK1-NEXT: [[TMP212:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 02611// CHECK1-NEXT: store i32 3, ptr [[TMP212]], align 42612// CHECK1-NEXT: [[TMP213:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12613// CHECK1-NEXT: store i32 2, ptr [[TMP213]], align 42614// CHECK1-NEXT: [[TMP214:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 22615// CHECK1-NEXT: store ptr [[TMP210]], ptr [[TMP214]], align 82616// CHECK1-NEXT: [[TMP215:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 32617// CHECK1-NEXT: store ptr [[TMP211]], ptr [[TMP215]], align 82618// CHECK1-NEXT: [[TMP216:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 42619// CHECK1-NEXT: store ptr @.offload_sizes.37, ptr [[TMP216]], align 82620// CHECK1-NEXT: [[TMP217:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 52621// CHECK1-NEXT: store ptr @.offload_maptypes.38, ptr [[TMP217]], align 82622// CHECK1-NEXT: [[TMP218:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 62623// CHECK1-NEXT: store ptr null, ptr [[TMP218]], align 82624// CHECK1-NEXT: [[TMP219:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 72625// CHECK1-NEXT: store ptr null, ptr [[TMP219]], align 82626// CHECK1-NEXT: [[TMP220:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 82627// CHECK1-NEXT: store i64 2, ptr [[TMP220]], align 82628// CHECK1-NEXT: [[TMP221:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 92629// CHECK1-NEXT: store i64 0, ptr [[TMP221]], align 82630// CHECK1-NEXT: [[TMP222:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 102631// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP222]], align 42632// CHECK1-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 112633// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP223]], align 42634// CHECK1-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 122635// CHECK1-NEXT: store i32 0, ptr [[TMP224]], align 42636// CHECK1-NEXT: [[TMP225:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, ptr [[KERNEL_ARGS61]])2637// CHECK1-NEXT: [[TMP226:%.*]] = icmp ne i32 [[TMP225]], 02638// CHECK1-NEXT: br i1 [[TMP226]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]2639// CHECK1: omp_offload.failed62:2640// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]2641// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT63]]2642// CHECK1: omp_offload.cont63:2643// CHECK1-NEXT: ret i32 02644//2645//2646// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l322647// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {2648// CHECK1-NEXT: entry:2649// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82650// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82651// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82652// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]])2653// CHECK1-NEXT: ret void2654//2655//2656// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined2657// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {2658// CHECK1-NEXT: entry:2659// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82660// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82661// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82662// CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 42663// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42664// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 42665// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42666// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42667// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42668// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42669// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 42670// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 82671// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82672// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82673// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82674// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82675// CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 42676// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42677// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42678// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42679// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42680// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82681// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42682// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2683// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42684// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 12685// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2686// CHECK1: cond.true:2687// CHECK1-NEXT: br label [[COND_END:%.*]]2688// CHECK1: cond.false:2689// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42690// CHECK1-NEXT: br label [[COND_END]]2691// CHECK1: cond.end:2692// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2693// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42694// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42695// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42696// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2697// CHECK1: omp.inner.for.cond:2698// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42699// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42700// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2701// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2702// CHECK1: omp.inner.for.body:2703// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42704// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12705// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2706// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 42707// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 42708// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 42709// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]2710// CHECK1-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 42711// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2712// CHECK1: omp.body.continue:2713// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2714// CHECK1: omp.inner.for.inc:2715// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42716// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 12717// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 42718// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]2719// CHECK1: omp.inner.for.end:2720// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2721// CHECK1: omp.loop.exit:2722// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2723// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02724// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 82725// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2726// CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2727// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2728// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2729// CHECK1-NEXT: ]2730// CHECK1: .omp.reduction.case1:2731// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 42732// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 42733// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]2734// CHECK1-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 42735// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)2736// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2737// CHECK1: .omp.reduction.case2:2738// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 42739// CHECK1-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 42740// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)2741// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2742// CHECK1: .omp.reduction.default:2743// CHECK1-NEXT: ret void2744//2745//2746// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func2747// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {2748// CHECK1-NEXT: entry:2749// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 82750// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 82751// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 82752// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 82753// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82754// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82755// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 02756// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82757// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 02758// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82759// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42760// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 42761// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]2762// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 42763// CHECK1-NEXT: ret void2764//2765//2766// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l372767// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {2768// CHECK1-NEXT: entry:2769// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82770// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 82771// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82772// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 82773// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82774// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 82775// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])2776// CHECK1-NEXT: ret void2777//2778//2779// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined2780// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {2781// CHECK1-NEXT: entry:2782// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82783// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82784// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82785// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 82786// CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 42787// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42788// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 42789// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42790// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42791// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42792// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42793// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 42794// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 82795// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82796// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82797// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82798// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 82799// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82800// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 82801// CHECK1-NEXT: store i32 0, ptr [[T_VAR1]], align 42802// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42803// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42804// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42805// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42806// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82807// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42808// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2809// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42810// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 12811// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2812// CHECK1: cond.true:2813// CHECK1-NEXT: br label [[COND_END:%.*]]2814// CHECK1: cond.false:2815// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42816// CHECK1-NEXT: br label [[COND_END]]2817// CHECK1: cond.end:2818// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2819// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42820// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42821// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42822// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2823// CHECK1: omp.inner.for.cond:2824// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42825// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42826// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2827// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2828// CHECK1: omp.inner.for.body:2829// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42830// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 12831// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2832// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 42833// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 42834// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i642835// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]2836// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX]], align 42837// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 42838// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP12]], [[TMP11]]2839// CHECK1-NEXT: store i32 [[SUB]], ptr [[T_VAR1]], align 42840// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2841// CHECK1: omp.body.continue:2842// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2843// CHECK1: omp.inner.for.inc:2844// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42845// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 12846// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 42847// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]2848// CHECK1: omp.inner.for.end:2849// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2850// CHECK1: omp.loop.exit:2851// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])2852// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02853// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 82854// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2855// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2856// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2857// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2858// CHECK1-NEXT: ]2859// CHECK1: .omp.reduction.case1:2860// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 42861// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 42862// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]2863// CHECK1-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 42864// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)2865// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2866// CHECK1: .omp.reduction.case2:2867// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 42868// CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 42869// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)2870// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2871// CHECK1: .omp.reduction.default:2872// CHECK1-NEXT: ret void2873//2874//2875// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func2876// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {2877// CHECK1-NEXT: entry:2878// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 82879// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 82880// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 82881// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 82882// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 82883// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 82884// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 02885// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 82886// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 02887// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 82888// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42889// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 42890// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]2891// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 42892// CHECK1-NEXT: ret void2893//2894//2895// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l432896// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {2897// CHECK1-NEXT: entry:2898// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82899// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 82900// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82901// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 82902// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82903// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 82904// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])2905// CHECK1-NEXT: ret void2906//2907//2908// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined2909// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {2910// CHECK1-NEXT: entry:2911// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82912// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82913// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 82914// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 82915// CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 42916// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42917// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 42918// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42919// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42920// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42921// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42922// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 42923// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 82924// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 42925// CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 42926// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82927// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82928// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 82929// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 82930// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 82931// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 82932// CHECK1-NEXT: store i32 1, ptr [[T_VAR1]], align 42933// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42934// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42935// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 42936// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 42937// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82938// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 42939// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2940// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42941// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 12942// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2943// CHECK1: cond.true:2944// CHECK1-NEXT: br label [[COND_END:%.*]]2945// CHECK1: cond.false:2946// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42947// CHECK1-NEXT: br label [[COND_END]]2948// CHECK1: cond.end:2949// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]2950// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 42951// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42952// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 42953// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2954// CHECK1: omp.inner.for.cond:2955// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42956// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42957// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]2958// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2959// CHECK1: omp.inner.for.body:2960// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42961// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 12962// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2963// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 42964// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 42965// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 42966// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i642967// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]2968// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 42969// CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP12]]2970// CHECK1-NEXT: store i32 [[MUL3]], ptr [[T_VAR1]], align 42971// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2972// CHECK1: omp.body.continue:2973// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2974// CHECK1: omp.inner.for.inc:2975// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42976// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 12977// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 42978// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]2979// CHECK1: omp.inner.for.end:2980// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]2981// CHECK1: omp.loop.exit:2982// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])2983// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 02984// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 82985// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)2986// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [2987// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]2988// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]2989// CHECK1-NEXT: ]2990// CHECK1: .omp.reduction.case1:2991// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 42992// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 42993// CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], [[TMP17]]2994// CHECK1-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 42995// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)2996// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]2997// CHECK1: .omp.reduction.case2:2998// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 42999// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 43000// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]3001// CHECK1: atomic_cont:3002// CHECK1-NEXT: [[TMP19:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP24:%.*]], [[ATOMIC_CONT]] ]3003// CHECK1-NEXT: store i32 [[TMP19]], ptr [[_TMP6]], align 43004// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[_TMP6]], align 43005// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR1]], align 43006// CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP20]], [[TMP21]]3007// CHECK1-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 43008// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 43009// CHECK1-NEXT: [[TMP23:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP19]], i32 [[TMP22]] monotonic monotonic, align 43010// CHECK1-NEXT: [[TMP24]] = extractvalue { i32, i1 } [[TMP23]], 03011// CHECK1-NEXT: [[TMP25:%.*]] = extractvalue { i32, i1 } [[TMP23]], 13012// CHECK1-NEXT: br i1 [[TMP25]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]3013// CHECK1: atomic_exit:3014// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3015// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3016// CHECK1: .omp.reduction.default:3017// CHECK1-NEXT: ret void3018//3019//3020// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func3021// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3022// CHECK1-NEXT: entry:3023// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83024// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83025// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83026// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83027// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83028// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83029// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03030// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83031// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03032// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83033// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43034// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 43035// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]3036// CHECK1-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 43037// CHECK1-NEXT: ret void3038//3039//3040// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l493041// CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3042// CHECK1-NEXT: entry:3043// CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 83044// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83045// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 83046// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83047// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 83048// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83049// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3050// CHECK1-NEXT: ret void3051//3052//3053// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined3054// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3055// CHECK1-NEXT: entry:3056// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83057// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83058// CHECK1-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 83059// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83060// CHECK1-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 13061// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43062// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43063// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43064// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43065// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43066// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43067// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43068// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83069// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 13070// CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 13071// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83072// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83073// CHECK1-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 83074// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83075// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 83076// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83077// CHECK1-NEXT: store i8 1, ptr [[AND_VAR1]], align 13078// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43079// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43080// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43081// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43082// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83083// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43084// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3085// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43086// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13087// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3088// CHECK1: cond.true:3089// CHECK1-NEXT: br label [[COND_END:%.*]]3090// CHECK1: cond.false:3091// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43092// CHECK1-NEXT: br label [[COND_END]]3093// CHECK1: cond.end:3094// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3095// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43096// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43097// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43098// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3099// CHECK1: omp.inner.for.cond:3100// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43101// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43102// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3103// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3104// CHECK1: omp.inner.for.body:3105// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43106// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13107// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3108// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43109// CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 13110// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i13111// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]3112// CHECK1: land.rhs:3113// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43114// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643115// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3116// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43117// CHECK1-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 23118// CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 03119// CHECK1-NEXT: br label [[LAND_END]]3120// CHECK1: land.end:3121// CHECK1-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ]3122// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i83123// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 13124// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3125// CHECK1: omp.body.continue:3126// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3127// CHECK1: omp.inner.for.inc:3128// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43129// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 13130// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 43131// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3132// CHECK1: omp.inner.for.end:3133// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3134// CHECK1: omp.loop.exit:3135// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3136// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03137// CHECK1-NEXT: store ptr [[AND_VAR1]], ptr [[TMP15]], align 83138// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3139// CHECK1-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3140// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3141// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3142// CHECK1-NEXT: ]3143// CHECK1: .omp.reduction.case1:3144// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 13145// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i13146// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]3147// CHECK1: land.rhs6:3148// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 13149// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i13150// CHECK1-NEXT: br label [[LAND_END8]]3151// CHECK1: land.end8:3152// CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]3153// CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i83154// CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 13155// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3156// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3157// CHECK1: .omp.reduction.case2:3158// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 13159// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i13160// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 13161// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]3162// CHECK1: atomic_cont:3163// CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ]3164// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i13165// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i83166// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 13167// CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 13168// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i13169// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]3170// CHECK1: land.rhs15:3171// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 13172// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i13173// CHECK1-NEXT: br label [[LAND_END17]]3174// CHECK1: land.end17:3175// CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]3176// CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i83177// CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 13178// CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 13179// CHECK1-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 13180// CHECK1-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 03181// CHECK1-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 13182// CHECK1-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]3183// CHECK1: atomic_exit:3184// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3185// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3186// CHECK1: .omp.reduction.default:3187// CHECK1-NEXT: ret void3188//3189//3190// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func3191// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3192// CHECK1-NEXT: entry:3193// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83194// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83195// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83196// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83197// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83198// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83199// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03200// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83201// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03202// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83203// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 13204// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i13205// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]3206// CHECK1: land.rhs:3207// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 13208// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i13209// CHECK1-NEXT: br label [[LAND_END]]3210// CHECK1: land.end:3211// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]3212// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i83213// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 13214// CHECK1-NEXT: ret void3215//3216//3217// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l553218// CHECK1-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3219// CHECK1-NEXT: entry:3220// CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 83221// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83222// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 83223// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83224// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 83225// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83226// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3227// CHECK1-NEXT: ret void3228//3229//3230// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined3231// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3232// CHECK1-NEXT: entry:3233// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83234// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83235// CHECK1-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 83236// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83237// CHECK1-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 13238// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43239// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43240// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43241// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43242// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43243// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43244// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43245// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83246// CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 13247// CHECK1-NEXT: [[_TMP12:%.*]] = alloca i8, align 13248// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83249// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83250// CHECK1-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 83251// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83252// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 83253// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83254// CHECK1-NEXT: store i8 0, ptr [[OR_VAR1]], align 13255// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43256// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43257// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43258// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43259// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83260// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43261// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3262// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43263// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13264// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3265// CHECK1: cond.true:3266// CHECK1-NEXT: br label [[COND_END:%.*]]3267// CHECK1: cond.false:3268// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43269// CHECK1-NEXT: br label [[COND_END]]3270// CHECK1: cond.end:3271// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3272// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43273// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43274// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43275// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3276// CHECK1: omp.inner.for.cond:3277// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43278// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43279// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3280// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3281// CHECK1: omp.inner.for.body:3282// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43283// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13284// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3285// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43286// CHECK1-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 13287// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i13288// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]3289// CHECK1: lor.rhs:3290// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43291// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643292// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3293// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43294// CHECK1-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 23295// CHECK1-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 03296// CHECK1-NEXT: br label [[LOR_END]]3297// CHECK1: lor.end:3298// CHECK1-NEXT: [[TMP13:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ]3299// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i83300// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 13301// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3302// CHECK1: omp.body.continue:3303// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3304// CHECK1: omp.inner.for.inc:3305// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43306// CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 13307// CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 43308// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3309// CHECK1: omp.inner.for.end:3310// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3311// CHECK1: omp.loop.exit:3312// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3313// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03314// CHECK1-NEXT: store ptr [[OR_VAR1]], ptr [[TMP15]], align 83315// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3316// CHECK1-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3317// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3318// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3319// CHECK1-NEXT: ]3320// CHECK1: .omp.reduction.case1:3321// CHECK1-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 13322// CHECK1-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i13323// CHECK1-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]3324// CHECK1: lor.rhs6:3325// CHECK1-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 13326// CHECK1-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i13327// CHECK1-NEXT: br label [[LOR_END8]]3328// CHECK1: lor.end8:3329// CHECK1-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]3330// CHECK1-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i83331// CHECK1-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 13332// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3333// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3334// CHECK1: .omp.reduction.case2:3335// CHECK1-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 13336// CHECK1-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i13337// CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 13338// CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]3339// CHECK1: atomic_cont:3340// CHECK1-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ]3341// CHECK1-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i13342// CHECK1-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i83343// CHECK1-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 13344// CHECK1-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 13345// CHECK1-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i13346// CHECK1-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]3347// CHECK1: lor.rhs15:3348// CHECK1-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 13349// CHECK1-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i13350// CHECK1-NEXT: br label [[LOR_END17]]3351// CHECK1: lor.end17:3352// CHECK1-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]3353// CHECK1-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i83354// CHECK1-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 13355// CHECK1-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 13356// CHECK1-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 13357// CHECK1-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 03358// CHECK1-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 13359// CHECK1-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]3360// CHECK1: atomic_exit:3361// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3362// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3363// CHECK1: .omp.reduction.default:3364// CHECK1-NEXT: ret void3365//3366//3367// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func3368// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3369// CHECK1-NEXT: entry:3370// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83371// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83372// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83373// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83374// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83375// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83376// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03377// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83378// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03379// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83380// CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 13381// CHECK1-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i13382// CHECK1-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]3383// CHECK1: lor.rhs:3384// CHECK1-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 13385// CHECK1-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i13386// CHECK1-NEXT: br label [[LOR_END]]3387// CHECK1: lor.end:3388// CHECK1-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]3389// CHECK1-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i83390// CHECK1-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 13391// CHECK1-NEXT: ret void3392//3393//3394// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l613395// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3396// CHECK1-NEXT: entry:3397// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83398// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83399// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83400// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83401// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83402// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83403// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3404// CHECK1-NEXT: ret void3405//3406//3407// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined3408// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3409// CHECK1-NEXT: entry:3410// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83411// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83412// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83413// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83414// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 43415// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43416// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43417// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43418// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43419// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43420// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43421// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43422// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83423// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83424// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83425// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83426// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83427// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83428// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83429// CHECK1-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 43430// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43431// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43432// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43433// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43434// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83435// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43436// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3437// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43438// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13439// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3440// CHECK1: cond.true:3441// CHECK1-NEXT: br label [[COND_END:%.*]]3442// CHECK1: cond.false:3443// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43444// CHECK1-NEXT: br label [[COND_END]]3445// CHECK1: cond.end:3446// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3447// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43448// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43449// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43450// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3451// CHECK1: omp.inner.for.cond:3452// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43453// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43454// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3455// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3456// CHECK1: omp.inner.for.body:3457// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43458// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13459// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3460// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43461// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 43462// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43463// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643464// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3465// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43466// CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP10]], [[TMP12]]3467// CHECK1-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 43468// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3469// CHECK1: omp.body.continue:3470// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3471// CHECK1: omp.inner.for.inc:3472// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43473// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 13474// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 43475// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3476// CHECK1: omp.inner.for.end:3477// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3478// CHECK1: omp.loop.exit:3479// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3480// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03481// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 83482// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3483// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3484// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3485// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3486// CHECK1-NEXT: ]3487// CHECK1: .omp.reduction.case1:3488// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 43489// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 43490// CHECK1-NEXT: [[AND4:%.*]] = and i32 [[TMP16]], [[TMP17]]3491// CHECK1-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 43492// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3493// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3494// CHECK1: .omp.reduction.case2:3495// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 43496// CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP18]] monotonic, align 43497// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3498// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3499// CHECK1: .omp.reduction.default:3500// CHECK1-NEXT: ret void3501//3502//3503// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func3504// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3505// CHECK1-NEXT: entry:3506// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83507// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83508// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83509// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83510// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83511// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83512// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03513// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83514// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03515// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83516// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43517// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 43518// CHECK1-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]]3519// CHECK1-NEXT: store i32 [[AND]], ptr [[TMP7]], align 43520// CHECK1-NEXT: ret void3521//3522//3523// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l663524// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3525// CHECK1-NEXT: entry:3526// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83527// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83528// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83529// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83530// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83531// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83532// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3533// CHECK1-NEXT: ret void3534//3535//3536// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined3537// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3538// CHECK1-NEXT: entry:3539// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83540// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83541// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83542// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83543// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 43544// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43545// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43546// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43547// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43548// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43549// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43550// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43551// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83552// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83553// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83554// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83555// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83556// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83557// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83558// CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 43559// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43560// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43561// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43562// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43563// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83564// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43565// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3566// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43567// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13568// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3569// CHECK1: cond.true:3570// CHECK1-NEXT: br label [[COND_END:%.*]]3571// CHECK1: cond.false:3572// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43573// CHECK1-NEXT: br label [[COND_END]]3574// CHECK1: cond.end:3575// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3576// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43577// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43578// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43579// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3580// CHECK1: omp.inner.for.cond:3581// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43582// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43583// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3584// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3585// CHECK1: omp.inner.for.body:3586// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43587// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13588// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3589// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43590// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 43591// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43592// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643593// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3594// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43595// CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP10]], [[TMP12]]3596// CHECK1-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 43597// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3598// CHECK1: omp.body.continue:3599// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3600// CHECK1: omp.inner.for.inc:3601// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43602// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 13603// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 43604// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3605// CHECK1: omp.inner.for.end:3606// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3607// CHECK1: omp.loop.exit:3608// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3609// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03610// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 83611// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3612// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3613// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3614// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3615// CHECK1-NEXT: ]3616// CHECK1: .omp.reduction.case1:3617// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 43618// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 43619// CHECK1-NEXT: [[OR4:%.*]] = or i32 [[TMP16]], [[TMP17]]3620// CHECK1-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 43621// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3622// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3623// CHECK1: .omp.reduction.case2:3624// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 43625// CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP18]] monotonic, align 43626// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3627// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3628// CHECK1: .omp.reduction.default:3629// CHECK1-NEXT: ret void3630//3631//3632// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func3633// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3634// CHECK1-NEXT: entry:3635// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83636// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83637// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83638// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83639// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83640// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83641// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03642// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83643// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03644// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83645// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43646// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 43647// CHECK1-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]]3648// CHECK1-NEXT: store i32 [[OR]], ptr [[TMP7]], align 43649// CHECK1-NEXT: ret void3650//3651//3652// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l713653// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3654// CHECK1-NEXT: entry:3655// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83656// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83657// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83658// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83659// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83660// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83661// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3662// CHECK1-NEXT: ret void3663//3664//3665// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined3666// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3667// CHECK1-NEXT: entry:3668// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83669// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83670// CHECK1-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 83671// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83672// CHECK1-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 43673// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43674// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43675// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43676// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43677// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43678// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43679// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43680// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83681// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83682// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83683// CHECK1-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 83684// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83685// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 83686// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83687// CHECK1-NEXT: store i32 0, ptr [[BIT_VAR1]], align 43688// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43689// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43690// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43691// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43692// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83693// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43694// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3695// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43696// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13697// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3698// CHECK1: cond.true:3699// CHECK1-NEXT: br label [[COND_END:%.*]]3700// CHECK1: cond.false:3701// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43702// CHECK1-NEXT: br label [[COND_END]]3703// CHECK1: cond.end:3704// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3705// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43706// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43707// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43708// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3709// CHECK1: omp.inner.for.cond:3710// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43711// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43712// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3713// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3714// CHECK1: omp.inner.for.body:3715// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43716// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13717// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3718// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43719// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 43720// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43721// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643722// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3723// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43724// CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP10]], [[TMP12]]3725// CHECK1-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 43726// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3727// CHECK1: omp.body.continue:3728// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3729// CHECK1: omp.inner.for.inc:3730// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43731// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 13732// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 43733// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3734// CHECK1: omp.inner.for.end:3735// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3736// CHECK1: omp.loop.exit:3737// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3738// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03739// CHECK1-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 83740// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3741// CHECK1-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3742// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3743// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3744// CHECK1-NEXT: ]3745// CHECK1: .omp.reduction.case1:3746// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 43747// CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 43748// CHECK1-NEXT: [[XOR4:%.*]] = xor i32 [[TMP16]], [[TMP17]]3749// CHECK1-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 43750// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3751// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3752// CHECK1: .omp.reduction.case2:3753// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 43754// CHECK1-NEXT: [[TMP19:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP18]] monotonic, align 43755// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3756// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3757// CHECK1: .omp.reduction.default:3758// CHECK1-NEXT: ret void3759//3760//3761// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func3762// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3763// CHECK1-NEXT: entry:3764// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83765// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83766// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83767// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83768// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83769// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83770// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03771// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83772// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03773// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83774// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43775// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 43776// CHECK1-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]]3777// CHECK1-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 43778// CHECK1-NEXT: ret void3779//3780//3781// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l773782// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3783// CHECK1-NEXT: entry:3784// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 83785// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83786// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 83787// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83788// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 83789// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83790// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3791// CHECK1-NEXT: ret void3792//3793//3794// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined3795// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3796// CHECK1-NEXT: entry:3797// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83798// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83799// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 83800// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83801// CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 43802// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43803// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43804// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43805// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43806// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43807// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43808// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43809// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83810// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83811// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83812// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 83813// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83814// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 83815// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83816// CHECK1-NEXT: store i32 -2147483648, ptr [[T_VAR1]], align 43817// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43818// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43819// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43820// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43821// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83822// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43823// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3824// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43825// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13826// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3827// CHECK1: cond.true:3828// CHECK1-NEXT: br label [[COND_END:%.*]]3829// CHECK1: cond.false:3830// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43831// CHECK1-NEXT: br label [[COND_END]]3832// CHECK1: cond.end:3833// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3834// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43835// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43836// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43837// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3838// CHECK1: omp.inner.for.cond:3839// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43840// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43841// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3842// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3843// CHECK1: omp.inner.for.body:3844// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43845// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13846// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]3847// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 43848// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 43849// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 43850// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643851// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]3852// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 43853// CHECK1-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP10]], [[TMP12]]3854// CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]3855// CHECK1: cond.true4:3856// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 43857// CHECK1-NEXT: br label [[COND_END8:%.*]]3858// CHECK1: cond.false5:3859// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 43860// CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP14]] to i643861// CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM6]]3862// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX7]], align 43863// CHECK1-NEXT: br label [[COND_END8]]3864// CHECK1: cond.end8:3865// CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ]3866// CHECK1-NEXT: store i32 [[COND9]], ptr [[T_VAR1]], align 43867// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]3868// CHECK1: omp.body.continue:3869// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]3870// CHECK1: omp.inner.for.inc:3871// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43872// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 13873// CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 43874// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]3875// CHECK1: omp.inner.for.end:3876// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]3877// CHECK1: omp.loop.exit:3878// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])3879// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 03880// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 83881// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)3882// CHECK1-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [3883// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]3884// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]3885// CHECK1-NEXT: ]3886// CHECK1: .omp.reduction.case1:3887// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 43888// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 43889// CHECK1-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP19]], [[TMP20]]3890// CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]3891// CHECK1: cond.true12:3892// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 43893// CHECK1-NEXT: br label [[COND_END14:%.*]]3894// CHECK1: cond.false13:3895// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 43896// CHECK1-NEXT: br label [[COND_END14]]3897// CHECK1: cond.end14:3898// CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE12]] ], [ [[TMP22]], [[COND_FALSE13]] ]3899// CHECK1-NEXT: store i32 [[COND15]], ptr [[TMP0]], align 43900// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3901// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3902// CHECK1: .omp.reduction.case2:3903// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 43904// CHECK1-NEXT: [[TMP24:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP23]] monotonic, align 43905// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)3906// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]3907// CHECK1: .omp.reduction.default:3908// CHECK1-NEXT: ret void3909//3910//3911// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func3912// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {3913// CHECK1-NEXT: entry:3914// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 83915// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 83916// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 83917// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 83918// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 83919// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 83920// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 03921// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 83922// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 03923// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 83924// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 43925// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 43926// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]3927// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3928// CHECK1: cond.true:3929// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 43930// CHECK1-NEXT: br label [[COND_END:%.*]]3931// CHECK1: cond.false:3932// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 43933// CHECK1-NEXT: br label [[COND_END]]3934// CHECK1: cond.end:3935// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]3936// CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 43937// CHECK1-NEXT: ret void3938//3939//3940// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l833941// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3942// CHECK1-NEXT: entry:3943// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 83944// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83945// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 83946// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83947// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 83948// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83949// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])3950// CHECK1-NEXT: ret void3951//3952//3953// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined3954// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {3955// CHECK1-NEXT: entry:3956// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 83957// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 83958// CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 83959// CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 83960// CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 43961// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 43962// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 43963// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 43964// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 43965// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43966// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43967// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 43968// CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 83969// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 83970// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 83971// CHECK1-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 83972// CHECK1-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 83973// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 83974// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 83975// CHECK1-NEXT: store i32 2147483647, ptr [[T_VAR1]], align 43976// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 43977// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 43978// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 43979// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 43980// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 83981// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 43982// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3983// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43984// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 13985// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3986// CHECK1: cond.true:3987// CHECK1-NEXT: br label [[COND_END:%.*]]3988// CHECK1: cond.false:3989// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43990// CHECK1-NEXT: br label [[COND_END]]3991// CHECK1: cond.end:3992// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]3993// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 43994// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43995// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43996// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]3997// CHECK1: omp.inner.for.cond:3998// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43999// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44000// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]4001// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4002// CHECK1: omp.inner.for.body:4003// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44004// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 14005// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4006// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 44007// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 44008// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 44009// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i644010// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM]]4011// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 44012// CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP12]]4013// CHECK1-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]4014// CHECK1: cond.true4:4015// CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 44016// CHECK1-NEXT: br label [[COND_END8:%.*]]4017// CHECK1: cond.false5:4018// CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 44019// CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP14]] to i644020// CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i64 0, i64 [[IDXPROM6]]4021// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX7]], align 44022// CHECK1-NEXT: br label [[COND_END8]]4023// CHECK1: cond.end8:4024// CHECK1-NEXT: [[COND9:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ]4025// CHECK1-NEXT: store i32 [[COND9]], ptr [[T_VAR1]], align 44026// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4027// CHECK1: omp.body.continue:4028// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4029// CHECK1: omp.inner.for.inc:4030// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44031// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 14032// CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 44033// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]4034// CHECK1: omp.inner.for.end:4035// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4036// CHECK1: omp.loop.exit:4037// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])4038// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 04039// CHECK1-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 84040// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)4041// CHECK1-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [4042// CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]4043// CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]4044// CHECK1-NEXT: ]4045// CHECK1: .omp.reduction.case1:4046// CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 44047// CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 44048// CHECK1-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP19]], [[TMP20]]4049// CHECK1-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]4050// CHECK1: cond.true12:4051// CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 44052// CHECK1-NEXT: br label [[COND_END14:%.*]]4053// CHECK1: cond.false13:4054// CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 44055// CHECK1-NEXT: br label [[COND_END14]]4056// CHECK1: cond.end14:4057// CHECK1-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE12]] ], [ [[TMP22]], [[COND_FALSE13]] ]4058// CHECK1-NEXT: store i32 [[COND15]], ptr [[TMP0]], align 44059// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)4060// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4061// CHECK1: .omp.reduction.case2:4062// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 44063// CHECK1-NEXT: [[TMP24:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP23]] monotonic, align 44064// CHECK1-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)4065// CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4066// CHECK1: .omp.reduction.default:4067// CHECK1-NEXT: ret void4068//4069//4070// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func4071// CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {4072// CHECK1-NEXT: entry:4073// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 84074// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 84075// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 84076// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 84077// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 84078// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 84079// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 04080// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 84081// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 04082// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 84083// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44084// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 44085// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]]4086// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4087// CHECK1: cond.true:4088// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 44089// CHECK1-NEXT: br label [[COND_END:%.*]]4090// CHECK1: cond.false:4091// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 44092// CHECK1-NEXT: br label [[COND_END]]4093// CHECK1: cond.end:4094// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]4095// CHECK1-NEXT: store i32 [[COND]], ptr [[TMP7]], align 44096// CHECK1-NEXT: ret void4097//4098//4099// CHECK3-LABEL: define {{[^@]+}}@main4100// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {4101// CHECK3-NEXT: entry:4102// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 44103// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 44104// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 44105// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 44106// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 44107// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 84108// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 44109// CHECK3-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 44110// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 44111// CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 44112// CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84113// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 44114// CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 44115// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 44116// CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 44117// CHECK3-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84118// CHECK3-NEXT: [[AND_VAR:%.*]] = alloca i8, align 14119// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 44120// CHECK3-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 44121// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 44122// CHECK3-NEXT: [[_TMP18:%.*]] = alloca i32, align 44123// CHECK3-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84124// CHECK3-NEXT: [[OR_VAR:%.*]] = alloca i8, align 14125// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [1 x ptr], align 44126// CHECK3-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [1 x ptr], align 44127// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [1 x ptr], align 44128// CHECK3-NEXT: [[_TMP25:%.*]] = alloca i32, align 44129// CHECK3-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84130// CHECK3-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 44131// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [1 x ptr], align 44132// CHECK3-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [1 x ptr], align 44133// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [1 x ptr], align 44134// CHECK3-NEXT: [[_TMP32:%.*]] = alloca i32, align 44135// CHECK3-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84136// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [1 x ptr], align 44137// CHECK3-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [1 x ptr], align 44138// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [1 x ptr], align 44139// CHECK3-NEXT: [[_TMP39:%.*]] = alloca i32, align 44140// CHECK3-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84141// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [1 x ptr], align 44142// CHECK3-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [1 x ptr], align 44143// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [1 x ptr], align 44144// CHECK3-NEXT: [[_TMP46:%.*]] = alloca i32, align 44145// CHECK3-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84146// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [1 x ptr], align 44147// CHECK3-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [1 x ptr], align 44148// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [1 x ptr], align 44149// CHECK3-NEXT: [[_TMP53:%.*]] = alloca i32, align 44150// CHECK3-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84151// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [1 x ptr], align 44152// CHECK3-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [1 x ptr], align 44153// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [1 x ptr], align 44154// CHECK3-NEXT: [[_TMP60:%.*]] = alloca i32, align 44155// CHECK3-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 84156// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 44157// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04158// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 44159// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04160// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP1]], align 44161// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 04162// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 44163// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 04164// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 04165// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 04166// CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 44167// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 14168// CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 44169// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 24170// CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 44171// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 34172// CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 44173// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 44174// CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 44175// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 54176// CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 44177// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 64178// CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 44179// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 74180// CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 44181// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 84182// CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 84183// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 94184// CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 84185// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 104186// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 44187// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 114188// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 44189// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 124190// CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 44191// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.region_id, ptr [[KERNEL_ARGS]])4192// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 04193// CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]4194// CHECK3: omp_offload.failed:4195// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209(ptr @_ZZ4mainE5sivar) #[[ATTR2:[0-9]+]]4196// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]4197// CHECK3: omp_offload.cont:4198// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 04199// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP20]], align 44200// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 04201// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP21]], align 44202// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 04203// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 44204// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 04205// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 04206// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 04207// CHECK3-NEXT: store i32 3, ptr [[TMP25]], align 44208// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 14209// CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 44210// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 24211// CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 44212// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 34213// CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 44214// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 44215// CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 44216// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 54217// CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 44218// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 64219// CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 44220// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 74221// CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 44222// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 84223// CHECK3-NEXT: store i64 2, ptr [[TMP33]], align 84224// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 94225// CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 84226// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 104227// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 44228// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 114229// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 44230// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 124231// CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 44232// CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.region_id, ptr [[KERNEL_ARGS5]])4233// CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 04234// CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]4235// CHECK3: omp_offload.failed6:4236// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214(ptr @_ZZ4mainE5sivar) #[[ATTR2]]4237// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]]4238// CHECK3: omp_offload.cont7:4239// CHECK3-NEXT: store i32 1, ptr @_ZZ4mainE5sivar, align 44240// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 04241// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP40]], align 44242// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 04243// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP41]], align 44244// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 04245// CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 44246// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 04247// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 04248// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 04249// CHECK3-NEXT: store i32 3, ptr [[TMP45]], align 44250// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 14251// CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 44252// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 24253// CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 44254// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 34255// CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 44256// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 44257// CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 44258// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 54259// CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 44260// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 64261// CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 44262// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 74263// CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 44264// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 84265// CHECK3-NEXT: store i64 2, ptr [[TMP53]], align 84266// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 94267// CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 84268// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 104269// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 44270// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 114271// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 44272// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 124273// CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 44274// CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.region_id, ptr [[KERNEL_ARGS12]])4275// CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 04276// CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]4277// CHECK3: omp_offload.failed13:4278// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220(ptr @_ZZ4mainE5sivar) #[[ATTR2]]4279// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT14]]4280// CHECK3: omp_offload.cont14:4281// CHECK3-NEXT: store i8 1, ptr [[AND_VAR]], align 14282// CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 04283// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP60]], align 44284// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 04285// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP61]], align 44286// CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 04287// CHECK3-NEXT: store ptr null, ptr [[TMP62]], align 44288// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 04289// CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 04290// CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 04291// CHECK3-NEXT: store i32 3, ptr [[TMP65]], align 44292// CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 14293// CHECK3-NEXT: store i32 1, ptr [[TMP66]], align 44294// CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 24295// CHECK3-NEXT: store ptr [[TMP63]], ptr [[TMP67]], align 44296// CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 34297// CHECK3-NEXT: store ptr [[TMP64]], ptr [[TMP68]], align 44298// CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 44299// CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP69]], align 44300// CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 54301// CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP70]], align 44302// CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 64303// CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 44304// CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 74305// CHECK3-NEXT: store ptr null, ptr [[TMP72]], align 44306// CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 84307// CHECK3-NEXT: store i64 2, ptr [[TMP73]], align 84308// CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 94309// CHECK3-NEXT: store i64 0, ptr [[TMP74]], align 84310// CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 104311// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP75]], align 44312// CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 114313// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP76]], align 44314// CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 124315// CHECK3-NEXT: store i32 0, ptr [[TMP77]], align 44316// CHECK3-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.region_id, ptr [[KERNEL_ARGS19]])4317// CHECK3-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 04318// CHECK3-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]4319// CHECK3: omp_offload.failed20:4320// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226(ptr [[AND_VAR]]) #[[ATTR2]]4321// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT21]]4322// CHECK3: omp_offload.cont21:4323// CHECK3-NEXT: store i8 0, ptr [[OR_VAR]], align 14324// CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 04325// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP80]], align 44326// CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 04327// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP81]], align 44328// CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 04329// CHECK3-NEXT: store ptr null, ptr [[TMP82]], align 44330// CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 04331// CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 04332// CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 04333// CHECK3-NEXT: store i32 3, ptr [[TMP85]], align 44334// CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 14335// CHECK3-NEXT: store i32 1, ptr [[TMP86]], align 44336// CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 24337// CHECK3-NEXT: store ptr [[TMP83]], ptr [[TMP87]], align 44338// CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 34339// CHECK3-NEXT: store ptr [[TMP84]], ptr [[TMP88]], align 44340// CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 44341// CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP89]], align 44342// CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 54343// CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP90]], align 44344// CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 64345// CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 44346// CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 74347// CHECK3-NEXT: store ptr null, ptr [[TMP92]], align 44348// CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 84349// CHECK3-NEXT: store i64 2, ptr [[TMP93]], align 84350// CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 94351// CHECK3-NEXT: store i64 0, ptr [[TMP94]], align 84352// CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 104353// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP95]], align 44354// CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 114355// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP96]], align 44356// CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 124357// CHECK3-NEXT: store i32 0, ptr [[TMP97]], align 44358// CHECK3-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.region_id, ptr [[KERNEL_ARGS26]])4359// CHECK3-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 04360// CHECK3-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]4361// CHECK3: omp_offload.failed27:4362// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232(ptr [[OR_VAR]]) #[[ATTR2]]4363// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]]4364// CHECK3: omp_offload.cont28:4365// CHECK3-NEXT: store i32 1, ptr [[BIT_VAR]], align 44366// CHECK3-NEXT: [[TMP100:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 04367// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP100]], align 44368// CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 04369// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP101]], align 44370// CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 04371// CHECK3-NEXT: store ptr null, ptr [[TMP102]], align 44372// CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 04373// CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 04374// CHECK3-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 04375// CHECK3-NEXT: store i32 3, ptr [[TMP105]], align 44376// CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 14377// CHECK3-NEXT: store i32 1, ptr [[TMP106]], align 44378// CHECK3-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 24379// CHECK3-NEXT: store ptr [[TMP103]], ptr [[TMP107]], align 44380// CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 34381// CHECK3-NEXT: store ptr [[TMP104]], ptr [[TMP108]], align 44382// CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 44383// CHECK3-NEXT: store ptr @.offload_sizes.9, ptr [[TMP109]], align 44384// CHECK3-NEXT: [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 54385// CHECK3-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP110]], align 44386// CHECK3-NEXT: [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 64387// CHECK3-NEXT: store ptr null, ptr [[TMP111]], align 44388// CHECK3-NEXT: [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 74389// CHECK3-NEXT: store ptr null, ptr [[TMP112]], align 44390// CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 84391// CHECK3-NEXT: store i64 2, ptr [[TMP113]], align 84392// CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 94393// CHECK3-NEXT: store i64 0, ptr [[TMP114]], align 84394// CHECK3-NEXT: [[TMP115:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 104395// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP115]], align 44396// CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 114397// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP116]], align 44398// CHECK3-NEXT: [[TMP117:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 124399// CHECK3-NEXT: store i32 0, ptr [[TMP117]], align 44400// CHECK3-NEXT: [[TMP118:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.region_id, ptr [[KERNEL_ARGS33]])4401// CHECK3-NEXT: [[TMP119:%.*]] = icmp ne i32 [[TMP118]], 04402// CHECK3-NEXT: br i1 [[TMP119]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]4403// CHECK3: omp_offload.failed34:4404// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238(ptr [[BIT_VAR]]) #[[ATTR2]]4405// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT35]]4406// CHECK3: omp_offload.cont35:4407// CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 04408// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP120]], align 44409// CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 04410// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP121]], align 44411// CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 04412// CHECK3-NEXT: store ptr null, ptr [[TMP122]], align 44413// CHECK3-NEXT: [[TMP123:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 04414// CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 04415// CHECK3-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 04416// CHECK3-NEXT: store i32 3, ptr [[TMP125]], align 44417// CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 14418// CHECK3-NEXT: store i32 1, ptr [[TMP126]], align 44419// CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 24420// CHECK3-NEXT: store ptr [[TMP123]], ptr [[TMP127]], align 44421// CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 34422// CHECK3-NEXT: store ptr [[TMP124]], ptr [[TMP128]], align 44423// CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 44424// CHECK3-NEXT: store ptr @.offload_sizes.11, ptr [[TMP129]], align 44425// CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 54426// CHECK3-NEXT: store ptr @.offload_maptypes.12, ptr [[TMP130]], align 44427// CHECK3-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 64428// CHECK3-NEXT: store ptr null, ptr [[TMP131]], align 44429// CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 74430// CHECK3-NEXT: store ptr null, ptr [[TMP132]], align 44431// CHECK3-NEXT: [[TMP133:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 84432// CHECK3-NEXT: store i64 2, ptr [[TMP133]], align 84433// CHECK3-NEXT: [[TMP134:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 94434// CHECK3-NEXT: store i64 0, ptr [[TMP134]], align 84435// CHECK3-NEXT: [[TMP135:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 104436// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP135]], align 44437// CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 114438// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP136]], align 44439// CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 124440// CHECK3-NEXT: store i32 0, ptr [[TMP137]], align 44441// CHECK3-NEXT: [[TMP138:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.region_id, ptr [[KERNEL_ARGS40]])4442// CHECK3-NEXT: [[TMP139:%.*]] = icmp ne i32 [[TMP138]], 04443// CHECK3-NEXT: br i1 [[TMP139]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]]4444// CHECK3: omp_offload.failed41:4445// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243(ptr [[BIT_VAR]]) #[[ATTR2]]4446// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT42]]4447// CHECK3: omp_offload.cont42:4448// CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 04449// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP140]], align 44450// CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 04451// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP141]], align 44452// CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 04453// CHECK3-NEXT: store ptr null, ptr [[TMP142]], align 44454// CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 04455// CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 04456// CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 04457// CHECK3-NEXT: store i32 3, ptr [[TMP145]], align 44458// CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 14459// CHECK3-NEXT: store i32 1, ptr [[TMP146]], align 44460// CHECK3-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 24461// CHECK3-NEXT: store ptr [[TMP143]], ptr [[TMP147]], align 44462// CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 34463// CHECK3-NEXT: store ptr [[TMP144]], ptr [[TMP148]], align 44464// CHECK3-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 44465// CHECK3-NEXT: store ptr @.offload_sizes.13, ptr [[TMP149]], align 44466// CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 54467// CHECK3-NEXT: store ptr @.offload_maptypes.14, ptr [[TMP150]], align 44468// CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 64469// CHECK3-NEXT: store ptr null, ptr [[TMP151]], align 44470// CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 74471// CHECK3-NEXT: store ptr null, ptr [[TMP152]], align 44472// CHECK3-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 84473// CHECK3-NEXT: store i64 2, ptr [[TMP153]], align 84474// CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 94475// CHECK3-NEXT: store i64 0, ptr [[TMP154]], align 84476// CHECK3-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 104477// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP155]], align 44478// CHECK3-NEXT: [[TMP156:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 114479// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP156]], align 44480// CHECK3-NEXT: [[TMP157:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 124481// CHECK3-NEXT: store i32 0, ptr [[TMP157]], align 44482// CHECK3-NEXT: [[TMP158:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.region_id, ptr [[KERNEL_ARGS47]])4483// CHECK3-NEXT: [[TMP159:%.*]] = icmp ne i32 [[TMP158]], 04484// CHECK3-NEXT: br i1 [[TMP159]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]4485// CHECK3: omp_offload.failed48:4486// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248(ptr [[BIT_VAR]]) #[[ATTR2]]4487// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT49]]4488// CHECK3: omp_offload.cont49:4489// CHECK3-NEXT: store i32 0, ptr @_ZZ4mainE5sivar, align 44490// CHECK3-NEXT: [[TMP160:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 04491// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP160]], align 44492// CHECK3-NEXT: [[TMP161:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 04493// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP161]], align 44494// CHECK3-NEXT: [[TMP162:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 04495// CHECK3-NEXT: store ptr null, ptr [[TMP162]], align 44496// CHECK3-NEXT: [[TMP163:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 04497// CHECK3-NEXT: [[TMP164:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 04498// CHECK3-NEXT: [[TMP165:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 04499// CHECK3-NEXT: store i32 3, ptr [[TMP165]], align 44500// CHECK3-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 14501// CHECK3-NEXT: store i32 1, ptr [[TMP166]], align 44502// CHECK3-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 24503// CHECK3-NEXT: store ptr [[TMP163]], ptr [[TMP167]], align 44504// CHECK3-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 34505// CHECK3-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 44506// CHECK3-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 44507// CHECK3-NEXT: store ptr @.offload_sizes.15, ptr [[TMP169]], align 44508// CHECK3-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 54509// CHECK3-NEXT: store ptr @.offload_maptypes.16, ptr [[TMP170]], align 44510// CHECK3-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 64511// CHECK3-NEXT: store ptr null, ptr [[TMP171]], align 44512// CHECK3-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 74513// CHECK3-NEXT: store ptr null, ptr [[TMP172]], align 44514// CHECK3-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 84515// CHECK3-NEXT: store i64 2, ptr [[TMP173]], align 84516// CHECK3-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 94517// CHECK3-NEXT: store i64 0, ptr [[TMP174]], align 84518// CHECK3-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 104519// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP175]], align 44520// CHECK3-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 114521// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 44522// CHECK3-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 124523// CHECK3-NEXT: store i32 0, ptr [[TMP177]], align 44524// CHECK3-NEXT: [[TMP178:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.region_id, ptr [[KERNEL_ARGS54]])4525// CHECK3-NEXT: [[TMP179:%.*]] = icmp ne i32 [[TMP178]], 04526// CHECK3-NEXT: br i1 [[TMP179]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]]4527// CHECK3: omp_offload.failed55:4528// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254(ptr @_ZZ4mainE5sivar) #[[ATTR2]]4529// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT56]]4530// CHECK3: omp_offload.cont56:4531// CHECK3-NEXT: store i32 10, ptr @_ZZ4mainE5sivar, align 44532// CHECK3-NEXT: [[TMP180:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 04533// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP180]], align 44534// CHECK3-NEXT: [[TMP181:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 04535// CHECK3-NEXT: store ptr @_ZZ4mainE5sivar, ptr [[TMP181]], align 44536// CHECK3-NEXT: [[TMP182:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 04537// CHECK3-NEXT: store ptr null, ptr [[TMP182]], align 44538// CHECK3-NEXT: [[TMP183:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 04539// CHECK3-NEXT: [[TMP184:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 04540// CHECK3-NEXT: [[TMP185:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 04541// CHECK3-NEXT: store i32 3, ptr [[TMP185]], align 44542// CHECK3-NEXT: [[TMP186:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 14543// CHECK3-NEXT: store i32 1, ptr [[TMP186]], align 44544// CHECK3-NEXT: [[TMP187:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 24545// CHECK3-NEXT: store ptr [[TMP183]], ptr [[TMP187]], align 44546// CHECK3-NEXT: [[TMP188:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 34547// CHECK3-NEXT: store ptr [[TMP184]], ptr [[TMP188]], align 44548// CHECK3-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 44549// CHECK3-NEXT: store ptr @.offload_sizes.17, ptr [[TMP189]], align 44550// CHECK3-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 54551// CHECK3-NEXT: store ptr @.offload_maptypes.18, ptr [[TMP190]], align 44552// CHECK3-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 64553// CHECK3-NEXT: store ptr null, ptr [[TMP191]], align 44554// CHECK3-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 74555// CHECK3-NEXT: store ptr null, ptr [[TMP192]], align 44556// CHECK3-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 84557// CHECK3-NEXT: store i64 2, ptr [[TMP193]], align 84558// CHECK3-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 94559// CHECK3-NEXT: store i64 0, ptr [[TMP194]], align 84560// CHECK3-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 104561// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP195]], align 44562// CHECK3-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 114563// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP196]], align 44564// CHECK3-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 124565// CHECK3-NEXT: store i32 0, ptr [[TMP197]], align 44566// CHECK3-NEXT: [[TMP198:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.region_id, ptr [[KERNEL_ARGS61]])4567// CHECK3-NEXT: [[TMP199:%.*]] = icmp ne i32 [[TMP198]], 04568// CHECK3-NEXT: br i1 [[TMP199]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]4569// CHECK3: omp_offload.failed62:4570// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260(ptr @_ZZ4mainE5sivar) #[[ATTR2]]4571// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT63]]4572// CHECK3: omp_offload.cont63:4573// CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()4574// CHECK3-NEXT: ret i32 [[CALL]]4575//4576//4577// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2094578// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {4579// CHECK3-NEXT: entry:4580// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44581// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44582// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44583// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined, ptr [[TMP0]])4584// CHECK3-NEXT: ret void4585//4586//4587// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined4588// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {4589// CHECK3-NEXT: entry:4590// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44591// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44592// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44593// CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 44594// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44595// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 44596// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44597// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44598// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44599// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44600// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 44601// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 44602// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44603// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44604// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44605// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44606// CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 44607// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44608// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 44609// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44610// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44611// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44612// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44613// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4614// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44615// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 14616// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4617// CHECK3: cond.true:4618// CHECK3-NEXT: br label [[COND_END:%.*]]4619// CHECK3: cond.false:4620// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44621// CHECK3-NEXT: br label [[COND_END]]4622// CHECK3: cond.end:4623// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4624// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44625// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44626// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44627// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4628// CHECK3: omp.inner.for.cond:4629// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44630// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44631// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4632// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4633// CHECK3: omp.inner.for.body:4634// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44635// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 14636// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4637// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 44638// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 44639// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 44640// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]4641// CHECK3-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 44642// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4643// CHECK3: omp.body.continue:4644// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4645// CHECK3: omp.inner.for.inc:4646// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44647// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 14648// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 44649// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]4650// CHECK3: omp.inner.for.end:4651// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4652// CHECK3: omp.loop.exit:4653// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4654// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 04655// CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 44656// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)4657// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [4658// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]4659// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]4660// CHECK3-NEXT: ]4661// CHECK3: .omp.reduction.case1:4662// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 44663// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 44664// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]4665// CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 44666// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4667// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4668// CHECK3: .omp.reduction.case2:4669// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 44670// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 44671// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4672// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4673// CHECK3: .omp.reduction.default:4674// CHECK3-NEXT: ret void4675//4676//4677// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l209.omp_outlined.omp.reduction.reduction_func4678// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {4679// CHECK3-NEXT: entry:4680// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 44681// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 44682// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 44683// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 44684// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 44685// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 44686// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 04687// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 44688// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 04689// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 44690// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44691// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 44692// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]4693// CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 44694// CHECK3-NEXT: ret void4695//4696//4697// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2144698// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {4699// CHECK3-NEXT: entry:4700// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44701// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44702// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44703// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined, ptr [[TMP0]])4704// CHECK3-NEXT: ret void4705//4706//4707// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined4708// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {4709// CHECK3-NEXT: entry:4710// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44711// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44712// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44713// CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 44714// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44715// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 44716// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44717// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44718// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44719// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44720// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 44721// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 44722// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44723// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44724// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44725// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44726// CHECK3-NEXT: store i32 0, ptr [[SIVAR1]], align 44727// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44728// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 44729// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44730// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44731// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44732// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44733// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4734// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44735// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 14736// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4737// CHECK3: cond.true:4738// CHECK3-NEXT: br label [[COND_END:%.*]]4739// CHECK3: cond.false:4740// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44741// CHECK3-NEXT: br label [[COND_END]]4742// CHECK3: cond.end:4743// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4744// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44745// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44746// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44747// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4748// CHECK3: omp.inner.for.cond:4749// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44750// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44751// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4752// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4753// CHECK3: omp.inner.for.body:4754// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44755// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 14756// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4757// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 44758// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 44759// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 44760// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]]4761// CHECK3-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 44762// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4763// CHECK3: omp.body.continue:4764// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4765// CHECK3: omp.inner.for.inc:4766// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44767// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 14768// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 44769// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]4770// CHECK3: omp.inner.for.end:4771// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4772// CHECK3: omp.loop.exit:4773// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4774// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 04775// CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 44776// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)4777// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [4778// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]4779// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]4780// CHECK3-NEXT: ]4781// CHECK3: .omp.reduction.case1:4782// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 44783// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 44784// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]4785// CHECK3-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 44786// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4787// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4788// CHECK3: .omp.reduction.case2:4789// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 44790// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 44791// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4792// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4793// CHECK3: .omp.reduction.default:4794// CHECK3-NEXT: ret void4795//4796//4797// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l214.omp_outlined.omp.reduction.reduction_func4798// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {4799// CHECK3-NEXT: entry:4800// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 44801// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 44802// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 44803// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 44804// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 44805// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 44806// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 04807// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 44808// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 04809// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 44810// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44811// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 44812// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]4813// CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 44814// CHECK3-NEXT: ret void4815//4816//4817// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2204818// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {4819// CHECK3-NEXT: entry:4820// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44821// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44822// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44823// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined, ptr [[TMP0]])4824// CHECK3-NEXT: ret void4825//4826//4827// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined4828// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {4829// CHECK3-NEXT: entry:4830// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44831// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44832// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 44833// CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 44834// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44835// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 44836// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44837// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44838// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44839// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44840// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 44841// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 44842// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 44843// CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 44844// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44845// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44846// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 44847// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 44848// CHECK3-NEXT: store i32 1, ptr [[SIVAR1]], align 44849// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44850// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 44851// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44852// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44853// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44854// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44855// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4856// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44857// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 14858// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4859// CHECK3: cond.true:4860// CHECK3-NEXT: br label [[COND_END:%.*]]4861// CHECK3: cond.false:4862// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44863// CHECK3-NEXT: br label [[COND_END]]4864// CHECK3: cond.end:4865// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]4866// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 44867// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 44868// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 44869// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]4870// CHECK3: omp.inner.for.cond:4871// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44872// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44873// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]4874// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]4875// CHECK3: omp.inner.for.body:4876// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44877// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 14878// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]4879// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 44880// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 44881// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 44882// CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]]4883// CHECK3-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 44884// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]4885// CHECK3: omp.body.continue:4886// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]4887// CHECK3: omp.inner.for.inc:4888// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 44889// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 14890// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 44891// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]4892// CHECK3: omp.inner.for.end:4893// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]4894// CHECK3: omp.loop.exit:4895// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])4896// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 04897// CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP12]], align 44898// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)4899// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [4900// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]4901// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]4902// CHECK3-NEXT: ]4903// CHECK3: .omp.reduction.case1:4904// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 44905// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[SIVAR1]], align 44906// CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]]4907// CHECK3-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 44908// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4909// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4910// CHECK3: .omp.reduction.case2:4911// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 44912// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 44913// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]4914// CHECK3: atomic_cont:4915// CHECK3-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ]4916// CHECK3-NEXT: store i32 [[TMP17]], ptr [[_TMP6]], align 44917// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[_TMP6]], align 44918// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 44919// CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]]4920// CHECK3-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 44921// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 44922// CHECK3-NEXT: [[TMP21:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 44923// CHECK3-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 04924// CHECK3-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 14925// CHECK3-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]4926// CHECK3: atomic_exit:4927// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)4928// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]4929// CHECK3: .omp.reduction.default:4930// CHECK3-NEXT: ret void4931//4932//4933// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l220.omp_outlined.omp.reduction.reduction_func4934// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {4935// CHECK3-NEXT: entry:4936// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 44937// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 44938// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 44939// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 44940// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 44941// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 44942// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 04943// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 44944// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 04945// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 44946// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 44947// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 44948// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]4949// CHECK3-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 44950// CHECK3-NEXT: ret void4951//4952//4953// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2264954// CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] {4955// CHECK3-NEXT: entry:4956// CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 44957// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 44958// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 44959// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined, ptr [[TMP0]])4960// CHECK3-NEXT: ret void4961//4962//4963// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined4964// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]]) #[[ATTR1]] {4965// CHECK3-NEXT: entry:4966// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 44967// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 44968// CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 44969// CHECK3-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 14970// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 44971// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 44972// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 44973// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 44974// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 44975// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 44976// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 44977// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 44978// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 14979// CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 14980// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 44981// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 44982// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 44983// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 44984// CHECK3-NEXT: store i8 1, ptr [[AND_VAR1]], align 14985// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 44986// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 44987// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 44988// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 44989// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 44990// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 44991// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)4992// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44993// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 14994// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]4995// CHECK3: cond.true:4996// CHECK3-NEXT: br label [[COND_END:%.*]]4997// CHECK3: cond.false:4998// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 44999// CHECK3-NEXT: br label [[COND_END]]5000// CHECK3: cond.end:5001// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5002// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45003// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45004// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45005// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5006// CHECK3: omp.inner.for.cond:5007// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45008// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45009// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5010// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5011// CHECK3: omp.inner.for.body:5012// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45013// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15014// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5015// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45016// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 15017// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i15018// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]5019// CHECK3: land.rhs:5020// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45021// CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 05022// CHECK3-NEXT: br label [[LAND_END]]5023// CHECK3: land.end:5024// CHECK3-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ]5025// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i85026// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 15027// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5028// CHECK3: omp.body.continue:5029// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5030// CHECK3: omp.inner.for.inc:5031// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45032// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 15033// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 45034// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5035// CHECK3: omp.inner.for.end:5036// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5037// CHECK3: omp.loop.exit:5038// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5039// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05040// CHECK3-NEXT: store ptr [[AND_VAR1]], ptr [[TMP13]], align 45041// CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5042// CHECK3-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5043// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5044// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5045// CHECK3-NEXT: ]5046// CHECK3: .omp.reduction.case1:5047// CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 15048// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i15049// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]5050// CHECK3: land.rhs6:5051// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[AND_VAR1]], align 15052// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i15053// CHECK3-NEXT: br label [[LAND_END8]]5054// CHECK3: land.end8:5055// CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]5056// CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i85057// CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 15058// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5059// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5060// CHECK3: .omp.reduction.case2:5061// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 15062// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i15063// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 15064// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]5065// CHECK3: atomic_cont:5066// CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LAND_END17:%.*]] ]5067// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i15068// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i85069// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 15070// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 15071// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i15072// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]5073// CHECK3: land.rhs15:5074// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[AND_VAR1]], align 15075// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i15076// CHECK3-NEXT: br label [[LAND_END17]]5077// CHECK3: land.end17:5078// CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]5079// CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i85080// CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 15081// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 15082// CHECK3-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 15083// CHECK3-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 05084// CHECK3-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 15085// CHECK3-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]5086// CHECK3: atomic_exit:5087// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5088// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5089// CHECK3: .omp.reduction.default:5090// CHECK3-NEXT: ret void5091//5092//5093// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l226.omp_outlined.omp.reduction.reduction_func5094// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5095// CHECK3-NEXT: entry:5096// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45097// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45098// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45099// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45100// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45101// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45102// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05103// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45104// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05105// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45106// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 15107// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i15108// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]5109// CHECK3: land.rhs:5110// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 15111// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i15112// CHECK3-NEXT: br label [[LAND_END]]5113// CHECK3: land.end:5114// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]5115// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i85116// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 15117// CHECK3-NEXT: ret void5118//5119//5120// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2325121// CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] {5122// CHECK3-NEXT: entry:5123// CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 45124// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 45125// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 45126// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined, ptr [[TMP0]])5127// CHECK3-NEXT: ret void5128//5129//5130// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined5131// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]]) #[[ATTR1]] {5132// CHECK3-NEXT: entry:5133// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45134// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45135// CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 45136// CHECK3-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 15137// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45138// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45139// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45140// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45141// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45142// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45143// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45144// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45145// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 15146// CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 15147// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45148// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45149// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 45150// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 45151// CHECK3-NEXT: store i8 0, ptr [[OR_VAR1]], align 15152// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45153// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45154// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45155// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45156// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45157// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45158// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5159// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45160// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15161// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5162// CHECK3: cond.true:5163// CHECK3-NEXT: br label [[COND_END:%.*]]5164// CHECK3: cond.false:5165// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45166// CHECK3-NEXT: br label [[COND_END]]5167// CHECK3: cond.end:5168// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5169// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45170// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45171// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45172// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5173// CHECK3: omp.inner.for.cond:5174// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45175// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45176// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5177// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5178// CHECK3: omp.inner.for.body:5179// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45180// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15181// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5182// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45183// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 15184// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i15185// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]5186// CHECK3: lor.rhs:5187// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45188// CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 05189// CHECK3-NEXT: br label [[LOR_END]]5190// CHECK3: lor.end:5191// CHECK3-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ]5192// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i85193// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 15194// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5195// CHECK3: omp.body.continue:5196// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5197// CHECK3: omp.inner.for.inc:5198// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45199// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 15200// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 45201// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5202// CHECK3: omp.inner.for.end:5203// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5204// CHECK3: omp.loop.exit:5205// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5206// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05207// CHECK3-NEXT: store ptr [[OR_VAR1]], ptr [[TMP13]], align 45208// CHECK3-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5209// CHECK3-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5210// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5211// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5212// CHECK3-NEXT: ]5213// CHECK3: .omp.reduction.case1:5214// CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP0]], align 15215// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP15]] to i15216// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]5217// CHECK3: lor.rhs6:5218// CHECK3-NEXT: [[TMP16:%.*]] = load i8, ptr [[OR_VAR1]], align 15219// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP16]] to i15220// CHECK3-NEXT: br label [[LOR_END8]]5221// CHECK3: lor.end8:5222// CHECK3-NEXT: [[TMP17:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]5223// CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP17]] to i85224// CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 15225// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5226// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5227// CHECK3: .omp.reduction.case2:5228// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 15229// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP18]] to i15230// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 15231// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]5232// CHECK3: atomic_cont:5233// CHECK3-NEXT: [[TMP19:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP25:%.*]], [[LOR_END17:%.*]] ]5234// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP19]] to i15235// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i85236// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 15237// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[_TMP12]], align 15238// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP20]] to i15239// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]5240// CHECK3: lor.rhs15:5241// CHECK3-NEXT: [[TMP21:%.*]] = load i8, ptr [[OR_VAR1]], align 15242// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP21]] to i15243// CHECK3-NEXT: br label [[LOR_END17]]5244// CHECK3: lor.end17:5245// CHECK3-NEXT: [[TMP22:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]5246// CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP22]] to i85247// CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 15248// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 15249// CHECK3-NEXT: [[TMP24:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP19]], i8 [[TMP23]] monotonic monotonic, align 15250// CHECK3-NEXT: [[TMP25]] = extractvalue { i8, i1 } [[TMP24]], 05251// CHECK3-NEXT: [[TMP26:%.*]] = extractvalue { i8, i1 } [[TMP24]], 15252// CHECK3-NEXT: br i1 [[TMP26]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]5253// CHECK3: atomic_exit:5254// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5255// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5256// CHECK3: .omp.reduction.default:5257// CHECK3-NEXT: ret void5258//5259//5260// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l232.omp_outlined.omp.reduction.reduction_func5261// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5262// CHECK3-NEXT: entry:5263// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45264// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45265// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45266// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45267// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45268// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45269// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05270// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45271// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05272// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45273// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 15274// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i15275// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]5276// CHECK3: lor.rhs:5277// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 15278// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i15279// CHECK3-NEXT: br label [[LOR_END]]5280// CHECK3: lor.end:5281// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]5282// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i85283// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 15284// CHECK3-NEXT: ret void5285//5286//5287// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2385288// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5289// CHECK3-NEXT: entry:5290// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45291// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45292// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45293// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined, ptr [[TMP0]])5294// CHECK3-NEXT: ret void5295//5296//5297// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined5298// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5299// CHECK3-NEXT: entry:5300// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45301// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45302// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45303// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 45304// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45305// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45306// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45307// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45308// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45309// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45310// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45311// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45312// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45313// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45314// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45315// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45316// CHECK3-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 45317// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45318// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45319// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45320// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45321// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45322// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45323// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5324// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45325// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15326// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5327// CHECK3: cond.true:5328// CHECK3-NEXT: br label [[COND_END:%.*]]5329// CHECK3: cond.false:5330// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45331// CHECK3-NEXT: br label [[COND_END]]5332// CHECK3: cond.end:5333// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5334// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45335// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45336// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45337// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5338// CHECK3: omp.inner.for.cond:5339// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45340// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45341// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5342// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5343// CHECK3: omp.inner.for.body:5344// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45345// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15346// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5347// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45348// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 45349// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45350// CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]]5351// CHECK3-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 45352// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5353// CHECK3: omp.body.continue:5354// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5355// CHECK3: omp.inner.for.inc:5356// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45357// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 15358// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 45359// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5360// CHECK3: omp.inner.for.end:5361// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5362// CHECK3: omp.loop.exit:5363// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5364// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05365// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 45366// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5367// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5368// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5369// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5370// CHECK3-NEXT: ]5371// CHECK3: .omp.reduction.case1:5372// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 45373// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 45374// CHECK3-NEXT: [[AND4:%.*]] = and i32 [[TMP14]], [[TMP15]]5375// CHECK3-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 45376// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5377// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5378// CHECK3: .omp.reduction.case2:5379// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 45380// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP16]] monotonic, align 45381// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5382// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5383// CHECK3: .omp.reduction.default:5384// CHECK3-NEXT: ret void5385//5386//5387// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l238.omp_outlined.omp.reduction.reduction_func5388// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5389// CHECK3-NEXT: entry:5390// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45391// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45392// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45393// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45394// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45395// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45396// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05397// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45398// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05399// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45400// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45401// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 45402// CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]]5403// CHECK3-NEXT: store i32 [[AND]], ptr [[TMP7]], align 45404// CHECK3-NEXT: ret void5405//5406//5407// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2435408// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5409// CHECK3-NEXT: entry:5410// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45411// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45412// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45413// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined, ptr [[TMP0]])5414// CHECK3-NEXT: ret void5415//5416//5417// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined5418// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5419// CHECK3-NEXT: entry:5420// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45421// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45422// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45423// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 45424// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45425// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45426// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45427// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45428// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45429// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45430// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45431// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45432// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45433// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45434// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45435// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45436// CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 45437// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45438// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45439// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45440// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45441// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45442// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45443// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5444// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45445// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15446// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5447// CHECK3: cond.true:5448// CHECK3-NEXT: br label [[COND_END:%.*]]5449// CHECK3: cond.false:5450// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45451// CHECK3-NEXT: br label [[COND_END]]5452// CHECK3: cond.end:5453// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5454// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45455// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45456// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45457// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5458// CHECK3: omp.inner.for.cond:5459// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45460// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45461// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5462// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5463// CHECK3: omp.inner.for.body:5464// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45465// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15466// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5467// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45468// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 45469// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45470// CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]]5471// CHECK3-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 45472// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5473// CHECK3: omp.body.continue:5474// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5475// CHECK3: omp.inner.for.inc:5476// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45477// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 15478// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 45479// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5480// CHECK3: omp.inner.for.end:5481// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5482// CHECK3: omp.loop.exit:5483// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5484// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05485// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 45486// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5487// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5488// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5489// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5490// CHECK3-NEXT: ]5491// CHECK3: .omp.reduction.case1:5492// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 45493// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 45494// CHECK3-NEXT: [[OR4:%.*]] = or i32 [[TMP14]], [[TMP15]]5495// CHECK3-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 45496// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5497// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5498// CHECK3: .omp.reduction.case2:5499// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 45500// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP16]] monotonic, align 45501// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5502// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5503// CHECK3: .omp.reduction.default:5504// CHECK3-NEXT: ret void5505//5506//5507// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l243.omp_outlined.omp.reduction.reduction_func5508// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5509// CHECK3-NEXT: entry:5510// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45511// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45512// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45513// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45514// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45515// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45516// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05517// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45518// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05519// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45520// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45521// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 45522// CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]]5523// CHECK3-NEXT: store i32 [[OR]], ptr [[TMP7]], align 45524// CHECK3-NEXT: ret void5525//5526//5527// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2485528// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5529// CHECK3-NEXT: entry:5530// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45531// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45532// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45533// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined, ptr [[TMP0]])5534// CHECK3-NEXT: ret void5535//5536//5537// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined5538// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]]) #[[ATTR1]] {5539// CHECK3-NEXT: entry:5540// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45541// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45542// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 45543// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 45544// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45545// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45546// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45547// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45548// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45549// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45550// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45551// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45552// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45553// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45554// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 45555// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 45556// CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 45557// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45558// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45559// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45560// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45561// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45562// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45563// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5564// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45565// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15566// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5567// CHECK3: cond.true:5568// CHECK3-NEXT: br label [[COND_END:%.*]]5569// CHECK3: cond.false:5570// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45571// CHECK3-NEXT: br label [[COND_END]]5572// CHECK3: cond.end:5573// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5574// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45575// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45576// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45577// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5578// CHECK3: omp.inner.for.cond:5579// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45580// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45581// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5582// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5583// CHECK3: omp.inner.for.body:5584// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45585// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15586// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5587// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45588// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 45589// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45590// CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]]5591// CHECK3-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 45592// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5593// CHECK3: omp.body.continue:5594// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5595// CHECK3: omp.inner.for.inc:5596// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45597// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP11]], 15598// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 45599// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5600// CHECK3: omp.inner.for.end:5601// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5602// CHECK3: omp.loop.exit:5603// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5604// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05605// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP12]], align 45606// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5607// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5608// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5609// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5610// CHECK3-NEXT: ]5611// CHECK3: .omp.reduction.case1:5612// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 45613// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[BIT_VAR1]], align 45614// CHECK3-NEXT: [[XOR4:%.*]] = xor i32 [[TMP14]], [[TMP15]]5615// CHECK3-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 45616// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5617// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5618// CHECK3: .omp.reduction.case2:5619// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 45620// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP16]] monotonic, align 45621// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5622// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5623// CHECK3: .omp.reduction.default:5624// CHECK3-NEXT: ret void5625//5626//5627// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l248.omp_outlined.omp.reduction.reduction_func5628// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5629// CHECK3-NEXT: entry:5630// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45631// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45632// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45633// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45634// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45635// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45636// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05637// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45638// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05639// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45640// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45641// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 45642// CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]]5643// CHECK3-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 45644// CHECK3-NEXT: ret void5645//5646//5647// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2545648// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {5649// CHECK3-NEXT: entry:5650// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 45651// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 45652// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 45653// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined, ptr [[TMP0]])5654// CHECK3-NEXT: ret void5655//5656//5657// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined5658// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {5659// CHECK3-NEXT: entry:5660// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45661// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45662// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 45663// CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 45664// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45665// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45666// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45667// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45668// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45669// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45670// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45671// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45672// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45673// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45674// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 45675// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 45676// CHECK3-NEXT: store i32 -2147483648, ptr [[SIVAR1]], align 45677// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45678// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45679// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45680// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45681// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45682// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45683// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5684// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45685// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15686// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5687// CHECK3: cond.true:5688// CHECK3-NEXT: br label [[COND_END:%.*]]5689// CHECK3: cond.false:5690// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45691// CHECK3-NEXT: br label [[COND_END]]5692// CHECK3: cond.end:5693// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5694// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45695// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45696// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45697// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5698// CHECK3: omp.inner.for.cond:5699// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45700// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45701// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5702// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5703// CHECK3: omp.inner.for.body:5704// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45705// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15706// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5707// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45708// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 45709// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45710// CHECK3-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]]5711// CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]5712// CHECK3: cond.true4:5713// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 45714// CHECK3-NEXT: br label [[COND_END6:%.*]]5715// CHECK3: cond.false5:5716// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 45717// CHECK3-NEXT: br label [[COND_END6]]5718// CHECK3: cond.end6:5719// CHECK3-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]5720// CHECK3-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 45721// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5722// CHECK3: omp.body.continue:5723// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5724// CHECK3: omp.inner.for.inc:5725// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45726// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 15727// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 45728// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5729// CHECK3: omp.inner.for.end:5730// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5731// CHECK3: omp.loop.exit:5732// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5733// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05734// CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 45735// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5736// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5737// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5738// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5739// CHECK3-NEXT: ]5740// CHECK3: .omp.reduction.case1:5741// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 45742// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 45743// CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP16]], [[TMP17]]5744// CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]5745// CHECK3: cond.true10:5746// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 45747// CHECK3-NEXT: br label [[COND_END12:%.*]]5748// CHECK3: cond.false11:5749// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 45750// CHECK3-NEXT: br label [[COND_END12]]5751// CHECK3: cond.end12:5752// CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ]5753// CHECK3-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 45754// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5755// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5756// CHECK3: .omp.reduction.case2:5757// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 45758// CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP20]] monotonic, align 45759// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5760// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5761// CHECK3: .omp.reduction.default:5762// CHECK3-NEXT: ret void5763//5764//5765// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l254.omp_outlined.omp.reduction.reduction_func5766// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5767// CHECK3-NEXT: entry:5768// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45769// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45770// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45771// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45772// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45773// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45774// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05775// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45776// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05777// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45778// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45779// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 45780// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]5781// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5782// CHECK3: cond.true:5783// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 45784// CHECK3-NEXT: br label [[COND_END:%.*]]5785// CHECK3: cond.false:5786// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 45787// CHECK3-NEXT: br label [[COND_END]]5788// CHECK3: cond.end:5789// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]5790// CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 45791// CHECK3-NEXT: ret void5792//5793//5794// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l2605795// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {5796// CHECK3-NEXT: entry:5797// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 45798// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 45799// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 45800// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined, ptr [[TMP0]])5801// CHECK3-NEXT: ret void5802//5803//5804// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined5805// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {5806// CHECK3-NEXT: entry:5807// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 45808// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 45809// CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 45810// CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 45811// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 45812// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45813// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 45814// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 45815// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 45816// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 45817// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 45818// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 45819// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 45820// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 45821// CHECK3-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 45822// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 45823// CHECK3-NEXT: store i32 2147483647, ptr [[SIVAR1]], align 45824// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 45825// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 45826// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 45827// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 45828// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 45829// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 45830// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)5831// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45832// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 15833// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5834// CHECK3: cond.true:5835// CHECK3-NEXT: br label [[COND_END:%.*]]5836// CHECK3: cond.false:5837// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45838// CHECK3-NEXT: br label [[COND_END]]5839// CHECK3: cond.end:5840// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]5841// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 45842// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 45843// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 45844// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]5845// CHECK3: omp.inner.for.cond:5846// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45847// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 45848// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]5849// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]5850// CHECK3: omp.inner.for.body:5851// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45852// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 15853// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]5854// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 45855// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[SIVAR1]], align 45856// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 45857// CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]5858// CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]5859// CHECK3: cond.true4:5860// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[SIVAR1]], align 45861// CHECK3-NEXT: br label [[COND_END6:%.*]]5862// CHECK3: cond.false5:5863// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 45864// CHECK3-NEXT: br label [[COND_END6]]5865// CHECK3: cond.end6:5866// CHECK3-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]5867// CHECK3-NEXT: store i32 [[COND7]], ptr [[SIVAR1]], align 45868// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]5869// CHECK3: omp.body.continue:5870// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]5871// CHECK3: omp.inner.for.inc:5872// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 45873// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 15874// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 45875// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]5876// CHECK3: omp.inner.for.end:5877// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]5878// CHECK3: omp.loop.exit:5879// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])5880// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 05881// CHECK3-NEXT: store ptr [[SIVAR1]], ptr [[TMP14]], align 45882// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)5883// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [5884// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]5885// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]5886// CHECK3-NEXT: ]5887// CHECK3: .omp.reduction.case1:5888// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 45889// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 45890// CHECK3-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]]5891// CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]5892// CHECK3: cond.true10:5893// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP0]], align 45894// CHECK3-NEXT: br label [[COND_END12:%.*]]5895// CHECK3: cond.false11:5896// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[SIVAR1]], align 45897// CHECK3-NEXT: br label [[COND_END12]]5898// CHECK3: cond.end12:5899// CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP18]], [[COND_TRUE10]] ], [ [[TMP19]], [[COND_FALSE11]] ]5900// CHECK3-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 45901// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5902// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5903// CHECK3: .omp.reduction.case2:5904// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 45905// CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP20]] monotonic, align 45906// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)5907// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]5908// CHECK3: .omp.reduction.default:5909// CHECK3-NEXT: ret void5910//5911//5912// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l260.omp_outlined.omp.reduction.reduction_func5913// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {5914// CHECK3-NEXT: entry:5915// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 45916// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 45917// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 45918// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 45919// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 45920// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 45921// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 05922// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 45923// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 05924// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 45925// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 45926// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 45927// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]]5928// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]5929// CHECK3: cond.true:5930// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 45931// CHECK3-NEXT: br label [[COND_END:%.*]]5932// CHECK3: cond.false:5933// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 45934// CHECK3-NEXT: br label [[COND_END]]5935// CHECK3: cond.end:5936// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]5937// CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 45938// CHECK3-NEXT: ret void5939//5940//5941// CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v5942// CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {5943// CHECK3-NEXT: entry:5944// CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 45945// CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 45946// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 45947// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 45948// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 45949// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 45950// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 85951// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [2 x ptr], align 45952// CHECK3-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [2 x ptr], align 45953// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [2 x ptr], align 45954// CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 45955// CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85956// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 45957// CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 45958// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 45959// CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 45960// CHECK3-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85961// CHECK3-NEXT: [[AND_VAR:%.*]] = alloca i8, align 15962// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [2 x ptr], align 45963// CHECK3-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [2 x ptr], align 45964// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [2 x ptr], align 45965// CHECK3-NEXT: [[_TMP18:%.*]] = alloca i32, align 45966// CHECK3-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85967// CHECK3-NEXT: [[OR_VAR:%.*]] = alloca i8, align 15968// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x ptr], align 45969// CHECK3-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x ptr], align 45970// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x ptr], align 45971// CHECK3-NEXT: [[_TMP25:%.*]] = alloca i32, align 45972// CHECK3-NEXT: [[KERNEL_ARGS26:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85973// CHECK3-NEXT: [[BIT_VAR:%.*]] = alloca i32, align 45974// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS29:%.*]] = alloca [2 x ptr], align 45975// CHECK3-NEXT: [[DOTOFFLOAD_PTRS30:%.*]] = alloca [2 x ptr], align 45976// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS31:%.*]] = alloca [2 x ptr], align 45977// CHECK3-NEXT: [[_TMP32:%.*]] = alloca i32, align 45978// CHECK3-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85979// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [2 x ptr], align 45980// CHECK3-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [2 x ptr], align 45981// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [2 x ptr], align 45982// CHECK3-NEXT: [[_TMP39:%.*]] = alloca i32, align 45983// CHECK3-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85984// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS43:%.*]] = alloca [2 x ptr], align 45985// CHECK3-NEXT: [[DOTOFFLOAD_PTRS44:%.*]] = alloca [2 x ptr], align 45986// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS45:%.*]] = alloca [2 x ptr], align 45987// CHECK3-NEXT: [[_TMP46:%.*]] = alloca i32, align 45988// CHECK3-NEXT: [[KERNEL_ARGS47:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85989// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [2 x ptr], align 45990// CHECK3-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [2 x ptr], align 45991// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [2 x ptr], align 45992// CHECK3-NEXT: [[_TMP53:%.*]] = alloca i32, align 45993// CHECK3-NEXT: [[KERNEL_ARGS54:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85994// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS57:%.*]] = alloca [2 x ptr], align 45995// CHECK3-NEXT: [[DOTOFFLOAD_PTRS58:%.*]] = alloca [2 x ptr], align 45996// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS59:%.*]] = alloca [2 x ptr], align 45997// CHECK3-NEXT: [[_TMP60:%.*]] = alloca i32, align 45998// CHECK3-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 85999// CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 46000// CHECK3-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)6001// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06002// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP0]], align 46003// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06004// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP1]], align 46005// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 06006// CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 46007// CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 06008// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 06009// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 06010// CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 46011// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 16012// CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 46013// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 26014// CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 46015// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 36016// CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 46017// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 46018// CHECK3-NEXT: store ptr @.offload_sizes.19, ptr [[TMP9]], align 46019// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 56020// CHECK3-NEXT: store ptr @.offload_maptypes.20, ptr [[TMP10]], align 46021// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 66022// CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 46023// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 76024// CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 46025// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 86026// CHECK3-NEXT: store i64 2, ptr [[TMP13]], align 86027// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 96028// CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 86029// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 106030// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 46031// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 116032// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 46033// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 126034// CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 46035// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, ptr [[KERNEL_ARGS]])6036// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 06037// CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]6038// CHECK3: omp_offload.failed:6039// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(ptr [[T_VAR]]) #[[ATTR2]]6040// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]6041// CHECK3: omp_offload.cont:6042// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 06043// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP20]], align 46044// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 06045// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP21]], align 46046// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 06047// CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 46048// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 16049// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP23]], align 46050// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 16051// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP24]], align 46052// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 16053// CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 46054// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 06055// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 06056// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 06057// CHECK3-NEXT: store i32 3, ptr [[TMP28]], align 46058// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 16059// CHECK3-NEXT: store i32 2, ptr [[TMP29]], align 46060// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 26061// CHECK3-NEXT: store ptr [[TMP26]], ptr [[TMP30]], align 46062// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 36063// CHECK3-NEXT: store ptr [[TMP27]], ptr [[TMP31]], align 46064// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 46065// CHECK3-NEXT: store ptr @.offload_sizes.21, ptr [[TMP32]], align 46066// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 56067// CHECK3-NEXT: store ptr @.offload_maptypes.22, ptr [[TMP33]], align 46068// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 66069// CHECK3-NEXT: store ptr null, ptr [[TMP34]], align 46070// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 76071// CHECK3-NEXT: store ptr null, ptr [[TMP35]], align 46072// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 86073// CHECK3-NEXT: store i64 2, ptr [[TMP36]], align 86074// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 96075// CHECK3-NEXT: store i64 0, ptr [[TMP37]], align 86076// CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 106077// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP38]], align 46078// CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 116079// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP39]], align 46080// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 126081// CHECK3-NEXT: store i32 0, ptr [[TMP40]], align 46082// CHECK3-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.region_id, ptr [[KERNEL_ARGS5]])6083// CHECK3-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 06084// CHECK3-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]6085// CHECK3: omp_offload.failed6:6086// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]6087// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]]6088// CHECK3: omp_offload.cont7:6089// CHECK3-NEXT: store i32 1, ptr [[T_VAR]], align 46090// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 06091// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP43]], align 46092// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 06093// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP44]], align 46094// CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 06095// CHECK3-NEXT: store ptr null, ptr [[TMP45]], align 46096// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 16097// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP46]], align 46098// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 16099// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP47]], align 46100// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 16101// CHECK3-NEXT: store ptr null, ptr [[TMP48]], align 46102// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 06103// CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 06104// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 06105// CHECK3-NEXT: store i32 3, ptr [[TMP51]], align 46106// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 16107// CHECK3-NEXT: store i32 2, ptr [[TMP52]], align 46108// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 26109// CHECK3-NEXT: store ptr [[TMP49]], ptr [[TMP53]], align 46110// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 36111// CHECK3-NEXT: store ptr [[TMP50]], ptr [[TMP54]], align 46112// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 46113// CHECK3-NEXT: store ptr @.offload_sizes.23, ptr [[TMP55]], align 46114// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 56115// CHECK3-NEXT: store ptr @.offload_maptypes.24, ptr [[TMP56]], align 46116// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 66117// CHECK3-NEXT: store ptr null, ptr [[TMP57]], align 46118// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 76119// CHECK3-NEXT: store ptr null, ptr [[TMP58]], align 46120// CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 86121// CHECK3-NEXT: store i64 2, ptr [[TMP59]], align 86122// CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 96123// CHECK3-NEXT: store i64 0, ptr [[TMP60]], align 86124// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 106125// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP61]], align 46126// CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 116127// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP62]], align 46128// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 126129// CHECK3-NEXT: store i32 0, ptr [[TMP63]], align 46130// CHECK3-NEXT: [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.region_id, ptr [[KERNEL_ARGS12]])6131// CHECK3-NEXT: [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 06132// CHECK3-NEXT: br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]6133// CHECK3: omp_offload.failed13:6134// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]6135// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT14]]6136// CHECK3: omp_offload.cont14:6137// CHECK3-NEXT: store i8 1, ptr [[AND_VAR]], align 16138// CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 06139// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP66]], align 46140// CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 06141// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[TMP67]], align 46142// CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 06143// CHECK3-NEXT: store ptr null, ptr [[TMP68]], align 46144// CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 16145// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP69]], align 46146// CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 16147// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP70]], align 46148// CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 16149// CHECK3-NEXT: store ptr null, ptr [[TMP71]], align 46150// CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 06151// CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 06152// CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 06153// CHECK3-NEXT: store i32 3, ptr [[TMP74]], align 46154// CHECK3-NEXT: [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 16155// CHECK3-NEXT: store i32 2, ptr [[TMP75]], align 46156// CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 26157// CHECK3-NEXT: store ptr [[TMP72]], ptr [[TMP76]], align 46158// CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 36159// CHECK3-NEXT: store ptr [[TMP73]], ptr [[TMP77]], align 46160// CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 46161// CHECK3-NEXT: store ptr @.offload_sizes.25, ptr [[TMP78]], align 46162// CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 56163// CHECK3-NEXT: store ptr @.offload_maptypes.26, ptr [[TMP79]], align 46164// CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 66165// CHECK3-NEXT: store ptr null, ptr [[TMP80]], align 46166// CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 76167// CHECK3-NEXT: store ptr null, ptr [[TMP81]], align 46168// CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 86169// CHECK3-NEXT: store i64 2, ptr [[TMP82]], align 86170// CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 96171// CHECK3-NEXT: store i64 0, ptr [[TMP83]], align 86172// CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 106173// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP84]], align 46174// CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 116175// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP85]], align 46176// CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 126177// CHECK3-NEXT: store i32 0, ptr [[TMP86]], align 46178// CHECK3-NEXT: [[TMP87:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS19]])6179// CHECK3-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 06180// CHECK3-NEXT: br i1 [[TMP88]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]6181// CHECK3: omp_offload.failed20:6182// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[AND_VAR]], ptr [[VEC]]) #[[ATTR2]]6183// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT21]]6184// CHECK3: omp_offload.cont21:6185// CHECK3-NEXT: store i8 0, ptr [[OR_VAR]], align 16186// CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 06187// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP89]], align 46188// CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 06189// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[TMP90]], align 46190// CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 06191// CHECK3-NEXT: store ptr null, ptr [[TMP91]], align 46192// CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 16193// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP92]], align 46194// CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 16195// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP93]], align 46196// CHECK3-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS24]], i32 0, i32 16197// CHECK3-NEXT: store ptr null, ptr [[TMP94]], align 46198// CHECK3-NEXT: [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 06199// CHECK3-NEXT: [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS23]], i32 0, i32 06200// CHECK3-NEXT: [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 06201// CHECK3-NEXT: store i32 3, ptr [[TMP97]], align 46202// CHECK3-NEXT: [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 16203// CHECK3-NEXT: store i32 2, ptr [[TMP98]], align 46204// CHECK3-NEXT: [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 26205// CHECK3-NEXT: store ptr [[TMP95]], ptr [[TMP99]], align 46206// CHECK3-NEXT: [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 36207// CHECK3-NEXT: store ptr [[TMP96]], ptr [[TMP100]], align 46208// CHECK3-NEXT: [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 46209// CHECK3-NEXT: store ptr @.offload_sizes.27, ptr [[TMP101]], align 46210// CHECK3-NEXT: [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 56211// CHECK3-NEXT: store ptr @.offload_maptypes.28, ptr [[TMP102]], align 46212// CHECK3-NEXT: [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 66213// CHECK3-NEXT: store ptr null, ptr [[TMP103]], align 46214// CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 76215// CHECK3-NEXT: store ptr null, ptr [[TMP104]], align 46216// CHECK3-NEXT: [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 86217// CHECK3-NEXT: store i64 2, ptr [[TMP105]], align 86218// CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 96219// CHECK3-NEXT: store i64 0, ptr [[TMP106]], align 86220// CHECK3-NEXT: [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 106221// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP107]], align 46222// CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 116223// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP108]], align 46224// CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS26]], i32 0, i32 126225// CHECK3-NEXT: store i32 0, ptr [[TMP109]], align 46226// CHECK3-NEXT: [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.region_id, ptr [[KERNEL_ARGS26]])6227// CHECK3-NEXT: [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 06228// CHECK3-NEXT: br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED27:%.*]], label [[OMP_OFFLOAD_CONT28:%.*]]6229// CHECK3: omp_offload.failed27:6230// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55(ptr [[OR_VAR]], ptr [[VEC]]) #[[ATTR2]]6231// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT28]]6232// CHECK3: omp_offload.cont28:6233// CHECK3-NEXT: store i32 1, ptr [[BIT_VAR]], align 46234// CHECK3-NEXT: [[TMP112:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 06235// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP112]], align 46236// CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 06237// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP113]], align 46238// CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 06239// CHECK3-NEXT: store ptr null, ptr [[TMP114]], align 46240// CHECK3-NEXT: [[TMP115:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 16241// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP115]], align 46242// CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 16243// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP116]], align 46244// CHECK3-NEXT: [[TMP117:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS31]], i32 0, i32 16245// CHECK3-NEXT: store ptr null, ptr [[TMP117]], align 46246// CHECK3-NEXT: [[TMP118:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS29]], i32 0, i32 06247// CHECK3-NEXT: [[TMP119:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS30]], i32 0, i32 06248// CHECK3-NEXT: [[TMP120:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 06249// CHECK3-NEXT: store i32 3, ptr [[TMP120]], align 46250// CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 16251// CHECK3-NEXT: store i32 2, ptr [[TMP121]], align 46252// CHECK3-NEXT: [[TMP122:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 26253// CHECK3-NEXT: store ptr [[TMP118]], ptr [[TMP122]], align 46254// CHECK3-NEXT: [[TMP123:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 36255// CHECK3-NEXT: store ptr [[TMP119]], ptr [[TMP123]], align 46256// CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 46257// CHECK3-NEXT: store ptr @.offload_sizes.29, ptr [[TMP124]], align 46258// CHECK3-NEXT: [[TMP125:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 56259// CHECK3-NEXT: store ptr @.offload_maptypes.30, ptr [[TMP125]], align 46260// CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 66261// CHECK3-NEXT: store ptr null, ptr [[TMP126]], align 46262// CHECK3-NEXT: [[TMP127:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 76263// CHECK3-NEXT: store ptr null, ptr [[TMP127]], align 46264// CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 86265// CHECK3-NEXT: store i64 2, ptr [[TMP128]], align 86266// CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 96267// CHECK3-NEXT: store i64 0, ptr [[TMP129]], align 86268// CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 106269// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP130]], align 46270// CHECK3-NEXT: [[TMP131:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 116271// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP131]], align 46272// CHECK3-NEXT: [[TMP132:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS33]], i32 0, i32 126273// CHECK3-NEXT: store i32 0, ptr [[TMP132]], align 46274// CHECK3-NEXT: [[TMP133:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.region_id, ptr [[KERNEL_ARGS33]])6275// CHECK3-NEXT: [[TMP134:%.*]] = icmp ne i32 [[TMP133]], 06276// CHECK3-NEXT: br i1 [[TMP134]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]6277// CHECK3: omp_offload.failed34:6278// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]6279// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT35]]6280// CHECK3: omp_offload.cont35:6281// CHECK3-NEXT: [[TMP135:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 06282// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP135]], align 46283// CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 06284// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP136]], align 46285// CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 06286// CHECK3-NEXT: store ptr null, ptr [[TMP137]], align 46287// CHECK3-NEXT: [[TMP138:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 16288// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP138]], align 46289// CHECK3-NEXT: [[TMP139:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 16290// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP139]], align 46291// CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS38]], i32 0, i32 16292// CHECK3-NEXT: store ptr null, ptr [[TMP140]], align 46293// CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 06294// CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS37]], i32 0, i32 06295// CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 06296// CHECK3-NEXT: store i32 3, ptr [[TMP143]], align 46297// CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 16298// CHECK3-NEXT: store i32 2, ptr [[TMP144]], align 46299// CHECK3-NEXT: [[TMP145:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 26300// CHECK3-NEXT: store ptr [[TMP141]], ptr [[TMP145]], align 46301// CHECK3-NEXT: [[TMP146:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 36302// CHECK3-NEXT: store ptr [[TMP142]], ptr [[TMP146]], align 46303// CHECK3-NEXT: [[TMP147:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 46304// CHECK3-NEXT: store ptr @.offload_sizes.31, ptr [[TMP147]], align 46305// CHECK3-NEXT: [[TMP148:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 56306// CHECK3-NEXT: store ptr @.offload_maptypes.32, ptr [[TMP148]], align 46307// CHECK3-NEXT: [[TMP149:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 66308// CHECK3-NEXT: store ptr null, ptr [[TMP149]], align 46309// CHECK3-NEXT: [[TMP150:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 76310// CHECK3-NEXT: store ptr null, ptr [[TMP150]], align 46311// CHECK3-NEXT: [[TMP151:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 86312// CHECK3-NEXT: store i64 2, ptr [[TMP151]], align 86313// CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 96314// CHECK3-NEXT: store i64 0, ptr [[TMP152]], align 86315// CHECK3-NEXT: [[TMP153:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 106316// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP153]], align 46317// CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 116318// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP154]], align 46319// CHECK3-NEXT: [[TMP155:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS40]], i32 0, i32 126320// CHECK3-NEXT: store i32 0, ptr [[TMP155]], align 46321// CHECK3-NEXT: [[TMP156:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.region_id, ptr [[KERNEL_ARGS40]])6322// CHECK3-NEXT: [[TMP157:%.*]] = icmp ne i32 [[TMP156]], 06323// CHECK3-NEXT: br i1 [[TMP157]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]]6324// CHECK3: omp_offload.failed41:6325// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]6326// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT42]]6327// CHECK3: omp_offload.cont42:6328// CHECK3-NEXT: [[TMP158:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 06329// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP158]], align 46330// CHECK3-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 06331// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[TMP159]], align 46332// CHECK3-NEXT: [[TMP160:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 06333// CHECK3-NEXT: store ptr null, ptr [[TMP160]], align 46334// CHECK3-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 16335// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP161]], align 46336// CHECK3-NEXT: [[TMP162:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 16337// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP162]], align 46338// CHECK3-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS45]], i32 0, i32 16339// CHECK3-NEXT: store ptr null, ptr [[TMP163]], align 46340// CHECK3-NEXT: [[TMP164:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS43]], i32 0, i32 06341// CHECK3-NEXT: [[TMP165:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS44]], i32 0, i32 06342// CHECK3-NEXT: [[TMP166:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 06343// CHECK3-NEXT: store i32 3, ptr [[TMP166]], align 46344// CHECK3-NEXT: [[TMP167:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 16345// CHECK3-NEXT: store i32 2, ptr [[TMP167]], align 46346// CHECK3-NEXT: [[TMP168:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 26347// CHECK3-NEXT: store ptr [[TMP164]], ptr [[TMP168]], align 46348// CHECK3-NEXT: [[TMP169:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 36349// CHECK3-NEXT: store ptr [[TMP165]], ptr [[TMP169]], align 46350// CHECK3-NEXT: [[TMP170:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 46351// CHECK3-NEXT: store ptr @.offload_sizes.33, ptr [[TMP170]], align 46352// CHECK3-NEXT: [[TMP171:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 56353// CHECK3-NEXT: store ptr @.offload_maptypes.34, ptr [[TMP171]], align 46354// CHECK3-NEXT: [[TMP172:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 66355// CHECK3-NEXT: store ptr null, ptr [[TMP172]], align 46356// CHECK3-NEXT: [[TMP173:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 76357// CHECK3-NEXT: store ptr null, ptr [[TMP173]], align 46358// CHECK3-NEXT: [[TMP174:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 86359// CHECK3-NEXT: store i64 2, ptr [[TMP174]], align 86360// CHECK3-NEXT: [[TMP175:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 96361// CHECK3-NEXT: store i64 0, ptr [[TMP175]], align 86362// CHECK3-NEXT: [[TMP176:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 106363// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP176]], align 46364// CHECK3-NEXT: [[TMP177:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 116365// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP177]], align 46366// CHECK3-NEXT: [[TMP178:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS47]], i32 0, i32 126367// CHECK3-NEXT: store i32 0, ptr [[TMP178]], align 46368// CHECK3-NEXT: [[TMP179:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.region_id, ptr [[KERNEL_ARGS47]])6369// CHECK3-NEXT: [[TMP180:%.*]] = icmp ne i32 [[TMP179]], 06370// CHECK3-NEXT: br i1 [[TMP180]], label [[OMP_OFFLOAD_FAILED48:%.*]], label [[OMP_OFFLOAD_CONT49:%.*]]6371// CHECK3: omp_offload.failed48:6372// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71(ptr [[BIT_VAR]], ptr [[VEC]]) #[[ATTR2]]6373// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT49]]6374// CHECK3: omp_offload.cont49:6375// CHECK3-NEXT: store i32 0, ptr [[T_VAR]], align 46376// CHECK3-NEXT: [[TMP181:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 06377// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP181]], align 46378// CHECK3-NEXT: [[TMP182:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 06379// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP182]], align 46380// CHECK3-NEXT: [[TMP183:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 06381// CHECK3-NEXT: store ptr null, ptr [[TMP183]], align 46382// CHECK3-NEXT: [[TMP184:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 16383// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP184]], align 46384// CHECK3-NEXT: [[TMP185:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 16385// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP185]], align 46386// CHECK3-NEXT: [[TMP186:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 16387// CHECK3-NEXT: store ptr null, ptr [[TMP186]], align 46388// CHECK3-NEXT: [[TMP187:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 06389// CHECK3-NEXT: [[TMP188:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 06390// CHECK3-NEXT: [[TMP189:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 06391// CHECK3-NEXT: store i32 3, ptr [[TMP189]], align 46392// CHECK3-NEXT: [[TMP190:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 16393// CHECK3-NEXT: store i32 2, ptr [[TMP190]], align 46394// CHECK3-NEXT: [[TMP191:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 26395// CHECK3-NEXT: store ptr [[TMP187]], ptr [[TMP191]], align 46396// CHECK3-NEXT: [[TMP192:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 36397// CHECK3-NEXT: store ptr [[TMP188]], ptr [[TMP192]], align 46398// CHECK3-NEXT: [[TMP193:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 46399// CHECK3-NEXT: store ptr @.offload_sizes.35, ptr [[TMP193]], align 46400// CHECK3-NEXT: [[TMP194:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 56401// CHECK3-NEXT: store ptr @.offload_maptypes.36, ptr [[TMP194]], align 46402// CHECK3-NEXT: [[TMP195:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 66403// CHECK3-NEXT: store ptr null, ptr [[TMP195]], align 46404// CHECK3-NEXT: [[TMP196:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 76405// CHECK3-NEXT: store ptr null, ptr [[TMP196]], align 46406// CHECK3-NEXT: [[TMP197:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 86407// CHECK3-NEXT: store i64 2, ptr [[TMP197]], align 86408// CHECK3-NEXT: [[TMP198:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 96409// CHECK3-NEXT: store i64 0, ptr [[TMP198]], align 86410// CHECK3-NEXT: [[TMP199:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 106411// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP199]], align 46412// CHECK3-NEXT: [[TMP200:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 116413// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP200]], align 46414// CHECK3-NEXT: [[TMP201:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS54]], i32 0, i32 126415// CHECK3-NEXT: store i32 0, ptr [[TMP201]], align 46416// CHECK3-NEXT: [[TMP202:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.region_id, ptr [[KERNEL_ARGS54]])6417// CHECK3-NEXT: [[TMP203:%.*]] = icmp ne i32 [[TMP202]], 06418// CHECK3-NEXT: br i1 [[TMP203]], label [[OMP_OFFLOAD_FAILED55:%.*]], label [[OMP_OFFLOAD_CONT56:%.*]]6419// CHECK3: omp_offload.failed55:6420// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]6421// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT56]]6422// CHECK3: omp_offload.cont56:6423// CHECK3-NEXT: store i32 10, ptr [[T_VAR]], align 46424// CHECK3-NEXT: [[TMP204:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 06425// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP204]], align 46426// CHECK3-NEXT: [[TMP205:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 06427// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[TMP205]], align 46428// CHECK3-NEXT: [[TMP206:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 06429// CHECK3-NEXT: store ptr null, ptr [[TMP206]], align 46430// CHECK3-NEXT: [[TMP207:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 16431// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP207]], align 46432// CHECK3-NEXT: [[TMP208:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 16433// CHECK3-NEXT: store ptr [[VEC]], ptr [[TMP208]], align 46434// CHECK3-NEXT: [[TMP209:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS59]], i32 0, i32 16435// CHECK3-NEXT: store ptr null, ptr [[TMP209]], align 46436// CHECK3-NEXT: [[TMP210:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS57]], i32 0, i32 06437// CHECK3-NEXT: [[TMP211:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS58]], i32 0, i32 06438// CHECK3-NEXT: [[TMP212:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 06439// CHECK3-NEXT: store i32 3, ptr [[TMP212]], align 46440// CHECK3-NEXT: [[TMP213:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 16441// CHECK3-NEXT: store i32 2, ptr [[TMP213]], align 46442// CHECK3-NEXT: [[TMP214:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 26443// CHECK3-NEXT: store ptr [[TMP210]], ptr [[TMP214]], align 46444// CHECK3-NEXT: [[TMP215:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 36445// CHECK3-NEXT: store ptr [[TMP211]], ptr [[TMP215]], align 46446// CHECK3-NEXT: [[TMP216:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 46447// CHECK3-NEXT: store ptr @.offload_sizes.37, ptr [[TMP216]], align 46448// CHECK3-NEXT: [[TMP217:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 56449// CHECK3-NEXT: store ptr @.offload_maptypes.38, ptr [[TMP217]], align 46450// CHECK3-NEXT: [[TMP218:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 66451// CHECK3-NEXT: store ptr null, ptr [[TMP218]], align 46452// CHECK3-NEXT: [[TMP219:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 76453// CHECK3-NEXT: store ptr null, ptr [[TMP219]], align 46454// CHECK3-NEXT: [[TMP220:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 86455// CHECK3-NEXT: store i64 2, ptr [[TMP220]], align 86456// CHECK3-NEXT: [[TMP221:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 96457// CHECK3-NEXT: store i64 0, ptr [[TMP221]], align 86458// CHECK3-NEXT: [[TMP222:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 106459// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP222]], align 46460// CHECK3-NEXT: [[TMP223:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 116461// CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP223]], align 46462// CHECK3-NEXT: [[TMP224:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 126463// CHECK3-NEXT: store i32 0, ptr [[TMP224]], align 46464// CHECK3-NEXT: [[TMP225:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.region_id, ptr [[KERNEL_ARGS61]])6465// CHECK3-NEXT: [[TMP226:%.*]] = icmp ne i32 [[TMP225]], 06466// CHECK3-NEXT: br i1 [[TMP226]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]6467// CHECK3: omp_offload.failed62:6468// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83(ptr [[T_VAR]], ptr [[VEC]]) #[[ATTR2]]6469// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT63]]6470// CHECK3: omp_offload.cont63:6471// CHECK3-NEXT: ret i32 06472//6473//6474// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l326475// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {6476// CHECK3-NEXT: entry:6477// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46478// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46479// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46480// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined, ptr [[TMP0]])6481// CHECK3-NEXT: ret void6482//6483//6484// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined6485// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {6486// CHECK3-NEXT: entry:6487// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46488// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46489// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46490// CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 46491// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46492// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 46493// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46494// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46495// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46496// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46497// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 46498// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 46499// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46500// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46501// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46502// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46503// CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 46504// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46505// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 46506// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46507// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46508// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46509// CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 46510// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6511// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46512// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 16513// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6514// CHECK3: cond.true:6515// CHECK3-NEXT: br label [[COND_END:%.*]]6516// CHECK3: cond.false:6517// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46518// CHECK3-NEXT: br label [[COND_END]]6519// CHECK3: cond.end:6520// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]6521// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46522// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46523// CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 46524// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6525// CHECK3: omp.inner.for.cond:6526// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46527// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46528// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]6529// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6530// CHECK3: omp.inner.for.body:6531// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46532// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 16533// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6534// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 46535// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 46536// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 46537// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]6538// CHECK3-NEXT: store i32 [[ADD3]], ptr [[T_VAR1]], align 46539// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6540// CHECK3: omp.body.continue:6541// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6542// CHECK3: omp.inner.for.inc:6543// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46544// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 16545// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 46546// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]6547// CHECK3: omp.inner.for.end:6548// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6549// CHECK3: omp.loop.exit:6550// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])6551// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 06552// CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP12]], align 46553// CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)6554// CHECK3-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [6555// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]6556// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]6557// CHECK3-NEXT: ]6558// CHECK3: .omp.reduction.case1:6559// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP0]], align 46560// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR1]], align 46561// CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]6562// CHECK3-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 46563// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)6564// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6565// CHECK3: .omp.reduction.case2:6566// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[T_VAR1]], align 46567// CHECK3-NEXT: [[TMP17:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP16]] monotonic, align 46568// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)6569// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6570// CHECK3: .omp.reduction.default:6571// CHECK3-NEXT: ret void6572//6573//6574// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.omp_outlined.omp.reduction.reduction_func6575// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {6576// CHECK3-NEXT: entry:6577// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 46578// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 46579// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 46580// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 46581// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 46582// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 46583// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 06584// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 46585// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 06586// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 46587// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 46588// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 46589// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]6590// CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 46591// CHECK3-NEXT: ret void6592//6593//6594// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l376595// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6596// CHECK3-NEXT: entry:6597// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46598// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46599// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46600// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46601// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46602// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46603// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])6604// CHECK3-NEXT: ret void6605//6606//6607// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined6608// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6609// CHECK3-NEXT: entry:6610// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46611// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46612// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46613// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46614// CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 46615// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46616// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 46617// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46618// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46619// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46620// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46621// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 46622// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 46623// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46624// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46625// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46626// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46627// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46628// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46629// CHECK3-NEXT: store i32 0, ptr [[T_VAR1]], align 46630// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46631// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 46632// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46633// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46634// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46635// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46636// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6637// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46638// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 16639// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6640// CHECK3: cond.true:6641// CHECK3-NEXT: br label [[COND_END:%.*]]6642// CHECK3: cond.false:6643// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46644// CHECK3-NEXT: br label [[COND_END]]6645// CHECK3: cond.end:6646// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6647// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46648// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46649// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46650// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6651// CHECK3: omp.inner.for.cond:6652// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46653// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46654// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6655// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6656// CHECK3: omp.inner.for.body:6657// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46658// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16659// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6660// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 46661// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 46662// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP10]]6663// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX]], align 46664// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR1]], align 46665// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP12]], [[TMP11]]6666// CHECK3-NEXT: store i32 [[SUB]], ptr [[T_VAR1]], align 46667// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6668// CHECK3: omp.body.continue:6669// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6670// CHECK3: omp.inner.for.inc:6671// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46672// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 16673// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 46674// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]6675// CHECK3: omp.inner.for.end:6676// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6677// CHECK3: omp.loop.exit:6678// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6679// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 06680// CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 46681// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)6682// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [6683// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]6684// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]6685// CHECK3-NEXT: ]6686// CHECK3: .omp.reduction.case1:6687// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 46688// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 46689// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]6690// CHECK3-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 46691// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)6692// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6693// CHECK3: .omp.reduction.case2:6694// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 46695// CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP18]] monotonic, align 46696// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)6697// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6698// CHECK3: .omp.reduction.default:6699// CHECK3-NEXT: ret void6700//6701//6702// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l37.omp_outlined.omp.reduction.reduction_func6703// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {6704// CHECK3-NEXT: entry:6705// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 46706// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 46707// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 46708// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 46709// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 46710// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 46711// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 06712// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 46713// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 06714// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 46715// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 46716// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 46717// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]6718// CHECK3-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 46719// CHECK3-NEXT: ret void6720//6721//6722// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l436723// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6724// CHECK3-NEXT: entry:6725// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46726// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46727// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46728// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46729// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46730// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46731// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])6732// CHECK3-NEXT: ret void6733//6734//6735// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined6736// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6737// CHECK3-NEXT: entry:6738// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46739// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46740// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 46741// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46742// CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 46743// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46744// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 46745// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46746// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46747// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46748// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46749// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 46750// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 46751// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 46752// CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 46753// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46754// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46755// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 46756// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46757// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 46758// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46759// CHECK3-NEXT: store i32 1, ptr [[T_VAR1]], align 46760// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46761// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 46762// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46763// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46764// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46765// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46766// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6767// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46768// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 16769// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6770// CHECK3: cond.true:6771// CHECK3-NEXT: br label [[COND_END:%.*]]6772// CHECK3: cond.false:6773// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46774// CHECK3-NEXT: br label [[COND_END]]6775// CHECK3: cond.end:6776// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6777// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46778// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46779// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46780// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6781// CHECK3: omp.inner.for.cond:6782// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46783// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46784// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6785// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6786// CHECK3: omp.inner.for.body:6787// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46788// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16789// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6790// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 46791// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 46792// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 46793// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]6794// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 46795// CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP12]]6796// CHECK3-NEXT: store i32 [[MUL3]], ptr [[T_VAR1]], align 46797// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6798// CHECK3: omp.body.continue:6799// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6800// CHECK3: omp.inner.for.inc:6801// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46802// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 16803// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 46804// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]6805// CHECK3: omp.inner.for.end:6806// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6807// CHECK3: omp.loop.exit:6808// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6809// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 06810// CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP14]], align 46811// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)6812// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [6813// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]6814// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]6815// CHECK3-NEXT: ]6816// CHECK3: .omp.reduction.case1:6817// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 46818// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[T_VAR1]], align 46819// CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], [[TMP17]]6820// CHECK3-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 46821// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)6822// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6823// CHECK3: .omp.reduction.case2:6824// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR1]], align 46825// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 46826// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]6827// CHECK3: atomic_cont:6828// CHECK3-NEXT: [[TMP19:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP24:%.*]], [[ATOMIC_CONT]] ]6829// CHECK3-NEXT: store i32 [[TMP19]], ptr [[_TMP6]], align 46830// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[_TMP6]], align 46831// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR1]], align 46832// CHECK3-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP20]], [[TMP21]]6833// CHECK3-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 46834// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 46835// CHECK3-NEXT: [[TMP23:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP19]], i32 [[TMP22]] monotonic monotonic, align 46836// CHECK3-NEXT: [[TMP24]] = extractvalue { i32, i1 } [[TMP23]], 06837// CHECK3-NEXT: [[TMP25:%.*]] = extractvalue { i32, i1 } [[TMP23]], 16838// CHECK3-NEXT: br i1 [[TMP25]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]6839// CHECK3: atomic_exit:6840// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)6841// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6842// CHECK3: .omp.reduction.default:6843// CHECK3-NEXT: ret void6844//6845//6846// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l43.omp_outlined.omp.reduction.reduction_func6847// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {6848// CHECK3-NEXT: entry:6849// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 46850// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 46851// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 46852// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 46853// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 46854// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 46855// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 06856// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 46857// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 06858// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 46859// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 46860// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 46861// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]6862// CHECK3-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 46863// CHECK3-NEXT: ret void6864//6865//6866// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l496867// CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6868// CHECK3-NEXT: entry:6869// CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 46870// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46871// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 46872// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46873// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 46874// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46875// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])6876// CHECK3-NEXT: ret void6877//6878//6879// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined6880// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {6881// CHECK3-NEXT: entry:6882// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 46883// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 46884// CHECK3-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 46885// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 46886// CHECK3-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 16887// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 46888// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 46889// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 46890// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 46891// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 46892// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 46893// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 46894// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 46895// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 16896// CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 16897// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 46898// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 46899// CHECK3-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 46900// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 46901// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 46902// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 46903// CHECK3-NEXT: store i8 1, ptr [[AND_VAR1]], align 16904// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 46905// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 46906// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 46907// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 46908// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 46909// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 46910// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)6911// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46912// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 16913// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]6914// CHECK3: cond.true:6915// CHECK3-NEXT: br label [[COND_END:%.*]]6916// CHECK3: cond.false:6917// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46918// CHECK3-NEXT: br label [[COND_END]]6919// CHECK3: cond.end:6920// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]6921// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 46922// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 46923// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 46924// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]6925// CHECK3: omp.inner.for.cond:6926// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46927// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 46928// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]6929// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]6930// CHECK3: omp.inner.for.body:6931// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46932// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 16933// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]6934// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 46935// CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[AND_VAR1]], align 16936// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i16937// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]6938// CHECK3: land.rhs:6939// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 46940// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]6941// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 46942// CHECK3-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 26943// CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 06944// CHECK3-NEXT: br label [[LAND_END]]6945// CHECK3: land.end:6946// CHECK3-NEXT: [[TMP13:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ]6947// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i86948// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 16949// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]6950// CHECK3: omp.body.continue:6951// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]6952// CHECK3: omp.inner.for.inc:6953// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 46954// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 16955// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 46956// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]6957// CHECK3: omp.inner.for.end:6958// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]6959// CHECK3: omp.loop.exit:6960// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])6961// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 06962// CHECK3-NEXT: store ptr [[AND_VAR1]], ptr [[TMP15]], align 46963// CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)6964// CHECK3-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [6965// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]6966// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]6967// CHECK3-NEXT: ]6968// CHECK3: .omp.reduction.case1:6969// CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 16970// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i16971// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]6972// CHECK3: land.rhs6:6973// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[AND_VAR1]], align 16974// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i16975// CHECK3-NEXT: br label [[LAND_END8]]6976// CHECK3: land.end8:6977// CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]6978// CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i86979// CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 16980// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)6981// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]6982// CHECK3: .omp.reduction.case2:6983// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[AND_VAR1]], align 16984// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i16985// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 16986// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]6987// CHECK3: atomic_cont:6988// CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LAND_END17:%.*]] ]6989// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i16990// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i86991// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 16992// CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 16993// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i16994// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]6995// CHECK3: land.rhs15:6996// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[AND_VAR1]], align 16997// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i16998// CHECK3-NEXT: br label [[LAND_END17]]6999// CHECK3: land.end17:7000// CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]7001// CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i87002// CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 17003// CHECK3-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 17004// CHECK3-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 17005// CHECK3-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 07006// CHECK3-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 17007// CHECK3-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]7008// CHECK3: atomic_exit:7009// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7010// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7011// CHECK3: .omp.reduction.default:7012// CHECK3-NEXT: ret void7013//7014//7015// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp.reduction.reduction_func7016// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7017// CHECK3-NEXT: entry:7018// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47019// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47020// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47021// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47022// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47023// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47024// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07025// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47026// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07027// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47028// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 17029// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i17030// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]7031// CHECK3: land.rhs:7032// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 17033// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i17034// CHECK3-NEXT: br label [[LAND_END]]7035// CHECK3: land.end:7036// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]7037// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i87038// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 17039// CHECK3-NEXT: ret void7040//7041//7042// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l557043// CHECK3-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7044// CHECK3-NEXT: entry:7045// CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 47046// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47047// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 47048// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47049// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 47050// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47051// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7052// CHECK3-NEXT: ret void7053//7054//7055// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined7056// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7057// CHECK3-NEXT: entry:7058// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47059// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47060// CHECK3-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 47061// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47062// CHECK3-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 17063// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47064// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47065// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47066// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47067// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47068// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47069// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47070// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47071// CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 17072// CHECK3-NEXT: [[_TMP12:%.*]] = alloca i8, align 17073// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47074// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47075// CHECK3-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 47076// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47077// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 47078// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47079// CHECK3-NEXT: store i8 0, ptr [[OR_VAR1]], align 17080// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47081// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47082// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47083// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47084// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47085// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47086// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7087// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47088// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17089// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7090// CHECK3: cond.true:7091// CHECK3-NEXT: br label [[COND_END:%.*]]7092// CHECK3: cond.false:7093// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47094// CHECK3-NEXT: br label [[COND_END]]7095// CHECK3: cond.end:7096// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7097// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47098// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47099// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47100// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7101// CHECK3: omp.inner.for.cond:7102// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47103// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47104// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7105// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7106// CHECK3: omp.inner.for.body:7107// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47108// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17109// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7110// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47111// CHECK3-NEXT: [[TMP10:%.*]] = load i8, ptr [[OR_VAR1]], align 17112// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP10]] to i17113// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]7114// CHECK3: lor.rhs:7115// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47116// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7117// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47118// CHECK3-NEXT: [[REM:%.*]] = srem i32 [[TMP12]], 27119// CHECK3-NEXT: [[CMP3:%.*]] = icmp eq i32 [[REM]], 07120// CHECK3-NEXT: br label [[LOR_END]]7121// CHECK3: lor.end:7122// CHECK3-NEXT: [[TMP13:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ]7123// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP13]] to i87124// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 17125// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7126// CHECK3: omp.body.continue:7127// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7128// CHECK3: omp.inner.for.inc:7129// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47130// CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 17131// CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 47132// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7133// CHECK3: omp.inner.for.end:7134// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7135// CHECK3: omp.loop.exit:7136// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7137// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07138// CHECK3-NEXT: store ptr [[OR_VAR1]], ptr [[TMP15]], align 47139// CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7140// CHECK3-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7141// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7142// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7143// CHECK3-NEXT: ]7144// CHECK3: .omp.reduction.case1:7145// CHECK3-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP0]], align 17146// CHECK3-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP17]] to i17147// CHECK3-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]7148// CHECK3: lor.rhs6:7149// CHECK3-NEXT: [[TMP18:%.*]] = load i8, ptr [[OR_VAR1]], align 17150// CHECK3-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP18]] to i17151// CHECK3-NEXT: br label [[LOR_END8]]7152// CHECK3: lor.end8:7153// CHECK3-NEXT: [[TMP19:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]7154// CHECK3-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP19]] to i87155// CHECK3-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 17156// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7157// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7158// CHECK3: .omp.reduction.case2:7159// CHECK3-NEXT: [[TMP20:%.*]] = load i8, ptr [[OR_VAR1]], align 17160// CHECK3-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP20]] to i17161// CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 17162// CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]7163// CHECK3: atomic_cont:7164// CHECK3-NEXT: [[TMP21:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP27:%.*]], [[LOR_END17:%.*]] ]7165// CHECK3-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP21]] to i17166// CHECK3-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i87167// CHECK3-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 17168// CHECK3-NEXT: [[TMP22:%.*]] = load i8, ptr [[_TMP12]], align 17169// CHECK3-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP22]] to i17170// CHECK3-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]7171// CHECK3: lor.rhs15:7172// CHECK3-NEXT: [[TMP23:%.*]] = load i8, ptr [[OR_VAR1]], align 17173// CHECK3-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP23]] to i17174// CHECK3-NEXT: br label [[LOR_END17]]7175// CHECK3: lor.end17:7176// CHECK3-NEXT: [[TMP24:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]7177// CHECK3-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP24]] to i87178// CHECK3-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 17179// CHECK3-NEXT: [[TMP25:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 17180// CHECK3-NEXT: [[TMP26:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP21]], i8 [[TMP25]] monotonic monotonic, align 17181// CHECK3-NEXT: [[TMP27]] = extractvalue { i8, i1 } [[TMP26]], 07182// CHECK3-NEXT: [[TMP28:%.*]] = extractvalue { i8, i1 } [[TMP26]], 17183// CHECK3-NEXT: br i1 [[TMP28]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]7184// CHECK3: atomic_exit:7185// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7186// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7187// CHECK3: .omp.reduction.default:7188// CHECK3-NEXT: ret void7189//7190//7191// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l55.omp_outlined.omp.reduction.reduction_func7192// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7193// CHECK3-NEXT: entry:7194// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47195// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47196// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47197// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47198// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47199// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47200// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07201// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47202// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07203// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47204// CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 17205// CHECK3-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i17206// CHECK3-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]7207// CHECK3: lor.rhs:7208// CHECK3-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 17209// CHECK3-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i17210// CHECK3-NEXT: br label [[LOR_END]]7211// CHECK3: lor.end:7212// CHECK3-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]7213// CHECK3-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i87214// CHECK3-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 17215// CHECK3-NEXT: ret void7216//7217//7218// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l617219// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7220// CHECK3-NEXT: entry:7221// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47222// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47223// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47224// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47225// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47226// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47227// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7228// CHECK3-NEXT: ret void7229//7230//7231// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined7232// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7233// CHECK3-NEXT: entry:7234// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47235// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47236// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47237// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47238// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 47239// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47240// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47241// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47242// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47243// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47244// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47245// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47246// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47247// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47248// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47249// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47250// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47251// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47252// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47253// CHECK3-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 47254// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47255// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47256// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47257// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47258// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47259// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47260// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7261// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47262// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17263// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7264// CHECK3: cond.true:7265// CHECK3-NEXT: br label [[COND_END:%.*]]7266// CHECK3: cond.false:7267// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47268// CHECK3-NEXT: br label [[COND_END]]7269// CHECK3: cond.end:7270// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7271// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47272// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47273// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47274// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7275// CHECK3: omp.inner.for.cond:7276// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47277// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47278// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7279// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7280// CHECK3: omp.inner.for.body:7281// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47282// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17283// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7284// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47285// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 47286// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47287// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7288// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47289// CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP10]], [[TMP12]]7290// CHECK3-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 47291// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7292// CHECK3: omp.body.continue:7293// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7294// CHECK3: omp.inner.for.inc:7295// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47296// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 17297// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 47298// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7299// CHECK3: omp.inner.for.end:7300// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7301// CHECK3: omp.loop.exit:7302// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7303// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07304// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 47305// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7306// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7307// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7308// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7309// CHECK3-NEXT: ]7310// CHECK3: .omp.reduction.case1:7311// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 47312// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 47313// CHECK3-NEXT: [[AND4:%.*]] = and i32 [[TMP16]], [[TMP17]]7314// CHECK3-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 47315// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7316// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7317// CHECK3: .omp.reduction.case2:7318// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 47319// CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP18]] monotonic, align 47320// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7321// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7322// CHECK3: .omp.reduction.default:7323// CHECK3-NEXT: ret void7324//7325//7326// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l61.omp_outlined.omp.reduction.reduction_func7327// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7328// CHECK3-NEXT: entry:7329// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47330// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47331// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47332// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47333// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47334// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47335// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07336// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47337// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07338// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47339// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47340// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 47341// CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]]7342// CHECK3-NEXT: store i32 [[AND]], ptr [[TMP7]], align 47343// CHECK3-NEXT: ret void7344//7345//7346// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l667347// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7348// CHECK3-NEXT: entry:7349// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47350// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47351// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47352// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47353// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47354// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47355// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7356// CHECK3-NEXT: ret void7357//7358//7359// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined7360// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7361// CHECK3-NEXT: entry:7362// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47363// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47364// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47365// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47366// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 47367// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47368// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47369// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47370// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47371// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47372// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47373// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47374// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47375// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47376// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47377// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47378// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47379// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47380// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47381// CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 47382// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47383// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47384// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47385// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47386// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47387// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47388// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7389// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47390// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17391// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7392// CHECK3: cond.true:7393// CHECK3-NEXT: br label [[COND_END:%.*]]7394// CHECK3: cond.false:7395// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47396// CHECK3-NEXT: br label [[COND_END]]7397// CHECK3: cond.end:7398// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7399// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47400// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47401// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47402// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7403// CHECK3: omp.inner.for.cond:7404// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47405// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47406// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7407// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7408// CHECK3: omp.inner.for.body:7409// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47410// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17411// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7412// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47413// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 47414// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47415// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7416// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47417// CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP10]], [[TMP12]]7418// CHECK3-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 47419// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7420// CHECK3: omp.body.continue:7421// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7422// CHECK3: omp.inner.for.inc:7423// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47424// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 17425// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 47426// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7427// CHECK3: omp.inner.for.end:7428// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7429// CHECK3: omp.loop.exit:7430// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7431// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07432// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 47433// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7434// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7435// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7436// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7437// CHECK3-NEXT: ]7438// CHECK3: .omp.reduction.case1:7439// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 47440// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 47441// CHECK3-NEXT: [[OR4:%.*]] = or i32 [[TMP16]], [[TMP17]]7442// CHECK3-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 47443// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7444// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7445// CHECK3: .omp.reduction.case2:7446// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 47447// CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP18]] monotonic, align 47448// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7449// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7450// CHECK3: .omp.reduction.default:7451// CHECK3-NEXT: ret void7452//7453//7454// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l66.omp_outlined.omp.reduction.reduction_func7455// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7456// CHECK3-NEXT: entry:7457// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47458// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47459// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47460// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47461// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47462// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47463// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07464// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47465// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07466// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47467// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47468// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 47469// CHECK3-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]]7470// CHECK3-NEXT: store i32 [[OR]], ptr [[TMP7]], align 47471// CHECK3-NEXT: ret void7472//7473//7474// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l717475// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7476// CHECK3-NEXT: entry:7477// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47478// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47479// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47480// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47481// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47482// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47483// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7484// CHECK3-NEXT: ret void7485//7486//7487// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined7488// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7489// CHECK3-NEXT: entry:7490// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47491// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47492// CHECK3-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 47493// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47494// CHECK3-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 47495// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47496// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47497// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47498// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47499// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47500// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47501// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47502// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47503// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47504// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47505// CHECK3-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 47506// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47507// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 47508// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47509// CHECK3-NEXT: store i32 0, ptr [[BIT_VAR1]], align 47510// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47511// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47512// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47513// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47514// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47515// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47516// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7517// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47518// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17519// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7520// CHECK3: cond.true:7521// CHECK3-NEXT: br label [[COND_END:%.*]]7522// CHECK3: cond.false:7523// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47524// CHECK3-NEXT: br label [[COND_END]]7525// CHECK3: cond.end:7526// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7527// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47528// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47529// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47530// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7531// CHECK3: omp.inner.for.cond:7532// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47533// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47534// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7535// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7536// CHECK3: omp.inner.for.body:7537// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47538// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17539// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7540// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47541// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[BIT_VAR1]], align 47542// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47543// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7544// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47545// CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP10]], [[TMP12]]7546// CHECK3-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 47547// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7548// CHECK3: omp.body.continue:7549// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7550// CHECK3: omp.inner.for.inc:7551// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47552// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP13]], 17553// CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 47554// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7555// CHECK3: omp.inner.for.end:7556// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7557// CHECK3: omp.loop.exit:7558// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7559// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07560// CHECK3-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP14]], align 47561// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7562// CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7563// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7564// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7565// CHECK3-NEXT: ]7566// CHECK3: .omp.reduction.case1:7567// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP0]], align 47568// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 47569// CHECK3-NEXT: [[XOR4:%.*]] = xor i32 [[TMP16]], [[TMP17]]7570// CHECK3-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 47571// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7572// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7573// CHECK3: .omp.reduction.case2:7574// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[BIT_VAR1]], align 47575// CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP18]] monotonic, align 47576// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7577// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7578// CHECK3: .omp.reduction.default:7579// CHECK3-NEXT: ret void7580//7581//7582// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l71.omp_outlined.omp.reduction.reduction_func7583// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7584// CHECK3-NEXT: entry:7585// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47586// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47587// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47588// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47589// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47590// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47591// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07592// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47593// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07594// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47595// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47596// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 47597// CHECK3-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]]7598// CHECK3-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 47599// CHECK3-NEXT: ret void7600//7601//7602// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l777603// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7604// CHECK3-NEXT: entry:7605// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 47606// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47607// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 47608// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47609// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 47610// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47611// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7612// CHECK3-NEXT: ret void7613//7614//7615// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined7616// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7617// CHECK3-NEXT: entry:7618// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47619// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47620// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 47621// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47622// CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 47623// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47624// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47625// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47626// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47627// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47628// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47629// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47630// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47631// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47632// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47633// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 47634// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47635// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 47636// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47637// CHECK3-NEXT: store i32 -2147483648, ptr [[T_VAR1]], align 47638// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47639// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47640// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47641// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47642// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47643// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47644// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7645// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47646// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17647// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7648// CHECK3: cond.true:7649// CHECK3-NEXT: br label [[COND_END:%.*]]7650// CHECK3: cond.false:7651// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47652// CHECK3-NEXT: br label [[COND_END]]7653// CHECK3: cond.end:7654// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7655// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47656// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47657// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47658// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7659// CHECK3: omp.inner.for.cond:7660// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47661// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47662// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7663// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7664// CHECK3: omp.inner.for.body:7665// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47666// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17667// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7668// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47669// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 47670// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47671// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7672// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47673// CHECK3-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP10]], [[TMP12]]7674// CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]7675// CHECK3: cond.true4:7676// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 47677// CHECK3-NEXT: br label [[COND_END7:%.*]]7678// CHECK3: cond.false5:7679// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 47680// CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP14]]7681// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX6]], align 47682// CHECK3-NEXT: br label [[COND_END7]]7683// CHECK3: cond.end7:7684// CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ]7685// CHECK3-NEXT: store i32 [[COND8]], ptr [[T_VAR1]], align 47686// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7687// CHECK3: omp.body.continue:7688// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7689// CHECK3: omp.inner.for.inc:7690// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47691// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 17692// CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 47693// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7694// CHECK3: omp.inner.for.end:7695// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7696// CHECK3: omp.loop.exit:7697// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7698// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07699// CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 47700// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7701// CHECK3-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7702// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7703// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7704// CHECK3-NEXT: ]7705// CHECK3: .omp.reduction.case1:7706// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 47707// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 47708// CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP19]], [[TMP20]]7709// CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]7710// CHECK3: cond.true11:7711// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 47712// CHECK3-NEXT: br label [[COND_END13:%.*]]7713// CHECK3: cond.false12:7714// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 47715// CHECK3-NEXT: br label [[COND_END13]]7716// CHECK3: cond.end13:7717// CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE11]] ], [ [[TMP22]], [[COND_FALSE12]] ]7718// CHECK3-NEXT: store i32 [[COND14]], ptr [[TMP0]], align 47719// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7720// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7721// CHECK3: .omp.reduction.case2:7722// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 47723// CHECK3-NEXT: [[TMP24:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP23]] monotonic, align 47724// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7725// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7726// CHECK3: .omp.reduction.default:7727// CHECK3-NEXT: ret void7728//7729//7730// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l77.omp_outlined.omp.reduction.reduction_func7731// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7732// CHECK3-NEXT: entry:7733// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47734// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47735// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47736// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47737// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47738// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47739// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07740// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47741// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07742// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47743// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47744// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 47745// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]7746// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7747// CHECK3: cond.true:7748// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 47749// CHECK3-NEXT: br label [[COND_END:%.*]]7750// CHECK3: cond.false:7751// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 47752// CHECK3-NEXT: br label [[COND_END]]7753// CHECK3: cond.end:7754// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]7755// CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 47756// CHECK3-NEXT: ret void7757//7758//7759// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l837760// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7761// CHECK3-NEXT: entry:7762// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 47763// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47764// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 47765// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47766// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 47767// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47768// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined, ptr [[TMP0]], ptr [[TMP1]])7769// CHECK3-NEXT: ret void7770//7771//7772// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined7773// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]]) #[[ATTR1]] {7774// CHECK3-NEXT: entry:7775// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 47776// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 47777// CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 47778// CHECK3-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 47779// CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 47780// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47781// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 47782// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47783// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47784// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47785// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47786// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 47787// CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 47788// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 47789// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 47790// CHECK3-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 47791// CHECK3-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 47792// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 47793// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 47794// CHECK3-NEXT: store i32 2147483647, ptr [[T_VAR1]], align 47795// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47796// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47797// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47798// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47799// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 47800// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 47801// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7802// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47803// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 17804// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7805// CHECK3: cond.true:7806// CHECK3-NEXT: br label [[COND_END:%.*]]7807// CHECK3: cond.false:7808// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47809// CHECK3-NEXT: br label [[COND_END]]7810// CHECK3: cond.end:7811// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]7812// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47813// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47814// CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 47815// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7816// CHECK3: omp.inner.for.cond:7817// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47818// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47819// CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]7820// CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]7821// CHECK3: omp.inner.for.body:7822// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47823// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 17824// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]7825// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 47826// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[T_VAR1]], align 47827// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 47828// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP11]]7829// CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 47830// CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP12]]7831// CHECK3-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]7832// CHECK3: cond.true4:7833// CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 47834// CHECK3-NEXT: br label [[COND_END7:%.*]]7835// CHECK3: cond.false5:7836// CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[I]], align 47837// CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP1]], i32 0, i32 [[TMP14]]7838// CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[ARRAYIDX6]], align 47839// CHECK3-NEXT: br label [[COND_END7]]7840// CHECK3: cond.end7:7841// CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE4]] ], [ [[TMP15]], [[COND_FALSE5]] ]7842// CHECK3-NEXT: store i32 [[COND8]], ptr [[T_VAR1]], align 47843// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]7844// CHECK3: omp.body.continue:7845// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]7846// CHECK3: omp.inner.for.inc:7847// CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47848// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 17849// CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 47850// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]7851// CHECK3: omp.inner.for.end:7852// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]7853// CHECK3: omp.loop.exit:7854// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])7855// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 07856// CHECK3-NEXT: store ptr [[T_VAR1]], ptr [[TMP17]], align 47857// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP3]], i32 1, i32 4, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)7858// CHECK3-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [7859// CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]7860// CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]7861// CHECK3-NEXT: ]7862// CHECK3: .omp.reduction.case1:7863// CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 47864// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[T_VAR1]], align 47865// CHECK3-NEXT: [[CMP10:%.*]] = icmp slt i32 [[TMP19]], [[TMP20]]7866// CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]7867// CHECK3: cond.true11:7868// CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP0]], align 47869// CHECK3-NEXT: br label [[COND_END13:%.*]]7870// CHECK3: cond.false12:7871// CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[T_VAR1]], align 47872// CHECK3-NEXT: br label [[COND_END13]]7873// CHECK3: cond.end13:7874// CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP21]], [[COND_TRUE11]] ], [ [[TMP22]], [[COND_FALSE12]] ]7875// CHECK3-NEXT: store i32 [[COND14]], ptr [[TMP0]], align 47876// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7877// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7878// CHECK3: .omp.reduction.case2:7879// CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 47880// CHECK3-NEXT: [[TMP24:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP23]] monotonic, align 47881// CHECK3-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)7882// CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]7883// CHECK3: .omp.reduction.default:7884// CHECK3-NEXT: ret void7885//7886//7887// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l83.omp_outlined.omp.reduction.reduction_func7888// CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {7889// CHECK3-NEXT: entry:7890// CHECK3-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 47891// CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 47892// CHECK3-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 47893// CHECK3-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 47894// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 47895// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 47896// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i32 0, i32 07897// CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 47898// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i32 0, i32 07899// CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 47900// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 47901// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 47902// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]]7903// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7904// CHECK3: cond.true:7905// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 47906// CHECK3-NEXT: br label [[COND_END:%.*]]7907// CHECK3: cond.false:7908// CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 47909// CHECK3-NEXT: br label [[COND_END]]7910// CHECK3: cond.end:7911// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]7912// CHECK3-NEXT: store i32 [[COND]], ptr [[TMP7]], align 47913// CHECK3-NEXT: ret void7914//7915//7916// CHECK9-LABEL: define {{[^@]+}}@main7917// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {7918// CHECK9-NEXT: entry:7919// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 47920// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 17921// CHECK9-NEXT: [[REF_TMP1:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 17922// CHECK9-NEXT: [[REF_TMP2:%.*]] = alloca [[CLASS_ANON_2:%.*]], align 17923// CHECK9-NEXT: [[REF_TMP3:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 17924// CHECK9-NEXT: [[REF_TMP4:%.*]] = alloca [[CLASS_ANON_6:%.*]], align 17925// CHECK9-NEXT: [[REF_TMP5:%.*]] = alloca [[CLASS_ANON_8:%.*]], align 17926// CHECK9-NEXT: [[REF_TMP6:%.*]] = alloca [[CLASS_ANON_10:%.*]], align 17927// CHECK9-NEXT: [[REF_TMP7:%.*]] = alloca [[CLASS_ANON_12:%.*]], align 17928// CHECK9-NEXT: [[REF_TMP8:%.*]] = alloca [[CLASS_ANON_14:%.*]], align 17929// CHECK9-NEXT: [[REF_TMP9:%.*]] = alloca [[CLASS_ANON_16:%.*]], align 17930// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 47931// CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])7932// CHECK9-NEXT: call void @"_ZZ4mainENK3$_1clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP1]])7933// CHECK9-NEXT: call void @"_ZZ4mainENK3$_2clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP2]])7934// CHECK9-NEXT: call void @"_ZZ4mainENK3$_3clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP3]])7935// CHECK9-NEXT: call void @"_ZZ4mainENK3$_4clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP4]])7936// CHECK9-NEXT: call void @"_ZZ4mainENK3$_5clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP5]])7937// CHECK9-NEXT: call void @"_ZZ4mainENK3$_6clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP6]])7938// CHECK9-NEXT: call void @"_ZZ4mainENK3$_7clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP7]])7939// CHECK9-NEXT: call void @"_ZZ4mainENK3$_8clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP8]])7940// CHECK9-NEXT: call void @"_ZZ4mainENK3$_9clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP9]])7941// CHECK9-NEXT: ret i32 07942//7943//7944// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l967945// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {7946// CHECK9-NEXT: entry:7947// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 87948// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 87949// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 87950// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined, ptr [[TMP0]])7951// CHECK9-NEXT: ret void7952//7953//7954// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined7955// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {7956// CHECK9-NEXT: entry:7957// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 87958// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 87959// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 87960// CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 47961// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 47962// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 47963// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 47964// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 47965// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 47966// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 47967// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 47968// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_18:%.*]], align 87969// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 87970// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 87971// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 87972// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 87973// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 87974// CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 47975// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 47976// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 47977// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 47978// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 47979// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 87980// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 47981// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)7982// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47983// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 17984// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]7985// CHECK9: cond.true:7986// CHECK9-NEXT: br label [[COND_END:%.*]]7987// CHECK9: cond.false:7988// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47989// CHECK9-NEXT: br label [[COND_END]]7990// CHECK9: cond.end:7991// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]7992// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 47993// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 47994// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 47995// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]7996// CHECK9: omp.inner.for.cond:7997// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 47998// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 47999// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8000// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8001// CHECK9: omp.inner.for.body:8002// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48003// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18004// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8005// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48006// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 48007// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 48008// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], [[TMP9]]8009// CHECK9-NEXT: store i32 [[ADD3]], ptr [[SIVAR1]], align 48010// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_18]], ptr [[REF_TMP]], i32 0, i32 08011// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 88012// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8013// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8014// CHECK9: omp.body.continue:8015// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8016// CHECK9: omp.inner.for.inc:8017// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48018// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 18019// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 48020// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8021// CHECK9: omp.inner.for.end:8022// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8023// CHECK9: omp.loop.exit:8024// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8025// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08026// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 88027// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8028// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8029// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8030// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8031// CHECK9-NEXT: ]8032// CHECK9: .omp.reduction.case1:8033// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 48034// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 48035// CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]8036// CHECK9-NEXT: store i32 [[ADD5]], ptr [[TMP0]], align 48037// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8038// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8039// CHECK9: .omp.reduction.case2:8040// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 48041// CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 48042// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8043// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8044// CHECK9: .omp.reduction.default:8045// CHECK9-NEXT: ret void8046//8047//8048// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l96.omp_outlined.omp.reduction.reduction_func8049// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {8050// CHECK9-NEXT: entry:8051// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88052// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88053// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88054// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88055// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88056// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88057// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08058// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88059// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08060// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88061// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48062// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 48063// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]8064// CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 48065// CHECK9-NEXT: ret void8066//8067//8068// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1128069// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {8070// CHECK9-NEXT: entry:8071// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 88072// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 88073// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 88074// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined, ptr [[TMP0]])8075// CHECK9-NEXT: ret void8076//8077//8078// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined8079// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {8080// CHECK9-NEXT: entry:8081// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88082// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88083// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 88084// CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 48085// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48086// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48087// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48088// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48089// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48090// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48091// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48092// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_19:%.*]], align 88093// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88094// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88095// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88096// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 88097// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 88098// CHECK9-NEXT: store i32 0, ptr [[SIVAR1]], align 48099// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48100// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48101// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48102// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48103// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88104// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48105// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8106// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48107// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18108// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8109// CHECK9: cond.true:8110// CHECK9-NEXT: br label [[COND_END:%.*]]8111// CHECK9: cond.false:8112// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48113// CHECK9-NEXT: br label [[COND_END]]8114// CHECK9: cond.end:8115// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8116// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48117// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48118// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48119// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8120// CHECK9: omp.inner.for.cond:8121// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48122// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48123// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8124// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8125// CHECK9: omp.inner.for.body:8126// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48127// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18128// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8129// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48130// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 48131// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 48132// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], [[TMP9]]8133// CHECK9-NEXT: store i32 [[SUB]], ptr [[SIVAR1]], align 48134// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_19]], ptr [[REF_TMP]], i32 0, i32 08135// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 88136// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_1clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8137// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8138// CHECK9: omp.body.continue:8139// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8140// CHECK9: omp.inner.for.inc:8141// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48142// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 18143// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 48144// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8145// CHECK9: omp.inner.for.end:8146// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8147// CHECK9: omp.loop.exit:8148// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8149// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08150// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 88151// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8152// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8153// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8154// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8155// CHECK9-NEXT: ]8156// CHECK9: .omp.reduction.case1:8157// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 48158// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 48159// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]8160// CHECK9-NEXT: store i32 [[ADD4]], ptr [[TMP0]], align 48161// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8162// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8163// CHECK9: .omp.reduction.case2:8164// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 48165// CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP17]] monotonic, align 48166// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8167// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8168// CHECK9: .omp.reduction.default:8169// CHECK9-NEXT: ret void8170//8171//8172// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l112.omp_outlined.omp.reduction.reduction_func8173// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8174// CHECK9-NEXT: entry:8175// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88176// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88177// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88178// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88179// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88180// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88181// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08182// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88183// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08184// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88185// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48186// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 48187// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]8188// CHECK9-NEXT: store i32 [[ADD]], ptr [[TMP7]], align 48189// CHECK9-NEXT: ret void8190//8191//8192// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1228193// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {8194// CHECK9-NEXT: entry:8195// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 88196// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 88197// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 88198// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined, ptr [[TMP0]])8199// CHECK9-NEXT: ret void8200//8201//8202// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined8203// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {8204// CHECK9-NEXT: entry:8205// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88206// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88207// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca ptr, align 88208// CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 48209// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48210// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48211// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48212// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48213// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48214// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48215// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48216// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_20:%.*]], align 88217// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88218// CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 48219// CHECK9-NEXT: [[_TMP6:%.*]] = alloca i32, align 48220// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88221// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88222// CHECK9-NEXT: store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 88223// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 88224// CHECK9-NEXT: store i32 1, ptr [[SIVAR1]], align 48225// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48226// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48227// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48228// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48229// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88230// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48231// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8232// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48233// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18234// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8235// CHECK9: cond.true:8236// CHECK9-NEXT: br label [[COND_END:%.*]]8237// CHECK9: cond.false:8238// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48239// CHECK9-NEXT: br label [[COND_END]]8240// CHECK9: cond.end:8241// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8242// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48243// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48244// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48245// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8246// CHECK9: omp.inner.for.cond:8247// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48248// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48249// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8250// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8251// CHECK9: omp.inner.for.body:8252// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48253// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18254// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8255// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48256// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 48257// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[SIVAR1]], align 48258// CHECK9-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP10]], [[TMP9]]8259// CHECK9-NEXT: store i32 [[MUL3]], ptr [[SIVAR1]], align 48260// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_20]], ptr [[REF_TMP]], i32 0, i32 08261// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP11]], align 88262// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_2clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8263// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8264// CHECK9: omp.body.continue:8265// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8266// CHECK9: omp.inner.for.inc:8267// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48268// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], 18269// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 48270// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8271// CHECK9: omp.inner.for.end:8272// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8273// CHECK9: omp.loop.exit:8274// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8275// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08276// CHECK9-NEXT: store ptr [[SIVAR1]], ptr [[TMP13]], align 88277// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8278// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8279// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8280// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8281// CHECK9-NEXT: ]8282// CHECK9: .omp.reduction.case1:8283// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 48284// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[SIVAR1]], align 48285// CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], [[TMP16]]8286// CHECK9-NEXT: store i32 [[MUL5]], ptr [[TMP0]], align 48287// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8288// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8289// CHECK9: .omp.reduction.case2:8290// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[SIVAR1]], align 48291// CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP0]] monotonic, align 48292// CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]]8293// CHECK9: atomic_cont:8294// CHECK9-NEXT: [[TMP18:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP23:%.*]], [[ATOMIC_CONT]] ]8295// CHECK9-NEXT: store i32 [[TMP18]], ptr [[_TMP6]], align 48296// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[_TMP6]], align 48297// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[SIVAR1]], align 48298// CHECK9-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP19]], [[TMP20]]8299// CHECK9-NEXT: store i32 [[MUL7]], ptr [[ATOMIC_TEMP]], align 48300// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 48301// CHECK9-NEXT: [[TMP22:%.*]] = cmpxchg ptr [[TMP0]], i32 [[TMP18]], i32 [[TMP21]] monotonic monotonic, align 48302// CHECK9-NEXT: [[TMP23]] = extractvalue { i32, i1 } [[TMP22]], 08303// CHECK9-NEXT: [[TMP24:%.*]] = extractvalue { i32, i1 } [[TMP22]], 18304// CHECK9-NEXT: br i1 [[TMP24]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]8305// CHECK9: atomic_exit:8306// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8307// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8308// CHECK9: .omp.reduction.default:8309// CHECK9-NEXT: ret void8310//8311//8312// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l122.omp_outlined.omp.reduction.reduction_func8313// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8314// CHECK9-NEXT: entry:8315// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88316// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88317// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88318// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88319// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88320// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88321// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08322// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88323// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08324// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88325// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48326// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 48327// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]8328// CHECK9-NEXT: store i32 [[MUL]], ptr [[TMP7]], align 48329// CHECK9-NEXT: ret void8330//8331//8332// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1338333// CHECK9-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8334// CHECK9-NEXT: entry:8335// CHECK9-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 88336// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88337// CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 88338// CHECK9-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 88339// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88340// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 88341// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 48342// CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 48343// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 88344// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])8345// CHECK9-NEXT: ret void8346//8347//8348// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined8349// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[AND_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8350// CHECK9-NEXT: entry:8351// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88352// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88353// CHECK9-NEXT: [[AND_VAR_ADDR:%.*]] = alloca ptr, align 88354// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88355// CHECK9-NEXT: [[AND_VAR1:%.*]] = alloca i8, align 18356// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48357// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48358// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48359// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48360// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48361// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48362// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48363// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_21:%.*]], align 88364// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88365// CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 18366// CHECK9-NEXT: [[_TMP12:%.*]] = alloca i8, align 18367// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88368// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88369// CHECK9-NEXT: store ptr [[AND_VAR]], ptr [[AND_VAR_ADDR]], align 88370// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88371// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AND_VAR_ADDR]], align 88372// CHECK9-NEXT: store i8 1, ptr [[AND_VAR1]], align 18373// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48374// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48375// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48376// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48377// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88378// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48379// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8380// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48381// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18382// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8383// CHECK9: cond.true:8384// CHECK9-NEXT: br label [[COND_END:%.*]]8385// CHECK9: cond.false:8386// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48387// CHECK9-NEXT: br label [[COND_END]]8388// CHECK9: cond.end:8389// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8390// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48391// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48392// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48393// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8394// CHECK9: omp.inner.for.cond:8395// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48396// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48397// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8398// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8399// CHECK9: omp.inner.for.body:8400// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48401// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18402// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8403// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48404// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[AND_VAR1]], align 18405// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i18406// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]8407// CHECK9: land.rhs:8408// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 48409// CHECK9-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 08410// CHECK9-NEXT: br label [[LAND_END]]8411// CHECK9: land.end:8412// CHECK9-NEXT: [[TMP11:%.*]] = phi i1 [ false, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LAND_RHS]] ]8413// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i88414// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[AND_VAR1]], align 18415// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_21]], ptr [[REF_TMP]], i32 0, i32 08416// CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP12]], align 88417// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_3clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8418// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8419// CHECK9: omp.body.continue:8420// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8421// CHECK9: omp.inner.for.inc:8422// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48423// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 18424// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 48425// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8426// CHECK9: omp.inner.for.end:8427// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8428// CHECK9: omp.loop.exit:8429// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8430// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08431// CHECK9-NEXT: store ptr [[AND_VAR1]], ptr [[TMP14]], align 88432// CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8433// CHECK9-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8434// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8435// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8436// CHECK9-NEXT: ]8437// CHECK9: .omp.reduction.case1:8438// CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 18439// CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i18440// CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LAND_RHS6:%.*]], label [[LAND_END8:%.*]]8441// CHECK9: land.rhs6:8442// CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[AND_VAR1]], align 18443// CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i18444// CHECK9-NEXT: br label [[LAND_END8]]8445// CHECK9: land.end8:8446// CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LAND_RHS6]] ]8447// CHECK9-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP18]] to i88448// CHECK9-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 18449// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8450// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8451// CHECK9: .omp.reduction.case2:8452// CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[AND_VAR1]], align 18453// CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i18454// CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 18455// CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]]8456// CHECK9: atomic_cont:8457// CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LAND_END17:%.*]] ]8458// CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i18459// CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i88460// CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 18461// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 18462// CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i18463// CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LAND_RHS15:%.*]], label [[LAND_END17]]8464// CHECK9: land.rhs15:8465// CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[AND_VAR1]], align 18466// CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i18467// CHECK9-NEXT: br label [[LAND_END17]]8468// CHECK9: land.end17:8469// CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ false, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LAND_RHS15]] ]8470// CHECK9-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP23]] to i88471// CHECK9-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 18472// CHECK9-NEXT: [[TMP24:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 18473// CHECK9-NEXT: [[TMP25:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP20]], i8 [[TMP24]] monotonic monotonic, align 18474// CHECK9-NEXT: [[TMP26]] = extractvalue { i8, i1 } [[TMP25]], 08475// CHECK9-NEXT: [[TMP27:%.*]] = extractvalue { i8, i1 } [[TMP25]], 18476// CHECK9-NEXT: br i1 [[TMP27]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]8477// CHECK9: atomic_exit:8478// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8479// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8480// CHECK9: .omp.reduction.default:8481// CHECK9-NEXT: ret void8482//8483//8484// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l133.omp_outlined.omp.reduction.reduction_func8485// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8486// CHECK9-NEXT: entry:8487// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88488// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88489// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88490// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88491// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88492// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88493// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08494// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88495// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08496// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88497// CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 18498// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i18499// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]8500// CHECK9: land.rhs:8501// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 18502// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i18503// CHECK9-NEXT: br label [[LAND_END]]8504// CHECK9: land.end:8505// CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LAND_RHS]] ]8506// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i88507// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 18508// CHECK9-NEXT: ret void8509//8510//8511// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1448512// CHECK9-SAME: (ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8513// CHECK9-NEXT: entry:8514// CHECK9-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 88515// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88516// CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 88517// CHECK9-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 88518// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88519// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 88520// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 48521// CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 48522// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 88523// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])8524// CHECK9-NEXT: ret void8525//8526//8527// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined8528// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[OR_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8529// CHECK9-NEXT: entry:8530// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88531// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88532// CHECK9-NEXT: [[OR_VAR_ADDR:%.*]] = alloca ptr, align 88533// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88534// CHECK9-NEXT: [[OR_VAR1:%.*]] = alloca i8, align 18535// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48536// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48537// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48538// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48539// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48540// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48541// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48542// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_22:%.*]], align 88543// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88544// CHECK9-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 18545// CHECK9-NEXT: [[_TMP12:%.*]] = alloca i8, align 18546// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88547// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88548// CHECK9-NEXT: store ptr [[OR_VAR]], ptr [[OR_VAR_ADDR]], align 88549// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88550// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[OR_VAR_ADDR]], align 88551// CHECK9-NEXT: store i8 0, ptr [[OR_VAR1]], align 18552// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48553// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48554// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48555// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48556// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88557// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48558// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8559// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48560// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18561// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8562// CHECK9: cond.true:8563// CHECK9-NEXT: br label [[COND_END:%.*]]8564// CHECK9: cond.false:8565// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48566// CHECK9-NEXT: br label [[COND_END]]8567// CHECK9: cond.end:8568// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8569// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48570// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48571// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48572// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8573// CHECK9: omp.inner.for.cond:8574// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48575// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48576// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8577// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8578// CHECK9: omp.inner.for.body:8579// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48580// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18581// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8582// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48583// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[OR_VAR1]], align 18584// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP9]] to i18585// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]8586// CHECK9: lor.rhs:8587// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 48588// CHECK9-NEXT: [[CMP3:%.*]] = icmp eq i32 [[TMP10]], 08589// CHECK9-NEXT: br label [[LOR_END]]8590// CHECK9: lor.end:8591// CHECK9-NEXT: [[TMP11:%.*]] = phi i1 [ true, [[OMP_INNER_FOR_BODY]] ], [ [[CMP3]], [[LOR_RHS]] ]8592// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP11]] to i88593// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[OR_VAR1]], align 18594// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_22]], ptr [[REF_TMP]], i32 0, i32 08595// CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP12]], align 88596// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_4clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8597// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8598// CHECK9: omp.body.continue:8599// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8600// CHECK9: omp.inner.for.inc:8601// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48602// CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 18603// CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 48604// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8605// CHECK9: omp.inner.for.end:8606// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8607// CHECK9: omp.loop.exit:8608// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8609// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08610// CHECK9-NEXT: store ptr [[OR_VAR1]], ptr [[TMP14]], align 88611// CHECK9-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8612// CHECK9-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8613// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8614// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8615// CHECK9-NEXT: ]8616// CHECK9: .omp.reduction.case1:8617// CHECK9-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP0]], align 18618// CHECK9-NEXT: [[LOADEDV5:%.*]] = trunc i8 [[TMP16]] to i18619// CHECK9-NEXT: br i1 [[LOADEDV5]], label [[LOR_END8:%.*]], label [[LOR_RHS6:%.*]]8620// CHECK9: lor.rhs6:8621// CHECK9-NEXT: [[TMP17:%.*]] = load i8, ptr [[OR_VAR1]], align 18622// CHECK9-NEXT: [[LOADEDV7:%.*]] = trunc i8 [[TMP17]] to i18623// CHECK9-NEXT: br label [[LOR_END8]]8624// CHECK9: lor.end8:8625// CHECK9-NEXT: [[TMP18:%.*]] = phi i1 [ true, [[DOTOMP_REDUCTION_CASE1]] ], [ [[LOADEDV7]], [[LOR_RHS6]] ]8626// CHECK9-NEXT: [[STOREDV9:%.*]] = zext i1 [[TMP18]] to i88627// CHECK9-NEXT: store i8 [[STOREDV9]], ptr [[TMP0]], align 18628// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8629// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8630// CHECK9: .omp.reduction.case2:8631// CHECK9-NEXT: [[TMP19:%.*]] = load i8, ptr [[OR_VAR1]], align 18632// CHECK9-NEXT: [[LOADEDV10:%.*]] = trunc i8 [[TMP19]] to i18633// CHECK9-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, ptr [[TMP0]] monotonic, align 18634// CHECK9-NEXT: br label [[ATOMIC_CONT:%.*]]8635// CHECK9: atomic_cont:8636// CHECK9-NEXT: [[TMP20:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP26:%.*]], [[LOR_END17:%.*]] ]8637// CHECK9-NEXT: [[LOADEDV11:%.*]] = trunc i8 [[TMP20]] to i18638// CHECK9-NEXT: [[STOREDV13:%.*]] = zext i1 [[LOADEDV11]] to i88639// CHECK9-NEXT: store i8 [[STOREDV13]], ptr [[_TMP12]], align 18640// CHECK9-NEXT: [[TMP21:%.*]] = load i8, ptr [[_TMP12]], align 18641// CHECK9-NEXT: [[LOADEDV14:%.*]] = trunc i8 [[TMP21]] to i18642// CHECK9-NEXT: br i1 [[LOADEDV14]], label [[LOR_END17]], label [[LOR_RHS15:%.*]]8643// CHECK9: lor.rhs15:8644// CHECK9-NEXT: [[TMP22:%.*]] = load i8, ptr [[OR_VAR1]], align 18645// CHECK9-NEXT: [[LOADEDV16:%.*]] = trunc i8 [[TMP22]] to i18646// CHECK9-NEXT: br label [[LOR_END17]]8647// CHECK9: lor.end17:8648// CHECK9-NEXT: [[TMP23:%.*]] = phi i1 [ true, [[ATOMIC_CONT]] ], [ [[LOADEDV16]], [[LOR_RHS15]] ]8649// CHECK9-NEXT: [[STOREDV18:%.*]] = zext i1 [[TMP23]] to i88650// CHECK9-NEXT: store i8 [[STOREDV18]], ptr [[ATOMIC_TEMP]], align 18651// CHECK9-NEXT: [[TMP24:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 18652// CHECK9-NEXT: [[TMP25:%.*]] = cmpxchg ptr [[TMP0]], i8 [[TMP20]], i8 [[TMP24]] monotonic monotonic, align 18653// CHECK9-NEXT: [[TMP26]] = extractvalue { i8, i1 } [[TMP25]], 08654// CHECK9-NEXT: [[TMP27:%.*]] = extractvalue { i8, i1 } [[TMP25]], 18655// CHECK9-NEXT: br i1 [[TMP27]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]8656// CHECK9: atomic_exit:8657// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8658// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8659// CHECK9: .omp.reduction.default:8660// CHECK9-NEXT: ret void8661//8662//8663// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l144.omp_outlined.omp.reduction.reduction_func8664// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8665// CHECK9-NEXT: entry:8666// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88667// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88668// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88669// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88670// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88671// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88672// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08673// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88674// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08675// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88676// CHECK9-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 18677// CHECK9-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP8]] to i18678// CHECK9-NEXT: br i1 [[LOADEDV]], label [[LOR_END:%.*]], label [[LOR_RHS:%.*]]8679// CHECK9: lor.rhs:8680// CHECK9-NEXT: [[TMP9:%.*]] = load i8, ptr [[TMP5]], align 18681// CHECK9-NEXT: [[LOADEDV2:%.*]] = trunc i8 [[TMP9]] to i18682// CHECK9-NEXT: br label [[LOR_END]]8683// CHECK9: lor.end:8684// CHECK9-NEXT: [[TMP10:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[LOADEDV2]], [[LOR_RHS]] ]8685// CHECK9-NEXT: [[STOREDV:%.*]] = zext i1 [[TMP10]] to i88686// CHECK9-NEXT: store i8 [[STOREDV]], ptr [[TMP7]], align 18687// CHECK9-NEXT: ret void8688//8689//8690// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1558691// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8692// CHECK9-NEXT: entry:8693// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88694// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88695// CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 88696// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88697// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88698// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88699// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 48700// CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 48701// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 88702// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])8703// CHECK9-NEXT: ret void8704//8705//8706// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined8707// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8708// CHECK9-NEXT: entry:8709// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88710// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88711// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88712// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88713// CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 48714// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48715// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48716// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48717// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48718// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48719// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48720// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48721// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_23:%.*]], align 88722// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88723// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88724// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88725// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88726// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88727// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88728// CHECK9-NEXT: store i32 -1, ptr [[BIT_VAR1]], align 48729// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48730// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48731// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48732// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48733// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88734// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48735// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8736// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48737// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18738// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8739// CHECK9: cond.true:8740// CHECK9-NEXT: br label [[COND_END:%.*]]8741// CHECK9: cond.false:8742// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48743// CHECK9-NEXT: br label [[COND_END]]8744// CHECK9: cond.end:8745// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8746// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48747// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48748// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48749// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8750// CHECK9: omp.inner.for.cond:8751// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48752// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48753// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8754// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8755// CHECK9: omp.inner.for.body:8756// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48757// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18758// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8759// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48760// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 48761// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 48762// CHECK9-NEXT: [[AND:%.*]] = and i32 [[TMP9]], [[TMP10]]8763// CHECK9-NEXT: store i32 [[AND]], ptr [[BIT_VAR1]], align 48764// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_23]], ptr [[REF_TMP]], i32 0, i32 08765// CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 88766// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_5clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8767// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8768// CHECK9: omp.body.continue:8769// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8770// CHECK9: omp.inner.for.inc:8771// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48772// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 18773// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 48774// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8775// CHECK9: omp.inner.for.end:8776// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8777// CHECK9: omp.loop.exit:8778// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8779// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08780// CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 88781// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8782// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8783// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8784// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8785// CHECK9-NEXT: ]8786// CHECK9: .omp.reduction.case1:8787// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 48788// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 48789// CHECK9-NEXT: [[AND4:%.*]] = and i32 [[TMP15]], [[TMP16]]8790// CHECK9-NEXT: store i32 [[AND4]], ptr [[TMP0]], align 48791// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8792// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8793// CHECK9: .omp.reduction.case2:8794// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 48795// CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw and ptr [[TMP0]], i32 [[TMP17]] monotonic, align 48796// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8797// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8798// CHECK9: .omp.reduction.default:8799// CHECK9-NEXT: ret void8800//8801//8802// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp.reduction.reduction_func8803// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8804// CHECK9-NEXT: entry:8805// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88806// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88807// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88808// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88809// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88810// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88811// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08812// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88813// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08814// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88815// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48816// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 48817// CHECK9-NEXT: [[AND:%.*]] = and i32 [[TMP8]], [[TMP9]]8818// CHECK9-NEXT: store i32 [[AND]], ptr [[TMP7]], align 48819// CHECK9-NEXT: ret void8820//8821//8822// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1668823// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8824// CHECK9-NEXT: entry:8825// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88826// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88827// CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 88828// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88829// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88830// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88831// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 48832// CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 48833// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 88834// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])8835// CHECK9-NEXT: ret void8836//8837//8838// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined8839// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8840// CHECK9-NEXT: entry:8841// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88842// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88843// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88844// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88845// CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 48846// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48847// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48848// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48849// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48850// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48851// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48852// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48853// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_24:%.*]], align 88854// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88855// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88856// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88857// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88858// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88859// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88860// CHECK9-NEXT: store i32 0, ptr [[BIT_VAR1]], align 48861// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48862// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48863// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48864// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48865// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88866// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48867// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)8868// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48869// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 18870// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]8871// CHECK9: cond.true:8872// CHECK9-NEXT: br label [[COND_END:%.*]]8873// CHECK9: cond.false:8874// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48875// CHECK9-NEXT: br label [[COND_END]]8876// CHECK9: cond.end:8877// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]8878// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 48879// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 48880// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 48881// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]8882// CHECK9: omp.inner.for.cond:8883// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48884// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 48885// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]8886// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]8887// CHECK9: omp.inner.for.body:8888// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48889// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 18890// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]8891// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 48892// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 48893// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 48894// CHECK9-NEXT: [[OR:%.*]] = or i32 [[TMP9]], [[TMP10]]8895// CHECK9-NEXT: store i32 [[OR]], ptr [[BIT_VAR1]], align 48896// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_24]], ptr [[REF_TMP]], i32 0, i32 08897// CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 88898// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_6clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])8899// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]8900// CHECK9: omp.body.continue:8901// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]8902// CHECK9: omp.inner.for.inc:8903// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 48904// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 18905// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 48906// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]8907// CHECK9: omp.inner.for.end:8908// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]8909// CHECK9: omp.loop.exit:8910// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])8911// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 08912// CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 88913// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)8914// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [8915// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]8916// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]8917// CHECK9-NEXT: ]8918// CHECK9: .omp.reduction.case1:8919// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 48920// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 48921// CHECK9-NEXT: [[OR4:%.*]] = or i32 [[TMP15]], [[TMP16]]8922// CHECK9-NEXT: store i32 [[OR4]], ptr [[TMP0]], align 48923// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8924// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8925// CHECK9: .omp.reduction.case2:8926// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 48927// CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw or ptr [[TMP0]], i32 [[TMP17]] monotonic, align 48928// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)8929// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]8930// CHECK9: .omp.reduction.default:8931// CHECK9-NEXT: ret void8932//8933//8934// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.omp_outlined.omp.reduction.reduction_func8935// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {8936// CHECK9-NEXT: entry:8937// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 88938// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 88939// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 88940// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 88941// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 88942// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 88943// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 08944// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 88945// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 08946// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 88947// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 48948// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 48949// CHECK9-NEXT: [[OR:%.*]] = or i32 [[TMP8]], [[TMP9]]8950// CHECK9-NEXT: store i32 [[OR]], ptr [[TMP7]], align 48951// CHECK9-NEXT: ret void8952//8953//8954// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1778955// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8956// CHECK9-NEXT: entry:8957// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88958// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88959// CHECK9-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 88960// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88961// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88962// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88963// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[SIVAR_ADDR]], align 48964// CHECK9-NEXT: store i32 [[TMP1]], ptr [[SIVAR_CASTED]], align 48965// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[SIVAR_CASTED]], align 88966// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])8967// CHECK9-NEXT: ret void8968//8969//8970// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined8971// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[BIT_VAR:%.*]], i64 noundef [[SIVAR:%.*]]) #[[ATTR2]] {8972// CHECK9-NEXT: entry:8973// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 88974// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 88975// CHECK9-NEXT: [[BIT_VAR_ADDR:%.*]] = alloca ptr, align 88976// CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 88977// CHECK9-NEXT: [[BIT_VAR1:%.*]] = alloca i32, align 48978// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 48979// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 48980// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 48981// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 48982// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 48983// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 48984// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 48985// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_25:%.*]], align 88986// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 88987// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 88988// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 88989// CHECK9-NEXT: store ptr [[BIT_VAR]], ptr [[BIT_VAR_ADDR]], align 88990// CHECK9-NEXT: store i64 [[SIVAR]], ptr [[SIVAR_ADDR]], align 88991// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BIT_VAR_ADDR]], align 88992// CHECK9-NEXT: store i32 0, ptr [[BIT_VAR1]], align 48993// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 48994// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 48995// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 48996// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 48997// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 88998// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 48999// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9000// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49001// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19002// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9003// CHECK9: cond.true:9004// CHECK9-NEXT: br label [[COND_END:%.*]]9005// CHECK9: cond.false:9006// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49007// CHECK9-NEXT: br label [[COND_END]]9008// CHECK9: cond.end:9009// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9010// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 49011// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49012// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49013// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9014// CHECK9: omp.inner.for.cond:9015// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49016// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49017// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9018// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9019// CHECK9: omp.inner.for.body:9020// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49021// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 19022// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9023// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 49024// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[BIT_VAR1]], align 49025// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 49026// CHECK9-NEXT: [[XOR:%.*]] = xor i32 [[TMP9]], [[TMP10]]9027// CHECK9-NEXT: store i32 [[XOR]], ptr [[BIT_VAR1]], align 49028// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_25]], ptr [[REF_TMP]], i32 0, i32 09029// CHECK9-NEXT: store ptr [[SIVAR_ADDR]], ptr [[TMP11]], align 89030// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_7clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])9031// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9032// CHECK9: omp.body.continue:9033// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9034// CHECK9: omp.inner.for.inc:9035// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49036// CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 19037// CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 49038// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]9039// CHECK9: omp.inner.for.end:9040// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9041// CHECK9: omp.loop.exit:9042// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9043// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 09044// CHECK9-NEXT: store ptr [[BIT_VAR1]], ptr [[TMP13]], align 89045// CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)9046// CHECK9-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [9047// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]9048// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]9049// CHECK9-NEXT: ]9050// CHECK9: .omp.reduction.case1:9051// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP0]], align 49052// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[BIT_VAR1]], align 49053// CHECK9-NEXT: [[XOR4:%.*]] = xor i32 [[TMP15]], [[TMP16]]9054// CHECK9-NEXT: store i32 [[XOR4]], ptr [[TMP0]], align 49055// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9056// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9057// CHECK9: .omp.reduction.case2:9058// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[BIT_VAR1]], align 49059// CHECK9-NEXT: [[TMP18:%.*]] = atomicrmw xor ptr [[TMP0]], i32 [[TMP17]] monotonic, align 49060// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9061// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9062// CHECK9: .omp.reduction.default:9063// CHECK9-NEXT: ret void9064//9065//9066// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l177.omp_outlined.omp.reduction.reduction_func9067// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {9068// CHECK9-NEXT: entry:9069// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 89070// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 89071// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 89072// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 89073// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 89074// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 89075// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 09076// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 89077// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 09078// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 89079// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 49080// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 49081// CHECK9-NEXT: [[XOR:%.*]] = xor i32 [[TMP8]], [[TMP9]]9082// CHECK9-NEXT: store i32 [[XOR]], ptr [[TMP7]], align 49083// CHECK9-NEXT: ret void9084//9085//9086// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1889087// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[MAX_VAR:%.*]]) #[[ATTR2]] {9088// CHECK9-NEXT: entry:9089// CHECK9-NEXT: [[MAX_VAR_ADDR:%.*]] = alloca ptr, align 89090// CHECK9-NEXT: store ptr [[MAX_VAR]], ptr [[MAX_VAR_ADDR]], align 89091// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MAX_VAR_ADDR]], align 89092// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined, ptr [[TMP0]])9093// CHECK9-NEXT: ret void9094//9095//9096// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined9097// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[MAX_VAR:%.*]]) #[[ATTR2]] {9098// CHECK9-NEXT: entry:9099// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 89100// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 89101// CHECK9-NEXT: [[MAX_VAR_ADDR:%.*]] = alloca ptr, align 89102// CHECK9-NEXT: [[MAX_VAR1:%.*]] = alloca i32, align 49103// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49104// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 49105// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 49106// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 49107// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49108// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49109// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 49110// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_26:%.*]], align 89111// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 89112// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 89113// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 89114// CHECK9-NEXT: store ptr [[MAX_VAR]], ptr [[MAX_VAR_ADDR]], align 89115// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MAX_VAR_ADDR]], align 89116// CHECK9-NEXT: store i32 -2147483648, ptr [[MAX_VAR1]], align 49117// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 49118// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 49119// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49120// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49121// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 89122// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 49123// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9124// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49125// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19126// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9127// CHECK9: cond.true:9128// CHECK9-NEXT: br label [[COND_END:%.*]]9129// CHECK9: cond.false:9130// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49131// CHECK9-NEXT: br label [[COND_END]]9132// CHECK9: cond.end:9133// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9134// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 49135// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49136// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49137// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9138// CHECK9: omp.inner.for.cond:9139// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49140// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49141// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9142// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9143// CHECK9: omp.inner.for.body:9144// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49145// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 19146// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9147// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 49148// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[MAX_VAR1]], align 49149// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 49150// CHECK9-NEXT: [[CMP3:%.*]] = icmp sge i32 [[TMP9]], [[TMP10]]9151// CHECK9-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]9152// CHECK9: cond.true4:9153// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[MAX_VAR1]], align 49154// CHECK9-NEXT: br label [[COND_END6:%.*]]9155// CHECK9: cond.false5:9156// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 49157// CHECK9-NEXT: br label [[COND_END6]]9158// CHECK9: cond.end6:9159// CHECK9-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]9160// CHECK9-NEXT: store i32 [[COND7]], ptr [[MAX_VAR1]], align 49161// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_26]], ptr [[REF_TMP]], i32 0, i32 09162// CHECK9-NEXT: store ptr [[MAX_VAR1]], ptr [[TMP13]], align 89163// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_8clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])9164// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9165// CHECK9: omp.body.continue:9166// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9167// CHECK9: omp.inner.for.inc:9168// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49169// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], 19170// CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 49171// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]9172// CHECK9: omp.inner.for.end:9173// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9174// CHECK9: omp.loop.exit:9175// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9176// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 09177// CHECK9-NEXT: store ptr [[MAX_VAR1]], ptr [[TMP15]], align 89178// CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)9179// CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [9180// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]9181// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]9182// CHECK9-NEXT: ]9183// CHECK9: .omp.reduction.case1:9184// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 49185// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[MAX_VAR1]], align 49186// CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP17]], [[TMP18]]9187// CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]9188// CHECK9: cond.true10:9189// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 49190// CHECK9-NEXT: br label [[COND_END12:%.*]]9191// CHECK9: cond.false11:9192// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[MAX_VAR1]], align 49193// CHECK9-NEXT: br label [[COND_END12]]9194// CHECK9: cond.end12:9195// CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE10]] ], [ [[TMP20]], [[COND_FALSE11]] ]9196// CHECK9-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 49197// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9198// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9199// CHECK9: .omp.reduction.case2:9200// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[MAX_VAR1]], align 49201// CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw max ptr [[TMP0]], i32 [[TMP21]] monotonic, align 49202// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9203// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9204// CHECK9: .omp.reduction.default:9205// CHECK9-NEXT: ret void9206//9207//9208// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l188.omp_outlined.omp.reduction.reduction_func9209// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {9210// CHECK9-NEXT: entry:9211// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 89212// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 89213// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 89214// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 89215// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 89216// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 89217// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 09218// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 89219// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 09220// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 89221// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 49222// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 49223// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]9224// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9225// CHECK9: cond.true:9226// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 49227// CHECK9-NEXT: br label [[COND_END:%.*]]9228// CHECK9: cond.false:9229// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 49230// CHECK9-NEXT: br label [[COND_END]]9231// CHECK9: cond.end:9232// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]9233// CHECK9-NEXT: store i32 [[COND]], ptr [[TMP7]], align 49234// CHECK9-NEXT: ret void9235//9236//9237// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1999238// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[MIN_VAR:%.*]]) #[[ATTR2]] {9239// CHECK9-NEXT: entry:9240// CHECK9-NEXT: [[MIN_VAR_ADDR:%.*]] = alloca ptr, align 89241// CHECK9-NEXT: store ptr [[MIN_VAR]], ptr [[MIN_VAR_ADDR]], align 89242// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MIN_VAR_ADDR]], align 89243// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined, ptr [[TMP0]])9244// CHECK9-NEXT: ret void9245//9246//9247// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined9248// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[MIN_VAR:%.*]]) #[[ATTR2]] {9249// CHECK9-NEXT: entry:9250// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 89251// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 89252// CHECK9-NEXT: [[MIN_VAR_ADDR:%.*]] = alloca ptr, align 89253// CHECK9-NEXT: [[MIN_VAR1:%.*]] = alloca i32, align 49254// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 49255// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 49256// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 49257// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 49258// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 49259// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 49260// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 49261// CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_27:%.*]], align 89262// CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 89263// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 89264// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 89265// CHECK9-NEXT: store ptr [[MIN_VAR]], ptr [[MIN_VAR_ADDR]], align 89266// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[MIN_VAR_ADDR]], align 89267// CHECK9-NEXT: store i32 2147483647, ptr [[MIN_VAR1]], align 49268// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 49269// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 49270// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 49271// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 49272// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 89273// CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 49274// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)9275// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49276// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19277// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9278// CHECK9: cond.true:9279// CHECK9-NEXT: br label [[COND_END:%.*]]9280// CHECK9: cond.false:9281// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49282// CHECK9-NEXT: br label [[COND_END]]9283// CHECK9: cond.end:9284// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]9285// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 49286// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 49287// CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 49288// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]9289// CHECK9: omp.inner.for.cond:9290// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49291// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 49292// CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]9293// CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]9294// CHECK9: omp.inner.for.body:9295// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49296// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 19297// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]9298// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 49299// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[MIN_VAR1]], align 49300// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 49301// CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]9302// CHECK9-NEXT: br i1 [[CMP3]], label [[COND_TRUE4:%.*]], label [[COND_FALSE5:%.*]]9303// CHECK9: cond.true4:9304// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[MIN_VAR1]], align 49305// CHECK9-NEXT: br label [[COND_END6:%.*]]9306// CHECK9: cond.false5:9307// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 49308// CHECK9-NEXT: br label [[COND_END6]]9309// CHECK9: cond.end6:9310// CHECK9-NEXT: [[COND7:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE4]] ], [ [[TMP12]], [[COND_FALSE5]] ]9311// CHECK9-NEXT: store i32 [[COND7]], ptr [[MIN_VAR1]], align 49312// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_27]], ptr [[REF_TMP]], i32 0, i32 09313// CHECK9-NEXT: store ptr [[MIN_VAR1]], ptr [[TMP13]], align 89314// CHECK9-NEXT: call void @"_ZZZ4mainENK3$_9clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])9315// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]9316// CHECK9: omp.body.continue:9317// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]9318// CHECK9: omp.inner.for.inc:9319// CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 49320// CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP14]], 19321// CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 49322// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]9323// CHECK9: omp.inner.for.end:9324// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]9325// CHECK9: omp.loop.exit:9326// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])9327// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 09328// CHECK9-NEXT: store ptr [[MIN_VAR1]], ptr [[TMP15]], align 89329// CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_reduce(ptr @[[GLOB2]], i32 [[TMP2]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)9330// CHECK9-NEXT: switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [9331// CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]9332// CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]9333// CHECK9-NEXT: ]9334// CHECK9: .omp.reduction.case1:9335// CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP0]], align 49336// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[MIN_VAR1]], align 49337// CHECK9-NEXT: [[CMP9:%.*]] = icmp slt i32 [[TMP17]], [[TMP18]]9338// CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]9339// CHECK9: cond.true10:9340// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP0]], align 49341// CHECK9-NEXT: br label [[COND_END12:%.*]]9342// CHECK9: cond.false11:9343// CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[MIN_VAR1]], align 49344// CHECK9-NEXT: br label [[COND_END12]]9345// CHECK9: cond.end12:9346// CHECK9-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE10]] ], [ [[TMP20]], [[COND_FALSE11]] ]9347// CHECK9-NEXT: store i32 [[COND13]], ptr [[TMP0]], align 49348// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9349// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9350// CHECK9: .omp.reduction.case2:9351// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[MIN_VAR1]], align 49352// CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw min ptr [[TMP0]], i32 [[TMP21]] monotonic, align 49353// CHECK9-NEXT: call void @__kmpc_end_reduce(ptr @[[GLOB2]], i32 [[TMP2]], ptr @.gomp_critical_user_.reduction.var)9354// CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]9355// CHECK9: .omp.reduction.default:9356// CHECK9-NEXT: ret void9357//9358//9359// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l199.omp_outlined.omp.reduction.reduction_func9360// CHECK9-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {9361// CHECK9-NEXT: entry:9362// CHECK9-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 89363// CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 89364// CHECK9-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 89365// CHECK9-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 89366// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 89367// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 89368// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 09369// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 89370// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 09371// CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 89372// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 49373// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 49374// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]]9375// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]9376// CHECK9: cond.true:9377// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 49378// CHECK9-NEXT: br label [[COND_END:%.*]]9379// CHECK9: cond.false:9380// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP5]], align 49381// CHECK9-NEXT: br label [[COND_END]]9382// CHECK9: cond.end:9383// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]9384// CHECK9-NEXT: store i32 [[COND]], ptr [[TMP7]], align 49385// CHECK9-NEXT: ret void9386//9387