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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK515// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK517// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK718// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK720#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24  T a[X];25  float b;26  int foo(void) {27 28    #pragma omp target teams distribute simd29    for(int i = 0; i < X; i++) {30      a[i] = (T)0;31    }32    #pragma omp target teams distribute simd dist_schedule(static)33    for(int i = 0; i < X; i++) {34      a[i] = (T)0;35    }36    #pragma omp target teams distribute simd dist_schedule(static, X/2)37    for(int i = 0; i < X; i++) {38      a[i] = (T)0;39    }40 41 42 43 44 45 46    return a[0];47  }48};49 50int teams_template_struct(void) {51  SS<int, 123, 456> V;52  return V.foo();53 54}55#endif // CK156 57// Test host codegen.58// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK959// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s60// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK961// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1162// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s63// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1164 65// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1366// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s67// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1368// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1569// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s70// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1571#ifdef CK272 73template <typename T, int n>74int tmain(T argc) {75  T a[n];76#pragma omp target teams distribute simd77  for(int i = 0; i < n; i++) {78    a[i] = (T)0;79  }80#pragma omp target teams distribute simd dist_schedule(static)81  for(int i = 0; i < n; i++) {82    a[i] = (T)0;83  }84#pragma omp target teams distribute simd dist_schedule(static, n)85  for(int i = 0; i < n; i++) {86    a[i] = (T)0;87  }88  return 0;89}90 91int main (int argc, char **argv) {92  int n = 100;93  int a[n];94#pragma omp target teams distribute simd95  for(int i = 0; i < n; i++) {96    a[i] = 0;97  }98#pragma omp target teams distribute simd dist_schedule(static)99  for(int i = 0; i < n; i++) {100    a[i] = 0;101  }102#pragma omp target teams distribute simd dist_schedule(static, n)103  for(int i = 0; i < n; i++) {104    a[i] = 0;105  }106  return tmain<int, 10>(argc);107}108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123#endif // CK2124#endif // #ifndef HEADER125// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv126// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {127// CHECK1-NEXT:  entry:128// CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4129// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])130// CHECK1-NEXT:    ret i32 [[CALL]]131//132//133// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv134// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {135// CHECK1-NEXT:  entry:136// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8137// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8138// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8139// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8140// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4141// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8142// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8143// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8144// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8145// CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4146// CHECK1-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8147// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8148// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8149// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8150// CHECK1-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4151// CHECK1-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8152// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8153// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8154// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0155// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0156// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8157// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0158// CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8159// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0160// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8161// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0162// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0163// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0164// CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4165// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1166// CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4167// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2168// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8169// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3170// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8171// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4172// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8173// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5174// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8175// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6176// CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8177// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7178// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8179// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8180// CHECK1-NEXT:    store i64 123, ptr [[TMP13]], align 8181// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9182// CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8183// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10184// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4185// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11186// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4187// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12188// CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4189// CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])190// CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0191// CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]192// CHECK1:       omp_offload.failed:193// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]194// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]195// CHECK1:       omp_offload.cont:196// CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0197// CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0198// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8199// CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0200// CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8201// CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0202// CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8203// CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0204// CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0205// CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0206// CHECK1-NEXT:    store i32 3, ptr [[TMP25]], align 4207// CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1208// CHECK1-NEXT:    store i32 1, ptr [[TMP26]], align 4209// CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2210// CHECK1-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8211// CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3212// CHECK1-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8213// CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4214// CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8215// CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5216// CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8217// CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6218// CHECK1-NEXT:    store ptr null, ptr [[TMP31]], align 8219// CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7220// CHECK1-NEXT:    store ptr null, ptr [[TMP32]], align 8221// CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8222// CHECK1-NEXT:    store i64 123, ptr [[TMP33]], align 8223// CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9224// CHECK1-NEXT:    store i64 0, ptr [[TMP34]], align 8225// CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10226// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4227// CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11228// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4229// CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12230// CHECK1-NEXT:    store i32 0, ptr [[TMP37]], align 4231// CHECK1-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]])232// CHECK1-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0233// CHECK1-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]234// CHECK1:       omp_offload.failed8:235// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]]236// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT9]]237// CHECK1:       omp_offload.cont9:238// CHECK1-NEXT:    [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0239// CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0240// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8241// CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0242// CHECK1-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8243// CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0244// CHECK1-NEXT:    store ptr null, ptr [[TMP42]], align 8245// CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0246// CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0247// CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0248// CHECK1-NEXT:    store i32 3, ptr [[TMP45]], align 4249// CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1250// CHECK1-NEXT:    store i32 1, ptr [[TMP46]], align 4251// CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2252// CHECK1-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8253// CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3254// CHECK1-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8255// CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4256// CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8257// CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5258// CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8259// CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6260// CHECK1-NEXT:    store ptr null, ptr [[TMP51]], align 8261// CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7262// CHECK1-NEXT:    store ptr null, ptr [[TMP52]], align 8263// CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8264// CHECK1-NEXT:    store i64 123, ptr [[TMP53]], align 8265// CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9266// CHECK1-NEXT:    store i64 0, ptr [[TMP54]], align 8267// CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10268// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4269// CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11270// CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4271// CHECK1-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12272// CHECK1-NEXT:    store i32 0, ptr [[TMP57]], align 4273// CHECK1-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]])274// CHECK1-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0275// CHECK1-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]276// CHECK1:       omp_offload.failed16:277// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]]278// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT17]]279// CHECK1:       omp_offload.cont17:280// CHECK1-NEXT:    [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0281// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0282// CHECK1-NEXT:    [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4283// CHECK1-NEXT:    ret i32 [[TMP60]]284//285//286// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28287// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {288// CHECK1-NEXT:  entry:289// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8290// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8291// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8292// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])293// CHECK1-NEXT:    ret void294//295//296// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined297// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {298// CHECK1-NEXT:  entry:299// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8300// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8301// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8302// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4303// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4304// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4305// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4306// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4307// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4308// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4309// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8310// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8311// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8312// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8313// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4314// CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4315// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4316// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4317// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8318// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4319// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)320// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4321// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122322// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]323// CHECK1:       cond.true:324// CHECK1-NEXT:    br label [[COND_END:%.*]]325// CHECK1:       cond.false:326// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4327// CHECK1-NEXT:    br label [[COND_END]]328// CHECK1:       cond.end:329// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]330// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4331// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4332// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4333// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]334// CHECK1:       omp.inner.for.cond:335// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]336// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]337// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]338// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]339// CHECK1:       omp.inner.for.body:340// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]341// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1342// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]343// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]344// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0345// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]346// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64347// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]348// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]349// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]350// CHECK1:       omp.body.continue:351// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]352// CHECK1:       omp.inner.for.inc:353// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]354// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1355// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]356// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]357// CHECK1:       omp.inner.for.end:358// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]359// CHECK1:       omp.loop.exit:360// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])361// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4362// CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0363// CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]364// CHECK1:       .omp.final.then:365// CHECK1-NEXT:    store i32 123, ptr [[I]], align 4366// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]367// CHECK1:       .omp.final.done:368// CHECK1-NEXT:    ret void369//370//371// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32372// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {373// CHECK1-NEXT:  entry:374// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8375// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8376// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8377// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]])378// CHECK1-NEXT:    ret void379//380//381// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined382// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {383// CHECK1-NEXT:  entry:384// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8385// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8386// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8387// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4388// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4389// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4390// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4391// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4392// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4393// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4394// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8395// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8396// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8397// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8398// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4399// CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4400// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4401// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4402// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8403// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4404// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)405// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4406// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122407// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]408// CHECK1:       cond.true:409// CHECK1-NEXT:    br label [[COND_END:%.*]]410// CHECK1:       cond.false:411// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4412// CHECK1-NEXT:    br label [[COND_END]]413// CHECK1:       cond.end:414// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]415// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4416// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4417// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4418// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]419// CHECK1:       omp.inner.for.cond:420// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]421// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]422// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]423// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]424// CHECK1:       omp.inner.for.body:425// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]426// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1427// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]428// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]429// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0430// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]431// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64432// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]433// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]434// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]435// CHECK1:       omp.body.continue:436// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]437// CHECK1:       omp.inner.for.inc:438// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]439// CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1440// CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]441// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]442// CHECK1:       omp.inner.for.end:443// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]444// CHECK1:       omp.loop.exit:445// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])446// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4447// CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0448// CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]449// CHECK1:       .omp.final.then:450// CHECK1-NEXT:    store i32 123, ptr [[I]], align 4451// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]452// CHECK1:       .omp.final.done:453// CHECK1-NEXT:    ret void454//455//456// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36457// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {458// CHECK1-NEXT:  entry:459// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8460// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8461// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8462// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])463// CHECK1-NEXT:    ret void464//465//466// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined467// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {468// CHECK1-NEXT:  entry:469// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8470// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8471// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8472// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4473// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4474// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4475// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4476// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4477// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4478// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4479// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8480// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8481// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8482// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8483// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4484// CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4485// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4486// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4487// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8488// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4489// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)490// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]491// CHECK1:       omp.dispatch.cond:492// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4493// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122494// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]495// CHECK1:       cond.true:496// CHECK1-NEXT:    br label [[COND_END:%.*]]497// CHECK1:       cond.false:498// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4499// CHECK1-NEXT:    br label [[COND_END]]500// CHECK1:       cond.end:501// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]502// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4503// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4504// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4505// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4506// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4507// CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]508// CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]509// CHECK1:       omp.dispatch.body:510// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]511// CHECK1:       omp.inner.for.cond:512// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]513// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]514// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]515// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]516// CHECK1:       omp.inner.for.body:517// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]518// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1519// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]520// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]521// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0522// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]523// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64524// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]525// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]526// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]527// CHECK1:       omp.body.continue:528// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]529// CHECK1:       omp.inner.for.inc:530// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]531// CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1532// CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]533// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]534// CHECK1:       omp.inner.for.end:535// CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]536// CHECK1:       omp.dispatch.inc:537// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4538// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4539// CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]540// CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4541// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4542// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4543// CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]544// CHECK1-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4545// CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]546// CHECK1:       omp.dispatch.end:547// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])548// CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4549// CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0550// CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]551// CHECK1:       .omp.final.then:552// CHECK1-NEXT:    store i32 123, ptr [[I]], align 4553// CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]554// CHECK1:       .omp.final.done:555// CHECK1-NEXT:    ret void556//557//558// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv559// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {560// CHECK3-NEXT:  entry:561// CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4562// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])563// CHECK3-NEXT:    ret i32 [[CALL]]564//565//566// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv567// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {568// CHECK3-NEXT:  entry:569// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4570// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4571// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4572// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4573// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4574// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8575// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4576// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4577// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4578// CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4579// CHECK3-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8580// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4581// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4582// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4583// CHECK3-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4584// CHECK3-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8585// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4586// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4587// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0588// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0589// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4590// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0591// CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4592// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0593// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4594// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0595// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0596// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0597// CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4598// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1599// CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4600// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2601// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4602// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3603// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4604// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4605// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4606// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5607// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4608// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6609// CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4610// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7611// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4612// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8613// CHECK3-NEXT:    store i64 123, ptr [[TMP13]], align 8614// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9615// CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8616// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10617// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4618// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11619// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4620// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12621// CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4622// CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])623// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0624// CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]625// CHECK3:       omp_offload.failed:626// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]627// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]628// CHECK3:       omp_offload.cont:629// CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0630// CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0631// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4632// CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0633// CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4634// CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0635// CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 4636// CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0637// CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0638// CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0639// CHECK3-NEXT:    store i32 3, ptr [[TMP25]], align 4640// CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1641// CHECK3-NEXT:    store i32 1, ptr [[TMP26]], align 4642// CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2643// CHECK3-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4644// CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3645// CHECK3-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4646// CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4647// CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4648// CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5649// CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4650// CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6651// CHECK3-NEXT:    store ptr null, ptr [[TMP31]], align 4652// CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7653// CHECK3-NEXT:    store ptr null, ptr [[TMP32]], align 4654// CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8655// CHECK3-NEXT:    store i64 123, ptr [[TMP33]], align 8656// CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9657// CHECK3-NEXT:    store i64 0, ptr [[TMP34]], align 8658// CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10659// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4660// CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11661// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4662// CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12663// CHECK3-NEXT:    store i32 0, ptr [[TMP37]], align 4664// CHECK3-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]])665// CHECK3-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0666// CHECK3-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]667// CHECK3:       omp_offload.failed8:668// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]]669// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT9]]670// CHECK3:       omp_offload.cont9:671// CHECK3-NEXT:    [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0672// CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0673// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4674// CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0675// CHECK3-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4676// CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0677// CHECK3-NEXT:    store ptr null, ptr [[TMP42]], align 4678// CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0679// CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0680// CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0681// CHECK3-NEXT:    store i32 3, ptr [[TMP45]], align 4682// CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1683// CHECK3-NEXT:    store i32 1, ptr [[TMP46]], align 4684// CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2685// CHECK3-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4686// CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3687// CHECK3-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4688// CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4689// CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4690// CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5691// CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4692// CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6693// CHECK3-NEXT:    store ptr null, ptr [[TMP51]], align 4694// CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7695// CHECK3-NEXT:    store ptr null, ptr [[TMP52]], align 4696// CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8697// CHECK3-NEXT:    store i64 123, ptr [[TMP53]], align 8698// CHECK3-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9699// CHECK3-NEXT:    store i64 0, ptr [[TMP54]], align 8700// CHECK3-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10701// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4702// CHECK3-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11703// CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4704// CHECK3-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12705// CHECK3-NEXT:    store i32 0, ptr [[TMP57]], align 4706// CHECK3-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]])707// CHECK3-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0708// CHECK3-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]709// CHECK3:       omp_offload.failed16:710// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]]711// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT17]]712// CHECK3:       omp_offload.cont17:713// CHECK3-NEXT:    [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0714// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0715// CHECK3-NEXT:    [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4716// CHECK3-NEXT:    ret i32 [[TMP60]]717//718//719// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28720// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {721// CHECK3-NEXT:  entry:722// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4723// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4724// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4725// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])726// CHECK3-NEXT:    ret void727//728//729// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined730// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {731// CHECK3-NEXT:  entry:732// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4733// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4734// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4735// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4736// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4737// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4738// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4739// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4740// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4741// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4742// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4743// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4744// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4745// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4746// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4747// CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4748// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4749// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4750// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4751// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4752// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)753// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4754// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122755// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]756// CHECK3:       cond.true:757// CHECK3-NEXT:    br label [[COND_END:%.*]]758// CHECK3:       cond.false:759// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4760// CHECK3-NEXT:    br label [[COND_END]]761// CHECK3:       cond.end:762// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]763// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4764// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4765// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4766// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]767// CHECK3:       omp.inner.for.cond:768// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]769// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]770// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]771// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]772// CHECK3:       omp.inner.for.body:773// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]774// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1775// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]776// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]777// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0778// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]779// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]780// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]781// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]782// CHECK3:       omp.body.continue:783// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]784// CHECK3:       omp.inner.for.inc:785// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]786// CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1787// CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]788// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]789// CHECK3:       omp.inner.for.end:790// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]791// CHECK3:       omp.loop.exit:792// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])793// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4794// CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0795// CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]796// CHECK3:       .omp.final.then:797// CHECK3-NEXT:    store i32 123, ptr [[I]], align 4798// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]799// CHECK3:       .omp.final.done:800// CHECK3-NEXT:    ret void801//802//803// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32804// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {805// CHECK3-NEXT:  entry:806// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4807// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4808// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4809// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]])810// CHECK3-NEXT:    ret void811//812//813// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined814// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {815// CHECK3-NEXT:  entry:816// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4817// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4818// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4819// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4820// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4821// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4822// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4823// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4824// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4825// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4826// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4827// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4828// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4829// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4830// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4831// CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4832// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4833// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4834// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4835// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4836// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)837// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4838// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122839// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]840// CHECK3:       cond.true:841// CHECK3-NEXT:    br label [[COND_END:%.*]]842// CHECK3:       cond.false:843// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4844// CHECK3-NEXT:    br label [[COND_END]]845// CHECK3:       cond.end:846// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]847// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4848// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4849// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4850// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]851// CHECK3:       omp.inner.for.cond:852// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]853// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]854// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]855// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]856// CHECK3:       omp.inner.for.body:857// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]858// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1859// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]860// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]861// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0862// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]863// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]864// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]865// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]866// CHECK3:       omp.body.continue:867// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]868// CHECK3:       omp.inner.for.inc:869// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]870// CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1871// CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]872// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]873// CHECK3:       omp.inner.for.end:874// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]875// CHECK3:       omp.loop.exit:876// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])877// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4878// CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0879// CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]880// CHECK3:       .omp.final.then:881// CHECK3-NEXT:    store i32 123, ptr [[I]], align 4882// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]883// CHECK3:       .omp.final.done:884// CHECK3-NEXT:    ret void885//886//887// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36888// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {889// CHECK3-NEXT:  entry:890// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4891// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4892// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4893// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])894// CHECK3-NEXT:    ret void895//896//897// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined898// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {899// CHECK3-NEXT:  entry:900// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4901// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4902// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4903// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4904// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4905// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4906// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4907// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4908// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4909// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4910// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4911// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4912// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4913// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4914// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4915// CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4916// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4917// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4918// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4919// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4920// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)921// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]922// CHECK3:       omp.dispatch.cond:923// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4924// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122925// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]926// CHECK3:       cond.true:927// CHECK3-NEXT:    br label [[COND_END:%.*]]928// CHECK3:       cond.false:929// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4930// CHECK3-NEXT:    br label [[COND_END]]931// CHECK3:       cond.end:932// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]933// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4934// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4935// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4936// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4937// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4938// CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]939// CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]940// CHECK3:       omp.dispatch.body:941// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]942// CHECK3:       omp.inner.for.cond:943// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]944// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]945// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]946// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]947// CHECK3:       omp.inner.for.body:948// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]949// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1950// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]951// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]952// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0953// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]954// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]955// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]956// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]957// CHECK3:       omp.body.continue:958// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]959// CHECK3:       omp.inner.for.inc:960// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]961// CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1962// CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]963// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]964// CHECK3:       omp.inner.for.end:965// CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]966// CHECK3:       omp.dispatch.inc:967// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4968// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4969// CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]970// CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4971// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4972// CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4973// CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]974// CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4975// CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]976// CHECK3:       omp.dispatch.end:977// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])978// CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4979// CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0980// CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]981// CHECK3:       .omp.final.then:982// CHECK3-NEXT:    store i32 123, ptr [[I]], align 4983// CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]984// CHECK3:       .omp.final.done:985// CHECK3-NEXT:    ret void986//987//988// CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv989// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {990// CHECK5-NEXT:  entry:991// CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4992// CHECK5-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])993// CHECK5-NEXT:    ret i32 [[CALL]]994//995//996// CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv997// CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {998// CHECK5-NEXT:  entry:999// CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 81000// CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 41001// CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41002// CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41003// CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41004// CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 41005// CHECK5-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41006// CHECK5-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 41007// CHECK5-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 41008// CHECK5-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 41009// CHECK5-NEXT:    [[I7:%.*]] = alloca i32, align 41010// CHECK5-NEXT:    [[_TMP20:%.*]] = alloca i32, align 41011// CHECK5-NEXT:    [[DOTOMP_LB21:%.*]] = alloca i32, align 41012// CHECK5-NEXT:    [[DOTOMP_UB22:%.*]] = alloca i32, align 41013// CHECK5-NEXT:    [[DOTOMP_IV23:%.*]] = alloca i32, align 41014// CHECK5-NEXT:    [[I24:%.*]] = alloca i32, align 41015// CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 81016// CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81017// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41018// CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 41019// CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41020// CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41021// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1022// CHECK5:       omp.inner.for.cond:1023// CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]1024// CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]1025// CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1026// CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1027// CHECK5:       omp.inner.for.body:1028// CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1029// CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11030// CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1031// CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1032// CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01033// CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]1034// CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i641035// CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]1036// CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]1037// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1038// CHECK5:       omp.body.continue:1039// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1040// CHECK5:       omp.inner.for.inc:1041// CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1042// CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 11043// CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]1044// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]1045// CHECK5:       omp.inner.for.end:1046// CHECK5-NEXT:    store i32 123, ptr [[I]], align 41047// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB4]], align 41048// CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB5]], align 41049// CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 41050// CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 41051// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]1052// CHECK5:       omp.inner.for.cond8:1053// CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]1054// CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]]1055// CHECK5-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1056// CHECK5-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]1057// CHECK5:       omp.inner.for.body10:1058// CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1059// CHECK5-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 11060// CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]1061// CHECK5-NEXT:    store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]1062// CHECK5-NEXT:    [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01063// CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]1064// CHECK5-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i641065// CHECK5-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]]1066// CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]]1067// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE16:%.*]]1068// CHECK5:       omp.body.continue16:1069// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC17:%.*]]1070// CHECK5:       omp.inner.for.inc17:1071// CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1072// CHECK5-NEXT:    [[ADD18:%.*]] = add nsw i32 [[TMP11]], 11073// CHECK5-NEXT:    store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]1074// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]1075// CHECK5:       omp.inner.for.end19:1076// CHECK5-NEXT:    store i32 123, ptr [[I7]], align 41077// CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB21]], align 41078// CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB22]], align 41079// CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 41080// CHECK5-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 41081// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND25:%.*]]1082// CHECK5:       omp.inner.for.cond25:1083// CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1084// CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]]1085// CHECK5-NEXT:    [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1086// CHECK5-NEXT:    br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]1087// CHECK5:       omp.inner.for.body27:1088// CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1089// CHECK5-NEXT:    [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 11090// CHECK5-NEXT:    [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]1091// CHECK5-NEXT:    store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]1092// CHECK5-NEXT:    [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01093// CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]1094// CHECK5-NEXT:    [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i641095// CHECK5-NEXT:    [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]]1096// CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]]1097// CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE33:%.*]]1098// CHECK5:       omp.body.continue33:1099// CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC34:%.*]]1100// CHECK5:       omp.inner.for.inc34:1101// CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1102// CHECK5-NEXT:    [[ADD35:%.*]] = add nsw i32 [[TMP17]], 11103// CHECK5-NEXT:    store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]1104// CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]1105// CHECK5:       omp.inner.for.end36:1106// CHECK5-NEXT:    store i32 123, ptr [[I24]], align 41107// CHECK5-NEXT:    [[A37:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01108// CHECK5-NEXT:    [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], ptr [[A37]], i64 0, i64 01109// CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX38]], align 41110// CHECK5-NEXT:    ret i32 [[TMP18]]1111//1112//1113// CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv1114// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {1115// CHECK7-NEXT:  entry:1116// CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 41117// CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])1118// CHECK7-NEXT:    ret i32 [[CALL]]1119//1120//1121// CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv1122// CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {1123// CHECK7-NEXT:  entry:1124// CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 41125// CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 41126// CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41127// CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41128// CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41129// CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 41130// CHECK7-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41131// CHECK7-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 41132// CHECK7-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 41133// CHECK7-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 41134// CHECK7-NEXT:    [[I7:%.*]] = alloca i32, align 41135// CHECK7-NEXT:    [[_TMP19:%.*]] = alloca i32, align 41136// CHECK7-NEXT:    [[DOTOMP_LB20:%.*]] = alloca i32, align 41137// CHECK7-NEXT:    [[DOTOMP_UB21:%.*]] = alloca i32, align 41138// CHECK7-NEXT:    [[DOTOMP_IV22:%.*]] = alloca i32, align 41139// CHECK7-NEXT:    [[I23:%.*]] = alloca i32, align 41140// CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 41141// CHECK7-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41142// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41143// CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 41144// CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41145// CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 41146// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1147// CHECK7:       omp.inner.for.cond:1148// CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]1149// CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]1150// CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]1151// CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1152// CHECK7:       omp.inner.for.body:1153// CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1154// CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 11155// CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1156// CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]1157// CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 01158// CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]1159// CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]]1160// CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]1161// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1162// CHECK7:       omp.body.continue:1163// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1164// CHECK7:       omp.inner.for.inc:1165// CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1166// CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 11167// CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]1168// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]1169// CHECK7:       omp.inner.for.end:1170// CHECK7-NEXT:    store i32 123, ptr [[I]], align 41171// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB4]], align 41172// CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB5]], align 41173// CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 41174// CHECK7-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 41175// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]1176// CHECK7:       omp.inner.for.cond8:1177// CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]1178// CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]]1179// CHECK7-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]1180// CHECK7-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]1181// CHECK7:       omp.inner.for.body10:1182// CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1183// CHECK7-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 11184// CHECK7-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]1185// CHECK7-NEXT:    store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]1186// CHECK7-NEXT:    [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01187// CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]1188// CHECK7-NEXT:    [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]]1189// CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]]1190// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE15:%.*]]1191// CHECK7:       omp.body.continue15:1192// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC16:%.*]]1193// CHECK7:       omp.inner.for.inc16:1194// CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1195// CHECK7-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP11]], 11196// CHECK7-NEXT:    store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]1197// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]1198// CHECK7:       omp.inner.for.end18:1199// CHECK7-NEXT:    store i32 123, ptr [[I7]], align 41200// CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB20]], align 41201// CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB21]], align 41202// CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 41203// CHECK7-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 41204// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND24:%.*]]1205// CHECK7:       omp.inner.for.cond24:1206// CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1207// CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]]1208// CHECK7-NEXT:    [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1209// CHECK7-NEXT:    br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]1210// CHECK7:       omp.inner.for.body26:1211// CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1212// CHECK7-NEXT:    [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 11213// CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]1214// CHECK7-NEXT:    store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]1215// CHECK7-NEXT:    [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01216// CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]1217// CHECK7-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]]1218// CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]]1219// CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE31:%.*]]1220// CHECK7:       omp.body.continue31:1221// CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC32:%.*]]1222// CHECK7:       omp.inner.for.inc32:1223// CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1224// CHECK7-NEXT:    [[ADD33:%.*]] = add nsw i32 [[TMP17]], 11225// CHECK7-NEXT:    store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]1226// CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]1227// CHECK7:       omp.inner.for.end34:1228// CHECK7-NEXT:    store i32 123, ptr [[I23]], align 41229// CHECK7-NEXT:    [[A35:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 01230// CHECK7-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], ptr [[A35]], i32 0, i32 01231// CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX36]], align 41232// CHECK7-NEXT:    ret i32 [[TMP18]]1233//1234//1235// CHECK9-LABEL: define {{[^@]+}}@main1236// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {1237// CHECK9-NEXT:  entry:1238// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41239// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41240// CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 81241// CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 41242// CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 81243// CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 81244// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 81245// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 81246// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 81247// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 81248// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 81249// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41250// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41251// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41252// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81253// CHECK9-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 81254// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 81255// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 81256// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 81257// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 81258// CHECK9-NEXT:    [[_TMP8:%.*]] = alloca i32, align 41259// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 41260// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 41261// CHECK9-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81262// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 41263// CHECK9-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 81264// CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 81265// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 81266// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 81267// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 81268// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 81269// CHECK9-NEXT:    [[_TMP24:%.*]] = alloca i32, align 41270// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 41271// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 41272// CHECK9-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81273// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 41274// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41275// CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 81276// CHECK9-NEXT:    store i32 100, ptr [[N]], align 41277// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 41278// CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i641279// CHECK9-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()1280// CHECK9-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 81281// CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 41282// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 81283// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 41284// CHECK9-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 41285// CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 81286// CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 41287// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)1288// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01289// CHECK9-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 81290// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01291// CHECK9-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 81292// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01293// CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 81294// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11295// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 81296// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11297// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 81298// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 11299// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 81300// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21301// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 81302// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21303// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 81304// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 21305// CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 81306// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 21307// CHECK9-NEXT:    store ptr null, ptr [[TMP15]], align 81308// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01309// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01310// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 01311// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 41312// CHECK9-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 41313// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41314// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 01315// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11316// CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11317// CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41318// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41319// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 11320// CHECK9-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i641321// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01322// CHECK9-NEXT:    store i32 3, ptr [[TMP23]], align 41323// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11324// CHECK9-NEXT:    store i32 3, ptr [[TMP24]], align 41325// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21326// CHECK9-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 81327// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31328// CHECK9-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 81329// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41330// CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 81331// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51332// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 81333// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61334// CHECK9-NEXT:    store ptr null, ptr [[TMP29]], align 81335// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71336// CHECK9-NEXT:    store ptr null, ptr [[TMP30]], align 81337// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81338// CHECK9-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 81339// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91340// CHECK9-NEXT:    store i64 0, ptr [[TMP32]], align 81341// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101342// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 41343// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111344// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 41345// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121346// CHECK9-NEXT:    store i32 0, ptr [[TMP35]], align 41347// CHECK9-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])1348// CHECK9-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 01349// CHECK9-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1350// CHECK9:       omp_offload.failed:1351// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1352// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]1353// CHECK9:       omp_offload.cont:1354// CHECK9-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 41355// CHECK9-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 41356// CHECK9-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 81357// CHECK9-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 41358// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)1359// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 01360// CHECK9-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 81361// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 01362// CHECK9-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 81363// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 01364// CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 81365// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 11366// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 81367// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 11368// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 81369// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 11370// CHECK9-NEXT:    store ptr null, ptr [[TMP46]], align 81371// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 21372// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 81373// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 21374// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 81375// CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 21376// CHECK9-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 81377// CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 21378// CHECK9-NEXT:    store ptr null, ptr [[TMP50]], align 81379// CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 01380// CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 01381// CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 01382// CHECK9-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 41383// CHECK9-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 41384// CHECK9-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 41385// CHECK9-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 01386// CHECK9-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 11387// CHECK9-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 11388// CHECK9-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 41389// CHECK9-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 41390// CHECK9-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 11391// CHECK9-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i641392// CHECK9-NEXT:    [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 01393// CHECK9-NEXT:    store i32 3, ptr [[TMP58]], align 41394// CHECK9-NEXT:    [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11395// CHECK9-NEXT:    store i32 3, ptr [[TMP59]], align 41396// CHECK9-NEXT:    [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 21397// CHECK9-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 81398// CHECK9-NEXT:    [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 31399// CHECK9-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 81400// CHECK9-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 41401// CHECK9-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 81402// CHECK9-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 51403// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 81404// CHECK9-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 61405// CHECK9-NEXT:    store ptr null, ptr [[TMP64]], align 81406// CHECK9-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 71407// CHECK9-NEXT:    store ptr null, ptr [[TMP65]], align 81408// CHECK9-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 81409// CHECK9-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 81410// CHECK9-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 91411// CHECK9-NEXT:    store i64 0, ptr [[TMP67]], align 81412// CHECK9-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 101413// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 41414// CHECK9-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 111415// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP69]], align 41416// CHECK9-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 121417// CHECK9-NEXT:    store i32 0, ptr [[TMP70]], align 41418// CHECK9-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]])1419// CHECK9-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 01420// CHECK9-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]1421// CHECK9:       omp_offload.failed16:1422// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]1423// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT17]]1424// CHECK9:       omp_offload.cont17:1425// CHECK9-NEXT:    [[TMP73:%.*]] = load i32, ptr [[N]], align 41426// CHECK9-NEXT:    store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 41427// CHECK9-NEXT:    [[TMP74:%.*]] = load i32, ptr [[N]], align 41428// CHECK9-NEXT:    store i32 [[TMP74]], ptr [[N_CASTED19]], align 41429// CHECK9-NEXT:    [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 81430// CHECK9-NEXT:    [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 41431// CHECK9-NEXT:    store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 41432// CHECK9-NEXT:    [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 81433// CHECK9-NEXT:    [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 41434// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)1435// CHECK9-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 01436// CHECK9-NEXT:    store i64 [[TMP75]], ptr [[TMP79]], align 81437// CHECK9-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 01438// CHECK9-NEXT:    store i64 [[TMP75]], ptr [[TMP80]], align 81439// CHECK9-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 01440// CHECK9-NEXT:    store ptr null, ptr [[TMP81]], align 81441// CHECK9-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 11442// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP82]], align 81443// CHECK9-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 11444// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP83]], align 81445// CHECK9-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 11446// CHECK9-NEXT:    store ptr null, ptr [[TMP84]], align 81447// CHECK9-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 21448// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP85]], align 81449// CHECK9-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 21450// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP86]], align 81451// CHECK9-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 21452// CHECK9-NEXT:    store i64 [[TMP78]], ptr [[TMP87]], align 81453// CHECK9-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 21454// CHECK9-NEXT:    store ptr null, ptr [[TMP88]], align 81455// CHECK9-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 31456// CHECK9-NEXT:    store i64 [[TMP77]], ptr [[TMP89]], align 81457// CHECK9-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 31458// CHECK9-NEXT:    store i64 [[TMP77]], ptr [[TMP90]], align 81459// CHECK9-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 31460// CHECK9-NEXT:    store ptr null, ptr [[TMP91]], align 81461// CHECK9-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 01462// CHECK9-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 01463// CHECK9-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 01464// CHECK9-NEXT:    [[TMP95:%.*]] = load i32, ptr [[N]], align 41465// CHECK9-NEXT:    store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 41466// CHECK9-NEXT:    [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 41467// CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 01468// CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 11469// CHECK9-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 11470// CHECK9-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 41471// CHECK9-NEXT:    [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 41472// CHECK9-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP97]], 11473// CHECK9-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD30]] to i641474// CHECK9-NEXT:    [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 01475// CHECK9-NEXT:    store i32 3, ptr [[TMP99]], align 41476// CHECK9-NEXT:    [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11477// CHECK9-NEXT:    store i32 4, ptr [[TMP100]], align 41478// CHECK9-NEXT:    [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 21479// CHECK9-NEXT:    store ptr [[TMP92]], ptr [[TMP101]], align 81480// CHECK9-NEXT:    [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 31481// CHECK9-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 81482// CHECK9-NEXT:    [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 41483// CHECK9-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 81484// CHECK9-NEXT:    [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 51485// CHECK9-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP104]], align 81486// CHECK9-NEXT:    [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 61487// CHECK9-NEXT:    store ptr null, ptr [[TMP105]], align 81488// CHECK9-NEXT:    [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 71489// CHECK9-NEXT:    store ptr null, ptr [[TMP106]], align 81490// CHECK9-NEXT:    [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 81491// CHECK9-NEXT:    store i64 [[TMP98]], ptr [[TMP107]], align 81492// CHECK9-NEXT:    [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 91493// CHECK9-NEXT:    store i64 0, ptr [[TMP108]], align 81494// CHECK9-NEXT:    [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 101495// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP109]], align 41496// CHECK9-NEXT:    [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 111497// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP110]], align 41498// CHECK9-NEXT:    [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 121499// CHECK9-NEXT:    store i32 0, ptr [[TMP111]], align 41500// CHECK9-NEXT:    [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]])1501// CHECK9-NEXT:    [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 01502// CHECK9-NEXT:    br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]1503// CHECK9:       omp_offload.failed32:1504// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]]1505// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT33]]1506// CHECK9:       omp_offload.cont33:1507// CHECK9-NEXT:    [[TMP114:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41508// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP114]])1509// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41510// CHECK9-NEXT:    [[TMP115:%.*]] = load ptr, ptr [[SAVED_STACK]], align 81511// CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP115]])1512// CHECK9-NEXT:    [[TMP116:%.*]] = load i32, ptr [[RETVAL]], align 41513// CHECK9-NEXT:    ret i32 [[TMP116]]1514//1515//1516// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l941517// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1518// CHECK9-NEXT:  entry:1519// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81520// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81521// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81522// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 81523// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81524// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81525// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81526// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81527// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81528// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41529// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 41530// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 81531// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])1532// CHECK9-NEXT:    ret void1533//1534//1535// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined1536// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1537// CHECK9-NEXT:  entry:1538// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81539// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81540// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81541// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81542// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81543// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41544// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41545// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41546// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41547// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41548// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41549// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41550// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41551// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41552// CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 41553// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81554// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81555// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81556// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81557// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81558// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81559// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81560// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41561// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 41562// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41563// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 01564// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11565// CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11566// CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41567// CHECK9-NEXT:    store i32 0, ptr [[I]], align 41568// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41569// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1570// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1571// CHECK9:       omp.precond.then:1572// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41573// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41574// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 41575// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41576// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41577// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81578// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41579// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1580// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41581// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41582// CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]1583// CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1584// CHECK9:       cond.true:1585// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41586// CHECK9-NEXT:    br label [[COND_END:%.*]]1587// CHECK9:       cond.false:1588// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41589// CHECK9-NEXT:    br label [[COND_END]]1590// CHECK9:       cond.end:1591// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1592// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41593// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41594// CHECK9-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41595// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1596// CHECK9:       omp.inner.for.cond:1597// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]1598// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]1599// CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1600// CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1601// CHECK9:       omp.inner.for.body:1602// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1603// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11604// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1605// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]1606// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]1607// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i641608// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]1609// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]1610// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1611// CHECK9:       omp.body.continue:1612// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1613// CHECK9:       omp.inner.for.inc:1614// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1615// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 11616// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]1617// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]1618// CHECK9:       omp.inner.for.end:1619// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1620// CHECK9:       omp.loop.exit:1621// CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81622// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 41623// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])1624// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41625// CHECK9-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01626// CHECK9-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1627// CHECK9:       .omp.final.then:1628// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41629// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 01630// CHECK9-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11631// CHECK9-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11632// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1633// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 41634// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1635// CHECK9:       .omp.final.done:1636// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]1637// CHECK9:       omp.precond.end:1638// CHECK9-NEXT:    ret void1639//1640//1641// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l981642// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1643// CHECK9-NEXT:  entry:1644// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81645// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81646// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81647// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 81648// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81649// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81650// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81651// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81652// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81653// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41654// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 41655// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 81656// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])1657// CHECK9-NEXT:    ret void1658//1659//1660// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined1661// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1662// CHECK9-NEXT:  entry:1663// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81664// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81665// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81666// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81667// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81668// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41669// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41670// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41671// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41672// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41673// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41674// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41675// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41676// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41677// CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 41678// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81679// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81680// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81681// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81682// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81683// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81684// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81685// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41686// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 41687// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41688// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 01689// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11690// CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 11691// CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 41692// CHECK9-NEXT:    store i32 0, ptr [[I]], align 41693// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41694// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1695// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1696// CHECK9:       omp.precond.then:1697// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41698// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41699// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 41700// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41701// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41702// CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81703// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 41704// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1705// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41706// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41707// CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]1708// CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1709// CHECK9:       cond.true:1710// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41711// CHECK9-NEXT:    br label [[COND_END:%.*]]1712// CHECK9:       cond.false:1713// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41714// CHECK9-NEXT:    br label [[COND_END]]1715// CHECK9:       cond.end:1716// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]1717// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41718// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41719// CHECK9-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 41720// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1721// CHECK9:       omp.inner.for.cond:1722// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1723// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1724// CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]1725// CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1726// CHECK9:       omp.inner.for.body:1727// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1728// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 11729// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1730// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]1731// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]1732// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i641733// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]1734// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]1735// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1736// CHECK9:       omp.body.continue:1737// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1738// CHECK9:       omp.inner.for.inc:1739// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1740// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 11741// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1742// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1743// CHECK9:       omp.inner.for.end:1744// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1745// CHECK9:       omp.loop.exit:1746// CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81747// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 41748// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])1749// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41750// CHECK9-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 01751// CHECK9-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1752// CHECK9:       .omp.final.then:1753// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41754// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 01755// CHECK9-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 11756// CHECK9-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 11757// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]1758// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 41759// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1760// CHECK9:       .omp.final.done:1761// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]1762// CHECK9:       omp.precond.end:1763// CHECK9-NEXT:    ret void1764//1765//1766// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1021767// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {1768// CHECK9-NEXT:  entry:1769// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81770// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81771// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81772// CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 81773// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 81774// CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 81775// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81776// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81777// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81778// CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 81779// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81780// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81781// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41782// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 41783// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 81784// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 41785// CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 41786// CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 81787// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])1788// CHECK9-NEXT:    ret void1789//1790//1791// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined1792// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {1793// CHECK9-NEXT:  entry:1794// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81795// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81796// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 81797// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 81798// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81799// CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 81800// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41801// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41802// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 41803// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 41804// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41805// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41806// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41807// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41808// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41809// CHECK9-NEXT:    [[I4:%.*]] = alloca i32, align 41810// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81811// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81812// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 81813// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 81814// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81815// CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 81816// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 81817// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 81818// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 41819// CHECK9-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 41820// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41821// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 01822// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11823// CHECK9-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 11824// CHECK9-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 41825// CHECK9-NEXT:    store i32 0, ptr [[I]], align 41826// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41827// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]1828// CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]1829// CHECK9:       omp.precond.then:1830// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41831// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41832// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 41833// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41834// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41835// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 41836// CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81837// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 41838// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])1839// CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]1840// CHECK9:       omp.dispatch.cond:1841// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41842// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41843// CHECK9-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]1844// CHECK9-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1845// CHECK9:       cond.true:1846// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41847// CHECK9-NEXT:    br label [[COND_END:%.*]]1848// CHECK9:       cond.false:1849// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41850// CHECK9-NEXT:    br label [[COND_END]]1851// CHECK9:       cond.end:1852// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]1853// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41854// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41855// CHECK9-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 41856// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41857// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41858// CHECK9-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]1859// CHECK9-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]1860// CHECK9:       omp.dispatch.body:1861// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1862// CHECK9:       omp.inner.for.cond:1863// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]1864// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]1865// CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]1866// CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1867// CHECK9:       omp.inner.for.body:1868// CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1869// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 11870// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1871// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]1872// CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]1873// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i641874// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]1875// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]1876// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1877// CHECK9:       omp.body.continue:1878// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1879// CHECK9:       omp.inner.for.inc:1880// CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1881// CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 11882// CHECK9-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]1883// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]1884// CHECK9:       omp.inner.for.end:1885// CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]1886// CHECK9:       omp.dispatch.inc:1887// CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41888// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41889// CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]1890// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 41891// CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41892// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41893// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]1894// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 41895// CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]1896// CHECK9:       omp.dispatch.end:1897// CHECK9-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81898// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 41899// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])1900// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41901// CHECK9-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 01902// CHECK9-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1903// CHECK9:       .omp.final.then:1904// CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 41905// CHECK9-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 01906// CHECK9-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 11907// CHECK9-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 11908// CHECK9-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]1909// CHECK9-NEXT:    store i32 [[ADD14]], ptr [[I4]], align 41910// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]1911// CHECK9:       .omp.final.done:1912// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]1913// CHECK9:       omp.precond.end:1914// CHECK9-NEXT:    ret void1915//1916//1917// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_1918// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1919// CHECK9-NEXT:  entry:1920// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41921// CHECK9-NEXT:    [[A:%.*]] = alloca [10 x i32], align 41922// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 81923// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 81924// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 81925// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41926// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81927// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 81928// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 81929// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 81930// CHECK9-NEXT:    [[_TMP4:%.*]] = alloca i32, align 41931// CHECK9-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81932// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 81933// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 81934// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 81935// CHECK9-NEXT:    [[_TMP11:%.*]] = alloca i32, align 41936// CHECK9-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 81937// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41938// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01939// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 81940// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01941// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 81942// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01943// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 81944// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01945// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01946// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01947// CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 41948// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11949// CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 41950// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21951// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 81952// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31953// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 81954// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41955// CHECK9-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP9]], align 81956// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51957// CHECK9-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP10]], align 81958// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61959// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 81960// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71961// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 81962// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81963// CHECK9-NEXT:    store i64 10, ptr [[TMP13]], align 81964// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91965// CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 81966// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101967// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41968// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111969// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 41970// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121971// CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 41972// CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]])1973// CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01974// CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1975// CHECK9:       omp_offload.failed:1976// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]]1977// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]1978// CHECK9:       omp_offload.cont:1979// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 01980// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP20]], align 81981// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 01982// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP21]], align 81983// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 01984// CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 81985// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 01986// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 01987// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 01988// CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 41989// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11990// CHECK9-NEXT:    store i32 1, ptr [[TMP26]], align 41991// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 21992// CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 81993// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 31994// CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 81995// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 41996// CHECK9-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP29]], align 81997// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 51998// CHECK9-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP30]], align 81999// CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 62000// CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 82001// CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 72002// CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 82003// CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 82004// CHECK9-NEXT:    store i64 10, ptr [[TMP33]], align 82005// CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 92006// CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 82007// CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 102008// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 42009// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 112010// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 42011// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 122012// CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 42013// CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]])2014// CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 02015// CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]2016// CHECK9:       omp_offload.failed6:2017// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]]2018// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT7]]2019// CHECK9:       omp_offload.cont7:2020// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02021// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP40]], align 82022// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02023// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP41]], align 82024// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 02025// CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 82026// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 02027// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 02028// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 02029// CHECK9-NEXT:    store i32 3, ptr [[TMP45]], align 42030// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12031// CHECK9-NEXT:    store i32 1, ptr [[TMP46]], align 42032// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 22033// CHECK9-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 82034// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 32035// CHECK9-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 82036// CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 42037// CHECK9-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP49]], align 82038// CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 52039// CHECK9-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP50]], align 82040// CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 62041// CHECK9-NEXT:    store ptr null, ptr [[TMP51]], align 82042// CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 72043// CHECK9-NEXT:    store ptr null, ptr [[TMP52]], align 82044// CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 82045// CHECK9-NEXT:    store i64 10, ptr [[TMP53]], align 82046// CHECK9-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 92047// CHECK9-NEXT:    store i64 0, ptr [[TMP54]], align 82048// CHECK9-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 102049// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 42050// CHECK9-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 112051// CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 42052// CHECK9-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 122053// CHECK9-NEXT:    store i32 0, ptr [[TMP57]], align 42054// CHECK9-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]])2055// CHECK9-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 02056// CHECK9-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]2057// CHECK9:       omp_offload.failed13:2058// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]2059// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT14]]2060// CHECK9:       omp_offload.cont14:2061// CHECK9-NEXT:    ret i32 02062//2063//2064// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l762065// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2066// CHECK9-NEXT:  entry:2067// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82068// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82069// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82070// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]])2071// CHECK9-NEXT:    ret void2072//2073//2074// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined2075// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2076// CHECK9-NEXT:  entry:2077// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82078// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82079// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82080// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42081// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 42082// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42083// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42084// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42085// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42086// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 42087// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82088// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82089// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82090// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82091// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42092// CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 42093// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42094// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42095// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82096// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42097// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2098// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42099// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92100// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2101// CHECK9:       cond.true:2102// CHECK9-NEXT:    br label [[COND_END:%.*]]2103// CHECK9:       cond.false:2104// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42105// CHECK9-NEXT:    br label [[COND_END]]2106// CHECK9:       cond.end:2107// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2108// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42109// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42110// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42111// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2112// CHECK9:       omp.inner.for.cond:2113// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]2114// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]2115// CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2116// CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2117// CHECK9:       omp.inner.for.body:2118// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2119// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12120// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2121// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]2122// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]2123// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642124// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2125// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]2126// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2127// CHECK9:       omp.body.continue:2128// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2129// CHECK9:       omp.inner.for.inc:2130// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2131// CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 12132// CHECK9-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]2133// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]2134// CHECK9:       omp.inner.for.end:2135// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2136// CHECK9:       omp.loop.exit:2137// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2138// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42139// CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02140// CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2141// CHECK9:       .omp.final.then:2142// CHECK9-NEXT:    store i32 10, ptr [[I]], align 42143// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]2144// CHECK9:       .omp.final.done:2145// CHECK9-NEXT:    ret void2146//2147//2148// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l802149// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2150// CHECK9-NEXT:  entry:2151// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82152// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82153// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82154// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]])2155// CHECK9-NEXT:    ret void2156//2157//2158// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined2159// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2160// CHECK9-NEXT:  entry:2161// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82162// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82163// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82164// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42165// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 42166// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42167// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42168// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42169// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42170// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 42171// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82172// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82173// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82174// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82175// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42176// CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 42177// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42178// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42179// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82180// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42181// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2182// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42183// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92184// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2185// CHECK9:       cond.true:2186// CHECK9-NEXT:    br label [[COND_END:%.*]]2187// CHECK9:       cond.false:2188// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42189// CHECK9-NEXT:    br label [[COND_END]]2190// CHECK9:       cond.end:2191// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2192// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42193// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42194// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42195// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2196// CHECK9:       omp.inner.for.cond:2197// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]2198// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]2199// CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2200// CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2201// CHECK9:       omp.inner.for.body:2202// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2203// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 12204// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2205// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]2206// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]2207// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642208// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2209// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]2210// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2211// CHECK9:       omp.body.continue:2212// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2213// CHECK9:       omp.inner.for.inc:2214// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2215// CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 12216// CHECK9-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]2217// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]2218// CHECK9:       omp.inner.for.end:2219// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2220// CHECK9:       omp.loop.exit:2221// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2222// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42223// CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 02224// CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2225// CHECK9:       .omp.final.then:2226// CHECK9-NEXT:    store i32 10, ptr [[I]], align 42227// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]2228// CHECK9:       .omp.final.done:2229// CHECK9-NEXT:    ret void2230//2231//2232// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l842233// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2234// CHECK9-NEXT:  entry:2235// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82236// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82237// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82238// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])2239// CHECK9-NEXT:    ret void2240//2241//2242// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined2243// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {2244// CHECK9-NEXT:  entry:2245// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 82246// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 82247// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 82248// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42249// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 42250// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42251// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42252// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42253// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42254// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 42255// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 82256// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 82257// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 82258// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 82259// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42260// CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 42261// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42262// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42263// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 82264// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 42265// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)2266// CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]2267// CHECK9:       omp.dispatch.cond:2268// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42269// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 92270// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2271// CHECK9:       cond.true:2272// CHECK9-NEXT:    br label [[COND_END:%.*]]2273// CHECK9:       cond.false:2274// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42275// CHECK9-NEXT:    br label [[COND_END]]2276// CHECK9:       cond.end:2277// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]2278// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42279// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42280// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 42281// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42282// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42283// CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]2284// CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2285// CHECK9:       omp.dispatch.body:2286// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2287// CHECK9:       omp.inner.for.cond:2288// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]2289// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]2290// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]2291// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2292// CHECK9:       omp.inner.for.body:2293// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2294// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 12295// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2296// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]2297// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]2298// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i642299// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]2300// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]]2301// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2302// CHECK9:       omp.body.continue:2303// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2304// CHECK9:       omp.inner.for.inc:2305// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2306// CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 12307// CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]2308// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]2309// CHECK9:       omp.inner.for.end:2310// CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]2311// CHECK9:       omp.dispatch.inc:2312// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42313// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42314// CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]2315// CHECK9-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 42316// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42317// CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42318// CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]2319// CHECK9-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 42320// CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]2321// CHECK9:       omp.dispatch.end:2322// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])2323// CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42324// CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 02325// CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2326// CHECK9:       .omp.final.then:2327// CHECK9-NEXT:    store i32 10, ptr [[I]], align 42328// CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]2329// CHECK9:       .omp.final.done:2330// CHECK9-NEXT:    ret void2331//2332//2333// CHECK11-LABEL: define {{[^@]+}}@main2334// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {2335// CHECK11-NEXT:  entry:2336// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 42337// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 42338// CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 42339// CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 42340// CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 42341// CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 42342// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 42343// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 42344// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 42345// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 42346// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 42347// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 42348// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42349// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42350// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 82351// CHECK11-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 42352// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 42353// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 42354// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 42355// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 42356// CHECK11-NEXT:    [[_TMP8:%.*]] = alloca i32, align 42357// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 42358// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 42359// CHECK11-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82360// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 42361// CHECK11-NEXT:    [[N_CASTED19:%.*]] = alloca i32, align 42362// CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 42363// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 42364// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 42365// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 42366// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 42367// CHECK11-NEXT:    [[_TMP24:%.*]] = alloca i32, align 42368// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 42369// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 42370// CHECK11-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 82371// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 42372// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 42373// CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 42374// CHECK11-NEXT:    store i32 100, ptr [[N]], align 42375// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 42376// CHECK11-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()2377// CHECK11-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 42378// CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 42379// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 42380// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 42381// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 42382// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 42383// CHECK11-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 42384// CHECK11-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i642385// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)2386// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02387// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 42388// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02389// CHECK11-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 42390// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 02391// CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 42392// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 12393// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 42394// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 12395// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 42396// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 12397// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 42398// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 22399// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 42400// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 22401// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 42402// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 22403// CHECK11-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 42404// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 22405// CHECK11-NEXT:    store ptr null, ptr [[TMP15]], align 42406// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 02407// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 02408// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 02409// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 42410// CHECK11-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 42411// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42412// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 02413// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 12414// CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12415// CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42416// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42417// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 12418// CHECK11-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i642419// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 02420// CHECK11-NEXT:    store i32 3, ptr [[TMP23]], align 42421// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12422// CHECK11-NEXT:    store i32 3, ptr [[TMP24]], align 42423// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 22424// CHECK11-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 42425// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 32426// CHECK11-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 42427// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 42428// CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 42429// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 52430// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 42431// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 62432// CHECK11-NEXT:    store ptr null, ptr [[TMP29]], align 42433// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 72434// CHECK11-NEXT:    store ptr null, ptr [[TMP30]], align 42435// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 82436// CHECK11-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 82437// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 92438// CHECK11-NEXT:    store i64 0, ptr [[TMP32]], align 82439// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 102440// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 42441// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 112442// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 42443// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 122444// CHECK11-NEXT:    store i32 0, ptr [[TMP35]], align 42445// CHECK11-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])2446// CHECK11-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 02447// CHECK11-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]2448// CHECK11:       omp_offload.failed:2449// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]2450// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]2451// CHECK11:       omp_offload.cont:2452// CHECK11-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 42453// CHECK11-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 42454// CHECK11-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 42455// CHECK11-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 42456// CHECK11-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i642457// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)2458// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 02459// CHECK11-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 42460// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 02461// CHECK11-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 42462// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 02463// CHECK11-NEXT:    store ptr null, ptr [[TMP44]], align 42464// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 12465// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 42466// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 12467// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 42468// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 12469// CHECK11-NEXT:    store ptr null, ptr [[TMP47]], align 42470// CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 22471// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 42472// CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 22473// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 42474// CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 22475// CHECK11-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 42476// CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 22477// CHECK11-NEXT:    store ptr null, ptr [[TMP51]], align 42478// CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 02479// CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 02480// CHECK11-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 02481// CHECK11-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 42482// CHECK11-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 42483// CHECK11-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 42484// CHECK11-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 02485// CHECK11-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 12486// CHECK11-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 12487// CHECK11-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 42488// CHECK11-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 42489// CHECK11-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 12490// CHECK11-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i642491// CHECK11-NEXT:    [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 02492// CHECK11-NEXT:    store i32 3, ptr [[TMP59]], align 42493// CHECK11-NEXT:    [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12494// CHECK11-NEXT:    store i32 3, ptr [[TMP60]], align 42495// CHECK11-NEXT:    [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 22496// CHECK11-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 42497// CHECK11-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 32498// CHECK11-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 42499// CHECK11-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 42500// CHECK11-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 42501// CHECK11-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 52502// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 42503// CHECK11-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 62504// CHECK11-NEXT:    store ptr null, ptr [[TMP65]], align 42505// CHECK11-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 72506// CHECK11-NEXT:    store ptr null, ptr [[TMP66]], align 42507// CHECK11-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 82508// CHECK11-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 82509// CHECK11-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 92510// CHECK11-NEXT:    store i64 0, ptr [[TMP68]], align 82511// CHECK11-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 102512// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 42513// CHECK11-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 112514// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP70]], align 42515// CHECK11-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 122516// CHECK11-NEXT:    store i32 0, ptr [[TMP71]], align 42517// CHECK11-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]])2518// CHECK11-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 02519// CHECK11-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]2520// CHECK11:       omp_offload.failed16:2521// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]2522// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT17]]2523// CHECK11:       omp_offload.cont17:2524// CHECK11-NEXT:    [[TMP74:%.*]] = load i32, ptr [[N]], align 42525// CHECK11-NEXT:    store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 42526// CHECK11-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N]], align 42527// CHECK11-NEXT:    store i32 [[TMP75]], ptr [[N_CASTED19]], align 42528// CHECK11-NEXT:    [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 42529// CHECK11-NEXT:    [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 42530// CHECK11-NEXT:    store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 42531// CHECK11-NEXT:    [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 42532// CHECK11-NEXT:    [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 42533// CHECK11-NEXT:    [[TMP80:%.*]] = sext i32 [[TMP79]] to i642534// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)2535// CHECK11-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 02536// CHECK11-NEXT:    store i32 [[TMP76]], ptr [[TMP81]], align 42537// CHECK11-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 02538// CHECK11-NEXT:    store i32 [[TMP76]], ptr [[TMP82]], align 42539// CHECK11-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 02540// CHECK11-NEXT:    store ptr null, ptr [[TMP83]], align 42541// CHECK11-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 12542// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP84]], align 42543// CHECK11-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 12544// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP85]], align 42545// CHECK11-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 12546// CHECK11-NEXT:    store ptr null, ptr [[TMP86]], align 42547// CHECK11-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 22548// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP87]], align 42549// CHECK11-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 22550// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP88]], align 42551// CHECK11-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 22552// CHECK11-NEXT:    store i64 [[TMP80]], ptr [[TMP89]], align 42553// CHECK11-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 22554// CHECK11-NEXT:    store ptr null, ptr [[TMP90]], align 42555// CHECK11-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 32556// CHECK11-NEXT:    store i32 [[TMP78]], ptr [[TMP91]], align 42557// CHECK11-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 32558// CHECK11-NEXT:    store i32 [[TMP78]], ptr [[TMP92]], align 42559// CHECK11-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 32560// CHECK11-NEXT:    store ptr null, ptr [[TMP93]], align 42561// CHECK11-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 02562// CHECK11-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 02563// CHECK11-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 02564// CHECK11-NEXT:    [[TMP97:%.*]] = load i32, ptr [[N]], align 42565// CHECK11-NEXT:    store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 42566// CHECK11-NEXT:    [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 42567// CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 02568// CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 12569// CHECK11-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 12570// CHECK11-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 42571// CHECK11-NEXT:    [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 42572// CHECK11-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP99]], 12573// CHECK11-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD30]] to i642574// CHECK11-NEXT:    [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 02575// CHECK11-NEXT:    store i32 3, ptr [[TMP101]], align 42576// CHECK11-NEXT:    [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12577// CHECK11-NEXT:    store i32 4, ptr [[TMP102]], align 42578// CHECK11-NEXT:    [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 22579// CHECK11-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 42580// CHECK11-NEXT:    [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 32581// CHECK11-NEXT:    store ptr [[TMP95]], ptr [[TMP104]], align 42582// CHECK11-NEXT:    [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 42583// CHECK11-NEXT:    store ptr [[TMP96]], ptr [[TMP105]], align 42584// CHECK11-NEXT:    [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 52585// CHECK11-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP106]], align 42586// CHECK11-NEXT:    [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 62587// CHECK11-NEXT:    store ptr null, ptr [[TMP107]], align 42588// CHECK11-NEXT:    [[TMP108:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 72589// CHECK11-NEXT:    store ptr null, ptr [[TMP108]], align 42590// CHECK11-NEXT:    [[TMP109:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 82591// CHECK11-NEXT:    store i64 [[TMP100]], ptr [[TMP109]], align 82592// CHECK11-NEXT:    [[TMP110:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 92593// CHECK11-NEXT:    store i64 0, ptr [[TMP110]], align 82594// CHECK11-NEXT:    [[TMP111:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 102595// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP111]], align 42596// CHECK11-NEXT:    [[TMP112:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 112597// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP112]], align 42598// CHECK11-NEXT:    [[TMP113:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 122599// CHECK11-NEXT:    store i32 0, ptr [[TMP113]], align 42600// CHECK11-NEXT:    [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]])2601// CHECK11-NEXT:    [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 02602// CHECK11-NEXT:    br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]2603// CHECK11:       omp_offload.failed32:2604// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]]2605// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT33]]2606// CHECK11:       omp_offload.cont33:2607// CHECK11-NEXT:    [[TMP116:%.*]] = load i32, ptr [[ARGC_ADDR]], align 42608// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP116]])2609// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 42610// CHECK11-NEXT:    [[TMP117:%.*]] = load ptr, ptr [[SAVED_STACK]], align 42611// CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP117]])2612// CHECK11-NEXT:    [[TMP118:%.*]] = load i32, ptr [[RETVAL]], align 42613// CHECK11-NEXT:    ret i32 [[TMP118]]2614//2615//2616// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l942617// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {2618// CHECK11-NEXT:  entry:2619// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42620// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42621// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42622// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 42623// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42624// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42625// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42626// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42627// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42628// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42629// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 42630// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 42631// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])2632// CHECK11-NEXT:    ret void2633//2634//2635// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined2636// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2637// CHECK11-NEXT:  entry:2638// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42639// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42640// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42641// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42642// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42643// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42644// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 42645// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42646// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42647// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42648// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42649// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42650// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42651// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42652// CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 42653// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42654// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42655// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42656// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42657// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42658// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42659// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42660// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42661// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 42662// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42663// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02664// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 12665// CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12666// CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42667// CHECK11-NEXT:    store i32 0, ptr [[I]], align 42668// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42669// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]2670// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2671// CHECK11:       omp.precond.then:2672// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42673// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42674// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 42675// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42676// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42677// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42678// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42679// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2680// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42681// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42682// CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]2683// CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2684// CHECK11:       cond.true:2685// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42686// CHECK11-NEXT:    br label [[COND_END:%.*]]2687// CHECK11:       cond.false:2688// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42689// CHECK11-NEXT:    br label [[COND_END]]2690// CHECK11:       cond.end:2691// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]2692// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42693// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42694// CHECK11-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 42695// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2696// CHECK11:       omp.inner.for.cond:2697// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]2698// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]2699// CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]2700// CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2701// CHECK11:       omp.inner.for.body:2702// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2703// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 12704// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2705// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]2706// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]2707// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]]2708// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]2709// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2710// CHECK11:       omp.body.continue:2711// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2712// CHECK11:       omp.inner.for.inc:2713// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2714// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 12715// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]2716// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]2717// CHECK11:       omp.inner.for.end:2718// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2719// CHECK11:       omp.loop.exit:2720// CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42721// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 42722// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])2723// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42724// CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 02725// CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2726// CHECK11:       .omp.final.then:2727// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42728// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 02729// CHECK11-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12730// CHECK11-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 12731// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]2732// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 42733// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2734// CHECK11:       .omp.final.done:2735// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]2736// CHECK11:       omp.precond.end:2737// CHECK11-NEXT:    ret void2738//2739//2740// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l982741// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2742// CHECK11-NEXT:  entry:2743// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42744// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42745// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42746// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 42747// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42748// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42749// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42750// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42751// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42752// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42753// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 42754// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 42755// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])2756// CHECK11-NEXT:    ret void2757//2758//2759// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined2760// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {2761// CHECK11-NEXT:  entry:2762// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42763// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42764// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42765// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42766// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42767// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42768// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 42769// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 42770// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42771// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42772// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42773// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42774// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42775// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42776// CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 42777// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42778// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42779// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42780// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42781// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42782// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42783// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42784// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42785// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 42786// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42787// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02788// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 12789// CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 12790// CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 42791// CHECK11-NEXT:    store i32 0, ptr [[I]], align 42792// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42793// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]2794// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2795// CHECK11:       omp.precond.then:2796// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42797// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42798// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 42799// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42800// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42801// CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42802// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 42803// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)2804// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42805// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42806// CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]2807// CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2808// CHECK11:       cond.true:2809// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42810// CHECK11-NEXT:    br label [[COND_END:%.*]]2811// CHECK11:       cond.false:2812// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42813// CHECK11-NEXT:    br label [[COND_END]]2814// CHECK11:       cond.end:2815// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]2816// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42817// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42818// CHECK11-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 42819// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2820// CHECK11:       omp.inner.for.cond:2821// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]2822// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]2823// CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]2824// CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2825// CHECK11:       omp.inner.for.body:2826// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2827// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 12828// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2829// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]2830// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]2831// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]]2832// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]2833// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2834// CHECK11:       omp.body.continue:2835// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2836// CHECK11:       omp.inner.for.inc:2837// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2838// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 12839// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]2840// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]2841// CHECK11:       omp.inner.for.end:2842// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]2843// CHECK11:       omp.loop.exit:2844// CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42845// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 42846// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])2847// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42848// CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 02849// CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]2850// CHECK11:       .omp.final.then:2851// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 42852// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 02853// CHECK11-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 12854// CHECK11-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 12855// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]2856// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 42857// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]2858// CHECK11:       .omp.final.done:2859// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]2860// CHECK11:       omp.precond.end:2861// CHECK11-NEXT:    ret void2862//2863//2864// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l1022865// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {2866// CHECK11-NEXT:  entry:2867// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42868// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42869// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42870// CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 42871// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 42872// CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 42873// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42874// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42875// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42876// CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 42877// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42878// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42879// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42880// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 42881// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 42882// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 42883// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 42884// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 42885// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])2886// CHECK11-NEXT:    ret void2887//2888//2889// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined2890// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {2891// CHECK11-NEXT:  entry:2892// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 42893// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 42894// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 42895// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 42896// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 42897// CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 42898// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 42899// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 42900// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 42901// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 42902// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 42903// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 42904// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 42905// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 42906// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 42907// CHECK11-NEXT:    [[I4:%.*]] = alloca i32, align 42908// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 42909// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 42910// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 42911// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 42912// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 42913// CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 42914// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 42915// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 42916// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 42917// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 42918// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42919// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 02920// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 12921// CHECK11-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 12922// CHECK11-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 42923// CHECK11-NEXT:    store i32 0, ptr [[I]], align 42924// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 42925// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]2926// CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]2927// CHECK11:       omp.precond.then:2928// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 42929// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42930// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 42931// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 42932// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 42933// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 42934// CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42935// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 42936// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])2937// CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]2938// CHECK11:       omp.dispatch.cond:2939// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42940// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42941// CHECK11-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]2942// CHECK11-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]2943// CHECK11:       cond.true:2944// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 42945// CHECK11-NEXT:    br label [[COND_END:%.*]]2946// CHECK11:       cond.false:2947// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42948// CHECK11-NEXT:    br label [[COND_END]]2949// CHECK11:       cond.end:2950// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]2951// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 42952// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42953// CHECK11-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 42954// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 42955// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42956// CHECK11-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]2957// CHECK11-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]2958// CHECK11:       omp.dispatch.body:2959// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]2960// CHECK11:       omp.inner.for.cond:2961// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]2962// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]2963// CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]2964// CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]2965// CHECK11:       omp.inner.for.body:2966// CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2967// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 12968// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]2969// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]2970// CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]2971// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]]2972// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]2973// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]2974// CHECK11:       omp.body.continue:2975// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]2976// CHECK11:       omp.inner.for.inc:2977// CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2978// CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 12979// CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]2980// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]2981// CHECK11:       omp.inner.for.end:2982// CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]2983// CHECK11:       omp.dispatch.inc:2984// CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42985// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42986// CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]2987// CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 42988// CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 42989// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 42990// CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]2991// CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 42992// CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]2993// CHECK11:       omp.dispatch.end:2994// CHECK11-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 42995// CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 42996// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])2997// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 42998// CHECK11-NEXT:    [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 02999// CHECK11-NEXT:    br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3000// CHECK11:       .omp.final.then:3001// CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43002// CHECK11-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 03003// CHECK11-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 13004// CHECK11-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 13005// CHECK11-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]3006// CHECK11-NEXT:    store i32 [[ADD14]], ptr [[I4]], align 43007// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]3008// CHECK11:       .omp.final.done:3009// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]3010// CHECK11:       omp.precond.end:3011// CHECK11-NEXT:    ret void3012//3013//3014// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3015// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {3016// CHECK11-NEXT:  entry:3017// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 43018// CHECK11-NEXT:    [[A:%.*]] = alloca [10 x i32], align 43019// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 43020// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 43021// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 43022// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 43023// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 83024// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 43025// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 43026// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 43027// CHECK11-NEXT:    [[_TMP4:%.*]] = alloca i32, align 43028// CHECK11-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83029// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 43030// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 43031// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 43032// CHECK11-NEXT:    [[_TMP11:%.*]] = alloca i32, align 43033// CHECK11-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 83034// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43035// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03036// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 43037// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03038// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 43039// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 03040// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 43041// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 03042// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 03043// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 03044// CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 43045// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 13046// CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 43047// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 23048// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 43049// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 33050// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 43051// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 43052// CHECK11-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP9]], align 43053// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 53054// CHECK11-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP10]], align 43055// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 63056// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 43057// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 73058// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 43059// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 83060// CHECK11-NEXT:    store i64 10, ptr [[TMP13]], align 83061// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 93062// CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 83063// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 103064// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 43065// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 113066// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 43067// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 123068// CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 43069// CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]])3070// CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 03071// CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]3072// CHECK11:       omp_offload.failed:3073// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]]3074// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]3075// CHECK11:       omp_offload.cont:3076// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 03077// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP20]], align 43078// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 03079// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP21]], align 43080// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 03081// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 43082// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 03083// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 03084// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 03085// CHECK11-NEXT:    store i32 3, ptr [[TMP25]], align 43086// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 13087// CHECK11-NEXT:    store i32 1, ptr [[TMP26]], align 43088// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 23089// CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 43090// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 33091// CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 43092// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 43093// CHECK11-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP29]], align 43094// CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 53095// CHECK11-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP30]], align 43096// CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 63097// CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 43098// CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 73099// CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 43100// CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 83101// CHECK11-NEXT:    store i64 10, ptr [[TMP33]], align 83102// CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 93103// CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 83104// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 103105// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 43106// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 113107// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 43108// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 123109// CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 43110// CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]])3111// CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 03112// CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]3113// CHECK11:       omp_offload.failed6:3114// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]]3115// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT7]]3116// CHECK11:       omp_offload.cont7:3117// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 03118// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP40]], align 43119// CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 03120// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP41]], align 43121// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 03122// CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 43123// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 03124// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 03125// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 03126// CHECK11-NEXT:    store i32 3, ptr [[TMP45]], align 43127// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 13128// CHECK11-NEXT:    store i32 1, ptr [[TMP46]], align 43129// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 23130// CHECK11-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 43131// CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 33132// CHECK11-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 43133// CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 43134// CHECK11-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP49]], align 43135// CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 53136// CHECK11-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP50]], align 43137// CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 63138// CHECK11-NEXT:    store ptr null, ptr [[TMP51]], align 43139// CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 73140// CHECK11-NEXT:    store ptr null, ptr [[TMP52]], align 43141// CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 83142// CHECK11-NEXT:    store i64 10, ptr [[TMP53]], align 83143// CHECK11-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 93144// CHECK11-NEXT:    store i64 0, ptr [[TMP54]], align 83145// CHECK11-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 103146// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 43147// CHECK11-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 113148// CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 43149// CHECK11-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 123150// CHECK11-NEXT:    store i32 0, ptr [[TMP57]], align 43151// CHECK11-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]])3152// CHECK11-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 03153// CHECK11-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]3154// CHECK11:       omp_offload.failed13:3155// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]3156// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT14]]3157// CHECK11:       omp_offload.cont14:3158// CHECK11-NEXT:    ret i32 03159//3160//3161// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l763162// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3163// CHECK11-NEXT:  entry:3164// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43165// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43166// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43167// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]])3168// CHECK11-NEXT:    ret void3169//3170//3171// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined3172// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3173// CHECK11-NEXT:  entry:3174// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43175// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43176// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43177// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43178// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 43179// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43180// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43181// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43182// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43183// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 43184// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43185// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43186// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43187// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43188// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43189// CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 43190// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43191// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43192// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43193// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43194// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3195// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43196// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93197// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3198// CHECK11:       cond.true:3199// CHECK11-NEXT:    br label [[COND_END:%.*]]3200// CHECK11:       cond.false:3201// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43202// CHECK11-NEXT:    br label [[COND_END]]3203// CHECK11:       cond.end:3204// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3205// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43206// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43207// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43208// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3209// CHECK11:       omp.inner.for.cond:3210// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]3211// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]3212// CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3213// CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3214// CHECK11:       omp.inner.for.body:3215// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3216// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13217// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3218// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]3219// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]3220// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]3221// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]3222// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3223// CHECK11:       omp.body.continue:3224// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3225// CHECK11:       omp.inner.for.inc:3226// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3227// CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13228// CHECK11-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]3229// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]3230// CHECK11:       omp.inner.for.end:3231// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3232// CHECK11:       omp.loop.exit:3233// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3234// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43235// CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03236// CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3237// CHECK11:       .omp.final.then:3238// CHECK11-NEXT:    store i32 10, ptr [[I]], align 43239// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]3240// CHECK11:       .omp.final.done:3241// CHECK11-NEXT:    ret void3242//3243//3244// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l803245// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3246// CHECK11-NEXT:  entry:3247// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43248// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43249// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43250// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]])3251// CHECK11-NEXT:    ret void3252//3253//3254// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined3255// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3256// CHECK11-NEXT:  entry:3257// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43258// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43259// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43260// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43261// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 43262// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43263// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43264// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43265// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43266// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 43267// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43268// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43269// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43270// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43271// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43272// CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 43273// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43274// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43275// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43276// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43277// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)3278// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43279// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93280// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3281// CHECK11:       cond.true:3282// CHECK11-NEXT:    br label [[COND_END:%.*]]3283// CHECK11:       cond.false:3284// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43285// CHECK11-NEXT:    br label [[COND_END]]3286// CHECK11:       cond.end:3287// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3288// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43289// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43290// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43291// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3292// CHECK11:       omp.inner.for.cond:3293// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]3294// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]3295// CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3296// CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3297// CHECK11:       omp.inner.for.body:3298// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3299// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 13300// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3301// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]3302// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]3303// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]3304// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]3305// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3306// CHECK11:       omp.body.continue:3307// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3308// CHECK11:       omp.inner.for.inc:3309// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3310// CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 13311// CHECK11-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]3312// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]3313// CHECK11:       omp.inner.for.end:3314// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]3315// CHECK11:       omp.loop.exit:3316// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3317// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43318// CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 03319// CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3320// CHECK11:       .omp.final.then:3321// CHECK11-NEXT:    store i32 10, ptr [[I]], align 43322// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]3323// CHECK11:       .omp.final.done:3324// CHECK11-NEXT:    ret void3325//3326//3327// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l843328// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3329// CHECK11-NEXT:  entry:3330// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43331// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43332// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43333// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])3334// CHECK11-NEXT:    ret void3335//3336//3337// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined3338// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {3339// CHECK11-NEXT:  entry:3340// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 43341// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 43342// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 43343// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43344// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 43345// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43346// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43347// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 43348// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 43349// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 43350// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 43351// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 43352// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 43353// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 43354// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43355// CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 43356// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 43357// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 43358// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 43359// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 43360// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)3361// CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]3362// CHECK11:       omp.dispatch.cond:3363// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43364// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 93365// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]3366// CHECK11:       cond.true:3367// CHECK11-NEXT:    br label [[COND_END:%.*]]3368// CHECK11:       cond.false:3369// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43370// CHECK11-NEXT:    br label [[COND_END]]3371// CHECK11:       cond.end:3372// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]3373// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 43374// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43375// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 43376// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 43377// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43378// CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]3379// CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]3380// CHECK11:       omp.dispatch.body:3381// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3382// CHECK11:       omp.inner.for.cond:3383// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]3384// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]3385// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3386// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3387// CHECK11:       omp.inner.for.body:3388// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3389// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13390// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3391// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]3392// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]3393// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]3394// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP28]]3395// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3396// CHECK11:       omp.body.continue:3397// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3398// CHECK11:       omp.inner.for.inc:3399// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3400// CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 13401// CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]3402// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]3403// CHECK11:       omp.inner.for.end:3404// CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]3405// CHECK11:       omp.dispatch.inc:3406// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43407// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43408// CHECK11-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]3409// CHECK11-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 43410// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 43411// CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 43412// CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]3413// CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 43414// CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]3415// CHECK11:       omp.dispatch.end:3416// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])3417// CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 43418// CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 03419// CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]3420// CHECK11:       .omp.final.then:3421// CHECK11-NEXT:    store i32 10, ptr [[I]], align 43422// CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]3423// CHECK11:       .omp.final.done:3424// CHECK11-NEXT:    ret void3425//3426//3427// CHECK13-LABEL: define {{[^@]+}}@main3428// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3429// CHECK13-NEXT:  entry:3430// CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 43431// CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 43432// CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 83433// CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 43434// CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 83435// CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 83436// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 43437// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43438// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43439// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43440// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43441// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 43442// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43443// CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 43444// CHECK13-NEXT:    [[_TMP10:%.*]] = alloca i32, align 43445// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 43446// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 43447// CHECK13-NEXT:    [[DOTOMP_LB16:%.*]] = alloca i32, align 43448// CHECK13-NEXT:    [[DOTOMP_UB17:%.*]] = alloca i32, align 43449// CHECK13-NEXT:    [[I18:%.*]] = alloca i32, align 43450// CHECK13-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 43451// CHECK13-NEXT:    [[I22:%.*]] = alloca i32, align 43452// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 43453// CHECK13-NEXT:    [[_TMP40:%.*]] = alloca i32, align 43454// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 43455// CHECK13-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 43456// CHECK13-NEXT:    [[DOTOMP_LB46:%.*]] = alloca i32, align 43457// CHECK13-NEXT:    [[DOTOMP_UB47:%.*]] = alloca i32, align 43458// CHECK13-NEXT:    [[I48:%.*]] = alloca i32, align 43459// CHECK13-NEXT:    [[DOTOMP_IV51:%.*]] = alloca i32, align 43460// CHECK13-NEXT:    [[I52:%.*]] = alloca i32, align 43461// CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 43462// CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43463// CHECK13-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 83464// CHECK13-NEXT:    store i32 100, ptr [[N]], align 43465// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 43466// CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i643467// CHECK13-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()3468// CHECK13-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 83469// CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 43470// CHECK13-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 83471// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 43472// CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 43473// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43474// CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 03475// CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 13476// CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13477// CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43478// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43479// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43480// CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 43481// CHECK13-NEXT:    store i32 0, ptr [[I]], align 43482// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43483// CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]3484// CHECK13-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]3485// CHECK13:       simd.if.then:3486// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43487// CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 43488// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3489// CHECK13:       omp.inner.for.cond:3490// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]3491// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]3492// CHECK13-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]3493// CHECK13-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3494// CHECK13:       omp.inner.for.body:3495// CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3496// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 13497// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3498// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]3499// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]3500// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i643501// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]]3502// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]3503// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3504// CHECK13:       omp.body.continue:3505// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3506// CHECK13:       omp.inner.for.inc:3507// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3508// CHECK13-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 13509// CHECK13-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]3510// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]3511// CHECK13:       omp.inner.for.end:3512// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43513// CHECK13-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 03514// CHECK13-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 13515// CHECK13-NEXT:    [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 13516// CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]3517// CHECK13-NEXT:    store i32 [[ADD9]], ptr [[I3]], align 43518// CHECK13-NEXT:    br label [[SIMD_IF_END]]3519// CHECK13:       simd.if.end:3520// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[N]], align 43521// CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 43522// CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43523// CHECK13-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 03524// CHECK13-NEXT:    [[DIV14:%.*]] = sdiv i32 [[SUB13]], 13525// CHECK13-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 13526// CHECK13-NEXT:    store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 43527// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB16]], align 43528// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 43529// CHECK13-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 43530// CHECK13-NEXT:    store i32 0, ptr [[I18]], align 43531// CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43532// CHECK13-NEXT:    [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]3533// CHECK13-NEXT:    br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]3534// CHECK13:       simd.if.then20:3535// CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 43536// CHECK13-NEXT:    store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 43537// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]3538// CHECK13:       omp.inner.for.cond23:3539// CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]3540// CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]]3541// CHECK13-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]3542// CHECK13-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]3543// CHECK13:       omp.inner.for.body25:3544// CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3545// CHECK13-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 13546// CHECK13-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3547// CHECK13-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]3548// CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]3549// CHECK13-NEXT:    [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i643550// CHECK13-NEXT:    [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]]3551// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]]3552// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE30:%.*]]3553// CHECK13:       omp.body.continue30:3554// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC31:%.*]]3555// CHECK13:       omp.inner.for.inc31:3556// CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3557// CHECK13-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP23]], 13558// CHECK13-NEXT:    store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]3559// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]3560// CHECK13:       omp.inner.for.end33:3561// CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43562// CHECK13-NEXT:    [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 03563// CHECK13-NEXT:    [[DIV35:%.*]] = sdiv i32 [[SUB34]], 13564// CHECK13-NEXT:    [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 13565// CHECK13-NEXT:    [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]3566// CHECK13-NEXT:    store i32 [[ADD37]], ptr [[I22]], align 43567// CHECK13-NEXT:    br label [[SIMD_IF_END38]]3568// CHECK13:       simd.if.end38:3569// CHECK13-NEXT:    [[TMP25:%.*]] = load i32, ptr [[N]], align 43570// CHECK13-NEXT:    store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 43571// CHECK13-NEXT:    [[TMP26:%.*]] = load i32, ptr [[N]], align 43572// CHECK13-NEXT:    store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 43573// CHECK13-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43574// CHECK13-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 03575// CHECK13-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 13576// CHECK13-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 13577// CHECK13-NEXT:    store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 43578// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB46]], align 43579// CHECK13-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 43580// CHECK13-NEXT:    store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 43581// CHECK13-NEXT:    store i32 0, ptr [[I48]], align 43582// CHECK13-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43583// CHECK13-NEXT:    [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]3584// CHECK13-NEXT:    br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]3585// CHECK13:       simd.if.then50:3586// CHECK13-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 43587// CHECK13-NEXT:    store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 43588// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND53:%.*]]3589// CHECK13:       omp.inner.for.cond53:3590// CHECK13-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]3591// CHECK13-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]]3592// CHECK13-NEXT:    [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]3593// CHECK13-NEXT:    br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]3594// CHECK13:       omp.inner.for.body55:3595// CHECK13-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3596// CHECK13-NEXT:    [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 13597// CHECK13-NEXT:    [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]3598// CHECK13-NEXT:    store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]3599// CHECK13-NEXT:    [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]3600// CHECK13-NEXT:    [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i643601// CHECK13-NEXT:    [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]]3602// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]]3603// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE60:%.*]]3604// CHECK13:       omp.body.continue60:3605// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC61:%.*]]3606// CHECK13:       omp.inner.for.inc61:3607// CHECK13-NEXT:    [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3608// CHECK13-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP35]], 13609// CHECK13-NEXT:    store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]3610// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]3611// CHECK13:       omp.inner.for.end63:3612// CHECK13-NEXT:    [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43613// CHECK13-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 03614// CHECK13-NEXT:    [[DIV65:%.*]] = sdiv i32 [[SUB64]], 13615// CHECK13-NEXT:    [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 13616// CHECK13-NEXT:    [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]3617// CHECK13-NEXT:    store i32 [[ADD67]], ptr [[I52]], align 43618// CHECK13-NEXT:    br label [[SIMD_IF_END68]]3619// CHECK13:       simd.if.end68:3620// CHECK13-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARGC_ADDR]], align 43621// CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]])3622// CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 43623// CHECK13-NEXT:    [[TMP38:%.*]] = load ptr, ptr [[SAVED_STACK]], align 83624// CHECK13-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP38]])3625// CHECK13-NEXT:    [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 43626// CHECK13-NEXT:    ret i32 [[TMP39]]3627//3628//3629// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3630// CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {3631// CHECK13-NEXT:  entry:3632// CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 43633// CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 43634// CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 43635// CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43636// CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43637// CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43638// CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 43639// CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 43640// CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 43641// CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 43642// CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 43643// CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 43644// CHECK13-NEXT:    [[_TMP18:%.*]] = alloca i32, align 43645// CHECK13-NEXT:    [[DOTOMP_LB19:%.*]] = alloca i32, align 43646// CHECK13-NEXT:    [[DOTOMP_UB20:%.*]] = alloca i32, align 43647// CHECK13-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 43648// CHECK13-NEXT:    [[I22:%.*]] = alloca i32, align 43649// CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43650// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43651// CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 43652// CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43653// CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43654// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3655// CHECK13:       omp.inner.for.cond:3656// CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]3657// CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]3658// CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3659// CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3660// CHECK13:       omp.inner.for.body:3661// CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3662// CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13663// CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3664// CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]3665// CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]3666// CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i643667// CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]3668// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]3669// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3670// CHECK13:       omp.body.continue:3671// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3672// CHECK13:       omp.inner.for.inc:3673// CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3674// CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP5]], 13675// CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]3676// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]3677// CHECK13:       omp.inner.for.end:3678// CHECK13-NEXT:    store i32 10, ptr [[I]], align 43679// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 43680// CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB4]], align 43681// CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43682// CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 43683// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]3684// CHECK13:       omp.inner.for.cond7:3685// CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]3686// CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP15]]3687// CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3688// CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]3689// CHECK13:       omp.inner.for.body9:3690// CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3691// CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 13692// CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]3693// CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]3694// CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]3695// CHECK13-NEXT:    [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i643696// CHECK13-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]]3697// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP15]]3698// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]3699// CHECK13:       omp.body.continue14:3700// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]3701// CHECK13:       omp.inner.for.inc15:3702// CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3703// CHECK13-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP11]], 13704// CHECK13-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]3705// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]3706// CHECK13:       omp.inner.for.end17:3707// CHECK13-NEXT:    store i32 10, ptr [[I6]], align 43708// CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB19]], align 43709// CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB20]], align 43710// CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 43711// CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV21]], align 43712// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]3713// CHECK13:       omp.inner.for.cond23:3714// CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]3715// CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP18]]3716// CHECK13-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]3717// CHECK13-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]3718// CHECK13:       omp.inner.for.body25:3719// CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3720// CHECK13-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 13721// CHECK13-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3722// CHECK13-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]3723// CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]3724// CHECK13-NEXT:    [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i643725// CHECK13-NEXT:    [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]]3726// CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP18]]3727// CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE30:%.*]]3728// CHECK13:       omp.body.continue30:3729// CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC31:%.*]]3730// CHECK13:       omp.inner.for.inc31:3731// CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3732// CHECK13-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP17]], 13733// CHECK13-NEXT:    store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]3734// CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]3735// CHECK13:       omp.inner.for.end33:3736// CHECK13-NEXT:    store i32 10, ptr [[I22]], align 43737// CHECK13-NEXT:    ret i32 03738//3739//3740// CHECK15-LABEL: define {{[^@]+}}@main3741// CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {3742// CHECK15-NEXT:  entry:3743// CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 43744// CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 43745// CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 43746// CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 43747// CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 43748// CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 43749// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 43750// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 43751// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 43752// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43753// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43754// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 43755// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43756// CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 43757// CHECK15-NEXT:    [[_TMP10:%.*]] = alloca i32, align 43758// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 43759// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 43760// CHECK15-NEXT:    [[DOTOMP_LB16:%.*]] = alloca i32, align 43761// CHECK15-NEXT:    [[DOTOMP_UB17:%.*]] = alloca i32, align 43762// CHECK15-NEXT:    [[I18:%.*]] = alloca i32, align 43763// CHECK15-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 43764// CHECK15-NEXT:    [[I22:%.*]] = alloca i32, align 43765// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 43766// CHECK15-NEXT:    [[_TMP39:%.*]] = alloca i32, align 43767// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 43768// CHECK15-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 43769// CHECK15-NEXT:    [[DOTOMP_LB45:%.*]] = alloca i32, align 43770// CHECK15-NEXT:    [[DOTOMP_UB46:%.*]] = alloca i32, align 43771// CHECK15-NEXT:    [[I47:%.*]] = alloca i32, align 43772// CHECK15-NEXT:    [[DOTOMP_IV50:%.*]] = alloca i32, align 43773// CHECK15-NEXT:    [[I51:%.*]] = alloca i32, align 43774// CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 43775// CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43776// CHECK15-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 43777// CHECK15-NEXT:    store i32 100, ptr [[N]], align 43778// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 43779// CHECK15-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()3780// CHECK15-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 43781// CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 43782// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 43783// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 43784// CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 43785// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43786// CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 03787// CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 13788// CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 13789// CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 43790// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43791// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 43792// CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 43793// CHECK15-NEXT:    store i32 0, ptr [[I]], align 43794// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43795// CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]3796// CHECK15-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]3797// CHECK15:       simd.if.then:3798// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43799// CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 43800// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3801// CHECK15:       omp.inner.for.cond:3802// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]3803// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]3804// CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3805// CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3806// CHECK15:       omp.inner.for.body:3807// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3808// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 13809// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3810// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]3811// CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]3812// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]]3813// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]3814// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3815// CHECK15:       omp.body.continue:3816// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3817// CHECK15:       omp.inner.for.inc:3818// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3819// CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP11]], 13820// CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]3821// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]3822// CHECK15:       omp.inner.for.end:3823// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 43824// CHECK15-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 03825// CHECK15-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 13826// CHECK15-NEXT:    [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 13827// CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]3828// CHECK15-NEXT:    store i32 [[ADD9]], ptr [[I3]], align 43829// CHECK15-NEXT:    br label [[SIMD_IF_END]]3830// CHECK15:       simd.if.end:3831// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[N]], align 43832// CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 43833// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43834// CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 03835// CHECK15-NEXT:    [[DIV14:%.*]] = sdiv i32 [[SUB13]], 13836// CHECK15-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 13837// CHECK15-NEXT:    store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 43838// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB16]], align 43839// CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 43840// CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 43841// CHECK15-NEXT:    store i32 0, ptr [[I18]], align 43842// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43843// CHECK15-NEXT:    [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]3844// CHECK15-NEXT:    br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]3845// CHECK15:       simd.if.then20:3846// CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 43847// CHECK15-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 43848// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]3849// CHECK15:       omp.inner.for.cond23:3850// CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]3851// CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]]3852// CHECK15-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]3853// CHECK15-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]3854// CHECK15:       omp.inner.for.body25:3855// CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3856// CHECK15-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 13857// CHECK15-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]3858// CHECK15-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]3859// CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]3860// CHECK15-NEXT:    [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]]3861// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]]3862// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE29:%.*]]3863// CHECK15:       omp.body.continue29:3864// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC30:%.*]]3865// CHECK15:       omp.inner.for.inc30:3866// CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3867// CHECK15-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP22]], 13868// CHECK15-NEXT:    store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]3869// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]3870// CHECK15:       omp.inner.for.end32:3871// CHECK15-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 43872// CHECK15-NEXT:    [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 03873// CHECK15-NEXT:    [[DIV34:%.*]] = sdiv i32 [[SUB33]], 13874// CHECK15-NEXT:    [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 13875// CHECK15-NEXT:    [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]3876// CHECK15-NEXT:    store i32 [[ADD36]], ptr [[I22]], align 43877// CHECK15-NEXT:    br label [[SIMD_IF_END37]]3878// CHECK15:       simd.if.end37:3879// CHECK15-NEXT:    [[TMP24:%.*]] = load i32, ptr [[N]], align 43880// CHECK15-NEXT:    store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 43881// CHECK15-NEXT:    [[TMP25:%.*]] = load i32, ptr [[N]], align 43882// CHECK15-NEXT:    store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 43883// CHECK15-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43884// CHECK15-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 03885// CHECK15-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 13886// CHECK15-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 13887// CHECK15-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 43888// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB45]], align 43889// CHECK15-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 43890// CHECK15-NEXT:    store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 43891// CHECK15-NEXT:    store i32 0, ptr [[I47]], align 43892// CHECK15-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43893// CHECK15-NEXT:    [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]3894// CHECK15-NEXT:    br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]3895// CHECK15:       simd.if.then49:3896// CHECK15-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 43897// CHECK15-NEXT:    store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 43898// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND52:%.*]]3899// CHECK15:       omp.inner.for.cond52:3900// CHECK15-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]3901// CHECK15-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]]3902// CHECK15-NEXT:    [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]3903// CHECK15-NEXT:    br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]3904// CHECK15:       omp.inner.for.body54:3905// CHECK15-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3906// CHECK15-NEXT:    [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 13907// CHECK15-NEXT:    [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]3908// CHECK15-NEXT:    store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]3909// CHECK15-NEXT:    [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]3910// CHECK15-NEXT:    [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]]3911// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]]3912// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE58:%.*]]3913// CHECK15:       omp.body.continue58:3914// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC59:%.*]]3915// CHECK15:       omp.inner.for.inc59:3916// CHECK15-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3917// CHECK15-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP34]], 13918// CHECK15-NEXT:    store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]3919// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]3920// CHECK15:       omp.inner.for.end61:3921// CHECK15-NEXT:    [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 43922// CHECK15-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 03923// CHECK15-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 13924// CHECK15-NEXT:    [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 13925// CHECK15-NEXT:    [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]3926// CHECK15-NEXT:    store i32 [[ADD65]], ptr [[I51]], align 43927// CHECK15-NEXT:    br label [[SIMD_IF_END66]]3928// CHECK15:       simd.if.end66:3929// CHECK15-NEXT:    [[TMP36:%.*]] = load i32, ptr [[ARGC_ADDR]], align 43930// CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]])3931// CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 43932// CHECK15-NEXT:    [[TMP37:%.*]] = load ptr, ptr [[SAVED_STACK]], align 43933// CHECK15-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP37]])3934// CHECK15-NEXT:    [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 43935// CHECK15-NEXT:    ret i32 [[TMP38]]3936//3937//3938// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_3939// CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {3940// CHECK15-NEXT:  entry:3941// CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 43942// CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 43943// CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 43944// CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 43945// CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 43946// CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 43947// CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 43948// CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 43949// CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 43950// CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 43951// CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 43952// CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 43953// CHECK15-NEXT:    [[_TMP17:%.*]] = alloca i32, align 43954// CHECK15-NEXT:    [[DOTOMP_LB18:%.*]] = alloca i32, align 43955// CHECK15-NEXT:    [[DOTOMP_UB19:%.*]] = alloca i32, align 43956// CHECK15-NEXT:    [[DOTOMP_IV20:%.*]] = alloca i32, align 43957// CHECK15-NEXT:    [[I21:%.*]] = alloca i32, align 43958// CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 43959// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 43960// CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 43961// CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 43962// CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 43963// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]3964// CHECK15:       omp.inner.for.cond:3965// CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]3966// CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]3967// CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]3968// CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]3969// CHECK15:       omp.inner.for.body:3970// CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3971// CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 13972// CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]3973// CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3974// CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]3975// CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]]3976// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]3977// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]3978// CHECK15:       omp.body.continue:3979// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]3980// CHECK15:       omp.inner.for.inc:3981// CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3982// CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP5]], 13983// CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]3984// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]3985// CHECK15:       omp.inner.for.end:3986// CHECK15-NEXT:    store i32 10, ptr [[I]], align 43987// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 43988// CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB4]], align 43989// CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 43990// CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 43991// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]3992// CHECK15:       omp.inner.for.cond7:3993// CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]3994// CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP16]]3995// CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]3996// CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]3997// CHECK15:       omp.inner.for.body9:3998// CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]3999// CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 14000// CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]4001// CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]4002// CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]4003// CHECK15-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]]4004// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP16]]4005// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]4006// CHECK15:       omp.body.continue13:4007// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]4008// CHECK15:       omp.inner.for.inc14:4009// CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]4010// CHECK15-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP11]], 14011// CHECK15-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]4012// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]4013// CHECK15:       omp.inner.for.end16:4014// CHECK15-NEXT:    store i32 10, ptr [[I6]], align 44015// CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB18]], align 44016// CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB19]], align 44017// CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 44018// CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV20]], align 44019// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND22:%.*]]4020// CHECK15:       omp.inner.for.cond22:4021// CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]4022// CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP19]]4023// CHECK15-NEXT:    [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]4024// CHECK15-NEXT:    br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]4025// CHECK15:       omp.inner.for.body24:4026// CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]4027// CHECK15-NEXT:    [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 14028// CHECK15-NEXT:    [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]4029// CHECK15-NEXT:    store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]4030// CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]4031// CHECK15-NEXT:    [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP16]]4032// CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP19]]4033// CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE28:%.*]]4034// CHECK15:       omp.body.continue28:4035// CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC29:%.*]]4036// CHECK15:       omp.inner.for.inc29:4037// CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]4038// CHECK15-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP17]], 14039// CHECK15-NEXT:    store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]4040// CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]4041// CHECK15:       omp.inner.for.end31:4042// CHECK15-NEXT:    store i32 10, ptr [[I21]], align 44043// CHECK15-NEXT:    ret i32 04044//4045