2710 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK36// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s7// RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK38 9// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK510// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s11// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK512// RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK713// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s14// RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK715 16// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK917// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s18// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK919// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1120// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s21// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1122 23// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1324// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s25// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1326// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1527// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s28// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1529// expected-no-diagnostics30#ifndef HEADER31#define HEADER32 33template <class T>34struct S {35 T f;36 S(T a) : f(a) {}37 S() : f() {}38 operator T() { return T(); }39 ~S() {}40};41 42template <typename T>43T tmain() {44 S<T> test;45 T t_var = T();46 T vec[] = {1, 2};47 S<T> s_arr[] = {1, 2};48 S<T> &var = test;49 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)50 for (int i = 0; i < 2; ++i) {51 vec[i] = t_var;52 s_arr[i] = var;53 }54 return T();55}56 57int main() {58 static int svar;59 volatile double g;60 volatile double &g1 = g;61 62 #ifdef LAMBDA63 [&]() {64 static float sfvar;65 66 #pragma omp target teams distribute simd lastprivate(g, g1, svar, sfvar)67 for (int i = 0; i < 2; ++i) {68 // loop variables69 70 // init private variables71 g = 1;72 g1 = 1;73 svar = 3;74 sfvar = 4.0;75 76 77 [&]() {78 g = 2;79 g1 = 2;80 svar = 4;81 sfvar = 8.0;82 83 }();84 }85 }();86 return 0;87 #else88 S<float> test;89 int t_var = 0;90 int vec[] = {1, 2};91 S<float> s_arr[] = {1, 2};92 S<float> &var = test;93 94 #pragma omp target teams distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)95 for (int i = 0; i < 2; ++i) {96 vec[i] = t_var;97 s_arr[i] = var;98 }99 int i;100 101 return tmain<int>();102 #endif103}104 105 106// skip loop variables107 108// copy from parameters to local address variables109 110// load content of local address variables111// the distribute loop112// assignment: vec[i] = t_var;113 114// assignment: s_arr[i] = var;115 116// lastprivates117 118 119// template tmain120 121 122 123// skip alloca of global_tid and bound_tid124// skip loop variables125 126// skip init of bound and global tid127// copy from parameters to local address variables128 129// load content of local address variables130// assignment: vec[i] = t_var;131 132// assignment: s_arr[i] = var;133 134// lastprivates135 136#endif137// CHECK1-LABEL: define {{[^@]+}}@main138// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {139// CHECK1-NEXT: entry:140// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4141// CHECK1-NEXT: [[G:%.*]] = alloca double, align 8142// CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8143// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8144// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4145// CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8146// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0147// CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8148// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1149// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META5:![0-9]+]], !align [[META6:![0-9]+]]150// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8151// CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])152// CHECK1-NEXT: ret i32 0153//154//155// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66156// CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {157// CHECK1-NEXT: entry:158// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8159// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8160// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8161// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8162// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8163// CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8164// CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8165// CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8166// CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8167// CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8168// CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8169// CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8170// CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8171// CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8172// CHECK1-NEXT: [[TMP0:%.*]] = load double, ptr [[G_ADDR]], align 8173// CHECK1-NEXT: store double [[TMP0]], ptr [[G_CASTED]], align 8174// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[G_CASTED]], align 8175// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]176// CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, ptr [[TMP2]], align 8177// CHECK1-NEXT: store double [[TMP3]], ptr [[G1_CASTED]], align 8178// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[G1_CASTED]], align 8179// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4180// CHECK1-NEXT: store i32 [[TMP5]], ptr [[SVAR_CASTED]], align 4181// CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8182// CHECK1-NEXT: [[TMP7:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4183// CHECK1-NEXT: store float [[TMP7]], ptr [[SFVAR_CASTED]], align 4184// CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8185// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]])186// CHECK1-NEXT: ret void187//188//189// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined190// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {191// CHECK1-NEXT: entry:192// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8193// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8194// CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8195// CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8196// CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8197// CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8198// CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8199// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4200// CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4201// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4202// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4203// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4204// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4205// CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8206// CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8207// CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8208// CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4209// CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4210// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4211// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8212// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8213// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8214// CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8215// CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8216// CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8217// CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8218// CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8219// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4220// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4221// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4222// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4223// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META5]], !align [[META6]]224// CHECK1-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 8225// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8226// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4227// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)228// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4229// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1230// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]231// CHECK1: cond.true:232// CHECK1-NEXT: br label [[COND_END:%.*]]233// CHECK1: cond.false:234// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4235// CHECK1-NEXT: br label [[COND_END]]236// CHECK1: cond.end:237// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]238// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4239// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4240// CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4241// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]242// CHECK1: omp.inner.for.cond:243// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]244// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]245// CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]246// CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]247// CHECK1: omp.inner.for.body:248// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]249// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1250// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]251// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]252// CHECK1-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP7]]253// CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP7]]254// CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP9]], align 8, !llvm.access.group [[ACC_GRP7]]255// CHECK1-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP7]]256// CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP7]]257// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0258// CHECK1-NEXT: store ptr [[G2]], ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP7]]259// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1260// CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP4]], align 8, !nonnull [[META5]], !align [[META6]], !llvm.access.group [[ACC_GRP7]]261// CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP7]]262// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2263// CHECK1-NEXT: store ptr [[SVAR5]], ptr [[TMP13]], align 8, !llvm.access.group [[ACC_GRP7]]264// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3265// CHECK1-NEXT: store ptr [[SFVAR6]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP7]]266// CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP7]]267// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]268// CHECK1: omp.body.continue:269// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]270// CHECK1: omp.inner.for.inc:271// CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]272// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1273// CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]274// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]275// CHECK1: omp.inner.for.end:276// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]277// CHECK1: omp.loop.exit:278// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])279// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4280// CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0281// CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]282// CHECK1: .omp.final.then:283// CHECK1-NEXT: store i32 2, ptr [[I]], align 4284// CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]285// CHECK1: .omp.final.done:286// CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4287// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0288// CHECK1-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]289// CHECK1: .omp.lastprivate.then:290// CHECK1-NEXT: [[TMP20:%.*]] = load double, ptr [[G2]], align 8291// CHECK1-NEXT: store volatile double [[TMP20]], ptr [[G_ADDR]], align 8292// CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP4]], align 8293// CHECK1-NEXT: [[TMP22:%.*]] = load double, ptr [[TMP21]], align 8294// CHECK1-NEXT: store volatile double [[TMP22]], ptr [[TMP0]], align 8295// CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[SVAR5]], align 4296// CHECK1-NEXT: store i32 [[TMP23]], ptr [[SVAR_ADDR]], align 4297// CHECK1-NEXT: [[TMP24:%.*]] = load float, ptr [[SFVAR6]], align 4298// CHECK1-NEXT: store float [[TMP24]], ptr [[SFVAR_ADDR]], align 4299// CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]300// CHECK1: .omp.lastprivate.done:301// CHECK1-NEXT: ret void302//303//304// CHECK3-LABEL: define {{[^@]+}}@main305// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {306// CHECK3-NEXT: entry:307// CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4308// CHECK3-NEXT: [[G:%.*]] = alloca double, align 8309// CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4310// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4311// CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4312// CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4313// CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0314// CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4315// CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1316// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META6:![0-9]+]], !align [[META7:![0-9]+]]317// CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4318// CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])319// CHECK3-NEXT: ret i32 0320//321//322// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66323// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {324// CHECK3-NEXT: entry:325// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4326// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4327// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4328// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4329// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4330// CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4331// CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4332// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4333// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4334// CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4335// CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4336// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]337// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]338// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4339// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]340// CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4341// CHECK3-NEXT: store i32 [[TMP3]], ptr [[SVAR_CASTED]], align 4342// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4343// CHECK3-NEXT: [[TMP5:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4344// CHECK3-NEXT: store float [[TMP5]], ptr [[SFVAR_CASTED]], align 4345// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4346// CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP2]], i32 [[TMP4]], i32 [[TMP6]])347// CHECK3-NEXT: ret void348//349//350// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined351// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {352// CHECK3-NEXT: entry:353// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4354// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4355// CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4356// CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4357// CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4358// CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4359// CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4360// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4361// CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4362// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4363// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4364// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4365// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4366// CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8367// CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8368// CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4369// CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4370// CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4371// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4372// CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4373// CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4374// CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4375// CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4376// CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4377// CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4378// CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4379// CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]380// CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4, !nonnull [[META6]], !align [[META7]]381// CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4382// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4383// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4384// CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4385// CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4386// CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META6]], !align [[META7]]387// CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4388// CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4389// CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4390// CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)391// CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4392// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1393// CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]394// CHECK3: cond.true:395// CHECK3-NEXT: br label [[COND_END:%.*]]396// CHECK3: cond.false:397// CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4398// CHECK3-NEXT: br label [[COND_END]]399// CHECK3: cond.end:400// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]401// CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4402// CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4403// CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4404// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]405// CHECK3: omp.inner.for.cond:406// CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]407// CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]408// CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]409// CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]410// CHECK3: omp.inner.for.body:411// CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]412// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1413// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]414// CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]415// CHECK3-NEXT: store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP8]]416// CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]417// CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP8]]418// CHECK3-NEXT: store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP8]]419// CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]420// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0421// CHECK3-NEXT: store ptr [[G2]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP8]]422// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1423// CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4, !nonnull [[META6]], !align [[META7]], !llvm.access.group [[ACC_GRP8]]424// CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4, !llvm.access.group [[ACC_GRP8]]425// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2426// CHECK3-NEXT: store ptr [[SVAR5]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP8]]427// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3428// CHECK3-NEXT: store ptr [[SFVAR6]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP8]]429// CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]430// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]431// CHECK3: omp.body.continue:432// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]433// CHECK3: omp.inner.for.inc:434// CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]435// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1436// CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]437// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]438// CHECK3: omp.inner.for.end:439// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]440// CHECK3: omp.loop.exit:441// CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])442// CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4443// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0444// CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]445// CHECK3: .omp.final.then:446// CHECK3-NEXT: store i32 2, ptr [[I]], align 4447// CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]448// CHECK3: .omp.final.done:449// CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4450// CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0451// CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]452// CHECK3: .omp.lastprivate.then:453// CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[G2]], align 8454// CHECK3-NEXT: store volatile double [[TMP22]], ptr [[TMP0]], align 8455// CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP4]], align 4456// CHECK3-NEXT: [[TMP24:%.*]] = load double, ptr [[TMP23]], align 4457// CHECK3-NEXT: store volatile double [[TMP24]], ptr [[TMP2]], align 4458// CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[SVAR5]], align 4459// CHECK3-NEXT: store i32 [[TMP25]], ptr [[SVAR_ADDR]], align 4460// CHECK3-NEXT: [[TMP26:%.*]] = load float, ptr [[SFVAR6]], align 4461// CHECK3-NEXT: store float [[TMP26]], ptr [[SFVAR_ADDR]], align 4462// CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]463// CHECK3: .omp.lastprivate.done:464// CHECK3-NEXT: ret void465//466//467// CHECK5-LABEL: define {{[^@]+}}@main468// CHECK5-SAME: () #[[ATTR0:[0-9]+]] {469// CHECK5-NEXT: entry:470// CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4471// CHECK5-NEXT: [[G:%.*]] = alloca double, align 8472// CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8473// CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8474// CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4475// CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8476// CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0477// CHECK5-NEXT: store ptr [[G]], ptr [[TMP0]], align 8478// CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1479// CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]480// CHECK5-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8481// CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])482// CHECK5-NEXT: ret i32 0483//484//485// CHECK7-LABEL: define {{[^@]+}}@main486// CHECK7-SAME: () #[[ATTR0:[0-9]+]] {487// CHECK7-NEXT: entry:488// CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4489// CHECK7-NEXT: [[G:%.*]] = alloca double, align 8490// CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4491// CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4492// CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4493// CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4494// CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0495// CHECK7-NEXT: store ptr [[G]], ptr [[TMP0]], align 4496// CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1497// CHECK7-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]498// CHECK7-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4499// CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])500// CHECK7-NEXT: ret i32 0501//502//503// CHECK9-LABEL: define {{[^@]+}}@main504// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {505// CHECK9-NEXT: entry:506// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4507// CHECK9-NEXT: [[G:%.*]] = alloca double, align 8508// CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8509// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4510// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4511// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4512// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4513// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8514// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8515// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8516// CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8517// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8518// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8519// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8520// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4521// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8522// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4523// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4524// CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8525// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])526// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4527// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)528// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)529// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1530// CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)531// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8532// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7:![0-9]+]], !align [[META8:![0-9]+]]533// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8534// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4535// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4536// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8537// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]538// CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4539// CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4540// CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8541// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0542// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 8543// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0544// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 8545// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0546// CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8547// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1548// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8549// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1550// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP10]], align 8551// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1552// CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8553// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2554// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8555// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2556// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8557// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2558// CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8559// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3560// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 8561// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3562// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 8563// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3564// CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8565// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4566// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP18]], align 8567// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4568// CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP19]], align 8569// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4570// CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8571// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0572// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0573// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0574// CHECK9-NEXT: store i32 3, ptr [[TMP23]], align 4575// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1576// CHECK9-NEXT: store i32 5, ptr [[TMP24]], align 4577// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2578// CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 8579// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3580// CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 8581// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4582// CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 8583// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5584// CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8585// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6586// CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8587// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7588// CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8589// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8590// CHECK9-NEXT: store i64 2, ptr [[TMP31]], align 8591// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9592// CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8593// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10594// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4595// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11596// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4597// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12598// CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4599// CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])600// CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0601// CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]602// CHECK9: omp_offload.failed:603// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]604// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]605// CHECK9: omp_offload.cont:606// CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()607// CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4608// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0609// CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2610// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]611// CHECK9: arraydestroy.body:612// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]613// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1614// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]615// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]616// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]617// CHECK9: arraydestroy.done2:618// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]619// CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4620// CHECK9-NEXT: ret i32 [[TMP39]]621//622//623// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev624// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {625// CHECK9-NEXT: entry:626// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8627// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8628// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8629// CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])630// CHECK9-NEXT: ret void631//632//633// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef634// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {635// CHECK9-NEXT: entry:636// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8637// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4638// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8639// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4640// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8641// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4642// CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])643// CHECK9-NEXT: ret void644//645//646// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94647// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {648// CHECK9-NEXT: entry:649// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8650// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8651// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8652// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8653// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8654// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8655// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8656// CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8657// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8658// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8659// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8660// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8661// CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8662// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]663// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]664// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]665// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8666// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4667// CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4668// CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8669// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]670// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4671// CHECK9-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4672// CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8673// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i64 [[TMP7]])674// CHECK9-NEXT: ret void675//676//677// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined678// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {679// CHECK9-NEXT: entry:680// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8681// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8682// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8683// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8684// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8685// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8686// CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8687// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8688// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4689// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4690// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4691// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4692// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4693// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4694// CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4695// CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4696// CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4697// CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4698// CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8699// CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4700// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4701// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8702// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8703// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8704// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8705// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8706// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8707// CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8708// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]709// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]710// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]711// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8712// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4713// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4714// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4715// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4716// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0717// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2718// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]719// CHECK9: arrayctor.loop:720// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]721// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])722// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1723// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]724// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]725// CHECK9: arrayctor.cont:726// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]727// CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])728// CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8729// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8730// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4731// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)732// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4733// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1734// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]735// CHECK9: cond.true:736// CHECK9-NEXT: br label [[COND_END:%.*]]737// CHECK9: cond.false:738// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4739// CHECK9-NEXT: br label [[COND_END]]740// CHECK9: cond.end:741// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]742// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4743// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4744// CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4745// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]746// CHECK9: omp.inner.for.cond:747// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]748// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]749// CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]750// CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]751// CHECK9: omp.inner.for.cond.cleanup:752// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]753// CHECK9: omp.inner.for.body:754// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]755// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1756// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]757// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]758// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP9]]759// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]760// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64761// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]762// CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]763// CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP9]]764// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]765// CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64766// CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]767// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]768// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]769// CHECK9: omp.body.continue:770// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]771// CHECK9: omp.inner.for.inc:772// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]773// CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1774// CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]775// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]776// CHECK9: omp.inner.for.end:777// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]778// CHECK9: omp.loop.exit:779// CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8780// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4781// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])782// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4783// CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0784// CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]785// CHECK9: .omp.final.then:786// CHECK9-NEXT: store i32 2, ptr [[I]], align 4787// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]788// CHECK9: .omp.final.done:789// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4790// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0791// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]792// CHECK9: .omp.lastprivate.then:793// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4794// CHECK9-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 4795// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)796// CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0797// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2798// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]799// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]800// CHECK9: omp.arraycpy.body:801// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]802// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]803// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)804// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1805// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1806// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]807// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]808// CHECK9: omp.arraycpy.done13:809// CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 8810// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i64 4, i1 false)811// CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR7]], align 4812// CHECK9-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 4813// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]814// CHECK9: .omp.lastprivate.done:815// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]816// CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0817// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2818// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]819// CHECK9: arraydestroy.body:820// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]821// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1822// CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]823// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]824// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]825// CHECK9: arraydestroy.done15:826// CHECK9-NEXT: ret void827//828//829// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev830// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {831// CHECK9-NEXT: entry:832// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8833// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8834// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8835// CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]836// CHECK9-NEXT: ret void837//838//839// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v840// CHECK9-SAME: () #[[ATTR1]] comdat {841// CHECK9-NEXT: entry:842// CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4843// CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4844// CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4845// CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4846// CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4847// CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8848// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8849// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8850// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8851// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8852// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8853// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4854// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8855// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])856// CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4857// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)858// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)859// CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1860// CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)861// CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8862// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META7]], !align [[META8]]863// CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8864// CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4865// CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4866// CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8867// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]868// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0869// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 8870// CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0871// CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 8872// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0873// CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8874// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1875// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8876// CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1877// CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8878// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1879// CHECK9-NEXT: store ptr null, ptr [[TMP9]], align 8880// CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2881// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 8882// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2883// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 8884// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2885// CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8886// CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3887// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8888// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3889// CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8890// CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3891// CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8892// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0893// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0894// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0895// CHECK9-NEXT: store i32 3, ptr [[TMP18]], align 4896// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1897// CHECK9-NEXT: store i32 4, ptr [[TMP19]], align 4898// CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2899// CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8900// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3901// CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8902// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4903// CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 8904// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5905// CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8906// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6907// CHECK9-NEXT: store ptr null, ptr [[TMP24]], align 8908// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7909// CHECK9-NEXT: store ptr null, ptr [[TMP25]], align 8910// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8911// CHECK9-NEXT: store i64 2, ptr [[TMP26]], align 8912// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9913// CHECK9-NEXT: store i64 0, ptr [[TMP27]], align 8914// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10915// CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4916// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11917// CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 4918// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12919// CHECK9-NEXT: store i32 0, ptr [[TMP30]], align 4920// CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])921// CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0922// CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]923// CHECK9: omp_offload.failed:924// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]925// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]926// CHECK9: omp_offload.cont:927// CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4928// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0929// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2930// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]931// CHECK9: arraydestroy.body:932// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]933// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1934// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]935// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]936// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]937// CHECK9: arraydestroy.done2:938// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]939// CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4940// CHECK9-NEXT: ret i32 [[TMP34]]941//942//943// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev944// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {945// CHECK9-NEXT: entry:946// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8947// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8948// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8949// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0950// CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4951// CHECK9-NEXT: ret void952//953//954// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef955// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {956// CHECK9-NEXT: entry:957// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8958// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4959// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8960// CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4961// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8962// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0963// CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4964// CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4965// CHECK9-NEXT: ret void966//967//968// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev969// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {970// CHECK9-NEXT: entry:971// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8972// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8973// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8974// CHECK9-NEXT: ret void975//976//977// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev978// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {979// CHECK9-NEXT: entry:980// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8981// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8982// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8983// CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])984// CHECK9-NEXT: ret void985//986//987// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei988// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {989// CHECK9-NEXT: entry:990// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8991// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4992// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8993// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4994// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8995// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4996// CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])997// CHECK9-NEXT: ret void998//999//1000// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491001// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1002// CHECK9-NEXT: entry:1003// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 81004// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 81005// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 81006// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 81007// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 81008// CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 81009// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 81010// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 81011// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81012// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 81013// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1014// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1015// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1016// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 81017// CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 41018// CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 41019// CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 81020// CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1021// CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])1022// CHECK9-NEXT: ret void1023//1024//1025// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1026// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1027// CHECK9-NEXT: entry:1028// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81029// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81030// CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 81031// CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 81032// CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 81033// CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 81034// CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 81035// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41036// CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 41037// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41038// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41039// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41040// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41041// CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 41042// CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 41043// CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41044// CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41045// CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 81046// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 41047// CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81048// CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81049// CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 81050// CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 81051// CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 81052// CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 81053// CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1054// CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1055// CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8, !nonnull [[META7]], !align [[META8]]1056// CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 81057// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41058// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41059// CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41060// CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41061// CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01062// CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 21063// CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1064// CHECK9: arrayctor.loop:1065// CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1066// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1067// CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 11068// CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1069// CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1070// CHECK9: arrayctor.cont:1071// CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META7]], !align [[META8]]1072// CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1073// CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 81074// CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81075// CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41076// CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1077// CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41078// CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11079// CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1080// CHECK9: cond.true:1081// CHECK9-NEXT: br label [[COND_END:%.*]]1082// CHECK9: cond.false:1083// CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41084// CHECK9-NEXT: br label [[COND_END]]1085// CHECK9: cond.end:1086// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1087// CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41088// CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41089// CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41090// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1091// CHECK9: omp.inner.for.cond:1092// CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]1093// CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]1094// CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1095// CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1096// CHECK9: omp.inner.for.cond.cleanup:1097// CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1098// CHECK9: omp.inner.for.body:1099// CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1100// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11101// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1102// CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1103// CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP15]]1104// CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1105// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i641106// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1107// CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]1108// CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META7]], !align [[META8]], !llvm.access.group [[ACC_GRP15]]1109// CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]1110// CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i641111// CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]]1112// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i64 4, i1 false), !llvm.access.group [[ACC_GRP15]]1113// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1114// CHECK9: omp.body.continue:1115// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1116// CHECK9: omp.inner.for.inc:1117// CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1118// CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 11119// CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]1120// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]1121// CHECK9: omp.inner.for.end:1122// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1123// CHECK9: omp.loop.exit:1124// CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81125// CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41126// CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1127// CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41128// CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01129// CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1130// CHECK9: .omp.final.then:1131// CHECK9-NEXT: store i32 2, ptr [[I]], align 41132// CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]1133// CHECK9: .omp.final.done:1134// CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41135// CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01136// CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1137// CHECK9: .omp.lastprivate.then:1138// CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 41139// CHECK9-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 41140// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)1141// CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 01142// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 21143// CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]1144// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1145// CHECK9: omp.arraycpy.body:1146// CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1147// CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1148// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)1149// CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11150// CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11151// CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1152// CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1153// CHECK9: omp.arraycpy.done12:1154// CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 81155// CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i64 4, i1 false)1156// CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1157// CHECK9: .omp.lastprivate.done:1158// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1159// CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01160// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 21161// CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1162// CHECK9: arraydestroy.body:1163// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1164// CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -11165// CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1166// CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1167// CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1168// CHECK9: arraydestroy.done14:1169// CHECK9-NEXT: ret void1170//1171//1172// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1173// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1174// CHECK9-NEXT: entry:1175// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81176// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81177// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81178// CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1179// CHECK9-NEXT: ret void1180//1181//1182// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1183// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1184// CHECK9-NEXT: entry:1185// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81186// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81187// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81188// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01189// CHECK9-NEXT: store i32 0, ptr [[F]], align 41190// CHECK9-NEXT: ret void1191//1192//1193// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1194// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {1195// CHECK9-NEXT: entry:1196// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81197// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41198// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81199// CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41200// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81201// CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01202// CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41203// CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 41204// CHECK9-NEXT: ret void1205//1206//1207// CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1208// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {1209// CHECK9-NEXT: entry:1210// CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 81211// CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 81212// CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 81213// CHECK9-NEXT: ret void1214//1215//1216// CHECK11-LABEL: define {{[^@]+}}@main1217// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {1218// CHECK11-NEXT: entry:1219// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41220// CHECK11-NEXT: [[G:%.*]] = alloca double, align 81221// CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 41222// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41223// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41224// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41225// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41226// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41227// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41228// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41229// CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 41230// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41231// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41232// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41233// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41234// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81235// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41236// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41237// CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 41238// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1239// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41240// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)1241// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1242// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 11243// CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1244// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41245// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8:![0-9]+]], !align [[META9:![0-9]+]]1246// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41247// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41248// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41249// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41250// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1251// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 41252// CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 41253// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41254// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01255// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 41256// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01257// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 41258// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01259// CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 41260// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11261// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 41262// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11263// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP10]], align 41264// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11265// CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 41266// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21267// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 41268// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21269// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 41270// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21271// CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 41272// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31273// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 41274// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31275// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 41276// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31277// CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 41278// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41279// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 41280// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41281// CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 41282// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41283// CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 41284// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01285// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01286// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01287// CHECK11-NEXT: store i32 3, ptr [[TMP23]], align 41288// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11289// CHECK11-NEXT: store i32 5, ptr [[TMP24]], align 41290// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21291// CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 41292// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31293// CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 41294// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41295// CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 41296// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51297// CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 41298// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61299// CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 41300// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71301// CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 41302// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81303// CHECK11-NEXT: store i64 2, ptr [[TMP31]], align 81304// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91305// CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 81306// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101307// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 41308// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111309// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 41310// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121311// CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 41312// CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])1313// CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 01314// CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1315// CHECK11: omp_offload.failed:1316// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]1317// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1318// CHECK11: omp_offload.cont:1319// CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()1320// CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 41321// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 01322// CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21323// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1324// CHECK11: arraydestroy.body:1325// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1326// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11327// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1328// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1329// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1330// CHECK11: arraydestroy.done2:1331// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1332// CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 41333// CHECK11-NEXT: ret i32 [[TMP39]]1334//1335//1336// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev1337// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {1338// CHECK11-NEXT: entry:1339// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41340// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41341// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41342// CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1343// CHECK11-NEXT: ret void1344//1345//1346// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef1347// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1348// CHECK11-NEXT: entry:1349// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41350// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41351// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41352// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41353// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41354// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41355// CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])1356// CHECK11-NEXT: ret void1357//1358//1359// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l941360// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {1361// CHECK11-NEXT: entry:1362// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41363// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41364// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41365// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41366// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 41367// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41368// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41369// CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 41370// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41371// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41372// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41373// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41374// CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41375// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1376// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1377// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1378// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41379// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 41380// CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 41381// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41382// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1383// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 41384// CHECK11-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 41385// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[SVAR_CASTED]], align 41386// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i32 [[TMP7]])1387// CHECK11-NEXT: ret void1388//1389//1390// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined1391// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {1392// CHECK11-NEXT: entry:1393// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41394// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41395// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41396// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41397// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41398// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41399// CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 41400// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41401// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41402// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41403// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41404// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41405// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41406// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41407// CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 41408// CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 41409// CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 41410// CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 41411// CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 41412// CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 41413// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41414// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41415// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41416// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41417// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41418// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41419// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41420// CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 41421// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1422// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1423// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1424// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41425// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41426// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41427// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41428// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41429// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01430// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 21431// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1432// CHECK11: arrayctor.loop:1433// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1434// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1435// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 11436// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1437// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1438// CHECK11: arrayctor.cont:1439// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1440// CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1441// CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 41442// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41443// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41444// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1445// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41446// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11447// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1448// CHECK11: cond.true:1449// CHECK11-NEXT: br label [[COND_END:%.*]]1450// CHECK11: cond.false:1451// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41452// CHECK11-NEXT: br label [[COND_END]]1453// CHECK11: cond.end:1454// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1455// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41456// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41457// CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41458// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1459// CHECK11: omp.inner.for.cond:1460// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]1461// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]1462// CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1463// CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1464// CHECK11: omp.inner.for.cond.cleanup:1465// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1466// CHECK11: omp.inner.for.body:1467// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1468// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11469// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1470// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1471// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP10]]1472// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1473// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]1474// CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]1475// CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP10]]1476// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]1477// CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]1478// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]1479// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1480// CHECK11: omp.body.continue:1481// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1482// CHECK11: omp.inner.for.inc:1483// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1484// CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 11485// CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]1486// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]1487// CHECK11: omp.inner.for.end:1488// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1489// CHECK11: omp.loop.exit:1490// CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41491// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41492// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1493// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41494// CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01495// CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1496// CHECK11: .omp.final.then:1497// CHECK11-NEXT: store i32 2, ptr [[I]], align 41498// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]1499// CHECK11: .omp.final.done:1500// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41501// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01502// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1503// CHECK11: .omp.lastprivate.then:1504// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 41505// CHECK11-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 41506// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1507// CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 01508// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 21509// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]1510// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1511// CHECK11: omp.arraycpy.body:1512// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1513// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1514// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1515// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11516// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11517// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1518// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]1519// CHECK11: omp.arraycpy.done12:1520// CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 41521// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i32 4, i1 false)1522// CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[SVAR7]], align 41523// CHECK11-NEXT: store i32 [[TMP26]], ptr [[SVAR_ADDR]], align 41524// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1525// CHECK11: .omp.lastprivate.done:1526// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1527// CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01528// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 21529// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1530// CHECK11: arraydestroy.body:1531// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1532// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11533// CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1534// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]1535// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]1536// CHECK11: arraydestroy.done14:1537// CHECK11-NEXT: ret void1538//1539//1540// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev1541// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1542// CHECK11-NEXT: entry:1543// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41544// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41545// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41546// CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1547// CHECK11-NEXT: ret void1548//1549//1550// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v1551// CHECK11-SAME: () #[[ATTR1]] comdat {1552// CHECK11-NEXT: entry:1553// CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 41554// CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41555// CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 41556// CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41557// CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 41558// CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 41559// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41560// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41561// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 41562// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 41563// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 41564// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41565// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81566// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1567// CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 41568// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)1569// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)1570// CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 11571// CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)1572// CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 41573// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META8]], !align [[META9]]1574// CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 41575// CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 41576// CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 41577// CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41578// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1579// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01580// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 41581// CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01582// CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 41583// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01584// CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 41585// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11586// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 41587// CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11588// CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 41589// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11590// CHECK11-NEXT: store ptr null, ptr [[TMP9]], align 41591// CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21592// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 41593// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21594// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 41595// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21596// CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 41597// CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31598// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 41599// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31600// CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 41601// CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31602// CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 41603// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01604// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01605// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01606// CHECK11-NEXT: store i32 3, ptr [[TMP18]], align 41607// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11608// CHECK11-NEXT: store i32 4, ptr [[TMP19]], align 41609// CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21610// CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 41611// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31612// CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 41613// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41614// CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 41615// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51616// CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 41617// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61618// CHECK11-NEXT: store ptr null, ptr [[TMP24]], align 41619// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71620// CHECK11-NEXT: store ptr null, ptr [[TMP25]], align 41621// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81622// CHECK11-NEXT: store i64 2, ptr [[TMP26]], align 81623// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91624// CHECK11-NEXT: store i64 0, ptr [[TMP27]], align 81625// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101626// CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 41627// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111628// CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP29]], align 41629// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121630// CHECK11-NEXT: store i32 0, ptr [[TMP30]], align 41631// CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])1632// CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 01633// CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1634// CHECK11: omp_offload.failed:1635// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]1636// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]1637// CHECK11: omp_offload.cont:1638// CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 41639// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 01640// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21641// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1642// CHECK11: arraydestroy.body:1643// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1644// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11645// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1646// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]1647// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]1648// CHECK11: arraydestroy.done2:1649// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]1650// CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 41651// CHECK11-NEXT: ret i32 [[TMP34]]1652//1653//1654// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev1655// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1656// CHECK11-NEXT: entry:1657// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41658// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41659// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41660// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01661// CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 41662// CHECK11-NEXT: ret void1663//1664//1665// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef1666// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1667// CHECK11-NEXT: entry:1668// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41669// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 41670// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41671// CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 41672// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41673// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 01674// CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 41675// CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 41676// CHECK11-NEXT: ret void1677//1678//1679// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev1680// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1681// CHECK11-NEXT: entry:1682// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41683// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41684// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41685// CHECK11-NEXT: ret void1686//1687//1688// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev1689// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1690// CHECK11-NEXT: entry:1691// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41692// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41693// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41694// CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])1695// CHECK11-NEXT: ret void1696//1697//1698// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei1699// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1700// CHECK11-NEXT: entry:1701// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41702// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41703// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41704// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41705// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41706// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41707// CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])1708// CHECK11-NEXT: ret void1709//1710//1711// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l491712// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1713// CHECK11-NEXT: entry:1714// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41715// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41716// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41717// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41718// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41719// CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 41720// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41721// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41722// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41723// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41724// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1725// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1726// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1727// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41728// CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 41729// CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 41730// CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 41731// CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1732// CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])1733// CHECK11-NEXT: ret void1734//1735//1736// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined1737// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {1738// CHECK11-NEXT: entry:1739// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41740// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41741// CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 41742// CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 41743// CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 41744// CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 41745// CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 41746// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41747// CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 41748// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41749// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41750// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41751// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41752// CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 41753// CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 41754// CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 41755// CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 41756// CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 41757// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 41758// CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41759// CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41760// CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 41761// CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 41762// CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 41763// CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 41764// CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1765// CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1766// CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4, !nonnull [[META8]], !align [[META9]]1767// CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 41768// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41769// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41770// CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 41771// CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 41772// CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01773// CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 21774// CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1775// CHECK11: arrayctor.loop:1776// CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1777// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1778// CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 11779// CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1780// CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1781// CHECK11: arrayctor.cont:1782// CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META8]], !align [[META9]]1783// CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1784// CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 41785// CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41786// CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 41787// CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1788// CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41789// CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 11790// CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1791// CHECK11: cond.true:1792// CHECK11-NEXT: br label [[COND_END:%.*]]1793// CHECK11: cond.false:1794// CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41795// CHECK11-NEXT: br label [[COND_END]]1796// CHECK11: cond.end:1797// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]1798// CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 41799// CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41800// CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 41801// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1802// CHECK11: omp.inner.for.cond:1803// CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]1804// CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]1805// CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]1806// CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1807// CHECK11: omp.inner.for.cond.cleanup:1808// CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1809// CHECK11: omp.inner.for.body:1810// CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1811// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 11812// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1813// CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1814// CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP16]]1815// CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1816// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]1817// CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]1818// CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META8]], !align [[META9]], !llvm.access.group [[ACC_GRP16]]1819// CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]1820// CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]1821// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP14]], i32 4, i1 false), !llvm.access.group [[ACC_GRP16]]1822// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]1823// CHECK11: omp.body.continue:1824// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]1825// CHECK11: omp.inner.for.inc:1826// CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1827// CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 11828// CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]1829// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]1830// CHECK11: omp.inner.for.end:1831// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]1832// CHECK11: omp.loop.exit:1833// CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41834// CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 41835// CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])1836// CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41837// CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 01838// CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]1839// CHECK11: .omp.final.then:1840// CHECK11-NEXT: store i32 2, ptr [[I]], align 41841// CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]1842// CHECK11: .omp.final.done:1843// CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 41844// CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 01845// CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]1846// CHECK11: .omp.lastprivate.then:1847// CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 41848// CHECK11-NEXT: store i32 [[TMP23]], ptr [[T_VAR_ADDR]], align 41849// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)1850// CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 01851// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 21852// CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP24]]1853// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]1854// CHECK11: omp.arraycpy.body:1855// CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1856// CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]1857// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)1858// CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 11859// CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 11860// CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]1861// CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]1862// CHECK11: omp.arraycpy.done11:1863// CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 41864// CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP25]], i32 4, i1 false)1865// CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]1866// CHECK11: .omp.lastprivate.done:1867// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]1868// CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 01869// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 21870// CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]1871// CHECK11: arraydestroy.body:1872// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]1873// CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -11874// CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]1875// CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]1876// CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]1877// CHECK11: arraydestroy.done13:1878// CHECK11-NEXT: ret void1879//1880//1881// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev1882// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1883// CHECK11-NEXT: entry:1884// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41885// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41886// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41887// CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]1888// CHECK11-NEXT: ret void1889//1890//1891// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev1892// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1893// CHECK11-NEXT: entry:1894// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41895// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41896// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41897// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01898// CHECK11-NEXT: store i32 0, ptr [[F]], align 41899// CHECK11-NEXT: ret void1900//1901//1902// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei1903// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1904// CHECK11-NEXT: entry:1905// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41906// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 41907// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41908// CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 41909// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41910// CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 01911// CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 41912// CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 41913// CHECK11-NEXT: ret void1914//1915//1916// CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev1917// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {1918// CHECK11-NEXT: entry:1919// CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 41920// CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 41921// CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 41922// CHECK11-NEXT: ret void1923//1924//1925// CHECK13-LABEL: define {{[^@]+}}@main1926// CHECK13-SAME: () #[[ATTR0:[0-9]+]] {1927// CHECK13-NEXT: entry:1928// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 41929// CHECK13-NEXT: [[G:%.*]] = alloca double, align 81930// CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 81931// CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 41932// CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 41933// CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 41934// CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 41935// CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 81936// CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 81937// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 41938// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 41939// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 41940// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 41941// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 41942// CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 41943// CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 41944// CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 41945// CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 41946// CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 81947// CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 41948// CHECK13-NEXT: [[I14:%.*]] = alloca i32, align 41949// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 41950// CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 81951// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])1952// CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 41953// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)1954// CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)1955// CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 11956// CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)1957// CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 81958// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2:![0-9]+]], !align [[META3:![0-9]+]]1959// CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 81960// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]1961// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]1962// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 41963// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 41964// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41965// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 41966// CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 01967// CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 21968// CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]1969// CHECK13: arrayctor.loop:1970// CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]1971// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])1972// CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 11973// CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]1974// CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]1975// CHECK13: arrayctor.cont:1976// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]1977// CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])1978// CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 81979// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]1980// CHECK13: omp.inner.for.cond:1981// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]1982// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]1983// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]1984// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]1985// CHECK13: omp.inner.for.cond.cleanup:1986// CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]1987// CHECK13: omp.inner.for.body:1988// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]1989// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 11990// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]1991// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1992// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP4]]1993// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1994// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i641995// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]1996// CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP4]]1997// CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP4]]1998// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]1999// CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP11]] to i642000// CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]2001// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP4]]2002// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2003// CHECK13: omp.body.continue:2004// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2005// CHECK13: omp.inner.for.inc:2006// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2007// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 12008// CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]2009// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]2010// CHECK13: omp.inner.for.end:2011// CHECK13-NEXT: store i32 2, ptr [[I]], align 42012// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 42013// CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 42014// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i64 8, i1 false)2015// CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02016// CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 22017// CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]]2018// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2019// CHECK13: omp.arraycpy.body:2020// CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2021// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2022// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2023// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12024// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12025// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2026// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2027// CHECK13: omp.arraycpy.done11:2028// CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 82029// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false)2030// CHECK13-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 42031// CHECK13-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 42032// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]2033// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02034// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 22035// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2036// CHECK13: arraydestroy.body:2037// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2038// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12039// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2040// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2041// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2042// CHECK13: arraydestroy.done13:2043// CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()2044// CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 42045// CHECK13-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02046// CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 22047// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]]2048// CHECK13: arraydestroy.body16:2049// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]2050// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i64 -12051// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]2052// CHECK13-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]2053// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]2054// CHECK13: arraydestroy.done20:2055// CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2056// CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42057// CHECK13-NEXT: ret i32 [[TMP19]]2058//2059//2060// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2061// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {2062// CHECK13-NEXT: entry:2063// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82064// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82065// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82066// CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2067// CHECK13-NEXT: ret void2068//2069//2070// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2071// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2072// CHECK13-NEXT: entry:2073// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82074// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 42075// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82076// CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 42077// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82078// CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42079// CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2080// CHECK13-NEXT: ret void2081//2082//2083// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2084// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2085// CHECK13-NEXT: entry:2086// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82087// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82088// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82089// CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2090// CHECK13-NEXT: ret void2091//2092//2093// CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2094// CHECK13-SAME: () #[[ATTR1]] comdat {2095// CHECK13-NEXT: entry:2096// CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 42097// CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42098// CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 42099// CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42100// CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42101// CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 82102// CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 82103// CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 42104// CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42105// CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42106// CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42107// CHECK13-NEXT: [[I:%.*]] = alloca i32, align 42108// CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 42109// CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 42110// CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42111// CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 42112// CHECK13-NEXT: [[_TMP6:%.*]] = alloca ptr, align 82113// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2114// CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 42115// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)2116// CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)2117// CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 12118// CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)2119// CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 82120// CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2121// CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 82122// CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2123// CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 8, !nonnull [[META2]], !align [[META3]]2124// CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42125// CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42126// CHECK13-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42127// CHECK13-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42128// CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02129// CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 22130// CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2131// CHECK13: arrayctor.loop:2132// CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2133// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2134// CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 12135// CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2136// CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2137// CHECK13: arrayctor.cont:2138// CHECK13-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8, !nonnull [[META2]], !align [[META3]]2139// CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2140// CHECK13-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 82141// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2142// CHECK13: omp.inner.for.cond:2143// CHECK13-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]2144// CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]2145// CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2146// CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2147// CHECK13: omp.inner.for.cond.cleanup:2148// CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2149// CHECK13: omp.inner.for.body:2150// CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2151// CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12152// CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2153// CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2154// CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP8]]2155// CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2156// CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i642157// CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]2158// CHECK13-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]2159// CHECK13-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 8, !nonnull [[META2]], !align [[META3]], !llvm.access.group [[ACC_GRP8]]2160// CHECK13-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]2161// CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP11]] to i642162// CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]2163// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP10]], i64 4, i1 false), !llvm.access.group [[ACC_GRP8]]2164// CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2165// CHECK13: omp.body.continue:2166// CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2167// CHECK13: omp.inner.for.inc:2168// CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2169// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP12]], 12170// CHECK13-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]2171// CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]2172// CHECK13: omp.inner.for.end:2173// CHECK13-NEXT: store i32 2, ptr [[I]], align 42174// CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 42175// CHECK13-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 42176// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i64 8, i1 false)2177// CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02178// CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 22179// CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP14]]2180// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2181// CHECK13: omp.arraycpy.body:2182// CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2183// CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2184// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)2185// CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12186// CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12187// CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2188// CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]2189// CHECK13: omp.arraycpy.done11:2190// CHECK13-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 82191// CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i64 4, i1 false)2192// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]2193// CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02194// CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 22195// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2196// CHECK13: arraydestroy.body:2197// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2198// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -12199// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2200// CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]2201// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]2202// CHECK13: arraydestroy.done13:2203// CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 42204// CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02205// CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 22206// CHECK13-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]]2207// CHECK13: arraydestroy.body15:2208// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]2209// CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i64 -12210// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]]2211// CHECK13-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]2212// CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]2213// CHECK13: arraydestroy.done19:2214// CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2215// CHECK13-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 42216// CHECK13-NEXT: ret i32 [[TMP18]]2217//2218//2219// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2220// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2221// CHECK13-NEXT: entry:2222// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82223// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82224// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82225// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02226// CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 42227// CHECK13-NEXT: ret void2228//2229//2230// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2231// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2232// CHECK13-NEXT: entry:2233// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82234// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82235// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82236// CHECK13-NEXT: ret void2237//2238//2239// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2240// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2241// CHECK13-NEXT: entry:2242// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82243// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 42244// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82245// CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 42246// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82247// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02248// CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42249// CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 42250// CHECK13-NEXT: ret void2251//2252//2253// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2254// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2255// CHECK13-NEXT: entry:2256// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82257// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82258// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82259// CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2260// CHECK13-NEXT: ret void2261//2262//2263// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2264// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2265// CHECK13-NEXT: entry:2266// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82267// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42268// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82269// CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42270// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82271// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42272// CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])2273// CHECK13-NEXT: ret void2274//2275//2276// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2277// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2278// CHECK13-NEXT: entry:2279// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82280// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82281// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82282// CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2283// CHECK13-NEXT: ret void2284//2285//2286// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2287// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2288// CHECK13-NEXT: entry:2289// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82290// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82291// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82292// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02293// CHECK13-NEXT: store i32 0, ptr [[F]], align 42294// CHECK13-NEXT: ret void2295//2296//2297// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2298// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {2299// CHECK13-NEXT: entry:2300// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82301// CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42302// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82303// CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42304// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82305// CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02306// CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42307// CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 42308// CHECK13-NEXT: ret void2309//2310//2311// CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2312// CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {2313// CHECK13-NEXT: entry:2314// CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 82315// CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 82316// CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 82317// CHECK13-NEXT: ret void2318//2319//2320// CHECK15-LABEL: define {{[^@]+}}@main2321// CHECK15-SAME: () #[[ATTR0:[0-9]+]] {2322// CHECK15-NEXT: entry:2323// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 42324// CHECK15-NEXT: [[G:%.*]] = alloca double, align 82325// CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 42326// CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 42327// CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 42328// CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42329// CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 42330// CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 42331// CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 42332// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 42333// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42334// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42335// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42336// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 42337// CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 42338// CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 42339// CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 42340// CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 42341// CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 42342// CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 42343// CHECK15-NEXT: [[I13:%.*]] = alloca i32, align 42344// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 42345// CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 42346// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2347// CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 42348// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)2349// CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)2350// CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 12351// CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)2352// CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 42353// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3:![0-9]+]], !align [[META4:![0-9]+]]2354// CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 42355// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2356// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2357// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42358// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42359// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42360// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42361// CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02362// CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 22363// CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2364// CHECK15: arrayctor.loop:2365// CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2366// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2367// CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 12368// CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2369// CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2370// CHECK15: arrayctor.cont:2371// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2372// CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2373// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 42374// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2375// CHECK15: omp.inner.for.cond:2376// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]2377// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]2378// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2379// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2380// CHECK15: omp.inner.for.cond.cleanup:2381// CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2382// CHECK15: omp.inner.for.body:2383// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2384// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12385// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2386// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2387// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP5]]2388// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2389// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP9]]2390// CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]2391// CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP5]]2392// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]2393// CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP11]]2394// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP5]]2395// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2396// CHECK15: omp.body.continue:2397// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2398// CHECK15: omp.inner.for.inc:2399// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2400// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 12401// CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]2402// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]2403// CHECK15: omp.inner.for.end:2404// CHECK15-NEXT: store i32 2, ptr [[I]], align 42405// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 42406// CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 42407// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i32 8, i1 false)2408// CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02409// CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 22410// CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP14]]2411// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2412// CHECK15: omp.arraycpy.body:2413// CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2414// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2415// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2416// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12417// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12418// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2419// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]2420// CHECK15: omp.arraycpy.done10:2421// CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 42422// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false)2423// CHECK15-NEXT: [[TMP16:%.*]] = load i32, ptr [[SVAR]], align 42424// CHECK15-NEXT: store i32 [[TMP16]], ptr @_ZZ4mainE4svar, align 42425// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3:[0-9]+]]2426// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 02427// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 22428// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2429// CHECK15: arraydestroy.body:2430// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2431// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12432// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2433// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]2434// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]2435// CHECK15: arraydestroy.done12:2436// CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()2437// CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 42438// CHECK15-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 02439// CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i32 22440// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]]2441// CHECK15: arraydestroy.body15:2442// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]2443// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i32 -12444// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]]2445// CHECK15-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]2446// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]2447// CHECK15: arraydestroy.done19:2448// CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2449// CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 42450// CHECK15-NEXT: ret i32 [[TMP19]]2451//2452//2453// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev2454// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {2455// CHECK15-NEXT: entry:2456// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42457// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42458// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42459// CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2460// CHECK15-NEXT: ret void2461//2462//2463// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef2464// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2465// CHECK15-NEXT: entry:2466// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42467// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 42468// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42469// CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 42470// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42471// CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42472// CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])2473// CHECK15-NEXT: ret void2474//2475//2476// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev2477// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2478// CHECK15-NEXT: entry:2479// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42480// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42481// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42482// CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2483// CHECK15-NEXT: ret void2484//2485//2486// CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v2487// CHECK15-SAME: () #[[ATTR1]] comdat {2488// CHECK15-NEXT: entry:2489// CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 42490// CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 42491// CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 42492// CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 42493// CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 42494// CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 42495// CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 42496// CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 42497// CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 42498// CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 42499// CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 42500// CHECK15-NEXT: [[I:%.*]] = alloca i32, align 42501// CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 42502// CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 42503// CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 42504// CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 42505// CHECK15-NEXT: [[_TMP6:%.*]] = alloca ptr, align 42506// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])2507// CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 42508// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)2509// CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)2510// CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 12511// CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)2512// CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 42513// CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2514// CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 42515// CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2516// CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR]], align 4, !nonnull [[META3]], !align [[META4]]2517// CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 42518// CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 42519// CHECK15-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 42520// CHECK15-NEXT: store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 42521// CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02522// CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 22523// CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]2524// CHECK15: arrayctor.loop:2525// CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]2526// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])2527// CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 12528// CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]2529// CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]2530// CHECK15: arrayctor.cont:2531// CHECK15-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4, !nonnull [[META3]], !align [[META4]]2532// CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])2533// CHECK15-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 42534// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]2535// CHECK15: omp.inner.for.cond:2536// CHECK15-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]2537// CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]2538// CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]2539// CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]2540// CHECK15: omp.inner.for.cond.cleanup:2541// CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]2542// CHECK15: omp.inner.for.body:2543// CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2544// CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 12545// CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]2546// CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2547// CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP9]]2548// CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2549// CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP9]]2550// CHECK15-NEXT: store i32 [[TMP8]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]2551// CHECK15-NEXT: [[TMP10:%.*]] = load ptr, ptr [[_TMP6]], align 4, !nonnull [[META3]], !align [[META4]], !llvm.access.group [[ACC_GRP9]]2552// CHECK15-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]2553// CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP11]]2554// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP10]], i32 4, i1 false), !llvm.access.group [[ACC_GRP9]]2555// CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]2556// CHECK15: omp.body.continue:2557// CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]2558// CHECK15: omp.inner.for.inc:2559// CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2560// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP12]], 12561// CHECK15-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]2562// CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]2563// CHECK15: omp.inner.for.end:2564// CHECK15-NEXT: store i32 2, ptr [[I]], align 42565// CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[T_VAR2]], align 42566// CHECK15-NEXT: store i32 [[TMP13]], ptr [[T_VAR]], align 42567// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC3]], i32 8, i1 false)2568// CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02569// CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 22570// CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP14]]2571// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]2572// CHECK15: omp.arraycpy.body:2573// CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2574// CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]2575// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)2576// CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 12577// CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 12578// CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP14]]2579// CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]2580// CHECK15: omp.arraycpy.done10:2581// CHECK15-NEXT: [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 42582// CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP15]], i32 4, i1 false)2583// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR3]]2584// CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 02585// CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 22586// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]2587// CHECK15: arraydestroy.body:2588// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP16]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]2589// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -12590// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]2591// CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]2592// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]2593// CHECK15: arraydestroy.done12:2594// CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 42595// CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 02596// CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 22597// CHECK15-NEXT: br label [[ARRAYDESTROY_BODY14:%.*]]2598// CHECK15: arraydestroy.body14:2599// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST15:%.*]] = phi ptr [ [[TMP17]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT16:%.*]], [[ARRAYDESTROY_BODY14]] ]2600// CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT16]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST15]], i32 -12601// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT16]]) #[[ATTR3]]2602// CHECK15-NEXT: [[ARRAYDESTROY_DONE17:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT16]], [[ARRAY_BEGIN13]]2603// CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE17]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY14]]2604// CHECK15: arraydestroy.done18:2605// CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]2606// CHECK15-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 42607// CHECK15-NEXT: ret i32 [[TMP18]]2608//2609//2610// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev2611// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2612// CHECK15-NEXT: entry:2613// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42614// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42615// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42616// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02617// CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 42618// CHECK15-NEXT: ret void2619//2620//2621// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev2622// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2623// CHECK15-NEXT: entry:2624// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42625// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42626// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42627// CHECK15-NEXT: ret void2628//2629//2630// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef2631// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2632// CHECK15-NEXT: entry:2633// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42634// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 42635// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42636// CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 42637// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42638// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 02639// CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 42640// CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 42641// CHECK15-NEXT: ret void2642//2643//2644// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev2645// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2646// CHECK15-NEXT: entry:2647// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42648// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42649// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42650// CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])2651// CHECK15-NEXT: ret void2652//2653//2654// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei2655// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2656// CHECK15-NEXT: entry:2657// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42658// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42659// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42660// CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42661// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42662// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42663// CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])2664// CHECK15-NEXT: ret void2665//2666//2667// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev2668// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2669// CHECK15-NEXT: entry:2670// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42671// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42672// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42673// CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]2674// CHECK15-NEXT: ret void2675//2676//2677// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev2678// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2679// CHECK15-NEXT: entry:2680// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42681// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42682// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42683// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02684// CHECK15-NEXT: store i32 0, ptr [[F]], align 42685// CHECK15-NEXT: ret void2686//2687//2688// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei2689// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2690// CHECK15-NEXT: entry:2691// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42692// CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 42693// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42694// CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 42695// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42696// CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 02697// CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 42698// CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 42699// CHECK15-NEXT: ret void2700//2701//2702// CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev2703// CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {2704// CHECK15-NEXT: entry:2705// CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 42706// CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 42707// CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 42708// CHECK15-NEXT: ret void2709//2710