201 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -emit-pch -o %t %s4// RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 6// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"7// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple powerpc64le-ibm-linux-gnu -emit-pch -o %t %s8// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// REQUIRES: powerpc-registered-target10 11// expected-no-diagnostics12#ifndef HEADER13#define HEADER14 15void gtid_test() {16#pragma omp target teams loop order(concurrent)17 for(int i = 0 ; i < 100; i++) {}18}19 20 21 22 23#endif24// CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv25// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {26// CHECK1-NEXT: entry:27// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 428// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 829// CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 030// CHECK1-NEXT: store i32 3, ptr [[TMP0]], align 431// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 132// CHECK1-NEXT: store i32 0, ptr [[TMP1]], align 433// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 234// CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 835// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 336// CHECK1-NEXT: store ptr null, ptr [[TMP3]], align 837// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 438// CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 839// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 540// CHECK1-NEXT: store ptr null, ptr [[TMP5]], align 841// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 642// CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 843// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 744// CHECK1-NEXT: store ptr null, ptr [[TMP7]], align 845// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 846// CHECK1-NEXT: store i64 100, ptr [[TMP8]], align 847// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 948// CHECK1-NEXT: store i64 0, ptr [[TMP9]], align 849// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1050// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP10]], align 451// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1152// CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP11]], align 453// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1254// CHECK1-NEXT: store i32 0, ptr [[TMP12]], align 455// CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16.region_id, ptr [[KERNEL_ARGS]])56// CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 057// CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]58// CHECK1: omp_offload.failed:59// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16() #[[ATTR2:[0-9]+]]60// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]61// CHECK1: omp_offload.cont:62// CHECK1-NEXT: ret void63//64//65// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l1666// CHECK1-SAME: () #[[ATTR1:[0-9]+]] {67// CHECK1-NEXT: entry:68// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16.omp_outlined)69// CHECK1-NEXT: ret void70//71//72// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16.omp_outlined73// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {74// CHECK1-NEXT: entry:75// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 876// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 877// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 478// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 479// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 480// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 481// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 482// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 483// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 484// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 885// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 886// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_COMB_LB]], align 487// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_COMB_UB]], align 488// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 489// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 490// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 891// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 492// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)93// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 494// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9995// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]96// CHECK1: cond.true:97// CHECK1-NEXT: br label [[COND_END:%.*]]98// CHECK1: cond.false:99// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4100// CHECK1-NEXT: br label [[COND_END]]101// CHECK1: cond.end:102// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]103// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4104// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4105// CHECK1-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4106// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]107// CHECK1: omp.inner.for.cond:108// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4109// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4110// CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]111// CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]112// CHECK1: omp.inner.for.body:113// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4114// CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64115// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4116// CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64117// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])118// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]119// CHECK1: omp.inner.for.inc:120// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4121// CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4122// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]123// CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4124// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]125// CHECK1: omp.inner.for.end:126// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]127// CHECK1: omp.loop.exit:128// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])129// CHECK1-NEXT: ret void130//131//132// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l16.omp_outlined.omp_outlined133// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {134// CHECK1-NEXT: entry:135// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8136// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8137// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8138// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8139// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4140// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4141// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4142// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4143// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4144// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4145// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4146// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8147// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8148// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8149// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8150// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4151// CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4152// CHECK1-NEXT: [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8153// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32154// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8155// CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32156// CHECK1-NEXT: store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4157// CHECK1-NEXT: store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4158// CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4159// CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4160// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8161// CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4162// CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)163// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4164// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99165// CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]166// CHECK1: cond.true:167// CHECK1-NEXT: br label [[COND_END:%.*]]168// CHECK1: cond.false:169// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4170// CHECK1-NEXT: br label [[COND_END]]171// CHECK1: cond.end:172// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]173// CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4174// CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4175// CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4176// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]177// CHECK1: omp.inner.for.cond:178// CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]179// CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]180// CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]181// CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]182// CHECK1: omp.inner.for.body:183// CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]184// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1185// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]186// CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]187// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]188// CHECK1: omp.body.continue:189// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]190// CHECK1: omp.inner.for.inc:191// CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]192// CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1193// CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]194// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]195// CHECK1: omp.inner.for.end:196// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]197// CHECK1: omp.loop.exit:198// CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])199// CHECK1-NEXT: ret void200//201