664 lines · cpp
1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s4// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 6// RUN: %clang_cc1 -no-enable-noundef-analysis -verify -Wno-vla -triple x86_64-apple-darwin10 -fopenmp-simd -x c++ -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"7// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s8// RUN: %clang_cc1 -no-enable-noundef-analysis -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"9// expected-no-diagnostics10#ifndef HEADER11#define HEADER12 13 14struct S {15 int a;16 S() : a(0) {}17 S(const S&) {}18 S& operator=(const S&) {return *this;}19 ~S() {}20 friend S operator+(const S&a, const S&b) {return a;}21};22 23 24int main(int argc, char **argv) {25 int a;26 float b;27 S c[5];28 short d[argc];29#pragma omp taskgroup task_reduction(+: a, b, argc)30 {31#pragma omp taskgroup task_reduction(-:c, d)32#pragma omp parallel33#pragma omp taskloop in_reduction(+:a) in_reduction(-:d)34 for (int i = 0; i < 5; ++i)35 a += d[a];36 }37 return 0;38}39 40 41 42#endif43// CHECK1-LABEL: define {{[^@]+}}@main44// CHECK1-SAME: (i32 [[ARGC:%.*]], ptr [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {45// CHECK1-NEXT: entry:46// CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 447// CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 448// CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 849// CHECK1-NEXT: [[A:%.*]] = alloca i32, align 450// CHECK1-NEXT: [[B:%.*]] = alloca float, align 451// CHECK1-NEXT: [[C:%.*]] = alloca [5 x %struct.S], align 1652// CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 853// CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 854// CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [3 x %struct.kmp_taskred_input_t], align 855// CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca ptr, align 856// CHECK1-NEXT: [[DOTRD_INPUT_3:%.*]] = alloca [2 x %struct.kmp_taskred_input_t.0], align 857// CHECK1-NEXT: [[DOTTASK_RED_6:%.*]] = alloca ptr, align 858// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])59// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 460// CHECK1-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 461// CHECK1-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 862// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 063// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 564// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]65// CHECK1: arrayctor.loop:66// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]67// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])68// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 169// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]70// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]71// CHECK1: arrayctor.cont:72// CHECK1-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 473// CHECK1-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i6474// CHECK1-NEXT: [[TMP3:%.*]] = call ptr @llvm.stacksave.p0()75// CHECK1-NEXT: store ptr [[TMP3]], ptr [[SAVED_STACK]], align 876// CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP2]], align 1677// CHECK1-NEXT: store i64 [[TMP2]], ptr [[__VLA_EXPR0]], align 878// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])79// CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 080// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 081// CHECK1-NEXT: store ptr [[A]], ptr [[TMP4]], align 882// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 183// CHECK1-NEXT: store ptr [[A]], ptr [[TMP5]], align 884// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 285// CHECK1-NEXT: store i64 4, ptr [[TMP6]], align 886// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 387// CHECK1-NEXT: store ptr @.red_init., ptr [[TMP7]], align 888// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 489// CHECK1-NEXT: store ptr null, ptr [[TMP8]], align 890// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 591// CHECK1-NEXT: store ptr @.red_comb., ptr [[TMP9]], align 892// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_]], i32 0, i32 693// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP10]], i8 0, i64 4, i1 false)94// CHECK1-NEXT: [[DOTRD_INPUT_GEP_1:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 195// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 096// CHECK1-NEXT: store ptr [[B]], ptr [[TMP11]], align 897// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 198// CHECK1-NEXT: store ptr [[B]], ptr [[TMP12]], align 899// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 2100// CHECK1-NEXT: store i64 4, ptr [[TMP13]], align 8101// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 3102// CHECK1-NEXT: store ptr @.red_init..1, ptr [[TMP14]], align 8103// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 4104// CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8105// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 5106// CHECK1-NEXT: store ptr @.red_comb..2, ptr [[TMP16]], align 8107// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_1]], i32 0, i32 6108// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP17]], i8 0, i64 4, i1 false)109// CHECK1-NEXT: [[DOTRD_INPUT_GEP_2:%.*]] = getelementptr inbounds nuw [3 x %struct.kmp_taskred_input_t], ptr [[DOTRD_INPUT_]], i64 0, i64 2110// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 0111// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP18]], align 8112// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 1113// CHECK1-NEXT: store ptr [[ARGC_ADDR]], ptr [[TMP19]], align 8114// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 2115// CHECK1-NEXT: store i64 4, ptr [[TMP20]], align 8116// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 3117// CHECK1-NEXT: store ptr @.red_init..3, ptr [[TMP21]], align 8118// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 4119// CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8120// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 5121// CHECK1-NEXT: store ptr @.red_comb..4, ptr [[TMP23]], align 8122// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T]], ptr [[DOTRD_INPUT_GEP_2]], i32 0, i32 6123// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 4, i1 false)124// CHECK1-NEXT: [[TMP25:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 3, ptr [[DOTRD_INPUT_]])125// CHECK1-NEXT: store ptr [[TMP25]], ptr [[DOTTASK_RED_]], align 8126// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])127// CHECK1-NEXT: [[DOTRD_INPUT_GEP_4:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 0128// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0:%.*]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 0129// CHECK1-NEXT: store ptr [[C]], ptr [[TMP26]], align 8130// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 1131// CHECK1-NEXT: store ptr [[C]], ptr [[TMP27]], align 8132// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 2133// CHECK1-NEXT: store i64 20, ptr [[TMP28]], align 8134// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 3135// CHECK1-NEXT: store ptr @.red_init..5, ptr [[TMP29]], align 8136// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 4137// CHECK1-NEXT: store ptr @.red_fini., ptr [[TMP30]], align 8138// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 5139// CHECK1-NEXT: store ptr @.red_comb..6, ptr [[TMP31]], align 8140// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_4]], i32 0, i32 6141// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP32]], i8 0, i64 4, i1 false)142// CHECK1-NEXT: [[DOTRD_INPUT_GEP_5:%.*]] = getelementptr inbounds nuw [2 x %struct.kmp_taskred_input_t.0], ptr [[DOTRD_INPUT_3]], i64 0, i64 1143// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 0144// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP33]], align 8145// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 1146// CHECK1-NEXT: store ptr [[VLA]], ptr [[TMP34]], align 8147// CHECK1-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP2]], 2148// CHECK1-NEXT: [[TMP36:%.*]] = udiv exact i64 [[TMP35]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)149// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 2150// CHECK1-NEXT: store i64 [[TMP35]], ptr [[TMP37]], align 8151// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 3152// CHECK1-NEXT: store ptr @.red_init..7, ptr [[TMP38]], align 8153// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 4154// CHECK1-NEXT: store ptr null, ptr [[TMP39]], align 8155// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 5156// CHECK1-NEXT: store ptr @.red_comb..8, ptr [[TMP40]], align 8157// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASKRED_INPUT_T_0]], ptr [[DOTRD_INPUT_GEP_5]], i32 0, i32 6158// CHECK1-NEXT: store i32 1, ptr [[TMP41]], align 8159// CHECK1-NEXT: [[TMP42:%.*]] = call ptr @__kmpc_taskred_init(i32 [[TMP0]], i32 2, ptr [[DOTRD_INPUT_3]])160// CHECK1-NEXT: store ptr [[TMP42]], ptr [[DOTTASK_RED_6]], align 8161// CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 5, ptr @main.omp_outlined, ptr [[A]], i64 [[TMP2]], ptr [[VLA]], ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED_6]])162// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])163// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP0]])164// CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4165// CHECK1-NEXT: [[TMP43:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8166// CHECK1-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP43]])167// CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[C]], i32 0, i32 0168// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN7]], i64 5169// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]170// CHECK1: arraydestroy.body:171// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP44]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]172// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1173// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3:[0-9]+]]174// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]175// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]176// CHECK1: arraydestroy.done8:177// CHECK1-NEXT: [[TMP45:%.*]] = load i32, ptr [[RETVAL]], align 4178// CHECK1-NEXT: ret i32 [[TMP45]]179//180//181// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ev182// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {183// CHECK1-NEXT: entry:184// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8185// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8186// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8187// CHECK1-NEXT: call void @_ZN1SC2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]])188// CHECK1-NEXT: ret void189//190//191// CHECK1-LABEL: define {{[^@]+}}@.red_init.192// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {193// CHECK1-NEXT: entry:194// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8195// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8196// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8197// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8198// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8199// CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4200// CHECK1-NEXT: ret void201//202//203// CHECK1-LABEL: define {{[^@]+}}@.red_comb.204// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {205// CHECK1-NEXT: entry:206// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8207// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8208// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8209// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8210// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8211// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8212// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4213// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4214// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]]215// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4216// CHECK1-NEXT: ret void217//218//219// CHECK1-LABEL: define {{[^@]+}}@.red_init..1220// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {221// CHECK1-NEXT: entry:222// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8223// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8224// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8225// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8226// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8227// CHECK1-NEXT: store float 0.000000e+00, ptr [[TMP2]], align 4228// CHECK1-NEXT: ret void229//230//231// CHECK1-LABEL: define {{[^@]+}}@.red_comb..2232// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {233// CHECK1-NEXT: entry:234// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8235// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8236// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8237// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8238// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8239// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8240// CHECK1-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP2]], align 4241// CHECK1-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP3]], align 4242// CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP4]], [[TMP5]]243// CHECK1-NEXT: store float [[ADD]], ptr [[TMP2]], align 4244// CHECK1-NEXT: ret void245//246//247// CHECK1-LABEL: define {{[^@]+}}@.red_init..3248// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {249// CHECK1-NEXT: entry:250// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8251// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8252// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8253// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8254// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8255// CHECK1-NEXT: store i32 0, ptr [[TMP2]], align 4256// CHECK1-NEXT: ret void257//258//259// CHECK1-LABEL: define {{[^@]+}}@.red_comb..4260// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {261// CHECK1-NEXT: entry:262// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8263// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8264// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8265// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8266// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8267// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8268// CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4269// CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3]], align 4270// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP5]]271// CHECK1-NEXT: store i32 [[ADD]], ptr [[TMP2]], align 4272// CHECK1-NEXT: ret void273//274//275// CHECK1-LABEL: define {{[^@]+}}@.red_init..5276// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {277// CHECK1-NEXT: entry:278// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8279// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8280// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8281// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8282// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8283// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP2]], i32 0, i32 0284// CHECK1-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5285// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP3]]286// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]287// CHECK1: omp.arrayinit.body:288// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]289// CHECK1-NEXT: call void @_ZN1SC1Ev(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]])290// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1291// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP3]]292// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]293// CHECK1: omp.arrayinit.done:294// CHECK1-NEXT: ret void295//296//297// CHECK1-LABEL: define {{[^@]+}}@.red_fini.298// CHECK1-SAME: (ptr [[TMP0:%.*]]) #[[ATTR5]] {299// CHECK1-NEXT: entry:300// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8301// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8302// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8303// CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S], ptr [[TMP1]], i32 0, i32 0304// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 5305// CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]306// CHECK1: arraydestroy.body:307// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]308// CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1309// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]310// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]311// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]312// CHECK1: arraydestroy.done1:313// CHECK1-NEXT: ret void314//315//316// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev317// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {318// CHECK1-NEXT: entry:319// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8320// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8321// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8322// CHECK1-NEXT: call void @_ZN1SD2Ev(ptr nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]323// CHECK1-NEXT: ret void324//325//326// CHECK1-LABEL: define {{[^@]+}}@.red_comb..6327// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {328// CHECK1-NEXT: entry:329// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8330// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8331// CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4332// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8333// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8334// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8335// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8336// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S]], ptr [[TMP2]], i64 5337// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP2]], [[TMP4]]338// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE2:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]339// CHECK1: omp.arraycpy.body:340// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]341// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]342// CHECK1-NEXT: call void @_ZplRK1SS1_(ptr dead_on_unwind writable sret([[STRUCT_S]]) align 4 [[REF_TMP]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])343// CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) ptr @_ZN1SaSERKS_(ptr nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr nonnull align 4 dereferenceable(4) [[REF_TMP]])344// CHECK1-NEXT: call void @_ZN1SD1Ev(ptr nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR3]]345// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1346// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1347// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]]348// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE2]], label [[OMP_ARRAYCPY_BODY]]349// CHECK1: omp.arraycpy.done2:350// CHECK1-NEXT: ret void351//352//353// CHECK1-LABEL: define {{[^@]+}}@_ZplRK1SS1_354// CHECK1-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], ptr nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] {355// CHECK1-NEXT: entry:356// CHECK1-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 8357// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8358// CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8359// CHECK1-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8360// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8361// CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8362// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8363// CHECK1-NEXT: call void @_ZN1SC1ERKS_(ptr nonnull align 4 dereferenceable(4) [[AGG_RESULT]], ptr nonnull align 4 dereferenceable(4) [[TMP0]])364// CHECK1-NEXT: ret void365//366//367// CHECK1-LABEL: define {{[^@]+}}@_ZN1SaSERKS_368// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR1]] align 2 {369// CHECK1-NEXT: entry:370// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8371// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8372// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8373// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8374// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8375// CHECK1-NEXT: ret ptr [[THIS1]]376//377//378// CHECK1-LABEL: define {{[^@]+}}@.red_init..7379// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {380// CHECK1-NEXT: entry:381// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8382// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8383// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])384// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8385// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8386// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8387// CHECK1-NEXT: [[TMP4:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})388// CHECK1-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8389// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr i16, ptr [[TMP3]], i64 [[TMP5]]390// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[TMP3]], [[TMP6]]391// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]392// CHECK1: omp.arrayinit.body:393// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]394// CHECK1-NEXT: store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2395// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1396// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]397// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]398// CHECK1: omp.arrayinit.done:399// CHECK1-NEXT: ret void400//401//402// CHECK1-LABEL: define {{[^@]+}}@.red_comb..8403// CHECK1-SAME: (ptr [[TMP0:%.*]], ptr [[TMP1:%.*]]) #[[ATTR5]] {404// CHECK1-NEXT: entry:405// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8406// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8407// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])408// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8409// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8410// CHECK1-NEXT: [[TMP3:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP2]], ptr @{{reduction_size[.].+[.]}})411// CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8412// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR]], align 8413// CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR1]], align 8414// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr i16, ptr [[TMP5]], i64 [[TMP4]]415// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP5]], [[TMP7]]416// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]417// CHECK1: omp.arraycpy.body:418// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]419// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]420// CHECK1-NEXT: [[TMP8:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2421// CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP8]] to i32422// CHECK1-NEXT: [[TMP9:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2423// CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP9]] to i32424// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]425// CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16426// CHECK1-NEXT: store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2427// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1428// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1429// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]]430// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]431// CHECK1: omp.arraycpy.done4:432// CHECK1-NEXT: ret void433//434//435// CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined436// CHECK1-SAME: (ptr noalias [[DOTGLOBAL_TID_:%.*]], ptr noalias [[DOTBOUND_TID_:%.*]], ptr nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[VLA:%.*]], ptr nonnull align 2 dereferenceable(2) [[D:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_:%.*]], ptr nonnull align 8 dereferenceable(8) [[DOTTASK_RED_1:%.*]]) #[[ATTR7:[0-9]+]] {437// CHECK1-NEXT: entry:438// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8439// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8440// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8441// CHECK1-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8442// CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8443// CHECK1-NEXT: [[DOTTASK_RED__ADDR:%.*]] = alloca ptr, align 8444// CHECK1-NEXT: [[DOTTASK_RED__ADDR2:%.*]] = alloca ptr, align 8445// CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8446// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4447// CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8448// CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8449// CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8450// CHECK1-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8451// CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8452// CHECK1-NEXT: store ptr [[DOTTASK_RED_]], ptr [[DOTTASK_RED__ADDR]], align 8453// CHECK1-NEXT: store ptr [[DOTTASK_RED_1]], ptr [[DOTTASK_RED__ADDR2]], align 8454// CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8455// CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8456// CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[D_ADDR]], align 8457// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR]], align 8458// CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTTASK_RED__ADDR2]], align 8459// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0460// CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8461// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1462// CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP6]], align 8463// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 2464// CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP7]], align 8465// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 3466// CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP8]], align 8467// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 4468// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP9]], align 8469// CHECK1-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8470// CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4471// CHECK1-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP11]])472// CHECK1-NEXT: [[TMP12:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP11]], i32 1, i64 96, i64 40, ptr @.omp_task_entry.)473// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP12]], i32 0, i32 0474// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP13]], i32 0, i32 0475// CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8476// CHECK1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[AGG_CAPTURED]], i64 40, i1 false)477// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP12]], i32 0, i32 1478// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP16]], i32 0, i32 0479// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8480// CHECK1-NEXT: store ptr [[TMP18]], ptr [[TMP17]], align 8481// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP16]], i32 0, i32 1482// CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP4]], align 8483// CHECK1-NEXT: store ptr [[TMP20]], ptr [[TMP19]], align 8484// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP13]], i32 0, i32 5485// CHECK1-NEXT: store i64 0, ptr [[TMP21]], align 8486// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP13]], i32 0, i32 6487// CHECK1-NEXT: store i64 4, ptr [[TMP22]], align 8488// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP13]], i32 0, i32 7489// CHECK1-NEXT: store i64 1, ptr [[TMP23]], align 8490// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP13]], i32 0, i32 9491// CHECK1-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 8, i1 false)492// CHECK1-NEXT: [[TMP25:%.*]] = load i64, ptr [[TMP23]], align 8493// CHECK1-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP11]], ptr [[TMP12]], i32 1, ptr [[TMP21]], ptr [[TMP22]], i64 [[TMP25]], i32 1, i32 0, i64 0, ptr null)494// CHECK1-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP11]])495// CHECK1-NEXT: ret void496//497//498// CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.499// CHECK1-SAME: (ptr noalias [[TMP0:%.*]], ptr noalias [[TMP1:%.*]], ptr noalias [[TMP2:%.*]]) #[[ATTR8:[0-9]+]] {500// CHECK1-NEXT: entry:501// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8502// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8503// CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8504// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8505// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8506// CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8507// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8508// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0509// CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8510// CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 8511// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1512// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 8513// CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8514// CHECK1-NEXT: ret void515//516//517// CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.518// CHECK1-SAME: (i32 [[TMP0:%.*]], ptr noalias [[TMP1:%.*]]) #[[ATTR5]] {519// CHECK1-NEXT: entry:520// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4521// CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8522// CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8523// CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8524// CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8525// CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8526// CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8527// CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8528// CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4529// CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8530// CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8531// CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8532// CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8533// CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4534// CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4535// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4536// CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8537// CHECK1-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4538// CHECK1-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8539// CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4540// CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8541// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0542// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2543// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0544// CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8545// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1546// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5547// CHECK1-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8548// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6549// CHECK1-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8550// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7551// CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8552// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8553// CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8554// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9555// CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8556// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])557// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])558// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])559// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])560// CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])561// CHECK1-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14:![0-9]+]]562// CHECK1-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias [[META14]]563// CHECK1-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]564// CHECK1-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]565// CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias [[META14]]566// CHECK1-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]567// CHECK1-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]568// CHECK1-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias [[META14]]569// CHECK1-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias [[META14]]570// CHECK1-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias [[META14]]571// CHECK1-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]572// CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias [[META14]]573// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON:%.*]], ptr [[TMP19]], i32 0, i32 1574// CHECK1-NEXT: [[TMP21:%.*]] = load i64, ptr [[TMP20]], align 8575// CHECK1-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias [[META14]]576// CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias [[META14]]577// CHECK1-NEXT: call void [[TMP22]](ptr [[TMP23]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3]]578// CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias [[META14]]579// CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias [[META14]]580// CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[TMP19]], align 8581// CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP24]], align 8582// CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias [[META14]]583// CHECK1-NEXT: [[TMP29:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP28]], ptr [[TMP27]], ptr [[TMP26]])584// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT_ANON]], ptr [[TMP19]], i32 0, i32 2585// CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8586// CHECK1-NEXT: [[TMP32:%.*]] = mul nuw i64 [[TMP21]], 2587// CHECK1-NEXT: [[TMP33:%.*]] = udiv exact i64 [[TMP32]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)588// CHECK1-NEXT: [[TMP34:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP28]], ptr @{{reduction_size[.].+[.]}})589// CHECK1-NEXT: store i64 [[TMP33]], ptr [[TMP34]], align 8590// CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[TMP25]], align 8591// CHECK1-NEXT: [[TMP36:%.*]] = call ptr @__kmpc_task_reduction_get_th_data(i32 [[TMP28]], ptr [[TMP35]], ptr [[TMP31]])592// CHECK1-NEXT: [[TMP37:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias [[META14]]593// CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP37]] to i32594// CHECK1-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]595// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]596// CHECK1: omp.inner.for.cond.i:597// CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]598// CHECK1-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP38]] to i64599// CHECK1-NEXT: [[TMP39:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias [[META14]]600// CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP39]]601// CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]602// CHECK1: omp.inner.for.body.i:603// CHECK1-NEXT: [[TMP40:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]604// CHECK1-NEXT: store i32 [[TMP40]], ptr [[I_I]], align 4, !noalias [[META14]]605// CHECK1-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP29]], align 4606// CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP41]] to i64607// CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i16, ptr [[TMP36]], i64 [[IDXPROM_I]]608// CHECK1-NEXT: [[TMP42:%.*]] = load i16, ptr [[ARRAYIDX_I]], align 2609// CHECK1-NEXT: [[CONV3_I:%.*]] = sext i16 [[TMP42]] to i32610// CHECK1-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP29]], align 4611// CHECK1-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP43]], [[CONV3_I]]612// CHECK1-NEXT: store i32 [[ADD4_I]], ptr [[TMP29]], align 4613// CHECK1-NEXT: [[TMP44:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]614// CHECK1-NEXT: [[ADD5_I:%.*]] = add nsw i32 [[TMP44]], 1615// CHECK1-NEXT: store i32 [[ADD5_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias [[META14]]616// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]]617// CHECK1: .omp_outlined..exit:618// CHECK1-NEXT: ret i32 0619//620//621// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ev622// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {623// CHECK1-NEXT: entry:624// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8625// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8626// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8627// CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0628// CHECK1-NEXT: store i32 0, ptr [[A]], align 4629// CHECK1-NEXT: ret void630//631//632// CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev633// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {634// CHECK1-NEXT: entry:635// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8636// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8637// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8638// CHECK1-NEXT: ret void639//640//641// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1ERKS_642// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {643// CHECK1-NEXT: entry:644// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8645// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8646// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8647// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8648// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8649// CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTADDR]], align 8650// CHECK1-NEXT: call void @_ZN1SC2ERKS_(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP1]])651// CHECK1-NEXT: ret void652//653//654// CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2ERKS_655// CHECK1-SAME: (ptr nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) unnamed_addr #[[ATTR1]] align 2 {656// CHECK1-NEXT: entry:657// CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8658// CHECK1-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8659// CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8660// CHECK1-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8661// CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8662// CHECK1-NEXT: ret void663//664