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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"17// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"18// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"20#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24  T a[X][Y];25 26  int foo(void) {27 28    #pragma omp target29    #pragma omp teams distribute collapse(2)30    for(int i = 0; i < X; i++) {31      for(int j = 0; j < Y; j++) {32        a[i][j] = (T)0;33      }34    }35 36    // discard loop variables not needed here37 38    return a[0][0];39  }40};41 42int teams_template_struct(void) {43  SS<int, 123, 456> V;44  return V.foo();45 46}47#endif // CK148 49// Test host codegen.50// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK951// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s52// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK953// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1154// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s55// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1156 57// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"58// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s59// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"60// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"61// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s62// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"63#ifdef CK264 65template <typename T, int n, int m>66int tmain(T argc) {67  T a[n][m];68  #pragma omp target69  #pragma omp teams distribute collapse(2)70  for(int i = 0; i < n; i++) {71    for(int j = 0; j < m; j++) {72      a[i][j] = (T)0;73    }74  }75  return 0;76}77 78int main (int argc, char **argv) {79  int n = 100;80  int m = 2;81  int a[n][m];82  #pragma omp target83  #pragma omp teams distribute collapse(2)84  for(int i = 0; i < n; i++) {85    for(int j = 0; j < m; j++) {86      a[i][j] = 0;87    }88  }89  return tmain<int, 10, 2>(argc);90}91 92 93 94 95 96// discard loop variables not needed here97 98#endif // CK299#endif // #ifndef HEADER100// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv101// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {102// CHECK1-NEXT:  entry:103// CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4104// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])105// CHECK1-NEXT:    ret i32 [[CALL]]106//107//108// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv109// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {110// CHECK1-NEXT:  entry:111// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8112// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8113// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8114// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8115// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4116// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4117// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8118// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8119// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8120// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0121// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0122// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8123// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0124// CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8125// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0126// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8127// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0128// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0129// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0130// CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4131// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1132// CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4133// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2134// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8135// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3136// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8137// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4138// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8139// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5140// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8141// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6142// CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8143// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7144// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8145// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8146// CHECK1-NEXT:    store i64 56088, ptr [[TMP13]], align 8147// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9148// CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8149// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10150// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4151// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11152// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4153// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12154// CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4155// CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])156// CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0157// CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]158// CHECK1:       omp_offload.failed:159// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]160// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]161// CHECK1:       omp_offload.cont:162// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0163// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0164// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0165// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4166// CHECK1-NEXT:    ret i32 [[TMP20]]167//168//169// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28170// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {171// CHECK1-NEXT:  entry:172// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8173// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8174// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8175// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])176// CHECK1-NEXT:    ret void177//178//179// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined180// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {181// CHECK1-NEXT:  entry:182// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8183// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8184// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8185// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4186// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4187// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4188// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4189// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4190// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4191// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4192// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4193// CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4194// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8195// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8196// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8197// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8198// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4199// CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4200// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4201// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4202// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8203// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4204// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)205// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4206// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087207// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]208// CHECK1:       cond.true:209// CHECK1-NEXT:    br label [[COND_END:%.*]]210// CHECK1:       cond.false:211// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4212// CHECK1-NEXT:    br label [[COND_END]]213// CHECK1:       cond.end:214// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]215// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4216// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4217// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4218// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]219// CHECK1:       omp.inner.for.cond:220// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4221// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4222// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]223// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]224// CHECK1:       omp.inner.for.body:225// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4226// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456227// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1228// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]229// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4230// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4231// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4232// CHECK1-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456233// CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456234// CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]235// CHECK1-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1236// CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]237// CHECK1-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4238// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0239// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4240// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64241// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]242// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4243// CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64244// CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]245// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4246// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]247// CHECK1:       omp.body.continue:248// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]249// CHECK1:       omp.inner.for.inc:250// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4251// CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1252// CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4253// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]254// CHECK1:       omp.inner.for.end:255// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]256// CHECK1:       omp.loop.exit:257// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])258// CHECK1-NEXT:    ret void259//260//261// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv262// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {263// CHECK3-NEXT:  entry:264// CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4265// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])266// CHECK3-NEXT:    ret i32 [[CALL]]267//268//269// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv270// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {271// CHECK3-NEXT:  entry:272// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4273// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4274// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4275// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4276// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4277// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4278// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8279// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4280// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4281// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0282// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0283// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4284// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0285// CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4286// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0287// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4288// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0289// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0290// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0291// CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4292// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1293// CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4294// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2295// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4296// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3297// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4298// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4299// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4300// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5301// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4302// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6303// CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4304// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7305// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4306// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8307// CHECK3-NEXT:    store i64 56088, ptr [[TMP13]], align 8308// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9309// CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8310// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10311// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4312// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11313// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4314// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12315// CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4316// CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])317// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0318// CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]319// CHECK3:       omp_offload.failed:320// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]321// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]322// CHECK3:       omp_offload.cont:323// CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0324// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0325// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0326// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4327// CHECK3-NEXT:    ret i32 [[TMP20]]328//329//330// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28331// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {332// CHECK3-NEXT:  entry:333// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4334// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4335// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4336// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])337// CHECK3-NEXT:    ret void338//339//340// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined341// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {342// CHECK3-NEXT:  entry:343// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4344// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4345// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4346// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4347// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4348// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4349// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4350// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4351// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4352// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4353// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4354// CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4355// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4356// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4357// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4358// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4359// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4360// CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4361// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4362// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4363// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4364// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4365// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)366// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4367// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087368// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]369// CHECK3:       cond.true:370// CHECK3-NEXT:    br label [[COND_END:%.*]]371// CHECK3:       cond.false:372// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4373// CHECK3-NEXT:    br label [[COND_END]]374// CHECK3:       cond.end:375// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]376// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4377// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4378// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4379// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]380// CHECK3:       omp.inner.for.cond:381// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4382// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4383// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]384// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]385// CHECK3:       omp.inner.for.body:386// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4387// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456388// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1389// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]390// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4391// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4392// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4393// CHECK3-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456394// CHECK3-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456395// CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]396// CHECK3-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1397// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]398// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4399// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0400// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4401// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]]402// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4403// CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]404// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4405// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]406// CHECK3:       omp.body.continue:407// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]408// CHECK3:       omp.inner.for.inc:409// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4410// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1411// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4412// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]413// CHECK3:       omp.inner.for.end:414// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]415// CHECK3:       omp.loop.exit:416// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])417// CHECK3-NEXT:    ret void418//419//420// CHECK9-LABEL: define {{[^@]+}}@main421// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {422// CHECK9-NEXT:  entry:423// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4424// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4425// CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8426// CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4427// CHECK9-NEXT:    [[M:%.*]] = alloca i32, align 4428// CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8429// CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8430// CHECK9-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i64, align 8431// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8432// CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8433// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8434// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8435// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8436// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8437// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4438// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4439// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4440// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4441// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8442// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8443// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4444// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4445// CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8446// CHECK9-NEXT:    store i32 100, ptr [[N]], align 4447// CHECK9-NEXT:    store i32 2, ptr [[M]], align 4448// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4449// CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64450// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M]], align 4451// CHECK9-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64452// CHECK9-NEXT:    [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()453// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8454// CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]455// CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4456// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8457// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8458// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N]], align 4459// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4460// CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8461// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[M]], align 4462// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[M_CASTED]], align 4463// CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8464// CHECK9-NEXT:    [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]465// CHECK9-NEXT:    [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4466// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)467// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0468// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP12]], align 8469// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0470// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP13]], align 8471// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0472// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8473// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1474// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP15]], align 8475// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1476// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP16]], align 8477// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1478// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8479// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2480// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP18]], align 8481// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2482// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP19]], align 8483// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2484// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8485// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3486// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP21]], align 8487// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3488// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP22]], align 8489// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3490// CHECK9-NEXT:    store ptr null, ptr [[TMP23]], align 8491// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4492// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 8493// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4494// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP25]], align 8495// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4496// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[TMP26]], align 8497// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4498// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8499// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0500// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0501// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0502// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[N]], align 4503// CHECK9-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4504// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[M]], align 4505// CHECK9-NEXT:    store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4506// CHECK9-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4507// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0508// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1509// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64510// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4511// CHECK9-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0512// CHECK9-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1513// CHECK9-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64514// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]515// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1516// CHECK9-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8517// CHECK9-NEXT:    [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8518// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP35]], 1519// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0520// CHECK9-NEXT:    store i32 3, ptr [[TMP36]], align 4521// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1522// CHECK9-NEXT:    store i32 5, ptr [[TMP37]], align 4523// CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2524// CHECK9-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 8525// CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3526// CHECK9-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 8527// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4528// CHECK9-NEXT:    store ptr [[TMP30]], ptr [[TMP40]], align 8529// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5530// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8531// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6532// CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8533// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7534// CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8535// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8536// CHECK9-NEXT:    store i64 [[ADD]], ptr [[TMP44]], align 8537// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9538// CHECK9-NEXT:    store i64 0, ptr [[TMP45]], align 8539// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10540// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4541// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11542// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4543// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12544// CHECK9-NEXT:    store i32 0, ptr [[TMP48]], align 4545// CHECK9-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]])546// CHECK9-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0547// CHECK9-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]548// CHECK9:       omp_offload.failed:549// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]550// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]551// CHECK9:       omp_offload.cont:552// CHECK9-NEXT:    [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4553// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])554// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4555// CHECK9-NEXT:    [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8556// CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP52]])557// CHECK9-NEXT:    [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4558// CHECK9-NEXT:    ret i32 [[TMP53]]559//560//561// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82562// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {563// CHECK9-NEXT:  entry:564// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8565// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8566// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8567// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8568// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8569// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8570// CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8571// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8572// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8573// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8574// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8575// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8576// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8577// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])578// CHECK9-NEXT:    ret void579//580//581// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined582// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {583// CHECK9-NEXT:  entry:584// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8585// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8586// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8587// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 8588// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8589// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8590// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8591// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8592// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4593// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4594// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4595// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4596// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8597// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4598// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4599// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 8600// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 8601// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8602// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4603// CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4604// CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4605// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8606// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8607// CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8608// CHECK9-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 8609// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8610// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8611// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8612// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8613// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8614// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8615// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8616// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8617// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4618// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4619// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4620// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4621// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4622// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0623// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1624// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64625// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4626// CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0627// CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1628// CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64629// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]630// CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1631// CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8632// CHECK9-NEXT:    store i32 0, ptr [[I]], align 4633// CHECK9-NEXT:    store i32 0, ptr [[J]], align 4634// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4635// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]636// CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]637// CHECK9:       land.lhs.true:638// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4639// CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]640// CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]641// CHECK9:       omp.precond.then:642// CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 8643// CHECK9-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8644// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8645// CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8646// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4647// CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8648// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4649// CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)650// CHECK9-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8651// CHECK9-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8652// CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]653// CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]654// CHECK9:       cond.true:655// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8656// CHECK9-NEXT:    br label [[COND_END:%.*]]657// CHECK9:       cond.false:658// CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8659// CHECK9-NEXT:    br label [[COND_END]]660// CHECK9:       cond.end:661// CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]662// CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 8663// CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8664// CHECK9-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8665// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]666// CHECK9:       omp.inner.for.cond:667// CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8668// CHECK9-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8669// CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]670// CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]671// CHECK9:       omp.inner.for.body:672// CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8673// CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4674// CHECK9-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0675// CHECK9-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1676// CHECK9-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]677// CHECK9-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64678// CHECK9-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]679// CHECK9-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1680// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]681// CHECK9-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32682// CHECK9-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4683// CHECK9-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8684// CHECK9-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8685// CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4686// CHECK9-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0687// CHECK9-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1688// CHECK9-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]689// CHECK9-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64690// CHECK9-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]691// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4692// CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0693// CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1694// CHECK9-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]695// CHECK9-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64696// CHECK9-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]697// CHECK9-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]698// CHECK9-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1699// CHECK9-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]700// CHECK9-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32701// CHECK9-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4702// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 4703// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64704// CHECK9-NEXT:    [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]705// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP28]]706// CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 4707// CHECK9-NEXT:    [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64708// CHECK9-NEXT:    [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]709// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX37]], align 4710// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]711// CHECK9:       omp.body.continue:712// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]713// CHECK9:       omp.inner.for.inc:714// CHECK9-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8715// CHECK9-NEXT:    [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1716// CHECK9-NEXT:    store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8717// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]718// CHECK9:       omp.inner.for.end:719// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]720// CHECK9:       omp.loop.exit:721// CHECK9-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8722// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4723// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])724// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]725// CHECK9:       omp.precond.end:726// CHECK9-NEXT:    ret void727//728//729// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_730// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {731// CHECK9-NEXT:  entry:732// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4733// CHECK9-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 4734// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8735// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8736// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8737// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4738// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4739// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8740// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4741// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0742// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8743// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0744// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8745// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0746// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8747// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0748// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0749// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0750// CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 4751// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1752// CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 4753// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2754// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8755// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3756// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8757// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4758// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 8759// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5760// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8761// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6762// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8763// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7764// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8765// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8766// CHECK9-NEXT:    store i64 20, ptr [[TMP13]], align 8767// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9768// CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 8769// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10770// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4771// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11772// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4773// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12774// CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 4775// CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]])776// CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0777// CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]778// CHECK9:       omp_offload.failed:779// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]]780// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]781// CHECK9:       omp_offload.cont:782// CHECK9-NEXT:    ret i32 0783//784//785// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68786// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {787// CHECK9-NEXT:  entry:788// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8789// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8790// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8791// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]])792// CHECK9-NEXT:    ret void793//794//795// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined796// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {797// CHECK9-NEXT:  entry:798// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8799// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8800// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8801// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4802// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4803// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4804// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4805// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4806// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4807// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4808// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4809// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4810// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8811// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8812// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8813// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8814// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4815// CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 4816// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4817// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4818// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8819// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4820// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)821// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4822// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19823// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]824// CHECK9:       cond.true:825// CHECK9-NEXT:    br label [[COND_END:%.*]]826// CHECK9:       cond.false:827// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4828// CHECK9-NEXT:    br label [[COND_END]]829// CHECK9:       cond.end:830// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]831// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4832// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4833// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4834// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]835// CHECK9:       omp.inner.for.cond:836// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4837// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4838// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]839// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]840// CHECK9:       omp.inner.for.body:841// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4842// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 2843// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1844// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]845// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4846// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4847// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4848// CHECK9-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2849// CHECK9-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2850// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]851// CHECK9-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1852// CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]853// CHECK9-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4854// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4855// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64856// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]857// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4858// CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64859// CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]860// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4861// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]862// CHECK9:       omp.body.continue:863// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]864// CHECK9:       omp.inner.for.inc:865// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4866// CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1867// CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4868// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]869// CHECK9:       omp.inner.for.end:870// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]871// CHECK9:       omp.loop.exit:872// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])873// CHECK9-NEXT:    ret void874//875//876// CHECK11-LABEL: define {{[^@]+}}@main877// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {878// CHECK11-NEXT:  entry:879// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4880// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4881// CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4882// CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4883// CHECK11-NEXT:    [[M:%.*]] = alloca i32, align 4884// CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4885// CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4886// CHECK11-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i32, align 4887// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4888// CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4889// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4890// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4891// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4892// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4893// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4894// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4895// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4896// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4897// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8898// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8899// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4900// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4901// CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4902// CHECK11-NEXT:    store i32 100, ptr [[N]], align 4903// CHECK11-NEXT:    store i32 2, ptr [[M]], align 4904// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4905// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M]], align 4906// CHECK11-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()907// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4908// CHECK11-NEXT:    [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]909// CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4910// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4911// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4912// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N]], align 4913// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4914// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4915// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M]], align 4916// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[M_CASTED]], align 4917// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4918// CHECK11-NEXT:    [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]919// CHECK11-NEXT:    [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4920// CHECK11-NEXT:    [[TMP10:%.*]] = sext i32 [[TMP9]] to i64921// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)922// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0923// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP11]], align 4924// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0925// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP12]], align 4926// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0927// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4928// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1929// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP14]], align 4930// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1931// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP15]], align 4932// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1933// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4934// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2935// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP17]], align 4936// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2937// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP18]], align 4938// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2939// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4940// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3941// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP20]], align 4942// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3943// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP21]], align 4944// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3945// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4946// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4947// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP23]], align 4948// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4949// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 4950// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4951// CHECK11-NEXT:    store i64 [[TMP10]], ptr [[TMP25]], align 4952// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4953// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4954// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0955// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0956// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0957// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4958// CHECK11-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4959// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[M]], align 4960// CHECK11-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4961// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4962// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0963// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1964// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64965// CHECK11-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4966// CHECK11-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0967// CHECK11-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1968// CHECK11-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64969// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]970// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1971// CHECK11-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8972// CHECK11-NEXT:    [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8973// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP34]], 1974// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0975// CHECK11-NEXT:    store i32 3, ptr [[TMP35]], align 4976// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1977// CHECK11-NEXT:    store i32 5, ptr [[TMP36]], align 4978// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2979// CHECK11-NEXT:    store ptr [[TMP27]], ptr [[TMP37]], align 4980// CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3981// CHECK11-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 4982// CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4983// CHECK11-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 4984// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5985// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP40]], align 4986// CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6987// CHECK11-NEXT:    store ptr null, ptr [[TMP41]], align 4988// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7989// CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 4990// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8991// CHECK11-NEXT:    store i64 [[ADD]], ptr [[TMP43]], align 8992// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9993// CHECK11-NEXT:    store i64 0, ptr [[TMP44]], align 8994// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10995// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4996// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11997// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4998// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12999// CHECK11-NEXT:    store i32 0, ptr [[TMP47]], align 41000// CHECK11-NEXT:    [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]])1001// CHECK11-NEXT:    [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 01002// CHECK11-NEXT:    br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1003// CHECK11:       omp_offload.failed:1004// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1005// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1006// CHECK11:       omp_offload.cont:1007// CHECK11-NEXT:    [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41008// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])1009// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41010// CHECK11-NEXT:    [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 41011// CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP51]])1012// CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 41013// CHECK11-NEXT:    ret i32 [[TMP52]]1014//1015//1016// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l821017// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1018// CHECK11-NEXT:  entry:1019// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 41020// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 41021// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41022// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41023// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41024// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 41025// CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 41026// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41027// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41028// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41029// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 41030// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41031// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41032// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])1033// CHECK11-NEXT:    ret void1034//1035//1036// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined1037// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1038// CHECK11-NEXT:  entry:1039// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41040// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41041// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 41042// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 41043// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41044// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41045// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41046// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 81047// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41048// CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41049// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41050// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 41051// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 81052// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41053// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41054// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 81055// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 81056// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81057// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41058// CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 41059// CHECK11-NEXT:    [[J12:%.*]] = alloca i32, align 41060// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41061// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41062// CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 41063// CHECK11-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 41064// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41065// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41066// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41067// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41068// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 41069// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 41070// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41071// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 41072// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41073// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 41074// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 41075// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 41076// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41077// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 01078// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11079// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641080// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41081// CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 01082// CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11083// CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i641084// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]1085// CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 11086// CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 81087// CHECK11-NEXT:    store i32 0, ptr [[I]], align 41088// CHECK11-NEXT:    store i32 0, ptr [[J]], align 41089// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41090// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]1091// CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]1092// CHECK11:       land.lhs.true:1093// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41094// CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]1095// CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]1096// CHECK11:       omp.precond.then:1097// CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 81098// CHECK11-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81099// CHECK11-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 81100// CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 81101// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41102// CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41103// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 41104// CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1105// CHECK11-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81106// CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81107// CHECK11-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]1108// CHECK11-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1109// CHECK11:       cond.true:1110// CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81111// CHECK11-NEXT:    br label [[COND_END:%.*]]1112// CHECK11:       cond.false:1113// CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81114// CHECK11-NEXT:    br label [[COND_END]]1115// CHECK11:       cond.end:1116// CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]1117// CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 81118// CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 81119// CHECK11-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 81120// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1121// CHECK11:       omp.inner.for.cond:1122// CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81123// CHECK11-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81124// CHECK11-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]1125// CHECK11-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1126// CHECK11:       omp.inner.for.body:1127// CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81128// CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41129// CHECK11-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 01130// CHECK11-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 11131// CHECK11-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]1132// CHECK11-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i641133// CHECK11-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]1134// CHECK11-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 11135// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]1136// CHECK11-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i321137// CHECK11-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 41138// CHECK11-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81139// CHECK11-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81140// CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41141// CHECK11-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 01142// CHECK11-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 11143// CHECK11-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]1144// CHECK11-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i641145// CHECK11-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]1146// CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41147// CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 01148// CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 11149// CHECK11-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]1150// CHECK11-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i641151// CHECK11-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]1152// CHECK11-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]1153// CHECK11-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 11154// CHECK11-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]1155// CHECK11-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i321156// CHECK11-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 41157// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 41158// CHECK11-NEXT:    [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]]1159// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP28]]1160// CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 41161// CHECK11-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP29]]1162// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX36]], align 41163// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1164// CHECK11:       omp.body.continue:1165// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1166// CHECK11:       omp.inner.for.inc:1167// CHECK11-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81168// CHECK11-NEXT:    [[ADD37:%.*]] = add nsw i64 [[TMP30]], 11169// CHECK11-NEXT:    store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 81170// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1171// CHECK11:       omp.inner.for.end:1172// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1173// CHECK11:       omp.loop.exit:1174// CHECK11-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41175// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 41176// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])1177// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]1178// CHECK11:       omp.precond.end:1179// CHECK11-NEXT:    ret void1180//1181//1182// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_1183// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1184// CHECK11-NEXT:  entry:1185// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41186// CHECK11-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 41187// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41188// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41189// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41190// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41191// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41192// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81193// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41194// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01195// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 41196// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01197// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 41198// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01199// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41200// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01201// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01202// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01203// CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 41204// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11205// CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 41206// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21207// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 41208// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31209// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 41210// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41211// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 41212// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51213// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 41214// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61215// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41216// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71217// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 41218// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81219// CHECK11-NEXT:    store i64 20, ptr [[TMP13]], align 81220// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91221// CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 81222// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101223// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41224// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111225// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41226// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121227// CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 41228// CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]])1229// CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01230// CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1231// CHECK11:       omp_offload.failed:1232// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR3]]1233// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1234// CHECK11:       omp_offload.cont:1235// CHECK11-NEXT:    ret i32 01236//1237//1238// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l681239// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1240// CHECK11-NEXT:  entry:1241// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41242// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41243// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41244// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]])1245// CHECK11-NEXT:    ret void1246//1247//1248// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined1249// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1250// CHECK11-NEXT:  entry:1251// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41252// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41253// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41254// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41255// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41256// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41257// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41258// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41259// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41260// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41261// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41262// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41263// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41264// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41265// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41266// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41267// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41268// CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 41269// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41270// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41271// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41272// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41273// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1274// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41275// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 191276// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1277// CHECK11:       cond.true:1278// CHECK11-NEXT:    br label [[COND_END:%.*]]1279// CHECK11:       cond.false:1280// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41281// CHECK11-NEXT:    br label [[COND_END]]1282// CHECK11:       cond.end:1283// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1284// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41285// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41286// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41287// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1288// CHECK11:       omp.inner.for.cond:1289// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41290// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41291// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1292// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1293// CHECK11:       omp.inner.for.body:1294// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41295// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 21296// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 11297// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1298// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41299// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41300// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41301// CHECK11-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 21302// CHECK11-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 21303// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]1304// CHECK11-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 11305// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]1306// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[J]], align 41307// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 41308// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]]1309// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 41310// CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]1311// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 41312// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1313// CHECK11:       omp.body.continue:1314// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1315// CHECK11:       omp.inner.for.inc:1316// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41317// CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 11318// CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41319// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1320// CHECK11:       omp.inner.for.end:1321// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1322// CHECK11:       omp.loop.exit:1323// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1324// CHECK11-NEXT:    ret void1325//1326