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1// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _2// expected-no-diagnostics3#ifndef HEADER4#define HEADER5 6// Test host codegen.7// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK18// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s9// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK110// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK311// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s12// RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK313 14// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"15// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s16// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"17// RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"18// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s19// RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"20#ifdef CK121 22template <typename T, int X, long long Y>23struct SS{24  T a[X][Y];25 26  int foo(void) {27 28    #pragma omp target29    #pragma omp teams distribute parallel for collapse(2)30    for(int i = 0; i < X; i++) {31      for(int j = 0; j < Y; j++) {32        a[i][j] = (T)0;33      }34    }35 36    // discard loop variables not needed here37 38 39    return a[0][0];40  }41};42 43int teams_template_struct(void) {44  SS<int, 123, 456> V;45  return V.foo();46 47}48#endif // CK149 50// Test host codegen.51// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK952// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s53// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK954// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1155// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s56// RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1157 58// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"59// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s60// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"61// RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"62// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s63// RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"64#ifdef CK265 66template <typename T, int n, int m>67int tmain(T argc) {68  T a[n][m];69  #pragma omp target70  #pragma omp teams distribute parallel for collapse(2)71  for(int i = 0; i < n; i++) {72    for(int j = 0; j < m; j++) {73      a[i][j] = (T)0;74    }75  }76  return 0;77}78 79int main (int argc, char **argv) {80  int n = 100;81  int m = 2;82  int a[n][m];83  #pragma omp target84  #pragma omp teams distribute parallel for collapse(2)85  for(int i = 0; i < n; i++) {86    for(int j = 0; j < m; j++) {87      a[i][j] = 0;88    }89  }90  return tmain<int, 10, 2>(argc);91}92 93 94 95 96 97 98 99 100// discard loop variables not needed here101 102 103#endif // CK2104#endif // #ifndef HEADER105// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv106// CHECK1-SAME: () #[[ATTR0:[0-9]+]] {107// CHECK1-NEXT:  entry:108// CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4109// CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])110// CHECK1-NEXT:    ret i32 [[CALL]]111//112//113// CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv114// CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {115// CHECK1-NEXT:  entry:116// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8117// CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8118// CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8119// CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8120// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4121// CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4122// CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8123// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8124// CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8125// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0126// CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0127// CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8128// CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0129// CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8130// CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0131// CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8132// CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0133// CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0134// CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0135// CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4136// CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1137// CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4138// CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2139// CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8140// CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3141// CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8142// CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4143// CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8144// CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5145// CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8146// CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6147// CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8148// CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7149// CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8150// CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8151// CHECK1-NEXT:    store i64 56088, ptr [[TMP13]], align 8152// CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9153// CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8154// CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10155// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4156// CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11157// CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4158// CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12159// CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4160// CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])161// CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0162// CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]163// CHECK1:       omp_offload.failed:164// CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]165// CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]166// CHECK1:       omp_offload.cont:167// CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0168// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0169// CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0170// CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4171// CHECK1-NEXT:    ret i32 [[TMP20]]172//173//174// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28175// CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {176// CHECK1-NEXT:  entry:177// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8178// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8179// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8180// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])181// CHECK1-NEXT:    ret void182//183//184// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined185// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {186// CHECK1-NEXT:  entry:187// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8188// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8189// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8190// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4191// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4192// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4193// CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4194// CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4195// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4196// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4197// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4198// CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4199// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8200// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8201// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8202// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8203// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4204// CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4205// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4206// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4207// CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8208// CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4209// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)210// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4211// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087212// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]213// CHECK1:       cond.true:214// CHECK1-NEXT:    br label [[COND_END:%.*]]215// CHECK1:       cond.false:216// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4217// CHECK1-NEXT:    br label [[COND_END]]218// CHECK1:       cond.end:219// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]220// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4221// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4222// CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4223// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]224// CHECK1:       omp.inner.for.cond:225// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4226// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4227// CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]228// CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]229// CHECK1:       omp.inner.for.body:230// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4231// CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64232// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4233// CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64234// CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])235// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]236// CHECK1:       omp.inner.for.inc:237// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4238// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4239// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]240// CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4241// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]242// CHECK1:       omp.inner.for.end:243// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]244// CHECK1:       omp.loop.exit:245// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])246// CHECK1-NEXT:    ret void247//248//249// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined250// CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {251// CHECK1-NEXT:  entry:252// CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8253// CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8254// CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8255// CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8256// CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8257// CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4258// CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4259// CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4260// CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4261// CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4262// CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4263// CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4264// CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4265// CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4266// CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8267// CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8268// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8269// CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8270// CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8271// CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8272// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4273// CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4274// CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8275// CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32276// CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8277// CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32278// CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4279// CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4280// CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4281// CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4282// CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8283// CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4284// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)285// CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4286// CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087287// CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]288// CHECK1:       cond.true:289// CHECK1-NEXT:    br label [[COND_END:%.*]]290// CHECK1:       cond.false:291// CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4292// CHECK1-NEXT:    br label [[COND_END]]293// CHECK1:       cond.end:294// CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]295// CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4296// CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4297// CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4298// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]299// CHECK1:       omp.inner.for.cond:300// CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4301// CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4302// CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]303// CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]304// CHECK1:       omp.inner.for.body:305// CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4306// CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 456307// CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1308// CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]309// CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4310// CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4311// CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4312// CHECK1-NEXT:    [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456313// CHECK1-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456314// CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]315// CHECK1-NEXT:    [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1316// CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]317// CHECK1-NEXT:    store i32 [[ADD7]], ptr [[J]], align 4318// CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0319// CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4320// CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64321// CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]322// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[J]], align 4323// CHECK1-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64324// CHECK1-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]325// CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX9]], align 4326// CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]327// CHECK1:       omp.body.continue:328// CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]329// CHECK1:       omp.inner.for.inc:330// CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4331// CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1332// CHECK1-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4333// CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]334// CHECK1:       omp.inner.for.end:335// CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]336// CHECK1:       omp.loop.exit:337// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])338// CHECK1-NEXT:    ret void339//340//341// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv342// CHECK3-SAME: () #[[ATTR0:[0-9]+]] {343// CHECK3-NEXT:  entry:344// CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4345// CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])346// CHECK3-NEXT:    ret i32 [[CALL]]347//348//349// CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv350// CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {351// CHECK3-NEXT:  entry:352// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4353// CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4354// CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4355// CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4356// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4357// CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4358// CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8359// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4360// CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4361// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0362// CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0363// CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4364// CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0365// CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4366// CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0367// CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4368// CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0369// CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0370// CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0371// CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4372// CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1373// CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4374// CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2375// CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4376// CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3377// CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4378// CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4379// CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4380// CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5381// CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4382// CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6383// CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4384// CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7385// CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4386// CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8387// CHECK3-NEXT:    store i64 56088, ptr [[TMP13]], align 8388// CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9389// CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8390// CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10391// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4392// CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11393// CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4394// CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12395// CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4396// CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])397// CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0398// CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]399// CHECK3:       omp_offload.failed:400// CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]401// CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]402// CHECK3:       omp_offload.cont:403// CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0404// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0405// CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0406// CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4407// CHECK3-NEXT:    ret i32 [[TMP20]]408//409//410// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28411// CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {412// CHECK3-NEXT:  entry:413// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4414// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4415// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4416// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])417// CHECK3-NEXT:    ret void418//419//420// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined421// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {422// CHECK3-NEXT:  entry:423// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4424// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4425// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4426// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4427// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4428// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4429// CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4430// CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4431// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4432// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4433// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4434// CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4435// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4436// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4437// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4438// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4439// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4440// CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_COMB_UB]], align 4441// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4442// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4443// CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4444// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4445// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)446// CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4447// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087448// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]449// CHECK3:       cond.true:450// CHECK3-NEXT:    br label [[COND_END:%.*]]451// CHECK3:       cond.false:452// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4453// CHECK3-NEXT:    br label [[COND_END]]454// CHECK3:       cond.end:455// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]456// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4457// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4458// CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4459// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]460// CHECK3:       omp.inner.for.cond:461// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4462// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4463// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]464// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]465// CHECK3:       omp.inner.for.body:466// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4467// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4468// CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])469// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]470// CHECK3:       omp.inner.for.inc:471// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4472// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4473// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]474// CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4475// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]476// CHECK3:       omp.inner.for.end:477// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]478// CHECK3:       omp.loop.exit:479// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])480// CHECK3-NEXT:    ret void481//482//483// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined.omp_outlined484// CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {485// CHECK3-NEXT:  entry:486// CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4487// CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4488// CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4489// CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4490// CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4491// CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4492// CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4493// CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4494// CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4495// CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4496// CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4497// CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4498// CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4499// CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4500// CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4501// CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4502// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4503// CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4504// CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4505// CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4506// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4507// CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4508// CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4509// CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4510// CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4511// CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4512// CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4513// CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4514// CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4515// CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4516// CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)517// CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4518// CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087519// CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]520// CHECK3:       cond.true:521// CHECK3-NEXT:    br label [[COND_END:%.*]]522// CHECK3:       cond.false:523// CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4524// CHECK3-NEXT:    br label [[COND_END]]525// CHECK3:       cond.end:526// CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]527// CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4528// CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4529// CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4530// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]531// CHECK3:       omp.inner.for.cond:532// CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4533// CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4534// CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]535// CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]536// CHECK3:       omp.inner.for.body:537// CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4538// CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 456539// CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1540// CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]541// CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4542// CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4543// CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4544// CHECK3-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456545// CHECK3-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456546// CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]547// CHECK3-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1548// CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]549// CHECK3-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4550// CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0551// CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4552// CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP13]]553// CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[J]], align 4554// CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]]555// CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4556// CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]557// CHECK3:       omp.body.continue:558// CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]559// CHECK3:       omp.inner.for.inc:560// CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4561// CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1562// CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4563// CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]564// CHECK3:       omp.inner.for.end:565// CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]566// CHECK3:       omp.loop.exit:567// CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])568// CHECK3-NEXT:    ret void569//570//571// CHECK9-LABEL: define {{[^@]+}}@main572// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {573// CHECK9-NEXT:  entry:574// CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4575// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4576// CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8577// CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4578// CHECK9-NEXT:    [[M:%.*]] = alloca i32, align 4579// CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8580// CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8581// CHECK9-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i64, align 8582// CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8583// CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8584// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8585// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8586// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8587// CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8588// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4589// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4590// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4591// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4592// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8593// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8594// CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4595// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4596// CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8597// CHECK9-NEXT:    store i32 100, ptr [[N]], align 4598// CHECK9-NEXT:    store i32 2, ptr [[M]], align 4599// CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4600// CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64601// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M]], align 4602// CHECK9-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64603// CHECK9-NEXT:    [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()604// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8605// CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]606// CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4607// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8608// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8609// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N]], align 4610// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4611// CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8612// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[M]], align 4613// CHECK9-NEXT:    store i32 [[TMP8]], ptr [[M_CASTED]], align 4614// CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8615// CHECK9-NEXT:    [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]616// CHECK9-NEXT:    [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4617// CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)618// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0619// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP12]], align 8620// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0621// CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP13]], align 8622// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0623// CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8624// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1625// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP15]], align 8626// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1627// CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP16]], align 8628// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1629// CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8630// CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2631// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP18]], align 8632// CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2633// CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP19]], align 8634// CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2635// CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8636// CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3637// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP21]], align 8638// CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3639// CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP22]], align 8640// CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3641// CHECK9-NEXT:    store ptr null, ptr [[TMP23]], align 8642// CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4643// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 8644// CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4645// CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP25]], align 8646// CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4647// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[TMP26]], align 8648// CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4649// CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8650// CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0651// CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0652// CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0653// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[N]], align 4654// CHECK9-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4655// CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[M]], align 4656// CHECK9-NEXT:    store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4657// CHECK9-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4658// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0659// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1660// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64661// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4662// CHECK9-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0663// CHECK9-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1664// CHECK9-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64665// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]666// CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1667// CHECK9-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8668// CHECK9-NEXT:    [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8669// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP35]], 1670// CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0671// CHECK9-NEXT:    store i32 3, ptr [[TMP36]], align 4672// CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1673// CHECK9-NEXT:    store i32 5, ptr [[TMP37]], align 4674// CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2675// CHECK9-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 8676// CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3677// CHECK9-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 8678// CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4679// CHECK9-NEXT:    store ptr [[TMP30]], ptr [[TMP40]], align 8680// CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5681// CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8682// CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6683// CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8684// CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7685// CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8686// CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8687// CHECK9-NEXT:    store i64 [[ADD]], ptr [[TMP44]], align 8688// CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9689// CHECK9-NEXT:    store i64 0, ptr [[TMP45]], align 8690// CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10691// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4692// CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11693// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4694// CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12695// CHECK9-NEXT:    store i32 0, ptr [[TMP48]], align 4696// CHECK9-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]])697// CHECK9-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0698// CHECK9-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]699// CHECK9:       omp_offload.failed:700// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]701// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]702// CHECK9:       omp_offload.cont:703// CHECK9-NEXT:    [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4704// CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])705// CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4706// CHECK9-NEXT:    [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8707// CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP52]])708// CHECK9-NEXT:    [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4709// CHECK9-NEXT:    ret i32 [[TMP53]]710//711//712// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83713// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {714// CHECK9-NEXT:  entry:715// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8716// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8717// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8718// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8719// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8720// CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8721// CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8722// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8723// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8724// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8725// CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8726// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8727// CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8728// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])729// CHECK9-NEXT:    ret void730//731//732// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined733// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {734// CHECK9-NEXT:  entry:735// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8736// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8737// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8738// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 8739// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8740// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8741// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8742// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8743// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4744// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4745// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4746// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4747// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8748// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4749// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4750// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8751// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8752// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8753// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4754// CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4755// CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4756// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8757// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8758// CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8759// CHECK9-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 8760// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8761// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8762// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8763// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8764// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8765// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8766// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8767// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8768// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4769// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4770// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4771// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4772// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4773// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0774// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1775// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64776// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4777// CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0778// CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1779// CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64780// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]781// CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1782// CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8783// CHECK9-NEXT:    store i32 0, ptr [[I]], align 4784// CHECK9-NEXT:    store i32 0, ptr [[J]], align 4785// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4786// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]787// CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]788// CHECK9:       land.lhs.true:789// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4790// CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]791// CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]792// CHECK9:       omp.precond.then:793// CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_COMB_LB]], align 8794// CHECK9-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8795// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 8796// CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8797// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4798// CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8799// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4800// CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)801// CHECK9-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8802// CHECK9-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8803// CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]804// CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]805// CHECK9:       cond.true:806// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8807// CHECK9-NEXT:    br label [[COND_END:%.*]]808// CHECK9:       cond.false:809// CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8810// CHECK9-NEXT:    br label [[COND_END]]811// CHECK9:       cond.end:812// CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]813// CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 8814// CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8815// CHECK9-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8816// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]817// CHECK9:       omp.inner.for.cond:818// CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8819// CHECK9-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8820// CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]821// CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]822// CHECK9:       omp.inner.for.body:823// CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 8824// CHECK9-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 8825// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined, i64 [[TMP21]], i64 [[TMP22]], ptr [[TMP0]], ptr [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], ptr [[TMP4]])826// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]827// CHECK9:       omp.inner.for.inc:828// CHECK9-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8829// CHECK9-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 8830// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]]831// CHECK9-NEXT:    store i64 [[ADD]], ptr [[DOTOMP_IV]], align 8832// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]833// CHECK9:       omp.inner.for.end:834// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]835// CHECK9:       omp.loop.exit:836// CHECK9-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8837// CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4838// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])839// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]840// CHECK9:       omp.precond.end:841// CHECK9-NEXT:    ret void842//843//844// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined845// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {846// CHECK9-NEXT:  entry:847// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8848// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8849// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8850// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8851// CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8852// CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 8853// CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8854// CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8855// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8856// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8857// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4858// CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4859// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4860// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4861// CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8862// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4863// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4864// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 8865// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 8866// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8867// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4868// CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4869// CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4870// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8871// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8872// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8873// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8874// CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8875// CHECK9-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 8876// CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8877// CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8878// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8879// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8880// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8881// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8882// CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8883// CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8884// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4885// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4886// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4887// CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4888// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4889// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0890// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1891// CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64892// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4893// CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0894// CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1895// CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64896// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]897// CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1898// CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8899// CHECK9-NEXT:    store i32 0, ptr [[I]], align 4900// CHECK9-NEXT:    store i32 0, ptr [[J]], align 4901// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4902// CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]903// CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]904// CHECK9:       land.lhs.true:905// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4906// CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]907// CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]908// CHECK9:       omp.precond.then:909// CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 8910// CHECK9-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8911// CHECK9-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8912// CHECK9-NEXT:    [[TMP12:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8913// CHECK9-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8914// CHECK9-NEXT:    store i64 [[TMP12]], ptr [[DOTOMP_LB]], align 8915// CHECK9-NEXT:    store i64 [[TMP13]], ptr [[DOTOMP_UB]], align 8916// CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8917// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4918// CHECK9-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8919// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4920// CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)921// CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8922// CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8923// CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]924// CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]925// CHECK9:       cond.true:926// CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8927// CHECK9-NEXT:    br label [[COND_END:%.*]]928// CHECK9:       cond.false:929// CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8930// CHECK9-NEXT:    br label [[COND_END]]931// CHECK9:       cond.end:932// CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]933// CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 8934// CHECK9-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8935// CHECK9-NEXT:    store i64 [[TMP20]], ptr [[DOTOMP_IV]], align 8936// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]937// CHECK9:       omp.inner.for.cond:938// CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8939// CHECK9-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8940// CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]941// CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]942// CHECK9:       omp.inner.for.body:943// CHECK9-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8944// CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4945// CHECK9-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0946// CHECK9-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1947// CHECK9-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]948// CHECK9-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64949// CHECK9-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]]950// CHECK9-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1951// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]952// CHECK9-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32953// CHECK9-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4954// CHECK9-NEXT:    [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8955// CHECK9-NEXT:    [[TMP26:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8956// CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4957// CHECK9-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0958// CHECK9-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1959// CHECK9-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]960// CHECK9-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64961// CHECK9-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]]962// CHECK9-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4963// CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0964// CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1965// CHECK9-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]966// CHECK9-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64967// CHECK9-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]968// CHECK9-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]]969// CHECK9-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1970// CHECK9-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]971// CHECK9-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32972// CHECK9-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4973// CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[I11]], align 4974// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64975// CHECK9-NEXT:    [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]976// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP30]]977// CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[J12]], align 4978// CHECK9-NEXT:    [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64979// CHECK9-NEXT:    [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]980// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX37]], align 4981// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]982// CHECK9:       omp.body.continue:983// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]984// CHECK9:       omp.inner.for.inc:985// CHECK9-NEXT:    [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8986// CHECK9-NEXT:    [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1987// CHECK9-NEXT:    store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8988// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]989// CHECK9:       omp.inner.for.end:990// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]991// CHECK9:       omp.loop.exit:992// CHECK9-NEXT:    [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8993// CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4994// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]])995// CHECK9-NEXT:    br label [[OMP_PRECOND_END]]996// CHECK9:       omp.precond.end:997// CHECK9-NEXT:    ret void998//999//1000// CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_1001// CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1002// CHECK9-NEXT:  entry:1003// CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41004// CHECK9-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 41005// CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 81006// CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 81007// CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 81008// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41009// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41010// CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81011// CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41012// CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01013// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 81014// CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01015// CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 81016// CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 01017// CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 81018// CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01019// CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01020// CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01021// CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 41022// CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11023// CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 41024// CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21025// CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 81026// CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31027// CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 81028// CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41029// CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 81030// CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51031// CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 81032// CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61033// CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 81034// CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71035// CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 81036// CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81037// CHECK9-NEXT:    store i64 20, ptr [[TMP13]], align 81038// CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91039// CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 81040// CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101041// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41042// CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111043// CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41044// CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121045// CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 41046// CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]])1047// CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01048// CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1049// CHECK9:       omp_offload.failed:1050// CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]]1051// CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]1052// CHECK9:       omp_offload.cont:1053// CHECK9-NEXT:    ret i32 01054//1055//1056// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l691057// CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1058// CHECK9-NEXT:  entry:1059// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81060// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81061// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81062// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]])1063// CHECK9-NEXT:    ret void1064//1065//1066// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined1067// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1068// CHECK9-NEXT:  entry:1069// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81070// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81071// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81072// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41073// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41074// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41075// CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41076// CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41077// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41078// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41079// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41080// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 41081// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81082// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81083// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81084// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81085// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41086// CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_COMB_UB]], align 41087// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41088// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41089// CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81090// CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41091// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1092// CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41093// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 191094// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1095// CHECK9:       cond.true:1096// CHECK9-NEXT:    br label [[COND_END:%.*]]1097// CHECK9:       cond.false:1098// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41099// CHECK9-NEXT:    br label [[COND_END]]1100// CHECK9:       cond.end:1101// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1102// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41103// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41104// CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41105// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1106// CHECK9:       omp.inner.for.cond:1107// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41108// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41109// CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1110// CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1111// CHECK9:       omp.inner.for.body:1112// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41113// CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i641114// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41115// CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i641116// CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])1117// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1118// CHECK9:       omp.inner.for.inc:1119// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41120// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41121// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]1122// CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41123// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]1124// CHECK9:       omp.inner.for.end:1125// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1126// CHECK9:       omp.loop.exit:1127// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1128// CHECK9-NEXT:    ret void1129//1130//1131// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined1132// CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1133// CHECK9-NEXT:  entry:1134// CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 81135// CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 81136// CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 81137// CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 81138// CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 81139// CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41140// CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 41141// CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41142// CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41143// CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41144// CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41145// CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41146// CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 41147// CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 41148// CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 81149// CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 81150// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 81151// CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 81152// CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 81153// CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 81154// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41155// CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 41156// CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 81157// CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i321158// CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 81159// CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i321160// CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 41161// CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 41162// CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41163// CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41164// CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 81165// CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41166// CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1167// CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41168// CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 191169// CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1170// CHECK9:       cond.true:1171// CHECK9-NEXT:    br label [[COND_END:%.*]]1172// CHECK9:       cond.false:1173// CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41174// CHECK9-NEXT:    br label [[COND_END]]1175// CHECK9:       cond.end:1176// CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1177// CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41178// CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41179// CHECK9-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41180// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1181// CHECK9:       omp.inner.for.cond:1182// CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41183// CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41184// CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1185// CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1186// CHECK9:       omp.inner.for.body:1187// CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41188// CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 21189// CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 11190// CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1191// CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 41192// CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41193// CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41194// CHECK9-NEXT:    [[DIV4:%.*]] = sdiv i32 [[TMP12]], 21195// CHECK9-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 21196// CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]1197// CHECK9-NEXT:    [[MUL6:%.*]] = mul nsw i32 [[SUB]], 11198// CHECK9-NEXT:    [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]1199// CHECK9-NEXT:    store i32 [[ADD7]], ptr [[J]], align 41200// CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41201// CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i641202// CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]1203// CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[J]], align 41204// CHECK9-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i641205// CHECK9-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]1206// CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX9]], align 41207// CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1208// CHECK9:       omp.body.continue:1209// CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1210// CHECK9:       omp.inner.for.inc:1211// CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41212// CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP15]], 11213// CHECK9-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 41214// CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]1215// CHECK9:       omp.inner.for.end:1216// CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1217// CHECK9:       omp.loop.exit:1218// CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1219// CHECK9-NEXT:    ret void1220//1221//1222// CHECK11-LABEL: define {{[^@]+}}@main1223// CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {1224// CHECK11-NEXT:  entry:1225// CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 41226// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41227// CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 41228// CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 41229// CHECK11-NEXT:    [[M:%.*]] = alloca i32, align 41230// CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 41231// CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 41232// CHECK11-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i32, align 41233// CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 41234// CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 41235// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 41236// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 41237// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 41238// CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 41239// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41240// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41241// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41242// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 41243// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 81244// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81245// CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 41246// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41247// CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 41248// CHECK11-NEXT:    store i32 100, ptr [[N]], align 41249// CHECK11-NEXT:    store i32 2, ptr [[M]], align 41250// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 41251// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M]], align 41252// CHECK11-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()1253// CHECK11-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 41254// CHECK11-NEXT:    [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]1255// CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 41256// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 41257// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 41258// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N]], align 41259// CHECK11-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 41260// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 41261// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M]], align 41262// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[M_CASTED]], align 41263// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 41264// CHECK11-NEXT:    [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]1265// CHECK11-NEXT:    [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 41266// CHECK11-NEXT:    [[TMP10:%.*]] = sext i32 [[TMP9]] to i641267// CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)1268// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01269// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP11]], align 41270// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01271// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP12]], align 41272// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01273// CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 41274// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 11275// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP14]], align 41276// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 11277// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP15]], align 41278// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 11279// CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 41280// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 21281// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP17]], align 41282// CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 21283// CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP18]], align 41284// CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 21285// CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 41286// CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 31287// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP20]], align 41288// CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 31289// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP21]], align 41290// CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 31291// CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 41292// CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 41293// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP23]], align 41294// CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 41295// CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 41296// CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 41297// CHECK11-NEXT:    store i64 [[TMP10]], ptr [[TMP25]], align 41298// CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 41299// CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 41300// CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01301// CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01302// CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 01303// CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 41304// CHECK11-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 41305// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[M]], align 41306// CHECK11-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 41307// CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41308// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP32]], 01309// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11310// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641311// CHECK11-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 41312// CHECK11-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 01313// CHECK11-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 11314// CHECK11-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i641315// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]1316// CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 11317// CHECK11-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 81318// CHECK11-NEXT:    [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 81319// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP34]], 11320// CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01321// CHECK11-NEXT:    store i32 3, ptr [[TMP35]], align 41322// CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11323// CHECK11-NEXT:    store i32 5, ptr [[TMP36]], align 41324// CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21325// CHECK11-NEXT:    store ptr [[TMP27]], ptr [[TMP37]], align 41326// CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31327// CHECK11-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 41328// CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41329// CHECK11-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 41330// CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51331// CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP40]], align 41332// CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61333// CHECK11-NEXT:    store ptr null, ptr [[TMP41]], align 41334// CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71335// CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 41336// CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81337// CHECK11-NEXT:    store i64 [[ADD]], ptr [[TMP43]], align 81338// CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91339// CHECK11-NEXT:    store i64 0, ptr [[TMP44]], align 81340// CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101341// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP45]], align 41342// CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111343// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 41344// CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121345// CHECK11-NEXT:    store i32 0, ptr [[TMP47]], align 41346// CHECK11-NEXT:    [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.region_id, ptr [[KERNEL_ARGS]])1347// CHECK11-NEXT:    [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 01348// CHECK11-NEXT:    br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1349// CHECK11:       omp_offload.failed:1350// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]1351// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1352// CHECK11:       omp_offload.cont:1353// CHECK11-NEXT:    [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 41354// CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])1355// CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 41356// CHECK11-NEXT:    [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 41357// CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP51]])1358// CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 41359// CHECK11-NEXT:    ret i32 [[TMP52]]1360//1361//1362// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l831363// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {1364// CHECK11-NEXT:  entry:1365// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 41366// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 41367// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41368// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41369// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41370// CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 41371// CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 41372// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41373// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41374// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41375// CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 41376// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41377// CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 41378// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])1379// CHECK11-NEXT:    ret void1380//1381//1382// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined1383// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1384// CHECK11-NEXT:  entry:1385// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41386// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41387// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 41388// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 41389// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41390// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41391// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41392// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 81393// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41394// CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41395// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41396// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 41397// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 81398// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41399// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41400// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 81401// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 81402// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81403// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41404// CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 41405// CHECK11-NEXT:    [[J12:%.*]] = alloca i32, align 41406// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41407// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41408// CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 41409// CHECK11-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 41410// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41411// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41412// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41413// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41414// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 41415// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 41416// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41417// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 41418// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41419// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 41420// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 41421// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 41422// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41423// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 01424// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11425// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641426// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41427// CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 01428// CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11429// CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i641430// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]1431// CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 11432// CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 81433// CHECK11-NEXT:    store i32 0, ptr [[I]], align 41434// CHECK11-NEXT:    store i32 0, ptr [[J]], align 41435// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41436// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]1437// CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]1438// CHECK11:       land.lhs.true:1439// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41440// CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]1441// CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]1442// CHECK11:       omp.precond.then:1443// CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_COMB_LB]], align 81444// CHECK11-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81445// CHECK11-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_COMB_UB]], align 81446// CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 81447// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41448// CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41449// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 41450// CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1451// CHECK11-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81452// CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81453// CHECK11-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]1454// CHECK11-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1455// CHECK11:       cond.true:1456// CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81457// CHECK11-NEXT:    br label [[COND_END:%.*]]1458// CHECK11:       cond.false:1459// CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81460// CHECK11-NEXT:    br label [[COND_END]]1461// CHECK11:       cond.end:1462// CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]1463// CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_COMB_UB]], align 81464// CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 81465// CHECK11-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 81466// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1467// CHECK11:       omp.inner.for.cond:1468// CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81469// CHECK11-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81470// CHECK11-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]1471// CHECK11-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1472// CHECK11:       omp.inner.for.body:1473// CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_COMB_LB]], align 81474// CHECK11-NEXT:    [[TMP22:%.*]] = trunc i64 [[TMP21]] to i321475// CHECK11-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_COMB_UB]], align 81476// CHECK11-NEXT:    [[TMP24:%.*]] = trunc i64 [[TMP23]] to i321477// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined, i32 [[TMP22]], i32 [[TMP24]], ptr [[TMP0]], ptr [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], ptr [[TMP4]])1478// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1479// CHECK11:       omp.inner.for.inc:1480// CHECK11-NEXT:    [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81481// CHECK11-NEXT:    [[TMP26:%.*]] = load i64, ptr [[DOTOMP_STRIDE]], align 81482// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]1483// CHECK11-NEXT:    store i64 [[ADD]], ptr [[DOTOMP_IV]], align 81484// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1485// CHECK11:       omp.inner.for.end:1486// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1487// CHECK11:       omp.loop.exit:1488// CHECK11-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41489// CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 41490// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP28]])1491// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]1492// CHECK11:       omp.precond.end:1493// CHECK11-NEXT:    ret void1494//1495//1496// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83.omp_outlined.omp_outlined1497// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {1498// CHECK11-NEXT:  entry:1499// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41500// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41501// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41502// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41503// CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 41504// CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 41505// CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 41506// CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 41507// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41508// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 81509// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41510// CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 41511// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 41512// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 41513// CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 81514// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41515// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41516// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 81517// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 81518// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 81519// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41520// CHECK11-NEXT:    [[I13:%.*]] = alloca i32, align 41521// CHECK11-NEXT:    [[J14:%.*]] = alloca i32, align 41522// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41523// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41524// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41525// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41526// CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 41527// CHECK11-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 41528// CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 41529// CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 41530// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41531// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 41532// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 41533// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 41534// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 41535// CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 41536// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 41537// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 41538// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 41539// CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 41540// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41541// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 01542// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 11543// CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i641544// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41545// CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 01546// CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 11547// CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i641548// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]1549// CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 11550// CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 81551// CHECK11-NEXT:    store i32 0, ptr [[I]], align 41552// CHECK11-NEXT:    store i32 0, ptr [[J]], align 41553// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 41554// CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]1555// CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]1556// CHECK11:       land.lhs.true:1557// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41558// CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]1559// CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]1560// CHECK11:       omp.precond.then:1561// CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 81562// CHECK11-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81563// CHECK11-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 81564// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41565// CHECK11-NEXT:    [[CONV11:%.*]] = zext i32 [[TMP12]] to i641566// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41567// CHECK11-NEXT:    [[CONV12:%.*]] = zext i32 [[TMP13]] to i641568// CHECK11-NEXT:    store i64 [[CONV11]], ptr [[DOTOMP_LB]], align 81569// CHECK11-NEXT:    store i64 [[CONV12]], ptr [[DOTOMP_UB]], align 81570// CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 81571// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41572// CHECK11-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41573// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 41574// CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)1575// CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81576// CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81577// CHECK11-NEXT:    [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]1578// CHECK11-NEXT:    br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1579// CHECK11:       cond.true:1580// CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 81581// CHECK11-NEXT:    br label [[COND_END:%.*]]1582// CHECK11:       cond.false:1583// CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81584// CHECK11-NEXT:    br label [[COND_END]]1585// CHECK11:       cond.end:1586// CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]1587// CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 81588// CHECK11-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_LB]], align 81589// CHECK11-NEXT:    store i64 [[TMP20]], ptr [[DOTOMP_IV]], align 81590// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1591// CHECK11:       omp.inner.for.cond:1592// CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81593// CHECK11-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTOMP_UB]], align 81594// CHECK11-NEXT:    [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]1595// CHECK11-NEXT:    br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1596// CHECK11:       omp.inner.for.body:1597// CHECK11-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81598// CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41599// CHECK11-NEXT:    [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 01600// CHECK11-NEXT:    [[DIV18:%.*]] = sdiv i32 [[SUB17]], 11601// CHECK11-NEXT:    [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]1602// CHECK11-NEXT:    [[CONV20:%.*]] = sext i32 [[MUL19]] to i641603// CHECK11-NEXT:    [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]]1604// CHECK11-NEXT:    [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 11605// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL22]]1606// CHECK11-NEXT:    [[CONV23:%.*]] = trunc i64 [[ADD]] to i321607// CHECK11-NEXT:    store i32 [[CONV23]], ptr [[I13]], align 41608// CHECK11-NEXT:    [[TMP25:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81609// CHECK11-NEXT:    [[TMP26:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81610// CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41611// CHECK11-NEXT:    [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 01612// CHECK11-NEXT:    [[DIV25:%.*]] = sdiv i32 [[SUB24]], 11613// CHECK11-NEXT:    [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]1614// CHECK11-NEXT:    [[CONV27:%.*]] = sext i32 [[MUL26]] to i641615// CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]]1616// CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 41617// CHECK11-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 01618// CHECK11-NEXT:    [[DIV30:%.*]] = sdiv i32 [[SUB29]], 11619// CHECK11-NEXT:    [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]1620// CHECK11-NEXT:    [[CONV32:%.*]] = sext i32 [[MUL31]] to i641621// CHECK11-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]1622// CHECK11-NEXT:    [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]]1623// CHECK11-NEXT:    [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 11624// CHECK11-NEXT:    [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]1625// CHECK11-NEXT:    [[CONV37:%.*]] = trunc i64 [[ADD36]] to i321626// CHECK11-NEXT:    store i32 [[CONV37]], ptr [[J14]], align 41627// CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[I13]], align 41628// CHECK11-NEXT:    [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]]1629// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP30]]1630// CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[J14]], align 41631// CHECK11-NEXT:    [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP31]]1632// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX38]], align 41633// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1634// CHECK11:       omp.body.continue:1635// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1636// CHECK11:       omp.inner.for.inc:1637// CHECK11-NEXT:    [[TMP32:%.*]] = load i64, ptr [[DOTOMP_IV]], align 81638// CHECK11-NEXT:    [[ADD39:%.*]] = add nsw i64 [[TMP32]], 11639// CHECK11-NEXT:    store i64 [[ADD39]], ptr [[DOTOMP_IV]], align 81640// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1641// CHECK11:       omp.inner.for.end:1642// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1643// CHECK11:       omp.loop.exit:1644// CHECK11-NEXT:    [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41645// CHECK11-NEXT:    [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 41646// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP34]])1647// CHECK11-NEXT:    br label [[OMP_PRECOND_END]]1648// CHECK11:       omp.precond.end:1649// CHECK11-NEXT:    ret void1650//1651//1652// CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_1653// CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {1654// CHECK11-NEXT:  entry:1655// CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 41656// CHECK11-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 41657// CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 41658// CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 41659// CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 41660// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41661// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41662// CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 81663// CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 41664// CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01665// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 41666// CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01667// CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 41668// CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 01669// CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 41670// CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 01671// CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 01672// CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 01673// CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 41674// CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11675// CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 41676// CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 21677// CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 41678// CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 31679// CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 41680// CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 41681// CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 41682// CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 51683// CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 41684// CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 61685// CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 41686// CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 71687// CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 41688// CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 81689// CHECK11-NEXT:    store i64 20, ptr [[TMP13]], align 81690// CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 91691// CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 81692// CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 101693// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 41694// CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 111695// CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 41696// CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 121697// CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 41698// CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.region_id, ptr [[KERNEL_ARGS]])1699// CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 01700// CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]1701// CHECK11:       omp_offload.failed:1702// CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69(ptr [[A]]) #[[ATTR3]]1703// CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]1704// CHECK11:       omp_offload.cont:1705// CHECK11-NEXT:    ret i32 01706//1707//1708// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l691709// CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1710// CHECK11-NEXT:  entry:1711// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41712// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41713// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41714// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined, ptr [[TMP0]])1715// CHECK11-NEXT:    ret void1716//1717//1718// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined1719// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1720// CHECK11-NEXT:  entry:1721// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41722// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41723// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41724// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41725// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41726// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41727// CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 41728// CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 41729// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41730// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41731// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41732// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41733// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41734// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41735// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41736// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41737// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 41738// CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_COMB_UB]], align 41739// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41740// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41741// CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41742// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 41743// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1744// CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41745// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 191746// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1747// CHECK11:       cond.true:1748// CHECK11-NEXT:    br label [[COND_END:%.*]]1749// CHECK11:       cond.false:1750// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41751// CHECK11-NEXT:    br label [[COND_END]]1752// CHECK11:       cond.end:1753// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]1754// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 41755// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41756// CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 41757// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1758// CHECK11:       omp.inner.for.cond:1759// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41760// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41761// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]1762// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1763// CHECK11:       omp.inner.for.body:1764// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 41765// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 41766// CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])1767// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1768// CHECK11:       omp.inner.for.inc:1769// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41770// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 41771// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]1772// CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 41773// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1774// CHECK11:       omp.inner.for.end:1775// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1776// CHECK11:       omp.loop.exit:1777// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])1778// CHECK11-NEXT:    ret void1779//1780//1781// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l69.omp_outlined.omp_outlined1782// CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {1783// CHECK11-NEXT:  entry:1784// CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 41785// CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 41786// CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 41787// CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 41788// CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 41789// CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 41790// CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 41791// CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 41792// CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 41793// CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 41794// CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 41795// CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 41796// CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 41797// CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 41798// CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 41799// CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 41800// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 41801// CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 41802// CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 41803// CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 41804// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 41805// CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 41806// CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 41807// CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 41808// CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 41809// CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 41810// CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 41811// CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 41812// CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 41813// CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 41814// CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)1815// CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41816// CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 191817// CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]1818// CHECK11:       cond.true:1819// CHECK11-NEXT:    br label [[COND_END:%.*]]1820// CHECK11:       cond.false:1821// CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41822// CHECK11-NEXT:    br label [[COND_END]]1823// CHECK11:       cond.end:1824// CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]1825// CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 41826// CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 41827// CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 41828// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]1829// CHECK11:       omp.inner.for.cond:1830// CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41831// CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 41832// CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]1833// CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]1834// CHECK11:       omp.inner.for.body:1835// CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41836// CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 21837// CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 11838// CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]1839// CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 41840// CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41841// CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41842// CHECK11-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP12]], 21843// CHECK11-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 21844// CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]1845// CHECK11-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 11846// CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]1847// CHECK11-NEXT:    store i32 [[ADD6]], ptr [[J]], align 41848// CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 41849// CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP13]]1850// CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[J]], align 41851// CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP14]]1852// CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 41853// CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]1854// CHECK11:       omp.body.continue:1855// CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]1856// CHECK11:       omp.inner.for.inc:1857// CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 41858// CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP15]], 11859// CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 41860// CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]1861// CHECK11:       omp.inner.for.end:1862// CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]1863// CHECK11:       omp.loop.exit:1864// CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])1865// CHECK11-NEXT:    ret void1866//1867